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JP2006196771A - Chalcopyrite thin film solar cell and method for producing the same - Google Patents

Chalcopyrite thin film solar cell and method for producing the same Download PDF

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JP2006196771A
JP2006196771A JP2005008055A JP2005008055A JP2006196771A JP 2006196771 A JP2006196771 A JP 2006196771A JP 2005008055 A JP2005008055 A JP 2005008055A JP 2005008055 A JP2005008055 A JP 2005008055A JP 2006196771 A JP2006196771 A JP 2006196771A
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JP4549193B2 (en
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Masashi Aoki
誠志 青木
Kentaro Matsunaga
健太郎 松永
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Abstract

【課題】 光電変換効率の向上を実現し得るカルコパイライト型薄膜太陽電池及びその製造方法を提供する。
【解決手段】 ソーダライムガラス基板1上に形成されたMo電極層2上に、Cu、In及びGaを含むプリカーサ層4をスパッタリング法により形成するプリカーサ形成工程と、プリカーサ形成が行われた基板1に対して、500℃より高く、かつ、基板融点より低い温度範囲のH2Seガス雰囲気中で熱処理を行って光吸収層4を形成するセレン化工程と、光吸収層4上に、InAlSを含むn型のバッファ層5を形成するバッファ層形成工程と、バッファ層5上に透明電極層6を形成する透明電極層形成工程と、を行ってカルコパイライト型薄膜太陽電池を得る。
【選択図】 図1
PROBLEM TO BE SOLVED: To provide a chalcopyrite thin film solar cell capable of improving the photoelectric conversion efficiency and a method for producing the same.
A precursor forming step of forming a precursor layer 4 containing Cu, In, and Ga on a Mo electrode layer 2 formed on a soda lime glass substrate 1 by a sputtering method, and a substrate 1 on which the precursor is formed. In contrast, a selenization process for forming the light absorption layer 4 by performing heat treatment in an H 2 Se gas atmosphere at a temperature range higher than 500 ° C. and lower than the melting point of the substrate, and InAlS on the light absorption layer 4 A chalcopyrite thin film solar cell is obtained by performing a buffer layer forming step for forming the n-type buffer layer 5 and a transparent electrode layer forming step for forming the transparent electrode layer 6 on the buffer layer 5.
[Selection] Figure 1

Description

本発明は、カルコパイライト型薄膜太陽電池及びその製造方法に関し、特に、光吸収層と透明電極層の間にバッファ層を形成したカルコパイライト型薄膜太陽電池及びその製造方法に関する。   The present invention relates to a chalcopyrite thin film solar cell and a method for manufacturing the same, and more particularly to a chalcopyrite thin film solar cell in which a buffer layer is formed between a light absorption layer and a transparent electrode layer and a method for manufacturing the same.

シリコン太陽電池、薄膜太陽電池、化合物太陽電池などの種類に大別される各種太陽電池のうち、薄膜型のものは薄膜技術を応用した光デバイスとして製造プロセスが簡易かつ低エネルギーで済むという利点から商品化開発が進んでいる。カルコパイライト型薄膜太陽電池は薄膜型種類に属し、I族、III族及びVI族の元素を構成成分とするカルコパイライト化合物(Cu(In+Ga)Se2 )から成るCIGS層をp型の光吸収層として備える。そして、このような化合物組成で形成される光吸収層により、特に、ソーダライムガラスなどアルカリ金属含有ガラス基板と組み合せて用いたときに高い光電効率が得られることが知られている。また、不純物混入や欠陥格子に起因する光劣化(経年変化)現象の大幅削減に基づく高い信頼性、長波長帯域を含む広い光吸収波長領域において得られる光感度特性、高い水準の光吸収係数などの利点の他に、優れた耐放射線特性を備えており、量産実用化を目的とした研究開発が進展している。 Of the various types of solar cells that are broadly classified into silicon solar cells, thin film solar cells, compound solar cells, etc., the thin film type has the advantage that the manufacturing process is simple and requires low energy as an optical device applying thin film technology. Commercialization development is progressing. A chalcopyrite thin film solar cell belongs to a thin film type, and a CIGS layer made of a chalcopyrite compound (Cu (In + Ga) Se 2 ) containing elements of Group I, Group III and Group VI as a p-type light absorption layer. Prepare as. And it is known that the light absorption layer formed with such a compound composition can provide high photoelectric efficiency particularly when used in combination with an alkali metal-containing glass substrate such as soda lime glass. In addition, high reliability based on drastic reduction of light degradation (aging) phenomenon due to impurity contamination and defect grating, photosensitivity characteristics obtained in a wide light absorption wavelength region including long wavelength band, high level light absorption coefficient, etc. In addition to these advantages, it has excellent radiation resistance, and research and development for the purpose of commercial production is progressing.

このCIGS層を備えた薄膜太陽電池の一般的構造を図1に示す。図1を参照して、この太陽電池は、ソーダライムガラス(SLG)基板1上に、Mo金属層2から成る正極たる裏面電極層と、SLG基板1に由来して生じるNaムラを防止するためのNaディップ層3と、上記のCIGS光吸収層4と、n型のバッファ層5と、負極たる透明電極層6による最外表面層とを備えた多層積層構造7で構成される。   A general structure of a thin-film solar cell provided with this CIGS layer is shown in FIG. Referring to FIG. 1, this solar cell prevents a non-uniformity of Na originating from a back electrode layer as a positive electrode made of Mo metal layer 2 and SLG substrate 1 on soda lime glass (SLG) substrate 1. The multilayer structure 7 including the Na dip layer 3, the CIGS light absorption layer 4, the n-type buffer layer 5, and the outermost surface layer formed of the transparent electrode layer 6 serving as the negative electrode.

そして、この多層積層構造7の表面受光部から太陽光などの照射光が入射すると、多層積層構造のp−n接合付近では、バンドギャップ以上のエネルギーを有する照射光によって励起されて一対の電子及び正孔が生じる。励起された電子と正孔とは拡散によりp−n接合部に達し、接合の内部電界により、電子がn領域に、正孔がp領域に集合して分離される。この結果、n領域が負に帯電し、p領域が正に帯電し、各領域に設けた電極8,9間で電位差が生じる。そして、この電位差を起電カとして、各電極間を導線で結線したときに光電流が得られ、これが太陽電池の原理である。   And when irradiation light, such as sunlight, enters from the surface light-receiving part of this multilayer laminated structure 7, in the vicinity of the pn junction of the multilayer laminated structure, it is excited by the irradiation light having energy greater than or equal to the band gap, and a pair of electrons and Holes are generated. The excited electrons and holes reach the pn junction by diffusion, and the electrons are collected in the n region and the holes are separated in the p region due to the internal electric field of the junction. As a result, the n region is negatively charged, the p region is positively charged, and a potential difference is generated between the electrodes 8 and 9 provided in each region. Then, using this potential difference as an electromotive force, a photocurrent is obtained when the electrodes are connected by a conductive wire, which is the principle of the solar cell.

図2は、図1に示すカルコパイライト型薄膜太陽電池を構成する多層積層構造7の製造工程を示す工程図である。   FIG. 2 is a process diagram showing a manufacturing process of the multilayer laminated structure 7 constituting the chalcopyrite thin film solar cell shown in FIG.

各工程に応じて順番に説明すると、多層積層構造7を作製するに際しては、まず、SLGなどのガラス基板に対して、金属Moターゲットを用いたスパッタリング法により、Mo電極層の成膜を行う(Mo電極層成膜工程:図2(a))。   In order to describe in order according to each step, when the multilayer laminated structure 7 is manufactured, first, a Mo electrode layer is formed on a glass substrate such as SLG by a sputtering method using a metal Mo target ( Mo electrode layer film forming step: FIG. 2 (a)).

次に、Mo電極層が形成された基板ごと、レーザー切削により所望サイズに分割する第1スクライブ工程を行う(図2(b))。   Next, the 1st scribing process which divides | segments the board | substrate with which Mo electrode layer was formed into desired size by laser cutting is performed (FIG.2 (b)).

その後、削り屑などを除去するために水洗浄などにより基板を清浄し、これを硫化ナトリウム希釈溶液などに浸漬して、Naディップ層を付着形成した後に、In金属ターゲット及びCu−Ga合金ターゲットをそれぞれ用いたスパッタ成膜法により、In層とCu−Ga層との二層構造から成る積層成膜を行い、これを光吸収層のプリカーサとする(図2(c))。   Thereafter, to remove shavings and the like, the substrate is cleaned by water washing or the like, and this is immersed in a sodium sulfide diluted solution or the like to form an Na dip layer. Then, an In metal target and a Cu—Ga alloy target are formed. By using the sputter film forming method used for each, a laminated film having a two-layer structure of an In layer and a Cu—Ga layer is formed, and this is used as a precursor of the light absorption layer (FIG. 2C).

所望のCIGS光吸収層を得るために、このプリカーサを用いる従来の方法は、図2(d)に示すように、In層とCu−Ga層とを積層状態のプリカーサとして備える基板ごとアニール処理室内に収容し、この状態で、100℃の温度条件で10分間のプレヒートを行う。そして、アニール処理室内に挿入したガス導入管より H2Seガスを導入し、これを処理室内に通流させながら、室内を500〜520℃の温度範囲に昇温する。さらに、通流ガスとして、反応ガスたるH2Seガスを Arガスなどのパージガスに交換する。これにより、In層とCu−Ga層との積層構造から成るプリカーサを、カルコパイライト化合物から成るCIGS単層に変換する工程を終了する。 In order to obtain a desired CIGS light absorption layer, the conventional method using this precursor is as shown in FIG. 2D, in which an annealing process chamber is provided for each substrate including an In layer and a Cu—Ga layer as a precursor in a laminated state. In this state, preheating is performed for 10 minutes under a temperature condition of 100 ° C. Then, H 2 Se gas is introduced from the gas introduction pipe inserted into the annealing chamber, and the chamber is heated to a temperature range of 500 to 520 ° C. while flowing through the chamber. Further, the H 2 Se gas, which is a reaction gas, is exchanged with a purge gas such as Ar gas as a flow gas. Thereby, the process of converting the precursor composed of the laminated structure of the In layer and the Cu—Ga layer into the CIGS single layer composed of the chalcopyrite compound is completed.

そして、アニール処理室から取り出したCIGS層付きの基板に対して、図2(e)に示すような浸漬浴堆積法(CBD:Chemical Bath Deposition)あるいはスパッタリング法により、n型半導体材料たるCdS、ZnO、InSなどの成膜を行う(例えば特許文献1参照)。   Then, the substrate with the CIGS layer taken out from the annealing chamber is subjected to CdS, ZnO which is an n-type semiconductor material by immersion bath deposition (CBD) or sputtering as shown in FIG. , InS or the like is formed (see, for example, Patent Document 1).

さらに、得られた積層構造に対して、レーザー照射や金属針を用いた切削加工により第2スクライブ工程を行う(図2(f))。   Further, a second scribing step is performed on the obtained laminated structure by laser irradiation or cutting using a metal needle (FIG. 2 (f)).

その後に、ZnO−Al合金ターゲットを用いたスパック成膜法により、最外表面層として、ZnOAl層から成る透明導電膜(TCO:Transparent Conductive Oxide)を積層する(図2(g))。   Then, a transparent conductive film (TCO: Transparent Conductive Oxide) made of a ZnOAl layer is laminated as the outermost surface layer by a spack film forming method using a ZnO—Al alloy target (FIG. 2G).

最後に、再びレーザー照射や金属針を用いた切削加工により第3スクライブ工程を行う(図2(h))。   Finally, a third scribe process is performed again by laser irradiation or cutting using a metal needle (FIG. 2 (h)).

このような積層構造から成る薄膜太陽電池は、切削加工によりその大きさが揃えられた単セルとして得られ、最終製品は、これら単セルを直列接続した平面集積構造である。   A thin film solar cell having such a laminated structure is obtained as a single cell having a uniform size by cutting, and the final product is a planar integrated structure in which these single cells are connected in series.

この種のCIGS系薄膜太陽電池に対しては、光電変換効率の向上が要望されており、このための手法の一つとして、光吸収層のワイドバンドギャップ化が有効である。最大の変換効率を得るための光吸収層のバンドギャップは、理論上1.4〜1.15eVであることが実証されている。また、光吸収層のワイドバンドギャップ化のためには、層中の金属Gaの固溶率を増大させることが必要である。一方、実用上のバンドギャップは、約1.1eVに留まっているのが実状である。   For this type of CIGS-based thin film solar cell, improvement in photoelectric conversion efficiency is desired, and as one of the techniques for this purpose, a wide band gap of the light absorption layer is effective. It has been proved that the band gap of the light absorption layer for obtaining the maximum conversion efficiency is theoretically 1.4 to 1.15 eV. Further, in order to increase the wide band gap of the light absorption layer, it is necessary to increase the solid solution ratio of metal Ga in the layer. On the other hand, the actual band gap remains at about 1.1 eV.

ところで、約1.1eV程度のバンドギャップを備えた光吸収層は、上記したように、
(1)In層とCu−Ga層とを積層状態のプリカーサとして備える基板ごとアニール処理室内に収容し、100℃の温度条件で10分間のプレヒートを行う、
(2)アニール処理室内に挿入したガス導入管より H2Seガスを導入し、これを処理室内に通流させながら、室内を500〜520℃の温度範囲に昇温する、
(3)さらに、通流ガスとして、反応ガスたるH2Seガスを Arガスなどのパージガスに交換する、
を経て得られる。
By the way, the light absorption layer having a band gap of about 1.1 eV is as described above.
(1) A substrate provided with an In layer and a Cu—Ga layer as a precursor in a laminated state is accommodated in an annealing chamber and pre-heated at a temperature of 100 ° C. for 10 minutes.
(2) The H 2 Se gas is introduced from the gas introduction pipe inserted into the annealing chamber, and the chamber is heated to a temperature range of 500 to 520 ° C. while flowing through the chamber.
(3) Furthermore, as a flow gas, the H 2 Se gas as a reaction gas is replaced with a purge gas such as Ar gas.
It is obtained through

このとき、金属Gaの固溶率を増大させるためには、上記(2)における温度条件を、例えば650℃程度の高温にする必要がある。
特開2003−282909号公報(第2頁)
At this time, in order to increase the solid solution rate of the metal Ga, the temperature condition in the above (2) needs to be set to a high temperature of about 650 ° C., for example.
JP 2003-282909 A (second page)

ところが、温度条件を従来より高く設定することにより、光吸収層のバンドギャップを現状の1.1eV程度からワイドバンドギャップ化(増大化)させようとしても、得られる太陽電池製品は、その開放電圧が飽和する傾向を示し、結果的に光電変換効率の低下を招いている。   However, by setting the temperature condition higher than the conventional one, even if the band gap of the light absorption layer is to be increased (increased) from about 1.1 eV at present, the obtained solar cell product has an open circuit voltage. Tends to saturate, resulting in a decrease in photoelectric conversion efficiency.

この原因として、ワイドバンドギャップ化した光吸収層とこれに隣接するバッファ層との間でバンドギャップアンマッチ(バンド不整合)が生じている、と推察される。   As a cause of this, it is assumed that a band gap mismatch (band mismatch) occurs between the light absorption layer having a wide band gap and the buffer layer adjacent thereto.

一方、有害なカドミウムを使用しないバッファ層として注目されるInS系のものは、バンドギャップが約2.5eVと比較的大きく、これに整合するバンドギャップを備えた光吸収層を形成することが一層重要である。   On the other hand, an InS-based material that is attracting attention as a buffer layer that does not use harmful cadmium has a relatively large band gap of about 2.5 eV, and it is further possible to form a light absorption layer having a band gap matching this. is important.

本発明は、上記問題点に鑑み、光電変換効率の向上を実現し得るカルコパイライト型薄膜太陽電池及びその製造方法を提供することを課題としている。   This invention makes it a subject to provide the chalcopyrite type thin film solar cell which can implement | achieve the improvement of a photoelectric conversion efficiency, and its manufacturing method in view of the said problem.

上記課題を解決するため、本発明のカルコパイライト型薄膜太陽電池は、基板上に形成された裏面電極層と、この電極層上に形成され、少なくともI族、III族及びVI族元素を含むp型の光吸収層と、この光吸収層上に形成され、InAISを含むn型のバッファ層と、このバッファ層上に形成された透明電極層とを備えて構成される。   In order to solve the above problems, a chalcopyrite thin film solar cell of the present invention includes a back electrode layer formed on a substrate, and a p formed on the electrode layer and containing at least a group I, group III and group VI element. Type light absorption layer, an n-type buffer layer formed on the light absorption layer and containing InAIS, and a transparent electrode layer formed on the buffer layer.

本発明によれば、I族、III族及びVI族元素を含むp型の光吸収層のワイドバンドギャップ化を行った場合でも、InAISバッファ層の介在によりバンド不整合が生じにくくなる。このため、太陽電池製品の開放電圧が飴和することなく、光電変換効率の向上が得られる。   According to the present invention, even when a wide band gap is formed in a p-type light absorption layer containing a group I, group III, and group VI element, band mismatching hardly occurs due to the interposition of the InAIS buffer layer. For this reason, the photoelectric conversion efficiency can be improved without the open circuit voltage of the solar cell product being moderated.

また、本発明は、基板上に形成された裏面電極層上に、Cu、In及びGaを含むプリカーサをスパッタリング法により形成するプリカーサ形成工程と、プリカーサ形成が行われた基板に対して、H2Seガス雰囲気中で熱処理を行って 光吸収層を形成するセレン化工程と、光吸収層上に、InAISを含むn型のバッファ層を形成するバッファ層形成工程と、バッファ層上に透明電極層を形成する透明電極層形成工程とから成る製造方法により、得られるCIGS系薄膜太陽電池の光電変換効率向上が実現する。 Further, the present invention provides a precursor forming step of forming a precursor containing Cu, In and Ga on a back electrode layer formed on a substrate by a sputtering method, and H 2 with respect to the substrate on which the precursor is formed. A selenization step of forming a light absorption layer by performing a heat treatment in a Se gas atmosphere, a buffer layer formation step of forming an n-type buffer layer containing InAIS on the light absorption layer, and a transparent electrode layer on the buffer layer By the manufacturing method comprising the transparent electrode layer forming step for forming the film, the photoelectric conversion efficiency of the obtained CIGS thin film solar cell is improved.

この場合、セレン化工程の熱処理は、500℃より高く、かつ、基板融点より低い温度範囲で行うことが実用上望ましい。   In this case, it is practically desirable to perform the heat treatment in the selenization step in a temperature range higher than 500 ° C. and lower than the melting point of the substrate.

本発明によるカルコパイライト型薄膜太陽電池は、バッファ層としてInAIS成分を備えるため、p型の光吸収層とn型のバッファ層との間のバンドギャップの整合が得られる。このため、得られる薄膜太陽電池製品は、開放電圧の低下を伴わず、したがって、光電変換効率の向上を実現することができる。   Since the chalcopyrite thin film solar cell according to the present invention includes an InAIS component as a buffer layer, matching of the band gap between the p-type light absorption layer and the n-type buffer layer can be obtained. For this reason, the thin film solar cell product obtained is not accompanied by the fall of an open circuit voltage, Therefore, the improvement of a photoelectric conversion efficiency is realizable.

また、InAISバッファ層は、InSバッファ層に比べ、高価なIn希少金属の使用量を軽減できるので、コスト削減効果も得られる。   In addition, since the InAIS buffer layer can reduce the amount of expensive In rare metal used compared to the InS buffer layer, a cost reduction effect can also be obtained.

図2(c)に示すプリカーサ光吸収層の成膜工程に対応して、本発明による光吸収層のプリカーサを製造するための成膜装置を図3に示す。   FIG. 3 shows a film forming apparatus for manufacturing the precursor of the light absorption layer according to the present invention corresponding to the film forming process of the precursor light absorption layer shown in FIG.

図3は、仕入室31と第1スパッタ成膜室32と第2スパッタ成膜室33と取出室34とを、それぞれ仕切弁35,36,37を介して連通させて構成したインライン式スパッタ装置38の概略図である。本装置38の各構成室31,32,33,34は、それぞれ図外の真空排気機構が設置されており、所望の圧力条件のもとで成膜工程が行われる。   FIG. 3 shows an in-line type sputtering apparatus in which a purchase chamber 31, a first sputter film forming chamber 32, a second sputter film forming chamber 33, and a take-out chamber 34 are connected to each other through gate valves 35, 36, and 37, respectively. FIG. Each component chamber 31, 32, 33, 34 of the apparatus 38 is provided with a vacuum exhaust mechanism (not shown), and a film forming process is performed under a desired pressure condition.

仕入室31の内部には、バッチ単位の複数枚の基板1aを収納できる基板支持台(図示せず)が搭載される。収納される基板1aは、既にMo電極層の成膜が行われたものである((a)参照)。そして、複数枚のMo電極層付き基板1aのうち、成膜工程に進む基板1bが、基板搬送トレイなどの基板ホルダ(図示せず)に保持された状態で、仕切弁35を介して次の第1成膜室32に搬送される。   A substrate support table (not shown) capable of storing a plurality of batches of substrates 1a is mounted inside the purchase chamber 31. The substrate 1a to be accommodated has already been formed with a Mo electrode layer (see (a)). Then, among the plurality of substrates 1a with Mo electrode layers, the substrate 1b proceeding to the film forming step is held by a substrate holder (not shown) such as a substrate transfer tray, and the next through the gate valve 35. The film is transferred to the first film formation chamber 32.

第1成膜室32では、両側の仕切弁35,36を閉弁状態とし、所定圧力条件のもと、Inターゲットによるスパック成膜法により、基板1b上の表面層として、金属In層の成膜が行われる((b)参照)。そして、同様にして、次の第2成膜室33において、Cu−Gaターゲットによるスパッタ成膜法により、基板1b上にCu−Ga合金層の成膜が行われ((c)参照)、プリカーサの成膜工程が終了する。成膜終了後の基板1cは、仕切弁37を介して取出室34に搬送される。取出室34内には、仕入室31のものと同様の基板支持台が搭載されており、上記と同じ成膜工程サイクルで成膜終了とされた、バッチ単位相当枚数分の基板1cが支持台に収納された時点で、全成膜工程の完了とする。   In the first film formation chamber 32, the gate valves 35 and 36 on both sides are closed, and a metal In layer is formed as a surface layer on the substrate 1b by a spack film formation method using an In target under a predetermined pressure condition. A film is formed (see (b)). Similarly, in the next second film forming chamber 33, a Cu—Ga alloy layer is formed on the substrate 1b by a sputtering film forming method using a Cu—Ga target (see (c)), and a precursor is formed. The film forming step is completed. The substrate 1 c after film formation is transferred to the take-out chamber 34 via the gate valve 37. A substrate support table similar to that in the purchase chamber 31 is mounted in the take-out chamber 34, and the number of substrates 1c corresponding to the number of batch units that have been formed in the same film formation process cycle as described above are supported by the support table. When all the film formation processes are completed, the film formation process is completed.

図4は、図2(d)に示すプリカーサ光吸収層のセレン化工程に対応して、本発明による光吸収層のセレン化を行うための熱処理室40の概略図である。熱処理室40は、その両側を挟んで配置されたヒータ41により加熱される。また、その内部には、所定バッチ枚数の基板を収容可能な石英ボート42が設置され、ボート42の底面上に複数の基板1cが縦型状態で収納される。また、ボート42上の基板1cを直立状態に保つための石英製サセプタ43a,43bが設けられている。このサセプタ43a,43bを設けた石英ボート42には、外部の駆動機構に連なる回転駆動軸44が接続部45を介して接続され、回転軸44の回転により、全基板1cが縦型状態を保持したまま回転することができる。さらに、全基板1cを搭載した石英ボート42は、石英製プロセスチューブ46により囲繞されている。このプロセスチューブ46により囲繞して形成される密閉空間は、図外の真空排気機構により圧力条件が可変であり、また、この密閉空間内部にガス導入管47が貫入される。ガス導入管47はセレン化ガス導入用であり、導入管47の周壁に設けられた多数のノズル孔48から H2Seガスが流入する。また、プロセスチューブ46内で均一なH2Seガスの通流が得られるように、ノズル孔48は、外径1〜2mmの大きさで穿設される。 FIG. 4 is a schematic view of a heat treatment chamber 40 for performing selenization of the light absorption layer according to the present invention, corresponding to the selenization process of the precursor light absorption layer shown in FIG. The heat treatment chamber 40 is heated by a heater 41 disposed on both sides of the heat treatment chamber 40. In addition, a quartz boat 42 capable of accommodating a predetermined batch number of substrates is installed therein, and a plurality of substrates 1c are accommodated in a vertical state on the bottom surface of the boat 42. Further, quartz susceptors 43a and 43b are provided for keeping the substrate 1c on the boat 42 in an upright state. The quartz boat 42 provided with the susceptors 43a and 43b is connected to a rotation drive shaft 44 connected to an external drive mechanism via a connecting portion 45, and the rotation of the rotation shaft 44 keeps the entire substrate 1c in a vertical state. It can be rotated as it is. Further, the quartz boat 42 on which all the substrates 1c are mounted is surrounded by a quartz process tube 46. The sealed space formed by being surrounded by the process tube 46 has variable pressure conditions by a vacuum exhaust mechanism (not shown), and a gas introduction pipe 47 is inserted into the sealed space. The gas introduction pipe 47 is for introducing selenization gas, and H 2 Se gas flows in from a large number of nozzle holes 48 provided on the peripheral wall of the introduction pipe 47. Further, the nozzle hole 48 is drilled with an outer diameter of 1 to 2 mm so that a uniform flow of H 2 Se gas is obtained in the process tube 46.

光吸収層4(図1参照)の作製に際しては、図3に示すインライン式スパッタ成膜装置38を用いて、金属In層及びCu−Ga合金層から成る積層構造を形成したガラス基板1cを所定枚数分に揃え、図4に示すように熱処理室40内に収容する。そして、図5に示す温度プロファイルにしたがってセレン化処理を行う。   When producing the light absorption layer 4 (see FIG. 1), the glass substrate 1c on which a laminated structure composed of a metal In layer and a Cu—Ga alloy layer is formed using an inline-type sputter deposition apparatus 38 shown in FIG. Aligned to the number of sheets, and accommodated in the heat treatment chamber 40 as shown in FIG. Then, selenization is performed according to the temperature profile shown in FIG.

即ち、図4の熱処理室40内のプロセスチューブ46内を、図外の排気機構の作動により50〜95kPaの減圧状態に保ちながら、加熱ヒータ41により内部温度を約250℃まで昇温する。これら温度条件及び圧力条件を保った状態で、ガス導入管47のノズル孔48より所定流量のH2Seガスを所定時間(1)に亘って流入させ、これを第1セレン化工程とする。この工程は、熱処理室40内のプレヒート及びH2Seガス雰囲気の安定化のために設けられる。このときの時間(1)として、例えば10分間程度が好ましい。 That is, the internal temperature of the process tube 46 in the heat treatment chamber 40 of FIG. 4 is raised to about 250 ° C. by the heater 41 while maintaining a reduced pressure of 50 to 95 kPa by the operation of an exhaust mechanism not shown. While maintaining these temperature conditions and pressure conditions, a predetermined flow rate of H 2 Se gas is allowed to flow from the nozzle hole 48 of the gas introduction pipe 47 over a predetermined time (1), which is defined as a first selenization process. This step is provided for preheating in the heat treatment chamber 40 and stabilizing the H 2 Se gas atmosphere. The time (1) at this time is preferably about 10 minutes, for example.

さらに、図4の熱処理室40の回転駆動軸44を槻ね1〜2rpmで等速回転させることにより、同時に回転する基板1cの周囲環境、即ち、プレヒート温度条件下でのH2Seガス雰囲気がさらに安定的に確保される。この基板1cの回転は、第1セレン化工程だけでなく、後述する第2、第3のセレン化工程及び冷却工程でも行うことによりさらに効果的となる。 Further, by rotating the rotational drive shaft 44 of the heat treatment chamber 40 in FIG. 4 at a constant speed of 1 to 2 rpm, the ambient environment of the simultaneously rotating substrate 1c, that is, the H 2 Se gas atmosphere under the preheating temperature condition can be obtained. Furthermore, it is ensured stably. The rotation of the substrate 1c becomes more effective by performing not only the first selenization step but also the second and third selenization steps and the cooling step described later.

次に、時間(1)のH2Seガス導入終了後、プロセスチューブ46内を50〜95kPaの減圧状態に保ちながら、加熱ヒータ41により内部温度Aとして約250〜450℃まで昇温する。そして、これら温度条件及び圧力条件を保った状態で、ガス導入管47のノズル孔48より所定流量のH2Seガスを 時間(2)に亘って流入させ、これを第2セレン化工程とする。この工程は、基板1c上に形成されたIn層とCu−Ga層との積層構造から成る光吸収層プリカーサ内で、In、Cu及びGaの各成分を拡散させつつSe成分を取り込むために設けられる。このときの時間(2)として、例えば10〜120分間程度が好ましい。 Next, after the introduction of the H 2 Se gas at time (1), the internal temperature A is raised to about 250 to 450 ° C. by the heater 41 while the process tube 46 is kept in a reduced pressure state of 50 to 95 kPa. Then, with these temperature conditions and pressure conditions maintained, a predetermined flow rate of H 2 Se gas is allowed to flow from the nozzle hole 48 of the gas introduction pipe 47 over a period of time (2), which is used as the second selenization step. . This step is provided to capture the Se component while diffusing each component of In, Cu, and Ga in a light absorption layer precursor having a laminated structure of an In layer and a Cu—Ga layer formed on the substrate 1c. It is done. The time (2) at this time is preferably about 10 to 120 minutes, for example.

さらに、約250〜450℃への昇温が行われた後に、時間(3)直前の時間(2)において、プロセスチューブ46内を真空排気して、高真空状態に保持する真空工程を介在させることで、第2セレン化工程で取り込むSe成分原料のH2Seガスが活性の高いものとして得られる。また、第1セレン化工程に由来する残留ガスの影響を考慮しなくて良いため、所要設定量のH2Seガスの導入により、第2セレン化工程でのSe成分取り込みを正確に制御できる。あるいは、第2セレン化工程においてH2Seガスの所要量が比較的大流量に及ぶときは、その流量制御を正確に行うために、複数回に分割して通流させる手法が採られることがあるが、その場合は、分割して通流を行うたびに、その直前に上記した真空工程を行う必要がある。この結果、H2Seガスの流量制御がさらに正確に行われることになる。 Further, after the temperature is raised to about 250 to 450 ° C., the process tube 46 is evacuated and held in a high vacuum state at a time (2) immediately before the time (3). As a result, the Se component raw material H 2 Se gas incorporated in the second selenization step is obtained as a highly active material. In addition, since it is not necessary to consider the influence of the residual gas derived from the first selenization process, the introduction of the Se component in the second selenization process can be accurately controlled by introducing a required set amount of H 2 Se gas. Alternatively, when the required amount of H 2 Se gas reaches a relatively large flow rate in the second selenization step, a method may be adopted in which the flow is divided into a plurality of times in order to accurately control the flow rate. However, in that case, it is necessary to perform the above-described vacuum process immediately before the divided flow. As a result, the flow rate control of the H 2 Se gas is performed more accurately.

次に、時間(3)のH2Seガス導入終了後、プロセスチューブ46内を50〜95kPaの減圧状態に保ちながら、加熱ヒータ41により内部温度Bとして約500〜650℃まで昇温する。 Next, after the introduction of the H 2 Se gas at time (3), the internal temperature B is raised to about 500 to 650 ° C. by the heater 41 while keeping the inside of the process tube 46 in a reduced pressure state of 50 to 95 kPa.

なお、内部温度Bの上限値650℃は、本形態で用いるガラス基板の軟化温度の上限である。サブストレート型の太陽電池においては、基板に用いる材料に大きな制約はないため、例えばステンレスやカーボン、マイカ(雲母)等の基板を用いた場合には、さらに高い温度にてセレン化を行うことが可能となる。   Note that the upper limit value 650 ° C. of the internal temperature B is the upper limit of the softening temperature of the glass substrate used in this embodiment. In substrate type solar cells, there are no major restrictions on the material used for the substrate. For example, when a substrate such as stainless steel, carbon, mica (mica) or the like is used, selenization can be performed at a higher temperature. It becomes possible.

そして、この状態を約10〜120分間に亘って保持し、これを第3セレン化工程とする。この工程は、これまでに行ったIn、Cu及びGaの各成分の拡散とSe成分の取り込みによって均一化が進行した光吸収層プリカーサを結晶化させ、内部膜構造の再配置を安定的に得るために設けられる。   And this state is hold | maintained for about 10 to 120 minutes, and let this be a 3rd selenization process. This step crystallizes the light absorption layer precursor that has been homogenized by the diffusion of each component of In, Cu, and Ga and the incorporation of the Se component performed so far, and stably rearranges the internal film structure. Provided for.

その後、加熱ヒータ41による加熱温度を徐々に低下させ、室温まで冷却した後に、第3セレン化工程までの工程により光吸収層が形成された基板1cを取り出して光吸収層作製の完了とする。なお、残留H2Seガスが冷却中の基板1cに作用して、その表面層において不要なSe析出を生じることがある。これを防止するため、冷却中の時間(4)において、プロセスチューブ46内を真空排気して、高真空状態に保持する真空工程を介在させても良い。また、回転駆動軸44の等速回転による基板1cの回転は、望ましくは、光吸収層作製の完了時点とした、基板1cの取り出し直前まで行うと良い。 Thereafter, the heating temperature by the heater 41 is gradually lowered and cooled to room temperature, and then the substrate 1c on which the light absorption layer has been formed by the steps up to the third selenization step is taken out to complete the preparation of the light absorption layer. Residual H 2 Se gas may act on the substrate 1c being cooled to cause unnecessary Se precipitation in the surface layer. In order to prevent this, a vacuum process for evacuating the process tube 46 and keeping it in a high vacuum state during the cooling time (4) may be interposed. In addition, the rotation of the substrate 1c by the constant speed rotation of the rotation drive shaft 44 is desirably performed until the substrate 1c is taken out, which is the time when the light absorption layer fabrication is completed.

次に、p型の光吸収層とのヘテロ結合を得るために、高抵抗でn型のバッファ層を形成する。バッファ層の形成に際して、湿式のCBD法を採用し、チオアセトアミドと塩化インジウムと塩化アルミニウムの混合水溶液を用いて、InAlS系のバッファ層を形成する。なお、CBD法の実際は、温度管理を行った水溶液に光吸収層の表面を浸漬させて、水溶液中のコロイド成長により微粒子を堆積し、薄膜成長を進行させる。   Next, in order to obtain a hetero bond with the p-type light absorption layer, a high-resistance n-type buffer layer is formed. In forming the buffer layer, a wet CBD method is employed, and an InAlS buffer layer is formed using a mixed aqueous solution of thioacetamide, indium chloride, and aluminum chloride. In actual practice of the CBD method, the surface of the light absorption layer is immersed in a temperature-controlled aqueous solution, fine particles are deposited by colloidal growth in the aqueous solution, and thin film growth proceeds.

その後、ZnO−Al合金ターゲットなどを用いた通常のスパッタ成膜法により、最外表面層として、ZnOAl層などから成る透明電極層を形成し、薄膜太陽電池を完成させる。   Thereafter, a transparent electrode layer made of a ZnOAl layer or the like is formed as an outermost surface layer by a normal sputtering film forming method using a ZnO—Al alloy target or the like, thereby completing a thin film solar cell.

上記のようにバッファ層としてInAlS系のものを用いて薄膜太陽電池を作製し、同条件で製造した複数枚の薄膜太陽電池製品につき、その性能測定を行ったところ、図6に示す光電変換効率値を得た。
[比較例1]
InAlS系の替りに、従来のInSバッファ層を備えた薄膜太陽電池を作製し、同条件で製造した複数枚の薄膜太陽電池製品につき、その性能測定を行ったところ、図6に示す光電変換効率値を得た。
A thin film solar cell was produced using an InAlS-based buffer layer as described above, and the performance was measured for a plurality of thin film solar cell products manufactured under the same conditions. The photoelectric conversion efficiency shown in FIG. Got the value.
[Comparative Example 1]
A thin film solar cell having a conventional InS buffer layer was produced instead of the InAlS system, and the performance was measured for a plurality of thin film solar cell products manufactured under the same conditions. The photoelectric conversion efficiency shown in FIG. Got the value.

[実施例1]及び[比較例1]を対比すると、本発明による薄膜太陽電池製品において、製品の特性指標たる光電変換効率が、8.0%から8.5%と顕著な向上が認められる。これは、光吸収層とバッファ層との間のバンドギャップ整合が改善されたためである。そして、この結果、InAlSバッファ層を備えた薄膜太陽電池製品では、開放電圧こそ低下傾向にあるが、短絡電流及びフィルファクタが増大するため、光電変換効率向上という結果が得られるのである。   When [Example 1] and [Comparative Example 1] are compared, in the thin-film solar cell product according to the present invention, the photoelectric conversion efficiency as the product characteristic index is remarkably improved from 8.0% to 8.5%. . This is because the band gap matching between the light absorption layer and the buffer layer is improved. As a result, in the thin-film solar cell product provided with the InAlS buffer layer, the open circuit voltage tends to decrease, but the short circuit current and the fill factor increase, so that the result of improved photoelectric conversion efficiency is obtained.

図7は、バンドギャップ整合を概念的に示す模式図である。図7(a)には、InSバッファ層を、ZnOAl透明電極層とCIGS光吸収層との間に介在させた積層構造が示され、図7(b)には、InAlSバッファ層を、ZnOAl透明電極層とCIGS光吸収層との間に介在させた積層構造が示される。図7(a)に示すバンドギャップ整合に比べ、図7(b)では、界面の上下両側において、透明電極層、バッファ層及び光吸収層の間の非連続部分が縮小し、また、光吸収層のワイドギャップ化とも相侯って、バンドギャップの不整合が改善されている。   FIG. 7 is a schematic diagram conceptually showing band gap matching. FIG. 7A shows a stacked structure in which an InS buffer layer is interposed between a ZnOAl transparent electrode layer and a CIGS light absorption layer, and FIG. 7B shows an InAlS buffer layer with a ZnOAl transparent layer. A laminated structure interposed between the electrode layer and the CIGS light absorption layer is shown. Compared to the bandgap matching shown in FIG. 7A, in FIG. 7B, the discontinuous portions between the transparent electrode layer, the buffer layer, and the light absorption layer are reduced on both the upper and lower sides of the interface, and the light absorption is reduced. Coupled with the wide gap of the layer, the band gap mismatch is improved.

さらに、InAlSバッファ層をCBD法により形成する際に、水溶液中の塩化インジウムと塩化アルミニウムの混合比率を変化させ、それぞれの場合の薄膜太陽電池製品の光電変換効率を測定したところ、図8のような結果が得られた。これにより、塩化インジウムと塩化アルミニウムの混合比率が1:1〜1:2(カラム3及び4に相当)の場合に最大の変換効率が得られることが分る。   Further, when the InAlS buffer layer was formed by the CBD method, the mixing ratio of indium chloride and aluminum chloride in the aqueous solution was changed, and the photoelectric conversion efficiency of the thin film solar cell product in each case was measured, as shown in FIG. Results were obtained. Thus, it can be seen that the maximum conversion efficiency is obtained when the mixing ratio of indium chloride and aluminum chloride is 1: 1 to 1: 2 (corresponding to columns 3 and 4).

本発明のカルコパイライト型薄膜太陽電池は、従来のバッファ層に用いていたインジウム金属の一部をアルミニウムに代替することになる。即ち、高価な希少金属インジウムを廉価な汎用金属であるアルミニウムに代替するため、太陽電池の製造コスト削減の効果も得られる。   In the chalcopyrite thin film solar cell of the present invention, a part of the indium metal used in the conventional buffer layer is replaced with aluminum. That is, since the expensive rare metal indium is replaced with aluminum which is an inexpensive general-purpose metal, an effect of reducing the manufacturing cost of the solar cell can be obtained.

本発明は、ワイドギャップ化が要請された光吸収層を備えたカルコパイライト型薄膜太陽電池において、そのバッファ層の製造へ活用可能である。   INDUSTRIAL APPLICATION This invention can be utilized for manufacture of the buffer layer in the chalcopyrite thin film solar cell provided with the light absorption layer by which wide gap formation was requested | required.

薄膜太陽電池の一般的構造を示す概略図Schematic showing the general structure of thin film solar cells 薄膜太陽電池の一般的な製造工程図General manufacturing process diagram of thin film solar cell In金属層とCu−Ga合金層とから成る積層プリカーサを作製するインライン式スパッタ成膜装置の概略図Schematic diagram of an in-line type sputter deposition apparatus for producing a laminated precursor composed of an In metal layer and a Cu-Ga alloy layer CIGS光吸収層を作製する熱処理室の概略図Schematic of heat treatment chamber for producing CIGS light absorption layer セレン化工程の温度プロファイル図Temperature profile diagram of selenization process [実施例1]及び[比較例1]により作製された薄膜太陽電池の光電変換効率特性を示すグラフ図The graph which shows the photoelectric conversion efficiency characteristic of the thin film solar cell produced by [Example 1] and [Comparative Example 1] (a)InSバッファ層をZnOAl透明電極層とCIGS光吸収層との間に介在させた積層構造のバンドギャップ整合の概念模式図、(b)InAlSバッファ層をZnOAl透明電極層とCIGS光吸収層との間に介在させた積層構造のバンドギャップ整合の概念模式図(A) Conceptual schematic diagram of band gap matching of a laminated structure in which an InS buffer layer is interposed between a ZnOAl transparent electrode layer and a CIGS light absorption layer, (b) an InAlS buffer layer as a ZnOAl transparent electrode layer and a CIGS light absorption layer Schematic diagram of band gap matching of laminated structure interposed between 塩化インジウム及び塩化アルミニウムの混合比率を変化させて作製した薄膜太陽電池製品の光電変換効率特性を示すグラフ図Graph showing the photoelectric conversion efficiency characteristics of thin-film solar cell products produced by changing the mixing ratio of indium chloride and aluminum chloride

符号の説明Explanation of symbols

1 1a 1b 1c ガラス基板
2 Mo電極層
4 CIGS光吸収層
7 多層積層構造(薄膜太陽電池)
32 In金属層用第1スパッタ成膜室
33 Cu−Ga合金層用第2スパッタ成膜室
38 インライン式スパッタ成膜装置
40 熱処理室
41 加熱ヒータ
42 石英ボート
43 サセプタ
44 回転駆動軸
46 プロセスチューブ
47 ガス導入管
48 ノズル孔
1 1a 1b 1c Glass substrate 2 Mo electrode layer 4 CIGS light absorption layer 7 Multilayer laminated structure (thin film solar cell)
32 In metal layer first sputter deposition chamber 33 Cu—Ga alloy layer second sputter deposition chamber 38 In-line sputter deposition apparatus 40 Heat treatment chamber 41 Heater 42 Quartz boat 43 Susceptor 44 Rotation drive shaft 46 Process tube 47 Gas inlet pipe 48 Nozzle hole

Claims (3)

基板上に形成された裏面電極層と、
該電極層上に形成され、少なくともI族、III族及びVI族元素を含むp型の光吸収層と、
該光吸収層上に形成され、InAISを含むn型のバッファ層と、
該バッファ層上に形成された透明電極層と、
を備えることを特徴とするカルコパイライト型薄膜太陽電池。
A back electrode layer formed on the substrate;
A p-type light absorption layer formed on the electrode layer and containing at least a group I, group III and group VI element;
An n-type buffer layer formed on the light absorption layer and containing InAIS;
A transparent electrode layer formed on the buffer layer;
A chalcopyrite thin film solar cell comprising:
基板上に形成された裏面電極層上に、Cu、In及びGaを含むプリカーサをスパッタリング法により形成するプリカーサ形成工程と、
該プリカーサ形成が行われた基板に対して、H2Seガス雰囲気中で熱処理を行って光吸収層を形成するセレン化工程と、
該光吸収層上に、InAISを含むn型のバッファ層を形成するバッファ層形成工程と、
該バッファ層上に透明電極層を形成する透明電極層形成工程と、
から成ることを特徴とするカルコパイライト型薄膜太陽電池の製造方法。
A precursor forming step of forming a precursor containing Cu, In, and Ga on the back electrode layer formed on the substrate by a sputtering method;
A selenization step of forming a light absorption layer by performing a heat treatment on the substrate on which the precursor has been formed in an H 2 Se gas atmosphere;
A buffer layer forming step of forming an n-type buffer layer containing InAIS on the light absorption layer;
A transparent electrode layer forming step of forming a transparent electrode layer on the buffer layer;
A method for producing a chalcopyrite thin film solar cell comprising:
前記セレン化工程の熱処理は、500℃より高く、かつ、基板融点より低い温度範囲で行うことを特徴とする請求項2に記載のカルコパイライト型薄膜太陽電池の製造方法。   The method for manufacturing a chalcopyrite thin film solar cell according to claim 2, wherein the heat treatment in the selenization step is performed in a temperature range higher than 500 ° C and lower than the melting point of the substrate.
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009069729A1 (en) * 2007-11-30 2009-06-04 Showa Shell Sekiyu K.K. Process for producing light-absorbing layer in cis-type thin-film solar cell
WO2009128253A1 (en) * 2008-04-17 2009-10-22 本田技研工業株式会社 Solar cell thermal processing device
WO2010071874A3 (en) * 2008-12-19 2010-10-14 Applied Quantum Technology, Llc Chalcogenide-based photovoltaic devices and methods of manufacturing the same
WO2010118149A3 (en) * 2009-04-07 2011-01-20 Applied Materials, Inc. Sulfurization or selenization in molten (liquid) state for the photovoltaic applications
WO2011061583A1 (en) * 2009-11-18 2011-05-26 Centrotherm Photovoltaics Ag Method and device for producing a compound semiconductor layer
WO2011123869A3 (en) * 2010-04-02 2012-02-23 Paul Beatty Method and device for scribing a thin film photovoltaic cell
JP2012164849A (en) * 2011-02-08 2012-08-30 Sumitomo Metal Mining Co Ltd Compound semiconductor photoelectric conversion element and manufacturing method of the same
CN103151260A (en) * 2011-01-14 2013-06-12 思阳公司 Apparatus and method utilizing forced convection for uniform thermal treatment of thin film devices
JP2015037092A (en) * 2013-08-12 2015-02-23 本田技研工業株式会社 Manufacturing method of solar cell
CN111276563A (en) * 2018-12-03 2020-06-12 北京铂阳顶荣光伏科技有限公司 A kind of preparation method of copper indium gallium selenide absorption layer

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0823110A (en) * 1994-07-06 1996-01-23 Asahi Chem Ind Co Ltd Manufacture of thin film solar cell
JPH11298016A (en) * 1998-04-10 1999-10-29 Yazaki Corp Solar cell
JP2003008039A (en) * 2001-06-26 2003-01-10 Sharp Corp Method for manufacturing compound solar cell
JP2003282909A (en) * 2002-03-26 2003-10-03 Honda Motor Co Ltd Compound thin film solar cell and manufacturing method thereof
JP2004296749A (en) * 2003-03-26 2004-10-21 Tokio Nakada Double-sided solar cell

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0823110A (en) * 1994-07-06 1996-01-23 Asahi Chem Ind Co Ltd Manufacture of thin film solar cell
JPH11298016A (en) * 1998-04-10 1999-10-29 Yazaki Corp Solar cell
JP2003008039A (en) * 2001-06-26 2003-01-10 Sharp Corp Method for manufacturing compound solar cell
JP2003282909A (en) * 2002-03-26 2003-10-03 Honda Motor Co Ltd Compound thin film solar cell and manufacturing method thereof
JP2004296749A (en) * 2003-03-26 2004-10-21 Tokio Nakada Double-sided solar cell

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009135299A (en) * 2007-11-30 2009-06-18 Showa Shell Sekiyu Kk Method for manufacturing light absorption layer of CIS thin film solar cell
WO2009069729A1 (en) * 2007-11-30 2009-06-04 Showa Shell Sekiyu K.K. Process for producing light-absorbing layer in cis-type thin-film solar cell
US8614114B2 (en) 2007-11-30 2013-12-24 Showa Shell Sekiyu K.K. Process for producing light absorbing layer in CIS based thin-film solar cell
ES2409947A1 (en) * 2008-04-17 2013-06-28 Honda Motor Co., Ltd. Solar cell thermal processing device
WO2009128253A1 (en) * 2008-04-17 2009-10-22 本田技研工業株式会社 Solar cell thermal processing device
KR101137063B1 (en) 2008-04-17 2012-04-19 혼다 기켄 고교 가부시키가이샤 Solar cell thermal processing device
DE112009000929T5 (en) 2008-04-17 2013-10-10 Honda Motor Co., Ltd. Heat treatment device for solar cells
JP5244170B2 (en) * 2008-04-17 2013-07-24 本田技研工業株式会社 Solar cell heat treatment equipment
WO2010071874A3 (en) * 2008-12-19 2010-10-14 Applied Quantum Technology, Llc Chalcogenide-based photovoltaic devices and methods of manufacturing the same
US8969719B2 (en) 2008-12-19 2015-03-03 Zetta Research and Development LLC—AQT Series Chalcogenide-based photovoltaic devices and methods of manufacturing the same
WO2010118149A3 (en) * 2009-04-07 2011-01-20 Applied Materials, Inc. Sulfurization or selenization in molten (liquid) state for the photovoltaic applications
US8907253B2 (en) 2009-11-18 2014-12-09 Centrotherm Photovoltaics Ag Method and device for producing a compound semiconductor layer
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DE102009053532B4 (en) * 2009-11-18 2017-01-05 Centrotherm Photovoltaics Ag Method and apparatus for producing a compound semiconductor layer
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