JP2006108655A - Semiconductor device, high frequency amplifier and portable information terminal - Google Patents

Abstract

Provided are a semiconductor device and a high-frequency amplifier capable of reducing a current collapse phenomenon while suppressing an increase in chip area.
A semiconductor device includes a GaAs substrate, a subcollector layer provided on the GaAs substrate, a collector layer provided on a part of the subcollector layer, and a collector layer. A base layer (first semiconductor layer) 3 provided on the base layer 3, a second emitter layer (second semiconductor layer) 2a provided on the intrinsic base region 11 of the base layer 3, and a base layer 3 It has a second emitter layer (second semiconductor layer) 2b provided on the external base region 2a, and a first emitter layer 1 provided on the second emitter layer 2a.
[Selection] Figure 1

Description

  The present invention relates to miniaturization of semiconductor devices, high-frequency amplifiers, and portable information terminals using heterojunction bipolar transistors.

  Since GaAs compound semiconductors have excellent high frequency characteristics, they are frequently used as high frequency components such as mobile phones. Among them, a GaAs heterojunction bipolar transistor (hereinafter referred to as HBT) can operate with only a positive power supply, unlike a conventional GaAs field effect transistor (FET), and thus is particularly in demand as a high-frequency transistor.

  Since GaAs has lower thermal conductivity than Si, HBT using GaAs tends to cause non-uniform operation due to self-heating. In general, an HBT is used by connecting a plurality of unit HBTs 100 in parallel as shown in FIG. FIG. 18 is a cross-sectional view showing the structure of a conventional semiconductor device. In such a unit HBT 100, when the value of applied power increases, the temperature of each unit HBT 100 rises due to self-heating. When the temperature rises, the turn-on voltage is lowered and the collector current is increased. As a result, the amount of self-heating is further increased, so that the temperature of the HBT 100 is further raised. Thus, positive feedback is applied between the collector current and the temperature of the unit HBT 100. Normally, this positive feedback causes the collector current to rise rapidly and the unit HBT 100 should be destroyed. However, in reality, a phenomenon peculiar to GaAs HBT occurs such that the collector current rapidly decreases. This is caused by a minute difference in resistance value between the actual thermal resistances of the respective unit HBTs 100. Due to this difference, the temperature rise is uneven among the individual unit HBTs 100. As a result, the current flows only in the unit HBT 100 having the highest temperature, and the current decreases in other portions, and the collector current as a whole decreases rapidly. This sudden decrease in collector current is generally called a current collapse phenomenon, which is known to occur frequently in GaAs HBTs.

  In order to reduce the current collapse phenomenon, it is common to use a ballast resistor added to the base of each unit HBT. However, the base is often used as a high-frequency input terminal, and if a ballast resistor is added to the base with such a structure, there is a problem that the gain is reduced and as a result, the power efficiency is also deteriorated (see, for example, Non-Patent Document 1). ).

  Two methods for solving this problem have been proposed. 19 and 20 are circuit diagrams showing a structure for preventing a reduction in power efficiency when a ballast resistor is added to the base in the prior art. As shown in FIG. 19, the first method is a method in which a capacitor 129 is placed in parallel with a base ballast resistor 113 connected to each unit HBT, and a high frequency input is bypassed by the capacitor (for example, Patent Document 1 and Patent Document 2). reference).

As a second method, as shown in FIG. 20, each unit HBT is provided with a DC input terminal 115 and an RF input terminal 116, a base ballast resistor 113 is provided in the DC input terminal 115, and a capacitor is provided in the RF input terminal 116. Are connected (for example, see Patent Document 3). More specifically, the base ballast resistor 113 is connected between the DC input terminal 115 and the base of the unit HBT 125. On the other hand, the capacitor 129 is connected between the RF input terminal 116 and the base of the unit HBT 125. With such a configuration, the RF input signal is input to the base of the unit HBT 125 without passing through the base ballast resistor 113, so that the current collapse phenomenon due to the base ballast resistor is reduced and the gain is not lowered. Characteristics can be realized.
US5,321,279 JP 2004-111941 A US5,629,648 W. Liu et. Al, “The Use of Base Ballasting to Prevent the Collapse of Current Gain in AlGaAs / GaAs Heterojunction Bipolar Transistors,” IEEE Electron Devices, vol.43, p.245, 1996

  However, in order to increase the gain in the first method, it is necessary to sufficiently increase the capacitance value of the capacitor 129 placed in parallel. As a result, there arises a problem that a larger chip area is required.

  On the other hand, in the second method described above, since DC and RF are input separately, it is necessary to separately provide DC input wiring and RF input wiring, and a capacitor 129 is provided in each unit HBT. Due to the fact that they are connected, a necessary chip area becomes large.

  An object of the present invention is to provide a semiconductor device, a high-frequency amplifier, and a portable information terminal capable of reducing a current collapse phenomenon and preventing a gain from being reduced while suppressing an increase in chip area.

  In the present invention, a capacitor is built in the transistor in order to reduce the size of the chip.

  Specifically, a first semiconductor device according to the present invention includes a first semiconductor layer having an intrinsic base region and an external base region, and a second semiconductor layer provided on the intrinsic base region and serving as an emitter region or a collector region. A semiconductor layer, a capacitive film provided on a part of the external base region, an electrode provided on the capacitive film, and a base electrode provided on the other part of the external base region, It has.

  In this structure, since the capacitor composed of the second semiconductor layer, the capacitive film, and the electrode is provided in the unit HBT, the current coplus phenomenon can be suppressed while reducing the chip area.

In the first semiconductor device of the present invention, the capacitor film may be an In _x Ga _y P film (0.4 ≦ x ≦ 0.6, 0.4 ≦ y ≦ 0.6, x + y = 1). In this case, since the relative dielectric constant of In _x Ga _y P is large, the value of the capacity that can be held by the capacitor can be increased.

In the first semiconductor device of the present invention, the In _x Ga _y P film preferably has a thickness of 10 nm to 50 nm. Thus, by reducing the thickness of the capacitor film, the volume of the capacitor can be reduced. Note that when the capacitive film is In _x Ga _y P, the capacitive film can be formed by epitaxial growth, and therefore, leakage current hardly occurs even if the film thickness is reduced.

  In the first semiconductor device of the present invention, the capacitor film may be an InP film.

  In the first semiconductor device of the present invention, the InP film preferably has a thickness of 10 nm to 100 nm. Thus, by reducing the thickness of the capacitor film, the volume of the capacitor can be reduced. In the case where the capacitive film is an InP film, it is possible to form the capacitive film by epitaxial growth. Therefore, even if the film thickness is reduced, leakage current hardly occurs.

In the first semiconductor device of the present invention, the capacitor film is preferably an In _x Al _y As film (0.5 ≦ x ≦ 0.55, 0.45 ≦ y ≦ 0.5, x + y = 1).

In the first semiconductor device of the present invention, the In _x Al _y As film preferably has a thickness of 10 nm to 150 nm. Thus, by reducing the thickness of the capacitor film, the volume of the capacitor can be reduced. In the case where the capacitive film is an In _x Al _y As film, it is possible to form the capacitive film by epitaxial growth. Therefore, even if the film thickness is reduced, leakage current hardly occurs.

In the first semiconductor device of the present invention, the capacitor film is preferably an Al _x Ga _y As film (0.2 ≦ x ≦ 0.4, 0.6 ≦ y ≦ 0.8, x + y = 1).

In the first semiconductor device of the present invention, the Al _x Ga _y As film preferably has a thickness of 10 nm to 100 nm. Thus, by reducing the thickness of the capacitor film, the volume of the capacitor can be reduced. In the case where the capacitive film is an Al _x Ga _y As film, the capacitive film can be formed by epitaxial growth, and therefore, a leakage current hardly occurs even if the film thickness is reduced.

  In the first semiconductor device of the present invention, the electrode may be a first input terminal, and the base electrode may be a second input terminal.

  The first semiconductor device according to the present invention may further include a first connection part that electrically connects the electrode and the base electrode, and the first connection part may be an input terminal.

  The first semiconductor device according to the present invention may further include a resistor, one end of the resistor being connected to the base electrode, and the other end being a first input terminal. In this case, the DC input input to the base electrode is a first input terminal, and the RF input input to the electrode is a terminal different from the first terminal, whereby the RF input signal is passed through a resistor. Without being able to input to the electrode. Therefore, a reduction in gain can be prevented. In addition, by connecting a resistor to the base electrode, nonuniform operation due to self-heating of the transistor can be reduced.

  The first semiconductor device according to the present invention further includes a resistor to which the base electrode and one end are connected, and a second connection portion to which the other end of the resistor and the electrode are connected. The two connecting portions may be input terminals. Also in this case, an RF input signal can be input to the electrode without passing through a resistor. Therefore, a reduction in gain can be prevented. In addition, by connecting a resistor to the base electrode, nonuniform operation due to self-heating of the transistor can be reduced.

  In the first semiconductor device of the present invention, the base electrode may function as a resistor. In this case, since it is not necessary to provide a separate resistor, the element can be miniaturized. In addition, by incorporating a resistor in the base electrode, nonuniform operation due to self-heating of the transistor can be reduced.

  The first semiconductor device of the present invention further includes a third semiconductor layer provided below the first semiconductor layer, wherein the third semiconductor layer is a collector region, and the second semiconductor layer May be the emitter region.

  The first semiconductor device according to the present invention further comprises a third semiconductor layer provided below the first semiconductor layer, the third semiconductor layer being an emitter region, and the second semiconductor layer. May be a collector region.

  A high-frequency amplifier may be configured using the first semiconductor device according to the present invention.

  A high-frequency amplifier may be configured using the first semiconductor device according to the present invention, and the high-frequency amplifier includes a DC input terminal connected to the base electrode and an RF input terminal connected to the electrode. May be.

  A high-frequency amplifier may be configured using the first semiconductor device according to the present invention. The high-frequency amplifier includes a bias circuit connected to the DC input terminal and an input matching circuit connected to the RF input terminal. You may have.

  You may comprise a portable information terminal using the 1st semiconductor device in this invention.

  A portable information terminal may be configured using the first semiconductor device according to the present invention. The portable information terminal includes a transmission amplifier having the semiconductor device, an antenna connected to the transmission amplifier, and the transmission amplifier. There may be provided an antenna switch that is interposed between the antenna and switches the electrical connection between the transmission amplifier and the antenna.

  In the portable information terminal using the first semiconductor device according to the present invention, the transmission amplifier is connected to the DC input terminal connected to the base electrode, the RF input terminal connected to the electrode, and the DC input terminal. And an input matching circuit connected to the RF input terminal.

  In the semiconductor device, the high-frequency amplifier, and the portable information terminal of the present invention, since the capacitor is built in the transistor body, the chip size can be reduced while reducing the current co-plus phenomenon. In addition, by connecting or incorporating a resistor in the base electrode portion, nonuniform operation due to self-heating of the transistor can be reduced. Further, since the RF input can be input to the transistor without going through a resistor, high gain and high efficiency can be realized.

(First embodiment)
The structure of the semiconductor device according to the first embodiment of the present invention will be described below with reference to the drawings.

  FIG. 1 is a diagram illustrating a basic circuit example of the high-frequency semiconductor device according to the first embodiment. FIG. 1 shows an example of HBT formed on a GaAs substrate using an epitaxial growth method.

As shown in FIG. 1, the semiconductor device according to the present embodiment includes a GaAs substrate 6 and an n ⁺ -GaAs having a thickness of 600 nm, which is provided on the GaAs substrate 6 and has an impurity concentration of 5 × 10 ¹⁸ cm ^−3. A sub-collector layer 5, a collector layer 4 made of n ⁻ -GaAs having an impurity concentration of 1 × 10 ¹⁶ cm ⁻³ and having an impurity concentration of 1 × 10 ¹⁶ cm ⁻³ , and a collector layer 4. A base layer (first semiconductor layer) 3 made of p-GaAs having an impurity concentration of 4 × 10 ¹⁹ cm ⁻³ and having an impurity concentration of 4 × 10 ¹⁹ cm ⁻³ , and the intrinsic base region 11 of the base layer 3. A second emitter layer (second semiconductor layer) 2a made of n-In _0.5 Ga _0.5 P having an impurity concentration of 3 × 10 ¹⁷ cm ⁻³ and having a thickness of 3 × 10 ¹⁷ cm ⁻³ ; 3 × 10 ¹⁷ cm provided on region 12 ^A second emitter layer (second semiconductor layer) 2b made of n-In _0.5 Ga _0.5 P having an impurity concentration of ⁻³ and having a thickness of 30 nm, and 3 × 10 ¹⁸ to 3 × 10 ¹⁸ 200 nm thick n ⁺ -In _x Ga _y P (0 ≦ x ≦ 0.5, 0.5 ≦ y ≦ 1, x + y = 1) having an impurity concentration of 2 × 10 ¹⁹ cm ⁻³ Layer 1. Here, the emitter electrode 7 is provided on the first emitter layer 1, and the base electrode 3 is separated from the second emitter layer 2 a and the first emitter layer 1 on the external base region 12 in the base layer 3. 8 is provided. A capacitor upper electrode 9 is provided on the second emitter layer 2b. A collector electrode 10 is provided on the subcollector layer 5.

  The semiconductor device illustrated in FIG. 1 may be manufactured using a normal semiconductor manufacturing method such as wet etching, dry etching, or electrode evaporation using a resist mask. As shown in FIG. 1, intrinsic base region 11 is a region through which emitter current or collector current flows in base layer 3, and external base region 12 is emitter current or collector in base layer 3. This is a region other than the region where current flows, and the external base region 12 surrounds the intrinsic base region 11.

A capacitance is accumulated in the second emitter layer 2b for the following reason. Since the base layer 3 is made of p-GaAs and the second emitter layer 2b is made of n-In _0.5 Ga _0.5 P, a pn junction is formed between these two layers. Arise. The p-type doping concentration (4 × 10 ¹⁹ cm ⁻³ ) of the base layer 3 is about two orders of magnitude higher than the n-type doping concentration (3 × 10 ¹⁷ cm ⁻³ ) of the second emitter layer 2, and the second emitter layer 2 b Is as thin as 30 nm, the second emitter layer 2b is completely depleted by the built-in voltage (Vbi) of the pn junction. As a result, the capacitor upper electrode 9, the second emitter layer 2b, and the base layer 3 function as a capacitor.

  One end of a base ballast resistor 13 is connected to the outside of the base electrode 8, and the other end of the base ballast resistor 13 serves as a DC input terminal 15. On the other hand, the capacitor upper electrode 9 becomes the RF input terminal 16.

  According to the present embodiment, since the base electrode 8 and the capacitor upper electrode 9 are formed in the unit HBT, it is possible to easily configure a basic circuit in which DC input and RF input are separated. Thereby, the occurrence of the current collapse phenomenon can be suppressed by the base ballast resistor 13. At the same time, since the RF input signal is input to the HBT without passing through the base ballast resistor 13, high gain and high efficiency can be realized. As the base ballast resistor 13, a metal thin film resistor such as NiCr or a semiconductor resistor using a semiconductor layer is generally used.

The capacitor in the conventional HBT as shown in FIGS. 18 and 19 usually has a MIM structure having, as an insulating film (I), a SiN film having a thickness of about 200 nm deposited by a plasma CVD method. If the SiN film is 200 nm, the capacitance value per 1um ² becomes ^{3.1 × 10 -16 (F / um} 2). In order to further increase the capacitance value per unit area, the SiN film thickness should be 200 nm or less. However, the SiN film having a film thickness of 200 nm or less tends to have a large variation in film thickness due to the limit of the deposition apparatus. In addition, when foreign matter such as dust is present on the base electrode, there is a problem that a hole is formed in the SiN film from that point and leakage current or short circuit occurs. That is, in the conventional capacitor, it is difficult to increase the capacitance value per unit area from the above value.

On the other hand, in the capacitor of this embodiment, the n-In _0.5 Ga _0.5 P layer (second emitter layer 2b) having a thickness of 30 nm corresponds to the insulating film (I) having the MIM structure. The relative dielectric constant of In _0.5 Ga _0.5 P is about 11.9, which is 1.7 times larger than the relative dielectric constant of about 7.0 of the SiN film. Furthermore, since In _0.5 Ga _0.5 P is formed by epitaxial growth, no leakage current occurs even at a film thickness of 200 nm or less. As a result, capacitance value per 1um ² has a high value of about 11.3 times the ^{35.1 × 10 -16 (F / um} 2) of a conventional MIM capacitor having a SiN film having a thickness of 200nm as an insulating film Become.

Here, the unit HBT generally incorporates a capacitor of about 0.3 pF in order to ensure high-frequency characteristics (see Prior Art Document 4). In the conventional capacitor using the SiN film, an area of about 970 μm ² is required to realize 0.3 pF, but in this embodiment, a capacitance value of 0.3 pF is realized with an area of only about 86 μm ^2. it can. Specifically, considering that the unit HBT is usually formed with a length of 20 μm to 30 μm, for example, the width of the capacitor upper electrode 9 is 4.3 μm, the length of the unit HBT is 20 μm, or the capacitor upper electrode By setting the width of 9 to 2.9 μm and the length of the unit HBT to 30 μm, the area can be about 86 μm ² . Since the capacitor can be downsized in this way, in the present embodiment, it is possible to incorporate the capacitor into the unit HBT without attaching the capacitor as in the prior art. As a result, the chip area can be significantly reduced.

  In the structure shown in FIG. 1, the second emitter layer 2b provided in the intrinsic base region 11 and the second emitter layer 2a provided in the external base region 12 are separated from each other. Instead, one second emitter layer 2 may be provided as shown in FIG. FIG. 2 is a diagram illustrating a modification of the semiconductor device according to the first embodiment. Even when the second emitter layer 2 is formed in this way, the portion of the second emitter layer 2 disposed on the external base region 12 is completely depleted by the high-concentration p-type base layer 3, and the conductivity is reduced. I don't have it. Therefore, the emitter electrode 7 and the capacitor upper electrode 9 are not short-circuited.

  In the structure shown in FIG. 1, the base electrode 8 is formed on the p-type base layer 3, but the base electrode 8 may be formed on the second emitter layer 2 as shown in FIG. In this case, for example, the base electrode 8 has a multilayer structure such as Pt / Ti / Pt / Au and is subjected to heat treatment at about 300 ° C., so that an alloy region is formed in a portion of the second emitter layer 2 disposed below the base electrode 8. 14 may be formed. That is, the base layer 3 and the base electrode 8 may be brought into ohmic contact via the alloy region 14.

  1 and 2, the structure in which one base ballast resistor 13 is connected to one unit HBT has been described. However, as shown in FIG. 3, n (n = 2, 3,...) One base ballast resistor 13 may be connected to the unit HBT. FIG. 3 is a diagram illustrating a modification of the semiconductor device according to the first embodiment. Even with such a configuration, it is possible to adjust the manufacturing conditions of the HBT, such as determining the value of n in accordance with the actual situation where the current collapse phenomenon occurs.

(Second Embodiment)
The structure of the high-frequency semiconductor device according to the second embodiment of the present invention will be described below with reference to the drawings.

  FIG. 4 is a diagram illustrating a basic circuit example of the semiconductor device according to the second embodiment. The semiconductor device in FIG. 4 has the same structure as that shown in FIG. 1 except that the base electrode 8 itself becomes the DC input terminal 15. Therefore, the detailed description is abbreviate | omitted.

  FIG. 5 is a diagram illustrating a modification of the semiconductor device according to the second embodiment. In the present embodiment, as in the semiconductor device shown in FIG. 5, one second emitter layer 2 straddling the intrinsic base region 11 and the external base region 12 may be formed. Alternatively, the base electrode 8 may be formed, and the base electrode 8 and the base layer 3 may be electrically connected by the alloy region 14. Since these structures are as described in the first embodiment, a detailed description thereof is omitted.

  FIG. 6 is a diagram illustrating a modification of the semiconductor device according to the second embodiment. In the present embodiment, like the semiconductor device shown in FIG. 6, the unit HBTs shown in FIGS. 4 and 5 may be connected in parallel. Even with such a configuration, as described in the first embodiment, the manufacturing conditions can be adjusted in accordance with the actual occurrence of the current collapse phenomenon.

  In the present embodiment, as in the first embodiment, since the capacitor can be taken into the unit HBT without attaching an external capacitor, the chip area can be greatly reduced. Further, since the RF input terminal 16 is a terminal separate from the DC input terminal 15, the RF input signal is input to the unit HBT without passing through the base electrode 8, so that the gain can be obtained even when the base internal resistance is high as described above. It does not decline. Therefore, high gain and high efficiency can be realized.

(Third embodiment)
The structure of the high-frequency semiconductor device according to the third embodiment of the present invention will be described below with reference to the drawings.

  FIG. 7 is a diagram illustrating a basic circuit example of the high-frequency semiconductor device according to the third embodiment. In the semiconductor device shown in FIG. 7, the base electrode 8 and the capacitor upper electrode 9 are electrically connected to form a DC / RF common input terminal 17. Since the other structure is the same as that shown in FIG. 1, its detailed description is omitted.

  FIG. 8 is a diagram illustrating a modification of the semiconductor device according to the third embodiment. In the present embodiment, as in the semiconductor device shown in FIG. 8, one second emitter layer 2 straddling the intrinsic base region 11 and the external base region 12 may be formed. Alternatively, the base electrode 8 may be formed and the base electrode 8 and the base layer 3 may be electrically connected by the alloy region 14. Since these structures are as described in the first embodiment, a detailed description thereof is omitted.

  FIG. 9 is a diagram illustrating a modification of the semiconductor device according to the third embodiment. In the present embodiment, the unit HBTs shown in FIGS. 7 and 8 may be connected in parallel as in the semiconductor device shown in FIG. Even with such a configuration, as described in the first embodiment, the manufacturing conditions can be adjusted in accordance with the actual occurrence of the current collapse phenomenon.

  In the present embodiment, as in the first embodiment, since the capacitor can be taken into the unit HBT without attaching an external capacitor, the chip area can be greatly reduced.

(Fourth embodiment)
The structure of the high-frequency amplifier according to the fourth embodiment of the present invention will be described below with reference to the drawings.

  FIG. 10A is a circuit diagram showing a high-frequency amplifier according to the fourth embodiment. FIG. 10A shows a grounded-emitter single-stage amplifier as an example.

  As shown in FIG. 10A, in the high frequency amplifier of this embodiment, the emitter of the HBT 25 is grounded, and the DC input (base) of the HBT 25 is connected to the bias circuit 20 via the DC input terminal 15. As a result, the base voltage or base current of the HBT 25 is controlled. An input matching circuit 22 is connected to the input terminal 21 of the HBT 25 and an output matching circuit 23 is connected to the output terminal 24 so that the HBT 25 can ensure RF characteristics at a desired frequency.

  Here, as the HBT 25, for example, a unit HBT shown in FIGS. 1 and 2 connected in parallel is used. FIG. 10B is a diagram showing a semiconductor device in which unit HBTs are connected in parallel in the fourth embodiment. As shown in FIG. 10B, a base ballast resistor 13 is connected to the base electrode 8 of each unit HBT 27. FIG. 10C is a circuit diagram showing the structure shown in FIG. 10B as an equivalent circuit.

  In the high-frequency amplifier of this embodiment, since the base ballast resistor 13 is provided in each unit HBT 27, the occurrence of a current collapse phenomenon can be suppressed. At the same time, since the RF input signal is input to each unit HBT 27 without passing through the base ballast resistor 13, high gain and high efficiency can be realized.

  In the present embodiment, it is possible to incorporate the capacitor into the unit HBT 27 without attaching a capacitor as in the prior art. As a result, the chip area can be greatly reduced, and a high-frequency amplifier can be manufactured at low cost.

  10B, the base ballast resistor 13 is connected to each unit HBT 27. However, as shown in FIG. 3, one base ballast resistor 13 may be connected to each of the n unit HBTs 27. As shown in FIGS. 6 and 9, the base ballast resistor need not be connected. However, when the HBT shown in FIG. 9 is used, the circuit shown in FIG. 9 may be connected as shown in FIG. 11B to form an amplifier as shown in FIG. FIG. 11A is a circuit diagram showing a modification of the high-frequency amplifier according to the fourth embodiment, and FIG. 11B shows a semiconductor device in which unit HBTs are connected in parallel in the fourth embodiment. FIG. 11C is a circuit diagram showing FIG. 11B as an equivalent circuit, and shows a circuit corresponding to the HBT 25 shown in FIG.

  Further, although FIGS. 10A to 11C are described using an example of a single-stage amplifier, an amplifier having a circuit configuration other than that may be used in this embodiment. For example, a multistage amplifier may be used.

(Fifth embodiment)
The structure of the high-frequency semiconductor device according to the fifth embodiment of the present invention will be described below with reference to the drawings.

FIG. 12 is a diagram illustrating a basic circuit example of the high-frequency semiconductor device according to the fifth embodiment. The semiconductor device shown in FIG. 12 is the same as the structure shown in FIG. 1 except that the base electrode 30 also serves as a resistor, and a description thereof will be omitted. In order to make the base electrode 30 also serve as a resistor, the contact resistivity between the base electrode 30 and the base layer 3 is increased to, for example, about 1 × 10 ⁻⁵ Ωcm ⁻² , or a material with extremely low conductivity. Can be used as the base electrode 30 to increase the internal resistance of the base electrode 30 and allow the base electrode 30 itself to function as a base ballast resistor.

  FIG. 13 is a diagram illustrating a modification of the high-frequency semiconductor device according to the fifth embodiment. In the present embodiment, as in the semiconductor device shown in FIG. 13, one second emitter layer 2 straddling the intrinsic base region 11 and the external base region 12 may be formed. Alternatively, the base electrode 8 may be formed and the base electrode 8 and the base layer 3 may be electrically connected by the alloy region 14. Since these structures are as described in the first embodiment, a detailed description thereof is omitted.

  In the present embodiment, high gain and high efficiency can be realized while suppressing the occurrence of the current collapse phenomenon. In addition, since it can be taken into the unit HBT without attaching a capacitor externally, the chip area can be greatly reduced.

(Sixth embodiment)
The structure of the high-frequency amplifier according to the sixth embodiment of the present invention will be described below with reference to the drawings.

  FIG. 14A is a circuit diagram showing a high-frequency amplifier according to the sixth embodiment. FIG. 14A shows a grounded-emitter single-stage amplifier as an example.

  As shown in FIG. 14A, in the high frequency amplifier of the present embodiment, the emitter of the HBT 25 is grounded, and the DC input of the HBT 25 is connected to the bias circuit 20 via the DC input terminal 15. The base voltage or base current of the HBT 25 is controlled. An input matching circuit 22 is connected to the input terminal 21 of the HBT 25 and an output matching circuit 23 is connected to the output terminal 24 so that the HBT 25 can ensure RF characteristics at a desired frequency.

  Here, as the HBT 25, for example, the one shown in FIG. 14B having a structure in which unit HBTs shown in FIG. 12 and FIG. 13 are connected in parallel is used. FIG. 14B is a diagram illustrating a semiconductor device in which unit HBTs are connected in parallel in the sixth embodiment. In FIG. 14B, the base electrode 30 of each unit HBT 27 also has a function as a resistor. FIG. 14C is a circuit diagram showing the structure shown in FIG. 14B with an equivalent circuit.

  In the high-frequency amplifier of this embodiment, the base electrode 30 of each unit HBT 27 functions as a ballast resistor, so that the occurrence of a current collapse phenomenon can be suppressed. At the same time, since the RF input is input to the HBT without passing through the high-resistance base electrode 30, it is possible to achieve high gain and high efficiency.

  Further, in the present embodiment, it is possible to take in the unit HBT without attaching a capacitor as in the prior art. As a result, the chip area can be greatly reduced, and a high-frequency amplifier can be manufactured at low cost.

  14A to 14C, an example of a single-stage amplifier is described. However, in the present embodiment, an amplifier having a circuit configuration other than that may be used. For example, a multistage amplifier may be used.

(Seventh embodiment)
A portable information terminal according to the seventh embodiment of the present invention will be described below with reference to the drawings. The portable information terminal of this embodiment uses the high-frequency semiconductor device according to the first to third and fifth embodiments or the high-frequency amplifier according to the fourth and sixth embodiments.

  FIG. 15A is a circuit diagram showing a wireless communication front end unit of a portable information terminal (including a mobile phone) according to the seventh embodiment. As shown in FIG. 15A, the radio communication front-end unit according to the present embodiment includes a transmission amplifier 44, a reception low noise amplifier 45, an antenna switch 43, and an antenna 42. The antenna switch 43 switches the connection between the antenna 42 and the transmission amplifier 44 and the reception low noise amplifier 45. The reception low noise amplifier 45 is connected to a down converter (not shown) via a terminal 46. On the other hand, the transmission amplifier 44 is connected to an up converter (not shown) via a terminal 47. The down converter down-converts the RF signal into an IF signal, and the up converter up-converts the IF signal into an RF signal.

  FIG. 15B is a circuit diagram showing a configuration of the transmission amplifier 44 shown in FIG. FIG. 15B shows an example in which a grounded emitter two-stage amplifier is used as the transmission amplifier 44. As shown in FIG. 15B, in the transmission amplifier 44 in the portable information terminal of this embodiment, two stages of high frequency amplifiers as shown in FIG. 14A are connected. The emitter of the HBT 25 is grounded, and the DC input of the HBT 25 is connected to the bias circuit 20 via the DC input terminal 15 to control the base voltage or base current of the HBT 25. An input matching circuit 22 is connected to the input terminal 21, an output matching circuit 23 is connected to the output terminal 24, and an interstage matching circuit 41 is connected between the stages so that the HBT 25 can ensure RF characteristics at a desired frequency. .

  Here, as the HBT 25, for example, the one shown in FIG. 16A having a structure in which unit HBTs as shown in FIGS. 12 and 13 are connected in parallel is used. FIG. 16A is a diagram illustrating a semiconductor device in which unit HBTs are connected in parallel in the seventh embodiment. In FIG. 16A, the base electrode 28 of each unit HBT 27 also has a function as a resistor. FIG. 16B is a circuit diagram showing the structure shown in FIG.

  In the portable information terminal of this embodiment, since the base electrode 28 of each unit HBT 27 in the transmission amplifier 44 functions as a ballast resistor, the occurrence of a current collapse phenomenon can be suppressed. At the same time, since the RF input is input to the unit HBT 27 without going through the high-resistance base electrode 28, it is possible to realize a high gain and a high effect. Generally, about 70% of the total current used in the portable information terminal is consumed by the transmission amplifier. Therefore, when the transmission amplifier 44 is made highly efficient like the portable information terminal of the present embodiment, a long-time call or data communication becomes possible.

  In the present embodiment, the capacitor can be taken into the unit HBT without externally attaching a capacitor as in the prior art. As a result, the chip area can be significantly reduced, and a low-cost and small-sized transmission amplifier can be manufactured. Therefore, the portable information terminal can be reduced in size and cost.

  In the present embodiment, the same effect can be obtained even if a transmission amplifier is configured using the high-frequency semiconductor device described in the first to third and fifth embodiments. The same effect can be obtained even when the high-frequency amplifier described in the fourth embodiment is used as the transmission amplifier.

(Other embodiments)
In the first to seventh embodiments described above, the case where the composition ratio of the In _x Ga _y P film as the second emitter layer 2b is x = 0.5 and y = 0.5 has been described. However, the composition ratio to which the present invention can be applied is not limited thereto. Specifically, the composition ratio of each element in the In _x Ga _y P film is preferably 0.4 ≦ x ≦ 0.6, 0.4 ≦ y ≦ 0.6, and x + y = 1. In _x Ga _y P preferably has a thickness of 10 nm to 50 nm. Thus, by reducing the thickness of the second emitter layer 2b, which is a capacitive film, the area of the capacitor can be reduced. Note that when the second emitter layer 2b is In _x Ga _y P, a capacitance film can be formed by epitaxial growth, so that leakage current hardly occurs even if the film thickness is reduced.

  In the present invention, an InP film may be used as the second emitter layer 2b. The thickness of the InP film is preferably 10 nm or more and 100 nm or less. Thus, by reducing the film thickness of the second emitter layer 2b, which is a capacitor film, the area of the capacitor can be reduced. Since the InP film can be formed by epitaxial growth, leakage current hardly occurs even if the film thickness is reduced.

In the present invention, an In _x Al _y As film (0.5 ≦ x ≦ 0.55, 0.45 ≦ y ≦ 0.5, x + y = 1) may be used as the second emitter layer 2b. Further, In _x Al _y As film preferably has a thickness of more than 150nm or less 10 nm. Thus, by reducing the thickness of the second emitter layer 2b, which is a capacitive film, the area of the capacitor can be reduced. Note that since the In _x Al _y As film can be formed by epitaxial growth, leakage current hardly occurs even if the film thickness is reduced.

In the present invention, an Al _x Ga _y As film (0.4 ≦ x ≦ 0.6, 0.6 ≦ y ≦ 0.8, x + y = 1) may be used as the second emitter layer 2b. Further, the Al _x Ga _y As film preferably has a thickness of 10 nm or more and 100 nm or less. Thus, by reducing the thickness of the second emitter layer 2b, which is a capacitive film, the area of the capacitor can be reduced. Note that since the Al _x Ga _y As film can be formed by epitaxial growth, leakage current hardly occurs even when the film thickness is reduced.

  In the first to seventh embodiments described above, the HBT produced on the GaAs substrate has been described as an example. However, the present invention is also applicable to HBTs using other materials, for example, InP substrates. Can do.

  In the first to seventh embodiments, the emitter-up type HBT in which the second emitter layer 2 (2a, 2b) and the first emitter layer 1 are present on the base layer 3 has been described as an example. However, the present invention can also be applied to a collector-up type HBT in which a collector layer is present on the base layer. An example of a specific structure in this case will be described with reference to FIGS. 17 (a) and 17 (b). FIG. 17A is a cross-sectional view showing the structure of one embodiment of the collector-up type HBT in the present invention. As shown in FIGS. 17A and 17B, in the collector-up type HBT of the present invention, the sub-emitter layer 55 is formed on the GaAs substrate 6, and the emitter layer 54 and the sub-emitter layer 55 are formed on the sub-emitter layer 55. An emitter electrode 57 is formed. A base layer 3 is formed on the emitter layer 54. A second collector layer 52 a is formed on the intrinsic base region 11 in the base layer 3, and a second collector layer 52 b is formed on the outer base region 12 in the base layer 3. A first collector layer 51 is formed on the second collector layer 52 a, and a collector electrode 60 is formed on the first collector layer 51. On the other hand, the capacitor upper electrode 9 is formed on the second collector layer 52b.

  FIG. 17B is a cross-sectional view showing the structure of one embodiment of the collector-up type HBT in the present invention. In the structure shown in FIG. 17B, one second emitter layer 52 is formed from the intrinsic base region 11 in the base layer 3 to the outer base region 12. Also, as shown in FIG. 17B, the base electrode 8 is formed on the second emitter layer 52, and the base electrode 8 and the base layer 3 are electrically connected via the alloy region 14. .

  17A and 17B, the emitter-up HBT described in the first embodiment has been described as a collector-up HBT. However, in the present invention, the emitter-up type HBT described in the second to third and fifth embodiments may be modified to a collector-up type HBT. Further, a collector-up type HBT may be used in the high-frequency amplifier described in the fourth and sixth embodiments and the portable information terminal described in the seventh embodiment.

  The semiconductor device, the high-frequency amplifier, and the portable information terminal of the present invention can reduce the chip size and reduce the cost, can reduce non-uniform operation, and can achieve high gain and high efficiency. Industrial applicability is high in that it can be done.

It is a figure which shows the example of a basic circuit of the high frequency semiconductor device which concerns on 1st Embodiment. It is a figure which shows the modification of the semiconductor device which concerns on 1st Embodiment. It is a figure which shows the modification of the semiconductor device which concerns on 1st Embodiment. It is a figure which shows the example of a basic circuit of the semiconductor device which concerns on 2nd Embodiment. It is a figure which shows the modification of the semiconductor device which concerns on 2nd Embodiment. It is a figure which shows the modification of the semiconductor device which concerns on 2nd Embodiment. It is a figure which shows the example of a basic circuit of the high frequency semiconductor device which concerns on 3rd Embodiment. It is a figure which shows the modification of the semiconductor device which concerns on 3rd Embodiment. It is a figure which shows the modification of the semiconductor device which concerns on 3rd Embodiment. (A) is a circuit diagram showing the high frequency amplifier concerning a 4th embodiment, (b) is a figure showing the semiconductor device which connected unit HBT in parallel in a 4th embodiment, and (c) FIG. 4 is a circuit diagram showing the structure shown in FIG. (A) is a circuit diagram which shows the modification of the high frequency amplifier which concerns on 4th Embodiment, (b) is a figure which shows the semiconductor device which connected unit HBT in parallel in 4th Embodiment, (C) is a circuit diagram showing (b) as an equivalent circuit. It is a figure which shows the basic circuit example of the high frequency semiconductor device which concerns on 5th Embodiment. It is a figure which shows the modification of the high frequency semiconductor device which concerns on 5th Embodiment. (A) is a circuit diagram showing the high frequency amplifier concerning a 6th embodiment, (b) is a figure showing the semiconductor device which connected unit HBT in parallel in a 6th embodiment, (c) FIG. 4 is a circuit diagram showing the structure shown in FIG. (A) is a circuit diagram which shows the radio | wireless communication front end part of the portable information terminal which concerns on 7th Embodiment, (b) is a circuit diagram which shows the structure of the transmission amplifier 104 shown to (a). (A) is a figure which shows the semiconductor device which connected unit HBT in parallel in 7th Embodiment, (b) is a circuit diagram which represented the structure shown to (a) with the equivalent circuit. (A), (b) is sectional drawing which shows the structure of the collector up type | mold HBT in this invention. It is a figure which shows the structure of the conventional semiconductor device. It is a circuit diagram which shows the structure for preventing the fall of power efficiency when adding a ballast resistance to a base in the past. It is a circuit diagram which shows the structure for preventing the fall of power efficiency when adding a ballast resistance to a base in the past.

Explanation of symbols

1 First emitter layer
2 Second emitter layer
2a External base area
2a Second emitter layer
2b Second emitter layer
3 p-type base layer
4 Collector layer
5 Subcollector layer
6 GaAs substrate
7 Emitter electrode
8 Base electrode
9 Capacitor upper electrode
10 Collector electrode
11 Intrinsic base area
12 External base area
13 Base ballast resistor
14 Alloy region
15 DC input terminal
16 RF input terminal
17 RF common input terminal
20 Bias circuit
21 Input terminal
22 Input matching circuit
23 Output matching circuit
24 output terminals
25 HBT
27 Unit HBT
28 Base electrode
30 Base electrode
41 Interstage matching circuit
42 Antenna
43 Antenna switch
44 Transmitting amplifier
45 Receiving low noise amplifier
46, 47 terminals
51 First collector layer
52 Second emitter layer
52a Second collector layer
52b Second collector layer
54 Emitter layer
55 Sub-emitter layer
57 Emitter electrode
60 Collector electrode

Claims (22)

A first semiconductor layer having an intrinsic base region and an external base region;
A second semiconductor layer provided on the intrinsic base region and serving as an emitter region or a collector region;
A capacitive film provided on a portion of the external base region;
An electrode provided on the capacitive film;
And a base electrode provided on the other part of the external base region. The semiconductor device according to claim 1, wherein the capacitor film is an In _x Ga _y P film (0.4 ≦ x ≦ 0.6, 0.4 ≦ y ≦ 0.6, x + y = 1). The semiconductor device according to claim 2, wherein the In _x Ga _y P film has a thickness of 10 nm to 50 nm.   The semiconductor device according to claim 1, wherein the capacitor film is an InP film.   The semiconductor device according to claim 4, wherein the InP film has a thickness of 10 nm to 100 nm. The capacitor film is In _x Al _y As film (0.5 ≦ x ≦ 0.55, 0.45 ≦ y ≦ 0.5, x + y = 1), the semiconductor device according to claim 1. It said In _x Al _y As layer has a film thickness of at least 150nm or less 10 nm, the semiconductor device according to claim 6. The semiconductor device according to claim 1, wherein the capacitor film is an Al _x Ga _y As film (0.2 ≦ x ≦ 0.4, 0.6 ≦ y ≦ 0.8, x + y = 1). The semiconductor device according to claim 8, wherein the Al _x Ga _y As film has a thickness of 10 nm to 100 nm. The electrode is a first input terminal;
The semiconductor device according to claim 1, wherein the base electrode is a second input terminal. A first connecting portion for electrically connecting the electrode and the base electrode;
The semiconductor device according to claim 1, wherein the first connection portion is an input terminal. A resistor,
The semiconductor device according to claim 1, wherein one end of the resistor is connected to the base electrode, and the other end is a first input terminal. A resistor having one end connected to the base electrode;
A second connecting portion to which the other end of the resistor and the electrode are connected;
The semiconductor device according to claim 1, wherein the second connection portion is an input terminal.   The semiconductor device according to claim 1, wherein the base electrode functions as a resistor. A third semiconductor layer provided below the first semiconductor layer;
The third semiconductor layer is a collector region;
The semiconductor device according to claim 1, wherein the second semiconductor layer is an emitter region. A third semiconductor layer provided below the first semiconductor layer;
The third semiconductor layer is an emitter region;
The semiconductor device according to claim 1, wherein the second semiconductor layer is a collector region.   A high frequency amplifier using the semiconductor device according to claim 1. A high-frequency amplifier using the semiconductor device according to claim 1,
A DC input terminal connected to the base electrode;
A high frequency amplifier comprising an RF input terminal connected to the electrode. A high-frequency amplifier using the semiconductor device according to claim 1,
A bias circuit connected to the DC input terminal;
A high frequency amplifier comprising an input matching circuit connected to the RF input terminal.   A portable information terminal using the semiconductor device according to claim 1. A portable information terminal using the semiconductor device according to claim 1,
A transmission amplifier having the semiconductor device;
An antenna connected to the transmission amplifier;
A portable information terminal comprising: an antenna switch that is interposed between the transmission amplifier and the antenna and switches an electrical connection between the transmission amplifier and the antenna. The portable information terminal according to claim 21, wherein
The transmission amplifier includes:
A DC input terminal connected to the base electrode;
An RF input terminal connected to the electrode;
A bias circuit connected to the DC input terminal;
A portable information terminal comprising: an input matching circuit connected to the RF input terminal.

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