JP2006119614A - Active display device and driving method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the occurrence of a pseudo contour which is caused when adopting a time division gray scale, by employing an interlace method to an active display device and to provide a driving circuit and a driving method for the above. <P>SOLUTION: The invention provides an active display device adopting an interlace method, where pixels of odd-numbered rows and odd-numbered columns and pixels of even-numbered rows and even numbered columns are displayed during an odd-numbered frame period and pixels of odd-numbered row and even-numbered columns and pixels of even-numbered rows and odd-numbered columns are displayed during an even-numbered frame period. As a result, the occurrence of a pseudo contour can be reduced without increasing the frame frequency. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a driving method for preventing generation of a pseudo contour in an active display device. The present invention also relates to an active display device having a driving circuit therefor.

As a driving method of digital gradation which is one of display methods of an active display device, there is a driving method called time gradation. The time gray scale is a method of performing gray scale display by dividing one frame period into a plurality of sub-frame periods and controlling light emission and non-light emission of elements in each sub-frame period.

However, when displaying in time gradation, a pseudo contour may occur and the image quality may deteriorate. The pseudo contour is a phenomenon in which bright and dark lines appear to be mixed unnaturally when displaying a halftone.

As a method of preventing false contours, there is an interlaced image plasma display, which is based on the sum of the number of sustains of the last subfield of an odd (even) field and one or more subfields of an even (odd) field. A method for determining the relative luminance of the last subfield of an odd (even) field has been proposed (see Patent Document 1).

Further, as a method for preventing flicker, which is flickering of the screen, there has been proposed a method in which one field is divided into 8 subfields in the plasma display, and every other scan electrode is addressed by interlaced scanning in the lower 4 bits. (See Patent Document 2).
JP 2000-148084 A Japanese Patent Laid-Open No. 11-24628

The plasma displays described in Patent Document 1 and Patent Document 2 are passive display devices. A passive display device is different in driving method from an active display device having a plurality of semiconductor elements in a pixel portion. Further, Patent Document 1 and Patent Document 2 do not describe a detailed drive circuit when adopting an interlace method for a plasma display.

In view of this, an object of the present invention is to prevent pseudo contour in an active display device, particularly an active display device having a light emitting element, and to provide a new driving method using an interlace method. Another object of the present invention is to propose a new driving circuit for an active display device using an interlace method.

In view of the above problems, the present invention is characterized in that an active display device, particularly an active display device having a light emitting element, performs display using an interlace method. More preferably, the present invention is characterized in that a display area and a non-display area are provided in a grid pattern for a plurality of pixels. In order to provide a display area and a non-display area in a grid pattern, switching means is provided in the drive circuit.

A specific form of the present invention includes a plurality of pixels arranged in a matrix, and in an odd frame, pixels in an odd row and an odd column, and pixels in an even row and an even column are included in the pixels. A driving method of an active display device, characterized in that, in an even frame, pixels in odd rows and even columns and pixels in even rows and odd columns are displayed among the pixels.

In another embodiment of the present invention, a circuit that includes a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines and controls a semiconductor element connected to the signal line includes a shift register and a latch circuit. The shift register includes a shift register unit, the latch circuit includes a latch unit and a wiring to which an inversion signal for controlling selection of the latch unit is input, and the adjacent latch unit is adjacent to the shift register. An active display device characterized in that one of the adjacent latch units is selected by a signal from the shift register unit and an inversion signal connected between the units.

A circuit having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines and controlling a semiconductor element connected to the signal line includes a shift register and a latch circuit. The shift register is a shift register. The latch circuit includes a latch unit, a wiring to which an inversion signal for controlling selection of the latch unit is input, and a switching unit that is switched by the inversion signal. The adjacent latch unit is an adjacent shift register. An active display device characterized in that one of adjacent latch units is selected by switching means and connected between the units.

In another embodiment of the present invention, a selection signal is input to a circuit that has a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines and controls a semiconductor element connected to the scanning lines. An active circuit characterized by having a wiring, an AND circuit, a shift register, and a level shifter, wherein the AND circuit is connected to a signal from the shift register and a selection signal and to output a signal to the level shifter. Type display device.

A circuit having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines and controlling a semiconductor element connected to the signal line includes a shift register and a latch circuit. The shift register is a shift register. The latch circuit includes a latch unit, a wiring to which an inversion signal for controlling selection of the latch unit is input, and switching means that is switched by the inversion signal. The latch unit is between adjacent shift register units. It is an active type display device characterized by being connected to.

According to the present invention, it is possible to prevent a pseudo contour in an active display device that performs gradation display by time gradation. In particular, it is preferable to use the present invention because a pseudo contour can be prevented without increasing the frame frequency.

Furthermore, according to the present invention, it is possible to prevent an interlace failure in which a stripe pattern is generated in an active display device that performs gradation display by time gradation.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

(Embodiment 1)
In this embodiment mode, a driving method using an interlace method and a driving circuit therefor in an active display device that performs grayscale display using time grayscales will be described.

FIG. 1 is a schematic diagram of a pixel portion of an active display device in which semiconductor elements are arranged in a matrix. Display pixels are white and non-display pixels are black. In such a pixel portion, only odd-numbered pixels are displayed in the first frame (see FIG. 1A), and only even-numbered pixels are displayed in the second frame (FIG. 1B). reference). That is, in the pixel portion, a display area and a non-display area are provided in a line shape. Such a first frame and a second frame may correspond to one subframe in the time gray scale.

In the present embodiment, the first frame is represented as an odd frame, and the second frame is represented as an even frame.

In the pixel portion of the present invention, only even-numbered rows of pixels may be displayed in odd-numbered frames, and only odd-numbered rows of pixels may be displayed in even-numbered frames.

FIG. 2 shows a timing chart for performing such display. FIG. 2A shows a scanning line start pulse (GSP), a scanning line clock signal (GCK), and a selection line for selecting a signal line in the row direction (hereinafter referred to as a scanning line) in an odd frame. (ENB) signal. In addition, a start pulse (SSP) and a start clock signal (SCK) for selecting a signal line in the column direction (hereinafter referred to as a signal line) are shown. These signals indicate the timing of the video signal (DATA).

FIG. 2B shows a timing chart in an even frame. In FIG. 2A, High and Low of the ENB signal are inverted, and other timings are the same.

In the odd-numbered frame, the odd-numbered pixels in the pixel portion are selected only when the ENB signal is High. In the even frame, the pixels in the even rows of the pixel portion are selected only when the ENB signal is High. That is, in the pixel portion of the present invention, the scanning line of the pixel portion is selected only when the ENB signal is High.

The video signal (DATA) is input after the SSP signal and input to the selected pixel. The video signal (DATA) may be captured within one gate clock period. Note that the selected pixel is a pixel having a semiconductor element connected to the selected scanning line.

A circuit for controlling a scanning line for performing such display, that is, for controlling on / off of a semiconductor element connected to the scanning line (hereinafter referred to as a scanning line driving circuit) will be described. A circuit for controlling a signal line for performing such display, that is, for controlling on / off of a semiconductor element connected to the signal line (hereinafter referred to as a signal line driver circuit) will be described.

FIG. 3 illustrates a scan line driver circuit including a shift register 301, a level shifter 304, and a buffer 305. The shift register 301 receives the SSP signal (306) and includes a plurality of shift register units 302a to 302c. AND circuits 303a to 303c are provided between the shift register 301 and the level shifter 304, and the input terminals of the AND circuits are between adjacent shift register units and signal lines to which the ENB signal (307) is input. The output terminal is connected to the level shifter 304. In the present invention, since the scanning line to be selected is different in each frame, the scanning line driving circuit shown in FIG. 3 performs output control by the ENB signal (307) for selection by the shift register 301.

In the present invention, the position where the AND circuit is provided is not limited to that in FIG. 3, and the AND circuit is provided anywhere as long as the ENB signal and the signal from the shift register are input and the output of the AND circuit can be input to the level shifter. Also good.

That is, the scanning line driving circuit of the present invention is characterized in that an ENB signal is input and an AND circuit that determines an output based on the ENB signal and a signal from the shift register is provided. In the present invention, the AND circuit is intended for output control by the ENB signal, and may be a logic circuit that can obtain the same effect. For example, a NAND circuit can be used.

Next, the signal line driver circuit will be described with reference to FIG. The signal line driver circuit used in the present invention includes a shift register 401, a first latch circuit 402, a second latch circuit 403, a level shifter 404, and a buffer 405. The shift register 401 receives the SSP signal (408) and includes a plurality of shift register units 406a to 406c. The first latch circuit 402 includes a plurality of latch units 407a to 407f. Adjacent latch units are connected between adjacent shift register units. Each latch unit is connected to a signal line through which either the first data signal (DATA1) 409 or the second data signal (DATA2) 410 is input. In this embodiment, a plurality of latch units are connected to signal lines so that DATA1 and DATA2 are alternately input, and a latch unit set connected to DATA1 and DATA2 is connected between the same adjacent shift register units. Has been. Each latch unit captures DATA 1 and DATA 2 and outputs a signal to the second latch circuit 403.

The second latch circuit 403 receives the latch signal (LAT) 411 and outputs a signal to the level shifter 404.

Note that when the interlace method shown in FIG. 1 is used, any signal line driver circuit that can sequentially select the signal lines of all the pixel portions may be used. In this embodiment, two signals DATA1 and DATA2 are input in parallel. However, the number of signal lines may be one or three or more.

According to the present invention as described above, the occurrence of pseudo contours can be reduced in an active display device that performs time gradation.

In order to prevent false contours, it was necessary to increase the frame frequency. However, if the frame frequency is increased, the driving circuit is burdened and the information amount of the video signal needs to be increased. As a result, the burden on the drive circuit, particularly the frequency of the latch circuit, increases, and the number of wires for inputting video signals increases. Therefore, it is preferable to use the driving method and the driving circuit according to the present invention, which can prevent the false contour without increasing the frame frequency and does not increase the load on the driving circuit.

By using the interlace method, the information amount of the video signal can be halved. As a result, the number of signal lines and scanning lines can be reduced, and the aperture ratio can be improved.

If the interlace method is used, there is a concern about a decrease in luminance. However, when an organic material is used for the light-emitting element of the active display device of the present invention, the light-emitting element exponentially decreases in luminance, so that there is no problem in improving the supply voltage accompanying the luminance decrease. That is, it can be said that the interlace method is preferably used for an active display device including a light-emitting element having an organic material, rather than for a plasma display.

Note that in the present invention, a thin film transistor can be used for a semiconductor element connected to a signal line or a scan line.

(Embodiment 2)
In this embodiment, an interlacing method different from that in Embodiment 1 will be described.

In the driving methods described in Patent Documents 1 and 2, striped patterns are likely to be seen. Therefore, in this embodiment, a driving method for preventing the occurrence of the stripe pattern while preventing the pseudo contour is proposed.

FIG. 5 shows a pixel portion of an active display device in which semiconductor elements are arranged in a matrix. Display pixels are white and non-display pixels are black. In such a pixel portion, in the first frame, only the pixels in the odd rows and the odd columns and the pixels in the even rows and the even columns are displayed (see FIG. 5A), and the second frame is displayed. Then, only the pixels in the odd rows and even columns and the pixels in the even rows and odd columns are displayed (see FIG. 5B). That is, a display area and a non-display area are provided in a lattice shape in the pixel portion.

In the present embodiment, the first frame is represented as an odd frame, and the second frame is represented as an even frame.

In the pixel portion of the present invention, only odd-numbered pixels and even-numbered columns pixels and odd-numbered rows and odd-numbered columns of pixels are displayed in odd-numbered frames, and odd-numbered rows and odd-numbered columns of pixels in even-numbered frames. Only pixels in even rows and even columns may be displayed.

FIG. 6 shows a timing chart for performing such display. FIG. 6A shows a scanning line start pulse (GSP), a scanning line clock signal (GCK), and an inversion signal (SW) for selecting a scanning line in an odd frame. In addition, a start pulse (SSP) and a start clock signal (SCK) for selecting a scanning line are shown. These signals indicate the timing of the video signal (DATA) to be written.

FIG. 6B shows a timing chart in an even-numbered frame. The SW signal is inverted from FIG. 6A, and other timings are the same.

In the odd-numbered frame, when the SW signal is High, odd-numbered columns of pixels are selected, and when the SW signal is Low, even-numbered columns of pixels are selected. In the even frame, even-numbered pixels are selected when the SW signal is High, and odd-numbered pixels are selected when the SW signal is Low.

The video signal (DATA) is input after the SSP signal is input, and is input to the selected pixel. Note that the selected pixel is a pixel having a semiconductor element connected to the selected scanning line.

A scan line driver circuit and a signal line driver circuit for performing such display will be described.

FIG. 7 illustrates a scan line driver circuit including a shift register 701, a level shifter 704, and a buffer 705. The shift register 701 receives the SSP signal (706) and includes a plurality of shift register units 702a to 702c. A level shifter 704 is connected between adjacent shift register units.

Such a scanning line driving circuit of the present invention can sequentially select all the scanning lines.

In this embodiment mode, a scan line driver circuit to which an ENB signal is input as shown in FIG. 3 may be used.

Next, the signal line driver circuit is described with reference to FIG. The signal line driver circuit used in the present invention includes a shift register 801, a first latch circuit 802, a second latch circuit 803, a level shifter 804, and a buffer 805. The shift register 801 receives the SSP signal (808) and includes a plurality of shift register units 806a to 806c. The first latch circuit 802 includes a plurality of latch units 807a to 807f and a plurality of switching means Sw (a) to Sw (f). Adjacent latch units are connected between adjacent shift register units. Further, in order to select one of the adjacent latch units, the switching means Sw (a) to Sw (f) are controlled by the SW signal (SW) 810. As the switching means controlled at the opposite timings as described above, semiconductor elements having different polarities can be used. Each latch unit captures DATA and outputs a signal to the second latch circuit 803.

The second latch circuit 803 receives the latch signal (LAT) 811 and outputs a signal to the level shifter 804.

Note that when the interlace method shown in FIG. 5 is used, the column of pixels to which DATA is input is switched for each signal line in each frame. Therefore, the column of pixels to be input is switched by the SW signal. Therefore, the signal line driver circuit is not limited to the signal line driver circuit illustrated in FIG. 8, as long as the column of pixels to which DATA is input can be switched in each frame.

According to the present invention as described above, in an active display device that performs time gradation, it is possible to reduce the occurrence of a stripe pattern and reduce the occurrence of a pseudo contour.

In particular, it is preferable to use the driving method and the driving circuit of the present invention because pseudo contours can be prevented without increasing the frame frequency as in the first embodiment.

By using the interlace method, the information amount of the video signal can be halved. As a result, the number of signal lines and scanning lines can be reduced, and the aperture ratio can be improved.

If the interlace method is used, there is a concern about a decrease in luminance. However, when an organic material is used for the light-emitting element of the active display device of the present invention, the light-emitting element exponentially decreases in luminance, so that there is no problem in improving the supply voltage accompanying the luminance decrease. That is, it can be said that the interlace method is preferably used for an active display device including a light-emitting element having an organic material, rather than for a plasma display.

Note that in the present invention, a thin film transistor can be used for a semiconductor element connected to a signal line or a scan line.

(Embodiment 3)
In this embodiment mode, a structure of a panel including a pixel portion and a driver circuit of the present invention will be described.

FIG. 9 illustrates a panel in which a driver circuit including the scan line driver circuit 903 and the signal line driver circuit 902 described in the above embodiment is provided in the periphery of the pixel portion 100.

The scan line driver circuit 903 includes a shift register, a level shifter, and a buffer. The signal line driver circuit 902 includes a shift register, a first latch circuit, a second latch circuit, a level shifter, and a buffer. The pixel portion 100 includes a plurality of pixels, and each pixel is provided with a light emitting element. The cross-sectional structure of the pixel will be described in the following embodiments.

The signal line driver circuit 902, the scan line driver circuit 903, and the pixel portion 100 can be formed using semiconductor elements provided over the same substrate. For example, it can be formed using a thin film transistor provided over a glass substrate. In addition, the signal line driver circuit 902 and the scan line driver circuit 903 can be mounted on a glass substrate by using an IC chip.

This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 4)
In this embodiment, an equivalent circuit diagram of a pixel included in the active display device will be described with reference to FIGS.

FIG. 12A illustrates an example of an equivalent circuit diagram of a pixel. A signal line 6114, a power supply line 6115, a scanning line 6116, a light-emitting element 6113, transistors 6110 and 6111, and a capacitor element 6112 are provided at intersections thereof. Have. A video signal is input to the signal line 6114 by a signal line driver circuit. The transistor 6110 can control supply of the potential of the video signal to the gate of the transistor 6111 in accordance with a selection signal input to the scan line 6116. The transistor 6111 can control supply of current to the light-emitting element 6113 in accordance with the potential of the video signal. The capacitor 6112 can hold the voltage between the gate and the source of the transistor 6111. Note that although the capacitor 6112 is illustrated in FIG. 12A, the capacitor 6112 is not necessarily provided when it can be covered by the gate capacitance of the transistor 6111 or other parasitic capacitance.

FIG. 12B is an equivalent circuit diagram of a pixel in which a transistor 6118 and a scan line 6119 are newly provided in the pixel shown in FIG. The transistor 6118 can set the gate and the source of the transistor 6111 to the same potential and can forcibly prevent a current from flowing to the light-emitting element 6113; therefore, a subframe can be obtained as compared with a period in which a video signal is input to all pixels. The length of the period can be shortened.

FIG. 12C is an equivalent circuit diagram of a pixel in which a transistor 6125 and a wiring 6126 are newly provided in the pixel illustrated in FIG. The potential of the gate of the transistor 6125 is fixed by the wiring 6126. The transistor 6111 and the transistor 6125 are connected in series between the power supply line 6115 and the light-emitting element 6113. Thus, in FIG. 12C, the value of the current supplied to the light-emitting element 6113 is controlled by the transistor 6125, and the presence or absence of the current supplied to the light-emitting element 6113 can be controlled by the transistor 6111.

Note that the pixel circuit of the present invention is not limited to the structure shown in this embodiment mode, and the present invention can be applied to any display device that performs time gradation display. This embodiment can be freely combined with the above embodiment.

(Embodiment 5)
In this embodiment, a cross-sectional structure of a pixel having a light-emitting element will be described. A cross-sectional structure of a pixel in the case where a transistor for controlling supply of current to the light-emitting element as described above is a p-type thin film transistor (TFT) will be described with reference to FIGS. Note that in the present invention, of the two electrodes of the anode and the cathode included in the light-emitting element, one electrode whose potential can be controlled by a transistor is a first electrode and the other electrode is a second electrode. 10 illustrates the case where the first electrode is an anode and the second electrode is a cathode, the first electrode may be a cathode and the second electrode may be an anode.

FIG. 10A is a cross-sectional view of a pixel in the case where the TFT 6001 is p-type and light emitted from the light-emitting element 6003 is extracted from the first electrode 6004 side. In FIG. 10A, the first electrode 6004 of the light-emitting element 6003 and the TFT 6001 are electrically connected.

The TFT 6001 is covered with an interlayer insulating film 6007, and a partition wall 6008 having an opening is formed over the interlayer insulating film 6007. A part of the first electrode 6004 is exposed in the opening of the partition wall 6008, and the first electrode 6004, the electroluminescent layer 6005, and the second electrode 6006 are sequentially stacked in the opening.

The interlayer insulating film 6007 is formed using an organic resin film, an inorganic insulating film, or an insulating film including a Si—O—Si bond (hereinafter referred to as a siloxane-based insulating film) formed using a siloxane-based material as a starting material. Can do. Note that siloxane includes a Si—O—Si bond, and a skeleton structure is formed by a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. Alternatively, a fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. A material called a low dielectric constant material (low-k material) may be used for the interlayer insulating film 6007.

The partition wall 6008 can be formed using an organic resin film, an inorganic insulating film, or a siloxane-based insulating film. For example, acrylic resin, polyimide, polyamide, or the like can be used for the organic resin film, and silicon oxide, silicon nitride oxide, or the like can be used for the inorganic insulating film. In particular, a photosensitive organic resin film is used for the partition wall 6008, an opening is formed on the first electrode 6004, and the side wall of the opening is formed as an inclined surface formed with a continuous curvature. Thus, the connection between the first electrode 6004 and the second electrode 6006 can be prevented.

The first electrode 6004 is formed with a material that transmits light or a thickness that transmits light, and a material that is suitable for use as an anode. For example, another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or zinc oxide added with gallium (GZO) is used for the first electrode 6004. Is possible. In addition, ITO, zinc oxide containing silicon oxide, indium tin oxide containing silicon oxide (hereinafter referred to as ITSO), or ITSO mixed with 2 to 20% zinc oxide (ZnO) is used as the first electrode 6004. It may be used. In addition to the light-transmitting oxide conductive material, for example, a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., titanium nitride film and aluminum Alternatively, the first electrode 6004 can be formed using a stack of a film mainly containing silicon, a three-layer structure of a titanium nitride film, a film mainly containing aluminum, and a titanium nitride film. Note that in the case where a material other than the light-transmitting oxide conductive material is used, the first electrode 6004 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm).

The second electrode 6006 can be formed using a material that reflects or shields light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. When an electron injection layer is provided, other conductive layers such as Al can be used.

The electroluminescent layer 6005 is composed of one or more layers. When composed of a plurality of layers, these layers can be classified into a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, and the like from the viewpoint of carrier transport properties. In the case where the electroluminescent layer 6005 includes any of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer in addition to the light emitting layer, the first electrode 6004 to the positive hole injection layer, A hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are laminated in this order. Note that the boundaries between the layers are not necessarily clear, and there are cases where the materials constituting the layers are partially mixed and the interface is unclear. For each layer, an organic material or an inorganic material can be used. As the organic material, any of a high molecular weight material, a medium molecular weight material, and a low molecular weight material can be used. The medium molecular weight material corresponds to a low polymer having a number of repeating structural units (degree of polymerization) of about 2 to 20. The distinction between a hole injection layer and a hole transport layer is not necessarily strict, and these are the same in the sense that hole transportability (hole mobility) is a particularly important characteristic. For convenience, the hole injection layer is a layer in contact with the anode, and the layer in contact with the hole injection layer is referred to as a hole transport layer to be distinguished. The same applies to the electron transport layer and the electron injection layer. The layer in contact with the cathode is called an electron injection layer, and the layer in contact with the electron injection layer is called an electron transport layer. The light emitting layer may also serve as an electron transport layer, and is also referred to as a light emitting electron transport layer.

In the case of the pixel shown in FIG. 10A, light emitted from the light-emitting element 6003 can be extracted from the first electrode 6004 side as shown by a hollow arrow.

Next, FIG. 10B is a cross-sectional view of a pixel in the case where the TFT 6011 is a p-type and light emitted from the light-emitting element 6013 is extracted from the second electrode 6016 side. In FIG. 10B, the first electrode 6014 of the light-emitting element 6013 and the TFT 6011 are electrically connected. In addition, an electroluminescent layer 6015 and a second electrode 6016 are sequentially stacked over the first electrode 6014.

The first electrode 6014 is formed using a material that reflects or shields light and is formed using a material that is suitable for use as an anode. For example, in addition to a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., a laminate of titanium nitride and a film containing aluminum as a main component, a titanium nitride film A three-layer structure of a film mainly containing aluminum and aluminum and a titanium nitride film can be used for the first electrode 6014.

The second electrode 6016 can be formed using a light-transmitting material or a light-transmitting film thickness, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. it can. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. When an electron injection layer is provided, other conductive layers such as Al can be used. Then, the second electrode 6016 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm). Note that other light-transmitting oxide conductive materials such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), and zinc oxide to which gallium is added (GZO) can also be used. Alternatively, ITO, zinc oxide containing silicon oxide, indium tin oxide containing silicon oxide (ITSO), or ITSO mixed with 2 to 20% zinc oxide (ZnO) may be used. In the case of using a light-transmitting oxide conductive material, it is preferable to provide an electron injection layer in the electroluminescent layer 6015.

The electroluminescent layer 6015 can be formed in a manner similar to that of the electroluminescent layer 6005 in FIG.

In the case of the pixel shown in FIG. 10B, light emitted from the light-emitting element 6013 can be extracted from the second electrode 6016 side as shown by a hollow arrow.

Next, FIG. 10C is a cross-sectional view of a pixel in the case where the TFT 6021 is p-type and light emitted from the light-emitting element 6023 is extracted from the first electrode 6024 side and the second electrode 6026 side. In FIG. 10C, the first electrode 6024 of the light-emitting element 6023 and the TFT 6021 are electrically connected. Further, an electroluminescent layer 6025 and a second electrode 6026 are sequentially stacked over the first electrode 6024.

The first electrode 6024 can be formed in a manner similar to that of the first electrode 6004 in FIG. The second electrode 6026 can be formed in a manner similar to that of the second electrode 6016 in FIG. The electroluminescent layer 6025 can be formed in a manner similar to that of the electroluminescent layer 6005 in FIG.

In the case of the pixel illustrated in FIG. 10C, light emitted from the light-emitting element 6023 can be extracted from the first electrode 6024 side and the second electrode 6026 side as indicated by white arrows.

This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 6)
In this embodiment, a cross-sectional structure of a pixel in the case where an n-type TFT is used as a transistor that controls supply of current to a light-emitting element will be described with reference to FIGS. Note that although FIG. 11 illustrates the case where the first electrode is a cathode and the second electrode is an anode, the first electrode may be an anode and the second electrode may be a cathode.

FIG. 11A is a cross-sectional view of a pixel in the case where the TFT 6031 is n-type and light emitted from the light-emitting element 6033 is extracted from the first electrode 6034 side. In FIG. 11A, the first electrode 6034 of the light-emitting element 6033 and the TFT 6031 are electrically connected. Further, an electroluminescent layer 6035 and a second electrode 6036 are sequentially stacked over the first electrode 6034.

The first electrode 6034 can be formed of a light-transmitting material or a light-transmitting film thickness, and can be formed of a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. . Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. When an electron injection layer is provided, other conductive layers such as Al can be used. Then, the first electrode 6034 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm). Further, a light-transmitting conductive layer is formed using a light-transmitting oxide conductive material so as to be in contact with or under the conductive layer having a thickness enough to transmit light, and the first electrode 6034 is formed. The sheet resistance may be suppressed. Note that only conductive layers using other light-transmitting oxide conductive materials such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), and zinc oxide added with gallium (GZO) should be used. Is also possible. Further, indium tin oxide containing ITO and silicon oxide (ITSO) or indium oxide containing silicon oxide mixed with 2 to 20% zinc oxide (ZnO) may be used. In the case of using a light-transmitting oxide conductive material, it is preferable to provide an electron injection layer in the electroluminescent layer 6035.

The second electrode 6036 is formed of a material that reflects or shields light and is formed using a material that is suitable for use as an anode. For example, in addition to a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., a laminate of titanium nitride and a film containing aluminum as a main component, a titanium nitride film A three-layer structure of a film containing aluminum and aluminum as main components and a titanium nitride film can be used for the second electrode 6036.

The electroluminescent layer 6035 can be formed in a manner similar to that of the electroluminescent layer 6005 in FIG. However, in the case where the electroluminescent layer 6035 includes any one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer in addition to the light emitting layer, the first electrode 6034 to the electron injection layer The electron transport layer, the light emitting layer, the hole transport layer, and the hole injection layer are laminated in this order.

In the case of the pixel shown in FIG. 11A, light emitted from the light-emitting element 6033 can be extracted from the first electrode 6034 side as shown by a hollow arrow.

Next, FIG. 11B is a cross-sectional view of a pixel in the case where the TFT 6041 is an n-type and light emitted from the light-emitting element 6043 is extracted from the second electrode 6046 side. In FIG. 11B, the first electrode 6044 of the light-emitting element 6043 and the TFT 6041 are electrically connected. Further, an electroluminescent layer 6045 and a second electrode 6046 are sequentially stacked over the first electrode 6044.

The first electrode 6044 can be formed using a material that reflects or shields light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. When an electron injection layer is provided, other conductive layers such as Al can be used.

The second electrode 6046 is formed using a material that transmits light or a thickness that transmits light, and a material that is suitable for use as an anode. For example, another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or zinc oxide added with gallium (GZO) is used for the second electrode 6046. Is possible. Alternatively, indium tin oxide containing ITO and silicon oxide (ITSO), or indium oxide containing silicon oxide mixed with 2 to 20% zinc oxide (ZnO) may be used for the second electrode 6046. . In addition to the light-transmitting oxide conductive material, for example, a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., titanium nitride and aluminum are used. The second electrode 6046 can be formed using a stack of a main component film, a three-layer structure including a titanium nitride film, an aluminum main component film, and a titanium nitride film. Note that in the case where a material other than the light-transmitting oxide conductive material is used, the second electrode 6046 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm).

The electroluminescent layer 6045 can be formed in a manner similar to that of the electroluminescent layer 6035 in FIG.

In the case of the pixel shown in FIG. 11B, light emitted from the light-emitting element 6043 can be extracted from the second electrode 6046 side as shown by a hollow arrow.

Next, FIG. 11C is a cross-sectional view of a pixel in the case where the TFT 6051 is an n-type and light emitted from the light-emitting element 6053 is extracted from the first electrode 6054 side and the second electrode 6056 side. In FIG. 11C, the first electrode 6054 of the light-emitting element 6053 and the TFT 6051 are electrically connected. Further, an electroluminescent layer 6055 and a second electrode 6056 are stacked over the first electrode 6054 in this order.

The first electrode 6054 can be formed in a manner similar to that of the first electrode 6034 in FIG. The second electrode 6056 can be formed in a manner similar to that of the second electrode 6046 in FIG. The electroluminescent layer 6055 can be formed in a manner similar to that of the electroluminescent layer 6035 in FIG.

In the case of the pixel shown in FIG. 11C, light emitted from the light-emitting element 6053 can be extracted from the first electrode 6054 side and the second electrode 6056 side as indicated by white arrows.

This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 7)
As an electronic device including the active display device of the present invention, a television device (also called a television or a television receiver), a digital camera, a digital video camera, a mobile phone device (also called a mobile phone or a mobile phone), a PDA Such as portable information terminals, portable game machines, computer monitors, computers, sound reproduction apparatuses such as car audio, and image reproduction apparatuses equipped with recording media such as home game machines. A specific example thereof will be described with reference to FIG.

A portable information terminal device illustrated in FIG. 13A includes a main body 9201, a display portion 9202, and the like. The active display device of the present invention can be applied to the display portion 9202. As a result, it is possible to provide a portable information terminal device that reduces the occurrence of pseudo contours.

A digital video camera shown in FIG. 13B includes a display portion 9701, a display portion 9702, and the like. The active display device of the present invention can be applied to the display portion 9701. As a result, it is possible to provide a digital video camera that reduces the occurrence of pseudo contours.

A cellular phone shown in FIG. 13C includes a main body 9101, a display portion 9102, and the like. The active display device of the present invention can be applied to the display portion 9102. As a result, it is possible to provide a mobile phone with reduced generation of pseudo contours.

A portable television device illustrated in FIG. 13D includes a main body 9301, a display portion 9302, and the like. The active display device of the present invention can be applied to the display portion 9302. As a result, it is possible to provide a portable television device that reduces the occurrence of pseudo contours. In addition, the present invention can be applied to a wide variety of television devices, from a small one mounted on a portable terminal such as a cellular phone to a medium-sized one that can be carried and a large one (for example, 40 inches or more). The active display device can be applied.

A portable computer illustrated in FIG. 13E includes a main body 9401, a display portion 9402, and the like. The active display device of the present invention can be applied to the display portion 9402. As a result, a portable computer with reduced generation of pseudo contours can be provided.

A television device illustrated in FIG. 13F includes a main body 9501, a display portion 9502, and the like. The active display device of the present invention can be applied to the display portion 9502. As a result, it is possible to provide a television device that reduces the occurrence of pseudo contours.

As described above, the active display device of the present invention can provide an electronic device in which the generation of pseudo contour is reduced.

It is the figure which showed the concept of the drive method of this invention. 4 is a timing chart using the driving method of the present invention. It is the figure which showed the scanning line drive circuit of this invention It is the figure which showed the signal line drive circuit of this invention It is the figure which showed the concept of the drive method of this invention. 4 is a timing chart using the driving method of the present invention. It is the figure which showed the scanning line drive circuit of this invention It is the figure which showed the signal line drive circuit of this invention It is sectional drawing which showed the panel structure of this invention It is sectional drawing which showed the light emitting element provided in the pixel part of this invention It is sectional drawing which showed the light emitting element provided in the pixel part of this invention It is the figure which showed the pixel circuit applicable to the pixel part of this invention It is the figure which showed the electronic device of this invention

Claims (10)

Having a plurality of pixels arranged in a matrix;
A plurality of frames in which video signals are input to the pixels;
In the odd frame of the frames, the odd rows and odd columns of pixels and the even rows and even columns of pixels are displayed.
A driving method of an active display device, wherein an odd-numbered row and even-numbered column pixel and an even-numbered row and odd-numbered column pixel among the pixels are displayed in an even-numbered frame. Having a plurality of pixels arranged in a matrix;
A plurality of frames in which video signals are input to the pixels;
In the odd-numbered frame, the odd-numbered and odd-numbered columns of pixels, and the even-numbered and even-numbered columns of pixels are displayed, and when the inversion signal input to the pixels is High, A video signal is input to the pixel,
In the even frame of the frames, the odd-numbered and even-numbered columns of pixels and the even-numbered and odd-numbered columns of pixels are displayed, and when the inversion signal input to the pixels is High, A driving method of an active display device, wherein a video signal is input to a pixel. In claim 1,
The driving method of an active display device, wherein when the inversion signal input to the pixel in the odd frame is High, the inversion signal input to the pixel in the even frame is Low. Having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines;
A circuit for controlling a semiconductor element connected to the signal line includes a shift register and a latch circuit.
The shift register includes a shift register unit;
The latch circuit includes a latch unit and a wiring to which an inversion signal for controlling selection of the latch unit is input,
Adjacent latch units are connected between adjacent shift register units;
One of the adjacent latch units is selected by a signal from the shift register unit and the inversion signal. Having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines;
A circuit for controlling a semiconductor element connected to the signal line includes a shift register and a latch circuit.
The shift register includes a shift register unit;
The latch circuit includes a latch unit, a wiring to which an inversion signal for controlling selection of the latch unit is input, and switching means that is switched by the inversion signal.
Adjacent latch units are connected between adjacent shift register units;
One of the adjacent latch units is selected by the switching means, and the active display device. Having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines;
The circuit for controlling the semiconductor element connected to the scanning line includes a wiring for inputting a selection signal, an AND circuit, a shift register, and a level shifter.
2. The active display device according to claim 1, wherein the AND circuit is connected so that a signal from the shift register and the selection signal are input and a signal is output to the level shifter. Having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines;
A circuit for controlling the semiconductor element connected to the scanning line includes a wiring to which a selection signal is input, an AND circuit, a shift register, and a level shifter.
The AND circuit is connected so that a signal from the shift register and the selection signal are input and a signal is output to the level shifter,
An active display device, wherein the signal line and the pixel are connected so that a video signal is input to a pixel selected by a circuit that controls the scanning line. Having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines;
A circuit for controlling a semiconductor element connected to the signal line includes a shift register and a latch circuit.
The shift register includes a shift register unit;
The latch circuit includes a latch unit and a wiring to which an inversion signal for controlling selection of the latch unit is input,
The active display device, wherein the latch unit is connected between adjacent shift register units. Having a plurality of pixels at intersections of a plurality of signal lines and a plurality of scanning lines;
A circuit for controlling a semiconductor element connected to the signal line includes a shift register and a latch circuit.
The shift register includes a shift register unit;
The latch circuit includes a latch unit, a wiring to which an inversion signal for controlling selection of the latch unit is input, and switching means that is switched by the inversion signal.
The active display device, wherein the latch unit is connected between adjacent shift register units. In claim 5 or 9,
The active display device, wherein the switching means uses a semiconductor element having a first polarity and a semiconductor element having a second polarity.

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