JP2006126256A - Liquid crystal driving apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a circuit scale of a liquid crystal driving apparatus using an over-driving method. <P>SOLUTION: A signal source 1 outputs an image data to a frame memory 2, a look up table (LUT) 3 and an adder 4 for every one frame. At this point, the signal source 1 outputs most significant four bit data in the image data to the LUT 3. The frame memory 2 stores the input image data for one frame period and outputs one frame preceding image data to the LUT 3. At this point, the frame memory 2 outputs the most significant four bit data in the image data to the LUT 3. The LUT 3 outputs a correction data which is determined from the most significant four bit data of the current image data input from the signal source 1 and the most significant four bit data of the one frame preceding image data input from the frame memory 2, to the adder 4. The adder 4 adds the correction data to the current image data inputted from the signal source 1 and outputs an added value to a source driver. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a liquid crystal driving device that drives a liquid crystal display panel, and more particularly to a liquid crystal driving device that can improve the response speed of liquid crystal.

  Liquid crystal display devices are widely used as display devices for man-machine interfaces. For example, it is widely used as a display device such as a PDA (Personal Digital Assistants) or a cellular phone by taking advantage of its lightweight and thin features. In addition, due to recent technological advances, mobile phones and PDAs that can receive television broadcasts to display moving images and play games using moving images are becoming widespread.

  However, a liquid crystal display device (liquid crystal display panel) has a slower response speed when an image changes than a response speed such as a CRT, and displays a moving image (hereinafter referred to as a television image) by television broadcasting. This causes a problem that afterimages and blurring occur. In the case of a normally used TN liquid crystal, assuming a normally white panel, the response from the white display state, i.e., the state in which the liquid crystal is parallel to the substrate, to the black display state, i.e., the liquid crystal is in a standing state. The sum of the time (τr) and the response time (τd) from the black display state to the white display state is about 20 to 30 msec.

  Also, the response speed from the halftone display state to another halftone display state is several times slower than the response speed between the white display state and the black display state, and the response time is 100 msec. It is known that it may exceed. Therefore, when displaying a television image or the like often used for halftone display, the response time of the liquid crystal exceeds the field time (about 16.7 msec) of the display image, which causes a deterioration in image quality such as afterimage and blurring.

  As a method for increasing the response speed in the case of halftone display, a so-called overdrive method is known (for example, see Patent Document 1). In the overdrive method, the image data of the previous field is compared with the current image data, and when the current image data becomes darker, the image data is corrected to become darker. When the current image data becomes brighter, the image data is corrected to become brighter. According to the overdrive method, the response speed in the case of halftone display can be increased, and afterimages and the like are reduced. The overdrive method is employed in liquid crystal monitor devices for personal computers and stationary television receivers.

FIG. 5 is a block diagram showing a configuration example of a conventional liquid crystal driving device for realizing the overdrive method. FIG. 5 shows only a portion where image data processing is performed in the liquid crystal driving device, and for example, a source driver and a gate driver that supply a driving signal to the TFT liquid crystal display device are omitted. The signal source 51 outputs image data at a predetermined cycle (hereinafter referred to as one frame). The image data is input to a frame memory 52 having a storage capacity for one screen, a look-up table (hereinafter referred to as LUT) 53, and an adder 54. The frame memory 52 stores the input image data for one frame, and outputs the image data of the previous frame. Hereinafter, it represents the current image data signal source 51 outputs the G _n, representing one frame preceding image data and G _n-1 from the current image data G _n.

In this example, it is assumed that the image data is 6-bit data for each color of RGB. In addition, when [A: B] is represented, data from the Ath bit to the Bth bit is represented. For example, [5: 0] shown in FIG. 5 represents data from the fifth bit to the 0th bit. Here, since the image data is 6 bits, G _n [5: 0] represents the whole from MSB (Most Significant Bit) to LSB (Least Significant Bit least significant bit).

The LUT 53 receives image data G _{n−1 of the} previous frame from the frame memory 52 and current image data G _n from the signal source 51. The LUT 53 stores correction data. FIG. 6 is an explanatory diagram illustrating an example of the LUT 53. As shown in FIG. 6, the LUT 53, the correction data of the current image data _{G n} which is determined from one frame to the image data _{G n-1} before and the current image data _{G n} is one frame before the image data _{G n −1} and the current image data G _n are set for each possible value. Correction data, if the direction of the current image data G _n becomes dark is corrected to be darker image data G _n, if the direction of the current image data G _n becomes bright, the image data G _n Is a data having a value for correcting so as to be brighter. Normally, the correction data is 0 when the image data G _n and the image data G _n−1 are equal. Hereinafter, the correction data is represented as ΔG. The LUT 53 outputs correction data ΔG determined from the image data G _n input from the signal source 51 and the image data G _n−1 input from the frame memory 52 to the adder 54. In the example shown in FIG. 5, the correction data ΔG is 7-bit data from the 6th bit to the 0th bit, as indicated by [6: 0].

Correction data ΔG determined from the image data G _n and the image data G _n−1 is input to the adder 54. Further, the current image data G _n is input from the signal source 51 to the adder 54. The adder 54 adds the correction data ΔG to the input image data G _n and outputs the addition result to the source driver.

  As a specific example, a case will be described in which a pixel that was data “63” one frame before changes to “61” in the next frame. In this case, data “61” is input from the signal source 51 to the LUT 53, and data “63” one frame before is input from the frame memory 52. The LUT 53 stores the correction data illustrated in FIG. 6, and outputs correction data “−3” determined from the current data “61” and the data “63” one frame before to the adder 54. The adder 54 adds the correction data “−3” input from the LUT 53 to the data “61” input from the signal source 51, and outputs the addition result “58” to the source driver.

When the image does not change, the data G _n input from the signal source 51 to the LUT 53 and the data G _n−1 input from the frame memory 52 to the LUT 53 are equal, but normally G _n and G _n−1. The correction data in the case where they are equal is “0”. Therefore, when the image does not change, “0” is added to the data G _n . That is, the data G _n is sent to the source driver without being corrected. Therefore, when a still image is displayed, the same image as that when the overdrive method is not applied is displayed.

JP-A-9-81083 (paragraphs 0020-0021, FIG. 2)

When the overdrive method is applied, it is necessary to provide an LUT for storing correction data, and to derive correction data ΔG determined from the current image data G _n and the image data G _n−1 one frame before. In the conventional overdrive method, an LUT that stores correction data of the square of the gradation of image data is used.

  For example, it is assumed that each color of R (red), G (green), and B (blue) is represented by 6 bits and halftone display of 64 gradations is performed for each color. In this case, for each of R, G, and B, an LUT in which 64 × 64 = 4096 correction data is set is used. When one LUT is composed of flip-flops, the number of flip-flops obtained by multiplying the number of correction data by the number of bits for representing correction data (here, 7 bits) is required. Become. Therefore, in the LUT in which 4096 correction data are set, 4096 × 7 = 28672 flip-flops are required. For this reason, in the conventional overdrive method, if the number of gradations is large, the area required for arranging the LUT becomes large. In a portable device or the like, it is required to reduce the circuit scale. However, when the number of gradations is large, this requirement is against this requirement.

Further, in a TFT liquid crystal display device or the like, it is preferable that the frame memory 52, the LUT 53, and the adder 54 can be housed in one IC chip together with the source driver and the gate driver. However, when manufacturing an IC chip containing an LUT in which 4096 correction data are set as illustrated, even if the IC chip is manufactured by a 0.18 μm rule process, an area of 18 × 1 mm ² is required for the LUT. Estimated. Thus, the area of the LUT is large, and it has been difficult to manufacture an IC chip containing the LUT 53 and the like together with the source driver and the gate driver. Considering that the area of the LCD driver for QVGA (Quarter Video Graphics Array) is about 23 × 2.4 mm ² , it can be seen that the area of the LUT is very large.

  Accordingly, an object of the present invention is to reduce the circuit scale of a liquid crystal driving device using the overdrive method.

  Aspect 1 of the present invention includes an image data supply means for supplying image data, a current operation result phase for outputting a value equivalent to a quotient obtained by dividing a current image data value supplied by the image data supply means by a constant, etc. A value output means and a pre-computation result that outputs a value equivalent to the quotient obtained by dividing the value of the previous image data supplied a certain period before the current image data by the constant or a constant different from the constant Supplied by an equivalence value output means, a correction data derivation means for deriving correction data according to a value outputted by the current operation result equivalence output means and a value outputted by the previous operation result equivalence output means, and an image data supply means Adding means for adding the correction data derived by the correction data deriving means to the current image data, and liquid crystal driving means for supplying a voltage corresponding to the image data to which the correction data is added to the liquid crystal panel. To provide a liquid crystal driving apparatus, characterized in that was e.

  According to aspect 2 of the present invention, in aspect 1, the current operation result equivalent output means outputs upper data of at least 4 bits in the current image data, and the previous operation result equivalent output means outputs the previous image data. A liquid crystal driving device that outputs high-order data of at least 4 bits or more is provided.

  Aspect 3 of the present invention includes a division means for outputting a quotient obtained by dividing the value of the current image data by a constant in aspect 1, wherein the current calculation result equality output means includes a previous calculation result equality output means. The liquid crystal driving device stores the quotient output by the dividing means and outputs the quotient after a predetermined period.

  Aspect 4 of the present invention includes a first division means for outputting a quotient obtained by dividing the value of the current image data by a constant in aspect 1, wherein the current calculation result equality output means outputs a previous calculation result equality value. There is provided a liquid crystal driving device, wherein the means includes second division means for outputting a quotient when the value of the previous image data is divided by a constant.

  Aspect 5 of the present invention is equivalent to a value obtained by performing a predetermined operation on the quotient obtained by dividing the value of the current image data supplied by the image data supply unit supplying the image data by the constant. A current operation result equality output means for outputting a value, and a quotient obtained by dividing the value of the previous image data supplied a certain period before the current image data by the constant or a constant different from the constant. Pre-computation result equivalence output means for outputting a value equivalent to a prescribed computation or a value obtained by performing a prescribed computation different from the prescribed computation, a value outputted by the current computation result equivalence output means and a pre-computation result phase Correction data deriving means for deriving correction data according to the value output by the value output means, and an adding unit for adding the correction data derived by the correction data deriving means to the current image data supplied by the image data supplying means If, to provide a liquid crystal driving device which is characterized in a voltage corresponding to image data correction data is added to and a liquid crystal drive means for supplying to the liquid crystal panel.

  Aspect 6 of the present invention is the aspect 5 according to the aspect 5, wherein the current operation result equivalent output means outputs data in which lower data indicating a constant value is added to upper data of at least 4 bits in the current image data, A liquid crystal drive in which a pre-computation result equal value output means outputs data obtained by adding lower data indicating a certain value or a certain value different from the certain value to upper data of at least 4 bits in the previous image data Providing equipment.

  According to the present invention, the circuit scale of the liquid crystal driving device can be reduced.

(Embodiment 1) FIG. 1 is a block diagram showing a portion related to image data processing in a liquid crystal drive device according to Embodiment 1 of the present invention. FIG. 1 shows only a portion where image data processing is performed in the liquid crystal driving device. For example, a source driver and a gate driver for supplying a driving signal to the TFT liquid crystal display device are omitted. An MPU (Micro Processing Unit) that controls the liquid crystal driving device is also omitted.

A signal source 1 such as a RAM mounted on a mobile phone or PDA outputs image data _Gn for each frame. In the present embodiment, a case will be described as an example where the signal source 1 outputs image data in which data for one pixel is 6 bits for each of R, G, and B colors.

The signal source 1 outputs image data G _n to a frame memory 2, a look-up table (hereinafter referred to as LUT) 3 and an adder 4. However, the signal source 1 outputs the entire current image data from the MSB (most significant bit) to the LSB (least significant bit) to the frame memory 2 and the adder 4. On the other hand, for the LUT 3, the signal source 1 outputs high-order data of at least 4 bits in the current image data _Gn . “Upper data of 4 bits or more” means data of 4 bits or more from the MSB. Here, it is assumed that upper data (data from the fifth bit to the second bit) for 4 bits in the current image data _Gn is output to the LUT 3.

The frame memory 2 has a storage capacity for one screen, stores the input image data for one frame, and outputs the image data G _n−1 of the previous frame to the LUT 3. The frame memory 2 outputs upper data of at least 4 bits or more in the image data G _n−1 one frame before to the LUT 3. Here, it is assumed that 4-bit high-order data (data from the 5th bit to the 2nd bit) in the image data G _n−1 of the previous frame is output to the LUT 3. Here, it is assumed that the number of upper bits of the image data output from the signal source 1 to the LUT 3 is equal to the number of upper bits of the image data output from the frame memory 2 to the LUT 3. In this example, the number of upper bits is four.

Here, the value of the high-order data for 4 bits in the 6-bit image data _Gn is equivalent to the quotient obtained by dividing the current value of the image data _Gn by a constant (here, “4”). The value of the upper data for 4 bits in the 6-bit image data G _n−1 is the quotient obtained by dividing the value of the image data G _n−1 of the previous frame by a constant (here, “4”). Be equal. Here, a case where division by the same constant is applied to the current image data G _n and the image data G _n−1 one frame before is shown.

The LUT 3 receives the upper data for 4 bits of the current image data G _n and the upper data for 4 bits of the image data G _n−1 one frame before. The LUT 3 stores correction data ΔG for correcting the current image data G _n . FIG. 2 is an explanatory diagram illustrating an example of the LUT 3. In LUT 3, 1 frame before the image data G _n-1 of the upper-bit data and the correction data ΔG determined from the high-order bit data of the current image data G _n is one frame before the image data G _n-1 of the upper The bit data and the upper bit data of the current image data _Gn are set for each possible value. Correction data ΔG, when upper data of k bits of current image data G _n (k is an integer of 4 or more) is smaller than the previous frame of the image data G _n-1 of the k bits of the upper data Is set as 0 or a negative value. The correction data ΔG is k bits of high-order data of the current image data G _n is 1 is greater than the frame before the image data G _n-1 of the k bits of upper data is 0 or a positive Set as a value. The correction data ΔG when the current image data G _n of k bits of the upper data and the previous frame image data G _n-1 of the k bits of the upper data is equal zero.

In this example, as shown in FIG. 2, the correction data ΔG determined from the upper data of 4 bits of the image data G _n−1 of the previous frame and the upper data of 4 bits of the current image data G _n is It is set for each value (0 to 15 in this example) that can be taken by the upper data of 4 bits of the image data G _n-1 one frame before and the upper data of 4 bits of the current image data G _n. Yes. Correction data ΔG is 4 bits of the upper data of the current image data G _n are as 1 when the frame is smaller than the previous image data G _n-1 of the 4 bits of the upper data is 0 or a negative value Is set. The correction data ΔG is 4 bits of the upper data of the current image data G _n is 1 is greater than the frame before the image data G _n-1 of the 4 bits of the upper data is 0 or a positive Set as a value. The correction data ΔG when 4 bits of the upper data of the current image data G _n and the previous frame image data G _n-1 of the 4 bits of the upper data is equal zero.

  The correction data ΔG may be expressed as, for example, 7-bit data. Of these, one bit represents a positive or negative sign. In this case, the possible values of the correction data ΔG are −63 to 63.

  Each correction data shown in FIG. 2 can be obtained by experiment as a value that can realize a good response speed in halftone display.

The LUT 3 derives correction data ΔG corresponding to the upper data of 4 bits of the input current image data G _n and the upper data of 4 bits of the image data G _n−1 one frame before, and adds To the device 4. At this time, the LUT 3 derives correction data ΔG for each pixel.

  The adder 4 adds correction data ΔG to the current image data (6 bits) input from the signal source 1. At this time, if the addition result overflows (in this example, the addition result becomes larger than the maximum value “63” that can be represented by 6 bits), the adder 4 sets the addition result to 63. When the addition result underflows (in this example, the addition result becomes negative), the adder 4 sets the addition result to 0. The adder 4 performs addition processing for each pixel. The adder 4 outputs the image data added with the correction data to a source driver (not shown). The source driver supplies a voltage corresponding to the image data to which the correction data is added to the liquid crystal display panel.

  The frame memory 2, LUT 3, adder 4, source driver (not shown), and gate driver (not shown) may be integrated on one IC chip.

  Next, the operation of the liquid crystal driving device shown in FIG. 1 will be described. The signal source 1 outputs image data for one screen every frame. It is assumed that the image data of each pixel included in the image data for one screen is 6-bit data. The signal source 1 outputs image data for one screen in which each pixel is represented by 6 bits to the frame memory 2 and the adder 4. Further, the signal source 1 outputs, to the LUT 3, high-order data for 4 bits as image data of each pixel included in one screen.

The frame memory 2 stores the input image data for one frame, and outputs the image data of the previous frame to the LUT 3. At this time, the frame memory 2 outputs 4-bit upper data as image data of each pixel included in one screen. Therefore, when the signal source 1 outputs the current image data G _n (upper data for 4 bits) to the LUT 3, the frame memory 2 outputs the image data G _n-1 (upper data for 4 bits) one frame before. Output.

The LUT 3 outputs correction data ΔG determined from the upper data of 4 bits of the image data G _n−1 of the previous frame and the upper data of 4 bits of the current image data G _n to the adder 4 for each pixel. . At this time, the current image data G _{n in} which each pixel is represented by 6 bits is input from the signal source 1 to the adder 4. The adder 4 performs a process of adding the correction data ΔG to the image data input from the signal source 1 for each pixel. Then, the adder 4 outputs the current image data G _n added with the correction data ΔG to the source driver. The source driver supplies a voltage corresponding to the image data output from the adder 4 to the liquid crystal display panel.

  As a specific example, a case will be described in which a pixel having data “63” one frame before changes to “53” in the next frame. In this case, upper data for 4 bits of data “63” is input to the LUT 3 from the frame memory 2. Since “63” is represented as “111111” in binary, this upper 4 bits “1111 (“ 15 ”in decimal)” is input. In addition, the LUT 3 receives the upper data of 4 bits of the data “53” from the signal source 1. Since “53” is represented as “110101” in binary, this upper 4 bits “1101 (“ 13 ”in decimal)” is input. The LUT 3 determines the correction data as “−22” from the upper 4 bits (“15” in this example) of the image data one frame before and the upper 4 bits (“13” in this example) of the current image data. (Refer to FIG. 2), the correction data is output to the adder 4. The adder 4 adds the correction data “−22” to the data “53” input from the signal source 1 and outputs the addition result “31” obtained as a result to the source driver.

  In the present embodiment, the image data supply means and the current operation result equivalent output means are realized by the signal source 1. The pre-computation result equivalent output means is realized by the frame memory 2. The correction data deriving means is realized by the LUT 3. The adding means is realized by the adder 4. The liquid crystal driving means is realized by a source driver.

  According to the first embodiment, the LUT 3 is based on the upper bits (upper 4 bits in the above example) of the current image data and the upper bits (upper 4 bits in the above example) of the image data one frame before. Derivation of correction data. Therefore, the area of the LUT 3 can be reduced and the circuit scale can be reduced. In the conventional LUT 53 (see FIG. 5) already described, when the image data is represented by 6 bits, 4096 (= 64 × 64) correction data must be set. On the other hand, in the first embodiment, since the correction value is determined from the upper bits, the number of correction data can be reduced. For example, when the correction data is derived from the upper 4 bits in the current image data and the upper 4 bits in the image data one frame before, the number of correction data is 256 (= 16 × 16), and 4096 It is greatly reduced compared to the individual. As a result, the area of the LUT 3 in the first embodiment can be reduced and the circuit scale can be reduced. As a result, for example, the frame memory 2, the LUT 3, and the adder 4 can be accommodated in one IC chip together with a source driver and a gate driver applied to a TFT liquid crystal display device or the like.

  In the above example, the case where the signal source 1 outputs image data in which the data for one pixel is 6 bits for each of the colors R, G, and B is shown. Image data for one pixel is not limited to 6 bits, and may be, for example, 4 bits or 8 bits. That is, the signal source 1 may output image data in which data for one pixel is 4 bits or 8 bits for each color. However, since the upper data of at least 4 bits in the image data is output to the LUT 3, the signal source 1 outputs image data in which the data for 1 pixel is 4 bits or more.

In the above example, the signal source 1 outputs the upper data for 4 bits in the current image data G _n to the LUT 3, and the frame memory 2 outputs the upper data for 4 bits in the image data G _n-1 one frame before. Although the case where data is output to the LUT 3 is shown, the data input to the LUT 3 is not limited to the upper 4 bits in the image data.

For example, when the image data for one pixel is 6 bits, the signal source 1 and the frame memory 2 may output the upper 5 bits of the image data to the LUT 3. In this case, in the LUT 3, the correction data ΔG is a value that can be taken by the upper data for 5 bits of the image data G _n−1 of the previous frame and the upper data for 5 bits of the current image data G _n (this value) In the example, it is set every 0 to 31). Therefore, the number of image data is 1024 (= 32 × 32), which is greatly reduced compared to 4096.

  For example, when the image data for one pixel is 8 bits, the signal source 1 and the frame memory 2 may output the upper 4 to 7 bits of the image data to the LUT 3. If the image data for one pixel is 8 bits (possible values are 0 to 255), 65536 correction data (= 256 × 256) are required when the conventional overdrive method is applied. On the other hand, when the signal source 1 and the frame memory 2 output the upper 4 bits in the image data, the number of correction data is 256 as already described. When outputting the upper 5 bits, the number of correction data is 1024. When the signal source 1 and the frame memory 2 output the upper 6 bits of the image data (possible values are 0 to 63), the number of correction data is 4096 (= 64 × 64), which is higher than the above 65536 It can be greatly reduced. Similarly, when the signal source 1 and the frame memory 2 output the upper 7 bits in the image data (possible values are 0 to 127), the number of correction data is 16384 (= 128 × 128), and the above 65536 It can be greatly reduced compared to the individual.

  As the number of upper bits of the image data input to the LUT 3 increases, the LUT 3 scale increases accordingly. As a result, the frame memory 2, the LUT 3, and the adder 4 may not fit on one IC chip together with the source driver and gate driver applied to the TFT liquid crystal display device or the like. However, even in that case, since the number of correction data is greatly reduced as compared with the case where the conventional overdrive method is applied, the area of the LUT can be reduced and the circuit scale can be reduced.

In addition, when the number of upper bits of the image data input to the LUT 3 is 3 bits or less, the inventor has confirmed that noise is generated at the time of moving image display due to the size of the LUT 3 being too small. Therefore, the signal source 1 outputs the upper data of at least 4 bits in the current image data _Gn , and the frame memory 2 outputs the upper data of at least 4 bits in the image data _Gn-1 of the previous frame. The configuration is as follows. In this case, almost no noise is generated when displaying the moving image.

  In the above description, correction data ΔG is 7-bit data, and a value from −63 to 63 can be set. However, the number of bits of correction data ΔG is not limited to 7 bits. For example, the possible values of the correction data ΔG may be limited to −31 to 31 and the correction data ΔG may be represented by 6 bits. Further, the values that can be taken by the correction data ΔG may be every two, such as −62, −60,..., 0,. Or the value which correction data (DELTA) G can take may be every 4 like -60, -56, ..., 0, ..., 56,60, and correction data (DELTA) G may be represented by 5 bits. In this way, the inventor has confirmed that even when the possible value of the correction data ΔG is determined, the image quality of the moving image hardly deteriorates. Thus, by reducing the number of bits of the correction data ΔG, the size of the LUT can be further reduced.

Next, a modification of the first embodiment will be described.
In the above description, the signal source 1 outputs the entire image data (for example, all 6 bits of 6-bit image data) to the frame memory 2, and the frame memory 2 outputs the upper bits of the image data to the LUT 3. The case of outputting is shown. A configuration in which the signal source 1 outputs upper data of at least 4 bits or more in the current image data G _n to the frame memory 2, and the frame memory 2 stores the upper bit data for one frame and outputs it to the LUT 3. It may be. Even with such a configuration, the upper bit data of the current image data G _{n and} the upper bit data of the image data G _n−1 of the previous frame are input to the LUT 3. Even in this configuration, the size of the LUT 3 is the same as in the first embodiment, and the circuit scale can be reduced. In the case of this modification, the pre-computation result equivalent output means is realized by the signal source 1 and the frame memory 2.

Another modification of the first embodiment will be described.
In the above description, the case where only the upper bit data in the image data is input to the LUT 3 is shown. In this configuration, a value equivalent to the quotient when the image data is divided by a constant is input to the LUT 3. A configuration may be adopted in which a value equivalent to a value obtained by performing a predetermined operation as a quotient obtained by dividing image data by a constant is input to the LUT 3. Hereinafter, a case where the signal source 1 outputs image data in which data for one pixel is 6 bits for each color will be described as an example.

  The signal source 1 outputs the entire current image data from the MSB to the LSB to the frame memory 2 and the adder 4 as described above. In addition, the signal source 1 adds, to the LUT 3, low-order data representing a certain value to high-order data (here, high-order data for 4 bits) of at least 4 bits in 6-bit image data. Output the added data. “Lower level data representing a certain value” is, for example, “11” or “00” in binary, but the lower level data is not particularly limited. For example, if the upper 4 bits of 6-bit image data are “0010”, “001011” obtained by adding lower data (here, “11”) to “0010” is output to the LUT 3. The signal source 3 adds the lower data “11” and outputs it to the LUT 3 even when the upper 4 bits of the image data have other values.

The frame memory 2 stores the input image data for one frame, and outputs the image data G _n−1 of the previous frame to the LUT 3. At this time, similarly to the signal source 1, the frame memory 2 is a lower order representing a constant value in higher order data of at least 4 bits (here, higher order data for 4 bits) in 6-bit image data. Output data with data appended.

Here, the value of the upper data for 4 bits in the current 6-bit image data _Gn is equivalent to the quotient obtained by dividing the value of the current image data _Gn by a constant (here, “4”). The signal source 1 outputs to the LUT 3 data obtained by performing a predetermined operation of adding lower data indicating a constant value (in the above example, “11” in the binary system) to the upper bit data equivalent to the quotient. The value of the upper data for 4 bits in the 6-bit image data G _n−1 one frame before is obtained by dividing the value of the image data G _n−1 one frame before by a constant (here, “4”). Equal to quotient. The frame memory 2 outputs, to the LUT 3, data obtained by performing a predetermined operation of adding lower data indicating a constant value (“11” in the binary system in the above example) to upper bit data equivalent to the quotient.

  Even in such a configuration, there are 16 types of values that can be taken by the data input from the signal source 1 to the LUT 3. Similarly, there are 16 types of values that can be taken by data input from the frame memory 2 to the LUT 3. Therefore, the number of correction data ΔG is 256 (= 16 × 16), and the area of the LUT 3 can be reduced and the circuit scale can be reduced as in the case described above.

Note that the lower data indicating a certain value to be added to the upper bits of the current image data G _n, a lower data indicating a certain value to be added to the upper bits of the image data G _n of one frame before is not the same Also good. For example, the signal source 1 adds the lower data “11 (binary number)” to the upper 4 bits of the current 6-bit image data G _n , and the frame memory 2 stores the 6-bit image data G _n one frame before. _The lower data “00 (binary number)” may be added to the upper 4 bits of ₋₁ . In this case, the predetermined calculation for the value equivalent to the quotient when the image data is divided by a constant is different between the current image data and the image data one frame before.

In this modification, the values output from the signal source 1 and the frame memory 2 to the LUT 3 in the first embodiment are merely replaced with other values. 2 will be described as an example. Each value of “0 to 15” shown as “the upper 4 bits of the current display data G _n ” in FIG. 2 is replaced with another value. In FIG. Each value of “0 to 15” indicated as “the upper 4 bits of the data G _n−1 ” is merely replaced with a different value. Therefore, the value of each correction data ΔG is the same as in the first embodiment.

Further, the signal source 1 may output to the frame memory 2 data obtained by adding lower data representing a certain value to upper data of at least 4 bits in the current image data _Gn . The frame memory 2 may be configured to store the data for one frame and output it to the LUT 3. Even in such a configuration, the area of the LUT 3 can be reduced and the circuit scale can be reduced.

In the first embodiment and the modification thereof, a case is shown in which division by the same constant is applied to the current image data G _n and the image data G _n−1 one frame before. Division by a constant different from that of the current image data G _n may be applied to the image data G _n−1 one frame before. An example will be described in which the signal source 1 outputs image data in which the data for one pixel is 6 bits for each color. For example, the signal source 1 outputs the upper data of 5 bits in the current image data G _{n to} the LUT 3, and the frame memory 2 outputs the previous data in the image data G _n−1 one frame earlier to the LUT ₃ . Upper data for 4 bits may be output.

In this example, the value of the upper data for 5 bits in the 6-bit image data _Gn is equivalent to the quotient obtained by dividing the current value of the image data _Gn by the constant “2”. Further, the value of the upper data for 4 bits in the 6-bit image data G _n−1 is equivalent to the quotient obtained by dividing the value of the image data G _n−1 of the previous frame by the constant “4”. In this way, the constants used for division may be different.

Thus, when division by different constants is applied, the type of value input from the signal source 1 to the LUT 3 is different from the type of value input from the frame memory 2 to the LUT 3. In the above example, the value input from the signal source 1 is “0 to 31”, and the value input from the frame memory 2 is “0 to 15”. In such a case, the correction data ΔG may be determined based on the smaller number of bits among the upper bits input from the signal source 1 and the frame memory 2 to the LUT 3. In the above example, the upper 5 bits are input from the signal source 1 and the upper 4 bits are input from the frame memory 2. Therefore, the correction data ΔG may be determined based on the upper 4 bits, which is the smaller number of bits. That is, when the upper data for 4 bits of the current image data G _n is smaller than the upper data for 4 bits of the image data G _n−1 one frame before, the correction data ΔG is set to 0 or a negative value. Can be set as When the upper data for 4 bits of the current image data G _n is larger than the upper data for 4 bits of the image data G _n−1 one frame before, the correction data ΔG is set to 0 or a positive value. Can be set as Correction data ΔG when 4 bits of the upper data of the current image data G _n and the previous frame image data G _n-1 of the 4 bits of the upper data are equal, may be set to 0.

(Embodiment 2) FIG. 3 is a block diagram showing a portion related to image data processing in a liquid crystal driving device according to Embodiment 2 of the present invention. In FIG. 3, as in FIG. 1, only a portion where image data processing is performed in the liquid crystal driving device is shown.

  A signal source 21 such as a RAM mounted on a cellular phone or PDA outputs image data to a divider 25 and an adder 24 for each frame. At this time, the signal source 21 outputs image data in which the data for one pixel is, for example, 6 bits for each color of R, G, and B. The image data for one pixel may not be 6 bits.

  The divider 25 divides the value of the input image data by a predetermined constant (for example, “3”), and outputs the quotient obtained by the division to the frame memory 22 and the LUT 23. The divider 25 divides the image data for each pixel and outputs each division result (quotient) to the frame memory 22 and the LUT 23.

  The frame memory 22 has a storage capacity capable of storing a division result (quotient) of image data for one screen. The frame memory 22 stores the input quotient for one frame and outputs the quotient to the LUT 23. Accordingly, the frame memory 22 outputs the quotient obtained by the division on the image data of the previous frame to the LUT 23.

  The value of the data output from the divider 25 to the LUT 23 is equivalent to the quotient obtained by dividing the current image data value by a constant. The value of the data output from the frame memory 22 to the LUT 23 is equivalent to the quotient obtained by dividing the value of the image data of the previous frame by a constant.

  The LUT 23 stores correction data ΔG for correcting the current image data. In the LUT 23, the correction data ΔG determined from the data input from the divider 25 and the data input from the frame memory 22 is the data that can be taken by the data input from the divider 25 and the data input from the frame memory 22. It is set for each value. The correction data ΔG is obtained from data input from the divider 25 (data derived by division of the current image data) from data input from the frame memory 22 (data derived by division of image data one frame before). Is also set as 0 or a negative value. The correction data ΔG is set to 0 or a positive value when the data input from the divider 25 is larger than the data input from the frame memory 22. The correction data ΔG is 0 when the data input from the divider 25 is equal to the data input from the frame memory 22.

  Note that the correction data ΔG may be expressed as, for example, 7-bit data. Of these, one bit represents a positive or negative sign. However, the correction data ΔG may not be 7-bit data. Each correction data may be obtained by experiment as a value that can realize a good response speed in halftone display.

  The LUT 23 derives correction data ΔG corresponding to the data input from the divider 25 and the data input from the frame memory 22 and outputs the correction data ΔG to the adder 24. At this time, the LUT 23 derives correction data ΔG for each pixel.

  The adder 24 adds the correction data ΔG to the current image data input from the signal source 21. Processing when an overflow or underflow occurs during the addition processing is the same as in the first embodiment. The adder 24 performs addition processing for each pixel. The adder 24 outputs the image data added with the correction data to a source driver (not shown). The source driver supplies a voltage corresponding to the image data to which the correction data is added to the liquid crystal display panel.

  Next, the operation of the liquid crystal driving device shown in FIG. 3 will be described. The signal source 21 outputs image data for one screen for each frame to the divider 25 and the adder 24. At this time, the signal source 21 outputs the entire current image data from the MSB to the LSB. The divider 25 divides the input image data by a predetermined constant, and outputs the quotient obtained as a result of the division to the frame memory 22 and the LUT 23.

  The frame memory 22 stores the input quotient for one frame and outputs the quotient to the LUT 23. Accordingly, when the divider 25 outputs the quotient derived by the division of the current image data to the LUT 23, the frame memory 22 outputs the quotient derived by the division of the previous image data to the LUT 23.

  The LUT 23 outputs correction data ΔG determined from the data input from the divider 25 and the data input from the frame memory 22 to the adder 24 for each pixel. At this time, the current image data is input from the signal source 21 to the adder 24. The adder 24 performs a process for adding the correction data ΔG to the image data input from the signal source 21 for each pixel. Then, the adder 24 outputs the current image data with the correction data ΔG added to a source driver (not shown). The source driver supplies a voltage corresponding to the image data output from the adder 24 to the liquid crystal display panel.

  In the present embodiment, the image data supply means is realized by the signal source 21. The current calculation result equivalent value output means is realized by the divider 25. The dividing means included in the current operation result equivalent value outputting means is realized by the divider 25. The pre-computation result equivalent output means is realized by the divider 25 and the frame memory 22. The correction data deriving means is realized by the LUT 23. The adding means is realized by the adder 24. The liquid crystal driving means is realized by a source driver.

  According to the second embodiment, the LUT 23 derives correction data from data derived by dividing current image data and data derived by dividing image data one frame before. Therefore, the area of the LUT 23 can be reduced and the circuit scale can be reduced.

Next, a modification of the second embodiment will be described.
In the above description, the frame memory 22 stores the quotient output by the divider 25 for one frame and outputs the quotient to the LUT 23. Even if the frame memory 22 stores the image data output from the signal source 21 for one frame, the divider divides the image data and outputs the resulting quotient to the LUT 23. Good. FIG. 4 is a block diagram showing the configuration in this case.

  The signal source 21 outputs the entire current image data from the MSB to the LSB to the frame memory 22, the divider 25, and the adder 24. The divider 25 divides the value of the input image data by a predetermined constant and outputs the quotient obtained by the division to the LUT 23.

  The frame memory 22 has a storage capacity for one screen, stores the input image data for one frame, and the image data of the previous frame is divided by a divider 26 (hereinafter referred to as a second division to distinguish it from the divider 25). Is called a container.) The second divider 26 divides the input image data one frame before by a predetermined constant, and outputs the quotient obtained by the division to the LUT 23. The operations of the LUT 23 and the adder 24 are the same as the operations of the LUT 23 and the adder 24 shown in FIG. Even in this configuration, the size of the LUT 23 is the same as that in the second embodiment, and the circuit scale can be reduced. In the case of this modification, the first division means included in the current calculation result phase value output means and the current calculation result phase value output means is realized by the divider 25. The pre-computation result equivalent output means is realized by the frame memory 22 and the second divider 26. The second division means included in the previous calculation result equivalent value output means is realized by the second divider 26.

  The present invention can be suitably applied to, for example, a liquid crystal driving device that drives a TFT liquid crystal display device mounted on a portable terminal.

FIG. 3 is a block diagram showing a portion related to image data processing in the liquid crystal drive device according to the first embodiment of the present invention. Explanatory drawing which shows the example of LUT (lookup table). The block diagram which shows the part regarding the process of the image data in the liquid crystal drive device of Embodiment 2 of this invention. FIG. 10 is a block diagram illustrating a modification of the second embodiment. The block diagram which shows the structural example of the conventional liquid crystal drive device for implement | achieving an overdrive method. Explanatory drawing which shows the example of the conventional LUT.

Explanation of symbols

1 signal source 2 frame memory 3 LUT (look-up table)
4 Adder

Claims (6)

Image data supply means for supplying image data;
Current operation result equality output means for outputting a value equivalent to a quotient when a value of current image data supplied by the image data supply means is divided by a constant;
Pre-computation result equal value output means for outputting a value equivalent to a quotient obtained by dividing a value of previous image data supplied before a certain period before the current image data by the constant or a constant different from the constant When,
Correction data deriving means for deriving correction data according to the value output by the current operation result equality output means and the value output by the previous operation result equality output means;
Adding means for adding the correction data derived by the correction data deriving means to the current image data supplied by the image data supplying means;
A liquid crystal driving device, comprising: liquid crystal driving means for supplying a voltage corresponding to the image data to which the correction data is added to the liquid crystal panel. The current operation result equivalent output means outputs upper data of at least 4 bits in the current image data,
The liquid crystal driving device according to claim 1, wherein the pre-computation result equivalent output means outputs upper data of at least 4 bits in the previous image data. The current operation result equivalent value output means includes a division means for outputting a quotient when the value of the current image data is divided by a constant,
The liquid crystal driving device according to claim 1, wherein the pre-computation result equivalent output means stores the quotient output by the dividing means and outputs the quotient after a predetermined period. The current operation result equivalent value output means includes first division means for outputting a quotient when the value of the current image data is divided by a constant,
The liquid crystal driving device according to claim 1, wherein the pre-computation result equivalence output means includes second division means for outputting a quotient when the value of the previous image data is divided by a constant. Image data supply means for supplying image data;
Current operation result equality output means for outputting a value equivalent to a value obtained by performing a predetermined operation on a quotient obtained by dividing the value of the current image data supplied by the image data supply means by a constant;
A predetermined quotient that is different from the predetermined calculation or the predetermined calculation as a quotient when the value of the previous image data supplied before a certain period of time from the current image data is divided by the constant or a constant different from the constant. A pre-computation result equal value output means for outputting a value equivalent to the value obtained by the calculation of;
Correction data deriving means for deriving correction data according to the value output by the current operation result equality output means and the value output by the previous operation result equality output means;
Adding means for adding the correction data derived by the correction data deriving means to the current image data supplied by the image data supplying means;
A liquid crystal driving device, comprising: liquid crystal driving means for supplying a voltage corresponding to the image data to which the correction data is added to the liquid crystal panel. The current operation result equivalent output means outputs data obtained by adding lower data indicating a constant value to upper data of at least 4 bits in the current image data,
The pre-computation result equal value output means outputs data obtained by adding lower data indicating the constant value or a constant value different from the constant value to upper data of at least 4 bits or more in the previous image data. 5. A liquid crystal driving device according to 5.

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