JP2006139802A - Manufacturing method of semiconductor integrated circuit card - Google Patents
Manufacturing method of semiconductor integrated circuit card Download PDFInfo
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- JP2006139802A JP2006139802A JP2006013930A JP2006013930A JP2006139802A JP 2006139802 A JP2006139802 A JP 2006139802A JP 2006013930 A JP2006013930 A JP 2006013930A JP 2006013930 A JP2006013930 A JP 2006013930A JP 2006139802 A JP2006139802 A JP 2006139802A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 81
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 7
- 238000007789 sealing Methods 0.000 claims abstract description 61
- 229920005989 resin Polymers 0.000 claims abstract description 58
- 239000011347 resin Substances 0.000 claims abstract description 58
- 239000002184 metal Substances 0.000 claims abstract description 35
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims description 33
- 230000002093 peripheral effect Effects 0.000 claims description 12
- 238000004080 punching Methods 0.000 claims description 4
- 238000003825 pressing Methods 0.000 claims description 2
- 239000013256 coordination polymer Substances 0.000 abstract description 19
- 239000010408 film Substances 0.000 description 13
- 239000000853 adhesive Substances 0.000 description 9
- 230000001070 adhesive effect Effects 0.000 description 9
- 238000000034 method Methods 0.000 description 7
- 238000005452 bending Methods 0.000 description 5
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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Abstract
Description
本発明は半導体集積回路チップを装填する半導体集積回路カードの製造方法に関する。 The present invention relates to a method for manufacturing a semiconductor integrated circuit card loaded with a semiconductor integrated circuit chip.
従来の半導体集積回路カード（ＩＣカード）に装填されている半導体集積回路チップ（ＩＣチップ）は、樹脂のスクリーン印刷によって封止されていた。 A semiconductor integrated circuit chip (IC chip) loaded in a conventional semiconductor integrated circuit card (IC card) is sealed by resin screen printing.
斯かる従来のＩＣカードに装填されているＩＣチップは、樹脂のスクリーン印刷によって封止されていたため、強度が低く、しかも、その封止形状や封止厚のばらつきが大きいという欠点があった。ＩＣチップの強度が低いと、ＩＣカードが外圧によって曲げられたときに、ＩＣチップが破損したり、ＩＣチップの電極の基板の回路パターンに対する接続が外れたりするおそれがあった。また、ＩＣチップの封止形状や封止厚のばらつきが大きいと、ＩＣカードの品質や歩留りの制御が困難となる。 Since the IC chip loaded in such a conventional IC card is sealed by resin screen printing, it has a drawback that it has low strength and has a large variation in its sealing shape and sealing thickness. If the strength of the IC chip is low, when the IC card is bent by external pressure, the IC chip may be damaged or the connection of the electrodes of the IC chip to the circuit pattern of the substrate may be lost. Also, if the variation in the sealing shape and sealing thickness of the IC chip is large, it becomes difficult to control the quality and yield of the IC card.
斯かる点に鑑み、本発明は、半導体集積回路チップ装置が破損したり、その電極の基板の回路パターンに対する接続が外れたりするおそれがなく、しかも、品質や歩留りの制御の容易な半導体集積回路カードの製造方法を提案することを目的とする。 In view of the above, the present invention provides a semiconductor integrated circuit in which the semiconductor integrated circuit chip device is not damaged or the connection of the electrode to the circuit pattern of the substrate is not lost, and the quality and yield can be easily controlled. It aims at proposing the manufacturing method of a card | curd.
上記課題を解決するため、本発明の半導体集積回路カードの製造方法は、複数の回路パターンが形成されたフィルム基板上の各回路パターンに半導体集積回路チップを接着する工程と、前記半導体集積回路チップが接着されたフィルム基板を、第１の封止用樹脂が塗布された、前記半導体集積回路チップの下面より広い面積を有する第１の補強用金属板の上に載置するとともに、第２の封止用樹脂が塗布された前記半導体集積回路チップの上に、前記半導体集積回路チップの上面より広い面積を有する第２の補強用金属板を配する工程と、前記第１及び第２の補強用金属板を介して前記第１及び第２の封止用樹脂を加圧することによって、前記第２の封止用樹脂を前記半導体集積回路チップの周面に流れ込ませて、前記第１及び第２の補強用金属板をそれぞれ前記フィルム基板及び前記半導体集積回路チップに接着する工程と、前記半導体集積回路チップの周面に流し込まれた前記第２の封止用樹脂を硬化させることによって前記半導体集積回路チップの周面を被覆する封止用樹脂部を形成して半導体集積回路チップを封止する工程と、前記封止された半導体集積回路チップを各回路パターン毎に打ち抜く工程と、前記打ち抜かれた半導体集積回路チップを充填樹脂層内に装填する工程と、前記充填樹脂層の表裏にそれぞれ外装樹脂基板を接着する工程と、前記外装樹脂基板が接着された複数の半導体集積回路カードを各半導体集積回路カード毎に打ち抜く工程からなることを特徴とする。 In order to solve the above problems, a method of manufacturing a semiconductor integrated circuit card according to the present invention includes a step of bonding a semiconductor integrated circuit chip to each circuit pattern on a film substrate on which a plurality of circuit patterns are formed, and the semiconductor integrated circuit chip Is mounted on the first reinforcing metal plate having an area larger than the lower surface of the semiconductor integrated circuit chip, to which the first sealing resin is applied, and the second sealing resin is applied. Disposing a second reinforcing metal plate having an area larger than the upper surface of the semiconductor integrated circuit chip on the semiconductor integrated circuit chip to which the sealing resin is applied; and the first and second reinforcing members. By pressing the first and second sealing resins through the metal plate, the second sealing resin flows into the peripheral surface of the semiconductor integrated circuit chip, and the first and second sealing resins are flown. For reinforcement of 2 Bonding the metal plate to the film substrate and the semiconductor integrated circuit chip, respectively, and curing the second sealing resin poured into the peripheral surface of the semiconductor integrated circuit chip. Forming a sealing resin portion covering a peripheral surface to seal the semiconductor integrated circuit chip; punching the sealed semiconductor integrated circuit chip for each circuit pattern; and the punched semiconductor integrated Each of the semiconductor integrated circuit cards includes a step of loading a circuit chip into a filling resin layer, a step of bonding an exterior resin substrate to each of the front and back surfaces of the filling resin layer, and a plurality of semiconductor integrated circuit cards to which the exterior resin substrate is bonded. It is characterized by comprising a step of punching every time.
上記構成によれば、半導体集積回路カードに封止される半導体集積回路チップと、その半導体集積回路チップを挟持する第１及び第２の補強金属板並びに封止用樹脂を一体構造とすることができ、そのため、強度が頗る高く、即ち、曲げ、荷重、衝撃等の外力に対する耐久力が頗る大きく、封止形状や封止厚のばらつきが少ない半導体集積回路チップが構成される。 According to the above configuration, the semiconductor integrated circuit chip sealed in the semiconductor integrated circuit card, the first and second reinforcing metal plates sandwiching the semiconductor integrated circuit chip, and the sealing resin can be integrated. Therefore, a semiconductor integrated circuit chip having a high strength, that is, a high durability against an external force such as bending, load, impact, etc. and a small variation in sealing shape and sealing thickness is formed.
本発明によれば、半導体集積回路カードに封止される半導体集積回路チップは、強度が頗る高く、即ち、曲げ、荷重、衝撃等の外力に対する耐久力が頗る大きく、封止形状や封止厚のばらつきが少なくなり、このため、半導体集積回路チップが破損したり、その電極の基板の回路パターンに対する接続が外れたりするおそれがなく、しかも、品質や歩留りの制御の容易な半導体集積回路カードを得ることができる。 According to the present invention, a semiconductor integrated circuit chip sealed in a semiconductor integrated circuit card has a high strength, that is, has a large durability against external forces such as bending, load, and impact, and has a sealing shape and a sealing thickness. As a result, there is no risk of damage to the semiconductor integrated circuit chip or disconnection of the electrodes from the circuit pattern on the substrate, and a semiconductor integrated circuit card with easy quality and yield control can be obtained. Obtainable.
以下に、図面を参照して、本発明の一実施形態に係る半導体集積回路カード（ＩＣカード）の製造方法を説明する。 A method for manufacturing a semiconductor integrated circuit card (IC card) according to an embodiment of the present invention will be described below with reference to the drawings.
まず、図１及び図２を参照して、ＩＣチップの封止方法及びＩＣチップ装置（図１Ｂ）の具体例を説明する。図２Ａに示すように、複数の回路パターンＫＰが形成されたフィルム基板ＦＢを用意する。図２Ｂに示すように、図２Ａのフィルム基板ＦＢの各回路パターンＫＰ又は各回路パターンＫＰ内のフィルム基板ＦＢ上に、ディスペンサを用いて、少量（一定量）の接着剤ＢＤ１を塗布する。図２Ｃに示すように、フィルム基板ＦＢの各回路パターンＫＰの接着剤ＢＤ１上に各ＩＣチップＣＰを載置し、その各ＩＣチップＣＰを加圧するとともに、各ＩＣチップＣＰ及びフィルム基板ＦＢを加熱して、各ＩＣチップＣＰをフィルム基板ＦＢの各回路パターンＫＰの所定部分に接着（固着）するとともに、各ＩＣチップＣＰの電極を、それぞれ対応する回路パターンＫＰの所定の部分に、半田を用いて接続する。 First, a specific example of an IC chip sealing method and an IC chip device (FIG. 1B) will be described with reference to FIGS. As shown in FIG. 2A, a film substrate FB on which a plurality of circuit patterns KP are formed is prepared. As shown in FIG. 2B, a small amount (fixed amount) of adhesive BD1 is applied to each circuit pattern KP of the film substrate FB of FIG. 2A or the film substrate FB in each circuit pattern KP using a dispenser. As shown in FIG. 2C, each IC chip CP is placed on the adhesive BD1 of each circuit pattern KP of the film substrate FB, the IC chip CP is pressurized, and each IC chip CP and the film substrate FB are heated. Then, each IC chip CP is bonded (fixed) to a predetermined portion of each circuit pattern KP of the film substrate FB, and the electrodes of each IC chip CP are used for the predetermined portions of the corresponding circuit pattern KP, respectively. Connect.
図１Ａ及び図２Ｄに示すように、ＩＣチップＣＰの下面（矩形）と相似で、その下面より面積の広い第１の補強金属板ＭＰ１（矩形）を複数設け、その上に、ディスペンサを用いて封着用樹脂ＳＰ′（接着剤ＢＤ２）を所定量（一定量）塗布する。この工程は、図２Ａ〜Ｃについて上述した工程の前後及びその工程の途中のいずれでもよい。 As shown in FIGS. 1A and 2D, a plurality of first reinforcing metal plates MP1 (rectangles) that are similar to the lower surface (rectangular shape) of the IC chip CP and have a larger area than the lower surface are provided, and a dispenser is used thereon. A predetermined amount (fixed amount) of the sealing resin SP ′ (adhesive BD2) is applied. This step may be either before or after the step described above with reference to FIGS.
図２Ｅに示すように、ＩＣチップＣＰが接着されたフィルム基板ＦＢを、塗布された封止用樹脂ＳＰ′（接着剤ＢＤ２）を介して、各第１の補強用金属板ＭＰ１上に載置する。 As shown in FIG. 2E, the film substrate FB to which the IC chip CP is bonded is placed on each first reinforcing metal plate MP1 via the applied sealing resin SP ′ (adhesive BD2). To do.
そして、図２Ｅ及び図１Ａに示すように、各ＩＣチップＣＰ上に、ディスペンサを用いて所定量（一定量）の封止用樹脂ＳＰ′（接着剤ＢＤ３）を塗布し、その封止用樹脂ＳＰ′（接着剤ＢＤ３）に紫外線を照射して仮硬化する。図２Ｅ並びに図１Ａ及び図１Ｂに示すように、各ＩＣチップＣＰの上面（矩形）と相似で、その上面より面積の広い複数の第２の補強金属板（矩形）ＭＰ２を治具に取り付けて水平に移動させて、仮硬化された封止用樹脂ＳＰ′（接着剤ＢＤ３）上に配し、加圧治具を用いて、各第１及び第２の補強金属板ＭＰ１、ＭＰ２及び各ＩＣチップＣＰ間の平行状態を保持しつつ、各第１及び第２の補強金属板ＭＰ１、ＭＰ２間を均一に加圧して、図１Ｂに示すように封止厚を一定にするとともに、封止用樹脂ＳＰ′（接着剤ＢＤ３）を各ＩＣチップＣＰの周面に流れ込ませて、各第１の補強金属板ＭＰ１をフィルム基板ＦＢ上に、各第２の補強金属板ＭＰ２をＩＣチップＣＰ上に、それぞれ接着するとともに、各ＩＣチップＣＰの周面を被覆する。そして、その封止用樹脂ＳＰ′（接着剤ＢＤ３）に紫外線を照射して硬化して、封止用樹脂部ＳＰとなし、図１Ｂに示すような、形状が一定で、封止厚が一定の複数のＩＣチップ装置ＣＰＤを得る。 Then, as shown in FIGS. 2E and 1A, a predetermined amount (fixed amount) of sealing resin SP ′ (adhesive BD3) is applied onto each IC chip CP using a dispenser. SP ′ (adhesive BD3) is temporarily cured by irradiating it with ultraviolet rays. As shown in FIG. 2E, FIG. 1A, and FIG. 1B, a plurality of second reinforcing metal plates (rectangular shapes) MP2 that are similar to the upper surface (rectangular shape) of each IC chip CP and have a larger area than the upper surface are attached to the jig. It is moved horizontally and placed on the pre-cured sealing resin SP ′ (adhesive BD3), and each of the first and second reinforcing metal plates MP1, MP2 and each IC using a pressure jig. While maintaining the parallel state between the chips CP, the first and second reinforcing metal plates MP1 and MP2 are uniformly pressed to keep the sealing thickness constant as shown in FIG. Resin SP ′ (adhesive BD3) is allowed to flow into the peripheral surface of each IC chip CP, and each first reinforcing metal plate MP1 is placed on the film substrate FB, and each second reinforcing metal plate MP2 is placed on the IC chip CP. These are bonded together and the peripheral surface of each IC chip CP is covered. Then, the sealing resin SP ′ (adhesive BD3) is cured by irradiating with ultraviolet rays to form a sealing resin portion SP, and the shape and the sealing thickness are constant as shown in FIG. 1B. A plurality of IC chip devices CPD are obtained.
この複数のＩＣチップ装置ＣＰＤは、図示せずも、各回路パターンＫＰ毎に打ち抜かれた後、ロールフィルム上に載置されるとともに、その各ＩＣチップ装置ＣＰＤ及びロールフィルム上に亘って、薄膜コーティングが行われた後、加熱ローラ間を通過させて、多数のＩＣカードが一列に連結されたカード連結板が得られ、このカード連結板が定尺切断されて、所定枚数のＩＣカードが一列に連結された定尺カード連結板が複数得られ、その定尺カード連結板が各ＩＣカード毎に打ち抜かれて、個別のＩＣカードが得られる。 Although not shown, each of the plurality of IC chip devices CPD is punched for each circuit pattern KP and then placed on a roll film, and a thin film is formed on each IC chip device CPD and the roll film. After the coating is performed, a card connecting plate in which a number of IC cards are connected in a row is obtained by passing between heating rollers, and the card connecting plate is cut in a fixed length so that a predetermined number of IC cards are placed in a row. A plurality of standard card connecting plates connected to each other are obtained, and the standard card connecting plates are punched out for each IC card to obtain individual IC cards.
次に、図３を参照して、ＩＣチップＣＰの封入されたＩＣカード（半導体集積回路カード）の構造を説明する。ＩＣチップ装置ＣＰＤがカード基板内に装填されている。即ち、ＩＣチップ装置ＣＰＤが、例えば、エポキシ樹脂からなる充填樹脂層ＩＰ内に装填され、その充填樹脂層ＩＣＰの表裏にそれぞれ、例えば、ポリエチレンテレフタレートからなる外装樹脂基板ＯＰ、ＯＰが接着されて、ＩＣカードが構成される。 Next, the structure of an IC card (semiconductor integrated circuit card) in which an IC chip CP is sealed will be described with reference to FIG. An IC chip device CPD is loaded in the card substrate. That is, the IC chip device CPD is loaded in, for example, a filling resin layer IP made of an epoxy resin, and exterior resin substrates OP and OP made of, for example, polyethylene terephthalate are bonded to the front and back of the filling resin layer ICP, respectively. An IC card is configured.
第１の発明によれば、回路パターンの形成された基板上に半導体集積回路チップを接着するとともに、その半導体集積回路チップの電極を回路パターンに接続し、且つ第１の補強用金属板上に、封止用樹脂を所定量塗布し、半導体集積回路チップが接着された基板を、塗布された封止用樹脂を介して第１の補強用金属板上に載置し、その半導体集積回路チップの上に封止用樹脂を所定量塗布し、塗布された封止用樹脂上に第２の補強金属板を配するとともに、第１及び第２の補強金属板を介して封止用樹脂を加圧して、その封止用樹脂を半導体集積回路チップの周面に流れ込ませ、半導体集積回路チップの周面に流れ込まれた封止用樹脂を硬化させるようにしたので、半導体集積回路チップ、その半導体集積回路チップを挟持する第１及び第２の補強金属板並びに封止用樹脂が一体構造となって、強度が頗る高く、即ち、表裏両面からの曲げ、荷重、衝撃等の外力に対する耐久力が頗る大きく、封止形状や封止厚のばらつきの少ない半導体集積回路チップ装置を得ることのできる半導体集積回路チップの封止方法を得ることができる。したがって、斯かる半導体集積回路チップ装置を半導体集積回路カードに装填して頗る好適なものとなる。 According to the first invention, the semiconductor integrated circuit chip is bonded to the substrate on which the circuit pattern is formed, the electrodes of the semiconductor integrated circuit chip are connected to the circuit pattern, and the first reinforcing metal plate is disposed on the first reinforcing metal plate. Then, a predetermined amount of the sealing resin is applied, and the substrate to which the semiconductor integrated circuit chip is bonded is placed on the first reinforcing metal plate via the applied sealing resin, and the semiconductor integrated circuit chip A predetermined amount of sealing resin is applied on the surface, a second reinforcing metal plate is disposed on the applied sealing resin, and the sealing resin is applied via the first and second reinforcing metal plates. Since the sealing resin flows into the peripheral surface of the semiconductor integrated circuit chip under pressure, and the sealing resin that flows into the peripheral surface of the semiconductor integrated circuit chip is cured, the semiconductor integrated circuit chip, First and first sandwiching a semiconductor integrated circuit chip The reinforcing metal plate and the sealing resin have an integrated structure, and the strength is high, that is, the durability against external force such as bending, load, and impact from both the front and back sides is large, and the sealing shape and sealing thickness are large. A semiconductor integrated circuit chip sealing method capable of obtaining a semiconductor integrated circuit chip device with little variation can be obtained. Therefore, it is preferable that such a semiconductor integrated circuit chip device is mounted on a semiconductor integrated circuit card.
第２の発明によれば、回路パターンの形成された基板と、その基板上に接着されるとともに、電極が回路パターンに接続された半導体集積回路チップと、第１及び第２の補強金属板と、半導体集積回路チップの周面を被覆し、基板上に第１の補強金属板を固着するとともに、半導体集積回路チップ上に第２の補強金属板を固着する封止用樹脂部とを有するので、半導体集積回路チップ、その半導体集積回路チップを挟持する第１及び第２の補強金属板並びに封止用樹脂が一体構造となって、強度が頗る高く、即ち、曲げ、荷重、衝撃等の外力に対する耐久力が頗る大きく、封止形状や封止厚のばらつきの少ない半導体装置回路チップ装置を得ることができる。したがって、斯かる半導体集積回路チップ装置を半導体集積回路カードに装填して頗る好適なものとなる。 According to the second invention, the substrate on which the circuit pattern is formed, the semiconductor integrated circuit chip bonded to the substrate and having the electrode connected to the circuit pattern, the first and second reinforcing metal plates, The semiconductor integrated circuit chip has a sealing resin portion that covers the peripheral surface of the semiconductor integrated circuit chip and fixes the first reinforcing metal plate on the substrate and also fixes the second reinforcing metal plate on the semiconductor integrated circuit chip. The semiconductor integrated circuit chip, the first and second reinforcing metal plates sandwiching the semiconductor integrated circuit chip, and the sealing resin have an integrated structure, and the strength is high, that is, external force such as bending, load, impact, etc. Thus, a semiconductor device circuit chip device having a large durability against the above and having little variation in sealing shape and sealing thickness can be obtained. Therefore, it is preferable that such a semiconductor integrated circuit chip device is mounted on a semiconductor integrated circuit card.
第３の発明によれば、回路パターンの形成された基板と、その基板上に接着されるとともに電極が回路パターンに接続された半導体集積回路チップと、その半導体集積回路チップを狭持する第１及び第２の補強金属板と、半導体集積回路チップの周面を被覆し、基板上に第１の補強金属板を固着するとともに、半導体集積回路チップ上に第２の補強金属板を固着する封止用樹脂部とを有する半導体集積回路チップ装置が、カード基板内に装填されてなる。それにより、その半導体集積回路チップ装置は、半導体集積回路チップ、その半導体集積回路チップを挟持する第１及び第２の補強金属板並びに封止用樹脂が一体構造となって、強度が頗る高く、即ち、曲げ、荷重、衝撃等の外力に対する耐久力が頗る大きく、封止形状や封止厚のばらつきが少なくなり、このため、半導体集積回路チップ装置が破損したり、その電極の基板の回路パターンに対する接続が外れたりするおそれがなく、しかも、品質や歩留りの制御の容易な半導体集積回路カードを得ることができる。 According to the third invention, the substrate on which the circuit pattern is formed, the semiconductor integrated circuit chip bonded on the substrate and having the electrode connected to the circuit pattern, and the first holding the semiconductor integrated circuit chip And the second reinforcing metal plate and the peripheral surface of the semiconductor integrated circuit chip are covered, the first reinforcing metal plate is fixed on the substrate, and the second reinforcing metal plate is fixed on the semiconductor integrated circuit chip. A semiconductor integrated circuit chip device having a stopping resin portion is loaded in a card substrate. As a result, the semiconductor integrated circuit chip device includes a semiconductor integrated circuit chip, the first and second reinforcing metal plates sandwiching the semiconductor integrated circuit chip, and a sealing resin as an integrated structure, and has a high strength. That is, the durability against external force such as bending, load, impact, etc. is large, and the variation in the sealing shape and sealing thickness is reduced, so that the semiconductor integrated circuit chip device is damaged or the circuit pattern of the substrate of the electrode Therefore, it is possible to obtain a semiconductor integrated circuit card that can be easily controlled in quality and yield.
ＦＢ…フィルム基板、ＣＰ…ＩＣチップ、ＭＰ１，ＭＰ２…第１及び第２の補強金属板、ＳＰ′…封止用樹脂、ＳＰ…封止用樹脂部、ＣＰＤ…ＩＣチップ装置、ＩＰ…充填樹脂層、ＯＰ…外装樹脂板 FB ... Film substrate, CP ... IC chip, MP1, MP2 ... First and second reinforcing metal plates, SP '... Sealing resin, SP ... Sealing resin part, CPD ... IC chip device, IP ... Filling resin Layer, OP ... exterior resin plate
Claims (1)
前記半導体集積回路チップが接着されたフィルム基板を、第１の封止用樹脂が塗布された、前記半導体集積回路チップの下面より広い面積を有する第１の補強用金属板の上に載置するとともに、第２の封止用樹脂が塗布された前記半導体集積回路チップの上に、前記半導体集積回路チップの上面より広い面積を有する第２の補強用金属板を配する工程と、
前記第１及び第２の補強用金属板を介して前記第１及び第２の封止用樹脂を加圧することによって、前記第２の封止用樹脂を前記半導体集積回路チップの周面に流れ込ませて、前記第１及び第２の補強用金属板をそれぞれ前記フィルム基板及び前記半導体集積回路チップに接着する工程と、
前記半導体集積回路チップの周面に流し込まれた前記第２の封止用樹脂を硬化させることによって前記半導体集積回路チップの周面を被覆する封止用樹脂部を形成して半導体集積回路チップを封止する工程と、
前記封止された半導体集積回路チップを各回路パターン毎に打ち抜く工程と、
前記打ち抜かれた半導体集積回路チップを充填樹脂層内に装填する工程と、
前記充填樹脂層の表裏にそれぞれ外装樹脂基板を接着する工程と、
前記外装樹脂基板が接着された複数の半導体集積回路カードを各半導体集積回路カード毎に打ち抜く工程
を有することを特徴とする半導体集積回路カードの製造方法。 Bonding a semiconductor integrated circuit chip to each circuit pattern on a film substrate on which a plurality of circuit patterns are formed;
The film substrate to which the semiconductor integrated circuit chip is bonded is placed on a first reinforcing metal plate having an area wider than the lower surface of the semiconductor integrated circuit chip to which the first sealing resin is applied. And disposing a second reinforcing metal plate having an area larger than the upper surface of the semiconductor integrated circuit chip on the semiconductor integrated circuit chip to which the second sealing resin is applied;
By pressing the first and second sealing resins through the first and second reinforcing metal plates, the second sealing resin flows into the peripheral surface of the semiconductor integrated circuit chip. Bonding the first and second reinforcing metal plates to the film substrate and the semiconductor integrated circuit chip, respectively.
The second sealing resin poured into the peripheral surface of the semiconductor integrated circuit chip is cured to form a sealing resin portion that covers the peripheral surface of the semiconductor integrated circuit chip. Sealing, and
Punching the sealed semiconductor integrated circuit chip for each circuit pattern; and
Loading the punched semiconductor integrated circuit chip into a filling resin layer;
Bonding the exterior resin substrate to the front and back of the filled resin layer,
A method of manufacturing a semiconductor integrated circuit card, comprising: punching out a plurality of semiconductor integrated circuit cards to which the exterior resin substrate is bonded for each semiconductor integrated circuit card.
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