JP2006256174A - Image forming apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the influence of a high frequency clock used in a transmission circuit between a light emission data processing unit and a light source driver in an image forming apparatus on EMC etc. with a simple configuration and flexibly cope with diversified devices. Obtaining transmission I / F is provided.
In order to synchronize CLK (2) and CLK (3) used in both operations for latching transmission data from a light emission data processing block 12 to an LD driver 21, a transmission medium (cable) is transmitted from a common signal source 31. Etc.), a synchronization signal is transmitted to each clock (that is, CLK (2), CLK (3) has a phase control function). In the present invention, by adopting a method for transmitting a synchronization signal for adjusting the phase of the clock, it is possible to reduce the influence on EMC or the like caused by the conventional method for transmitting a high-frequency clock with a simple configuration. Further, since the clock has a phase control function, it is possible to flexibly cope with various device configurations by using an arbitrary synchronization signal.
[Selection] Figure 5

Description

  The present invention relates to an image forming apparatus that performs optical writing by controlling on / off of a light source, and more specifically, based on a clock used when transmitting data processed by a data processing unit for light emission to a driver unit of the light source. The present invention relates to an image forming apparatus having a transmission interface that can reduce the influence of EMC (Electro Magnetic Interference) and AC timing.

Conventionally, in image forming apparatuses such as printers, digital copying machines, facsimile machines, and MFPs (print output apparatuses that combine functions of copying, printers, fax machines, etc.), image writing is performed by a light beam scanning method. . In this method, on / off control of lighting sources such as LDs (Laser Diodes) and LEDs (Light Emitting Diodes) is turned on / off by image data (video signals), and the emitted light beams are written into images by scanning means such as polygon mirrors. In this method, an image is written line by line on the photosensitive member by periodically scanning the surface to be scanned of the photosensitive member.
In recent years, in the image forming apparatus as described above, there has been an increasing demand for higher processing speed. This is because light emission data used for optical writing of an image for which print output is requested increases due to progress in image quality and colorization, and it takes time to process the data and transmit data to the driver unit of the light emission source. However, there is an aspect of reducing the output processing speed (number of sheets / unit time), and even in such a situation, it is desired to obtain a processing speed as close as possible to monochrome output. Accelerating development.

By the way, in the optical writing apparatus that irradiates the writing surface with light from a light emitting source whose lighting is on / off controlled, the device configuration of the apparatus is diversified according to required specifications including cost, and based on each configuration. A transmission interface (I / F) suitable for data and control signals defined in the above is employed for data transmission between data processing blocks and from the processing block to the driver unit of the light emission source.
A data bus is usually used for an I / F used for transmission of image data. In this data transmission system, a data bus width according to need is required. That is, if the data to be transmitted is an image (video) signal of 256 gradations, an 8-bit bus data signal is obtained, and if there are n control objects (data transmission destinations), the bus width is increased by 8 times to n ×. Become.
In the bus transfer type I / F, synchronization for data transmission is required. That is, a method in which a clock signal is used for synchronization of data transmission and an operation of latching data at the falling edge or rising edge of the clock signal to determine the data is performed in both the transmission side and the transmission side transmission circuit units. Is generally adopted. For this reason, it is necessary to transmit a clock together with data, and a higher frequency has been used as a clock in order to respond to an increase in processing speed.
As described above, when a clock with a higher frequency is used, the problem is the influence of the clock signal on EMC (Electro Magnetic Interference) and AC timing. In particular, if the bus width needs to be wide and the circuit configuration is such that a transmission line formed as a pattern on a printed circuit board or a cable is used, the problem of radiated electromagnetic noise is significant and countermeasures are also required. With many difficulties.

Conventionally, as countermeasures against EMC or the like generated by data transmission, methods such as changing the circuit arrangement or shielding radiated electromagnetic waves by a magnetic shield have been adopted. In addition, to EMC or the like generated by data transmission For example, the following Patent Document 1 can be cited as a conventional technique that proposes the above countermeasure.
The printing apparatus described in Patent Document 1 is an apparatus that transmits printing data processed by a printer controller to a printer engine via a video interface that operates based on a video clock signal obtained by spectrum spreading, and performs writing using a laser diode. . Here, it is possible to suppress the peak of the unwanted radiation noise level generated from the video clock by using spectrum spreading.
JP 2001-219607 A

However, the reduction of EMC described in the above-mentioned Patent Document 1 requires processing for spectrum spreading of an oscillator that oscillates the fundamental frequency, and it is necessary to newly add a circuit for that purpose. End up. In addition, this conventional technique does not follow a method in which data is latched at the falling edge or rising edge of the clock signal and the operation for determining the data is performed in both the transmission circuit section on the transmission side and the reception side.
In general, the optical writing device of an image forming apparatus is closely related to the configuration of an image forming unit having a surface to be scanned. In recent years, the number of optical writing devices (such as colorization) and the space saving in the apparatus are reduced. Therefore, the degree of freedom of the in-machine layout of image data transmission to the optical writing device is strongly demanded. Therefore, the above-described magnetic shield and spread spectrum method proposed as a countermeasure to EMC that is required in accordance with high-speed signal transmission leads to an increase in product development man-hours and increases the circuit scale. It does not provide an appropriate solution to this requirement.
The present invention has been made in view of the above-described problems of the prior art in an image forming apparatus having an optical writing device that is processed by a light emission data processing unit and performs high-speed data transmission to a driver unit of a light emission source. Therefore, the problem to be solved is to reduce the influence on the EMC and AC timing caused by the high frequency clock signal used in the transmission circuit between the data processing unit for light emission and the driver unit of the light emission source with a simple circuit configuration. It is an object of the present invention to provide a transmission interface that can flexibly cope with diversified devices.

  According to the first aspect of the present invention, the light source, the data processing unit for light emission, the driver unit for controlling on / off of the light source based on the data for light emission, and the data processed by the data processing unit for light emission are used as the driver unit. An image forming apparatus having a data transmission interface for transmitting and an optical writing device comprising a scanning unit that scans light generated by a light emitting source on a writing surface, wherein the data transmission interface transmits a synchronization signal. A signal transmission circuit, a clock generator for generating first and second clocks each having a function of controlling a phase of a clock signal based on a synchronization signal transmitted from the synchronization signal transmission circuit, and a first clock generator, A data transmission circuit that transmits light emission data in synchronization with the generated clock and the clock generated by the second clock generator. An image forming apparatus characterized by comprising a circuit for latching the emission data transmitted by.

According to a second aspect of the present invention, in the image forming apparatus according to the first aspect, the synchronization signal transmission circuit uses the control data inserted into the light emission data transmitted by the data transmission circuit as a synchronization signal. It is characterized by being.
According to a third aspect of the present invention, in the image forming apparatus according to the first or second aspect, the data transmission circuit is a means of a serial data transmission system.
According to a fourth aspect of the present invention, in the image forming apparatus according to any one of the first to third aspects, the data transmission circuit is LVDS (Low Voltage Differential Signaling) means.

According to the present invention, since the transmission between the data processing unit for light emission and the driver unit is the transmission of the synchronization signal for synchronizing the data transmission with the first and second clocks, the data transmission between the processing units is conventionally performed. The transmission of the high-frequency clock signal used for transmission, which has been sometimes performed, can be eliminated, and the influence on EMC and AC timing that occurs when the high-frequency clock is transmitted can be reduced.
In addition, since each of the first and second clock generators has a function of controlling the phase of the clock signal based on the synchronization signal, it can cope with any synchronization signal and has a diversified configuration. It is possible to respond flexibly to the devices it has, and increase versatility (claim 1).

In addition, since the synchronization signal for synchronizing the first and second clocks is used as the synchronization signal, the control data inserted in the transmitted light emission data, the transmission medium (cable Etc.), a circuit for transmitting the synchronization signal via the transmission circuit is unnecessary, and the transmission circuit can be simplified.
In addition, since the data transmission is a serial data transmission system, it is possible to further reduce the influence on the EMC and the like as compared with the parallel transmission system.
In addition, since the data transmission is the LVDS system, it is possible to further reduce the influence on EMC and the like without reducing the data transmission speed.

An image forming apparatus according to the present invention will be described based on the following embodiments. The embodiment described below has an optical writing device that performs LD (laser diode) optical writing by a scanning method, and an image that is formed on a paper medium as a visualized image written on a photoconductor by the optical writing device An example applied to a forming apparatus is shown.
1 to 4 are diagrams showing an outline of the configuration of the image forming apparatus according to the present embodiment.
FIG. 1 is a diagram for explaining a configuration concept of an MFP (print output apparatus in which functions such as copying, printer, and FAX) are combined as an image forming apparatus according to the present embodiment. As shown in the figure, image data to be processed for print output is input to the MFP main body 100 from the outside through an input device (input interface).
The input of the document image is performed by a document reading device (not shown) provided on the main body side of the MFP 100, and an ADF (automatic document conveying device) 50 is provided to automatically supply the read document. A copy original or a FAX transmission original is read by an original reading apparatus, and is edited and processed into image data in a format in which an image can be output by a processing unit in MFP 100.
The input of the FAX reception image is performed from the external device 300 having the FAX function via the FAX line, and is processed into image data in a format that can output an image by a processing unit (not shown) in the MFP 100. .
Data input for a print request is performed from an external device 200 such as a PC having a function of creating image data (print data) via a network or the like, and an image is output by a printer controller (not shown) in the MFP 100. It is edited and processed into image data in a possible format.

2 to 4 are diagrams for explaining the exposure unit and the image forming unit of the optical writing device installed in the main body of the MFP 100. FIG.
The optical writing device includes a light emitting data processing unit, a control unit (described later) including a driver unit that controls on / off of lighting of the light source based on the light emitting data, a light source, a light beam scanning device, and the like. An exposure unit is provided.
The exposure unit has an LD (laser diode) unit illustrated in FIG. 2 as a light source. The LD unit 63 shown in the figure has a general structure, and a laser beam is emitted from the LD chip through the glass plate by charges from an electrode composed of a clad layer and an active layer and connected to the clad layer. (This is called the front beam). At this time, a back beam paired with the front beam is emitted to a photodiode (PD, shown as a PIN chip in the figure) in the LD unit, and a PD output can be obtained from the electrode. The amount of beam light can be monitored by PD output, and by performing control according to the monitor output, stable output with a predetermined optical power is possible.

The light beam scanning device of the exposure unit is a device that projects laser light generated by the LD unit 63 (see FIG. 2) onto the photoconductor 31 as a scanned surface at a predetermined cycle as a scanning beam. Since the LD 63 is controlled to be turned on by image data, an image is written on the photoreceptor 31.
In the light beam scanning apparatus 1 illustrated in FIG. 3, the laser light emitted from the LD 63 is shaped through the collimator lens 64 and the aperture 65, passes through the cylinder lens 66, and then is rotated by the polygon mirror 3 for rotational deflection. The incident laser beam is deflected and scanned. As shown in FIG. 4 (described later), the polygon mirror 3 is rotationally driven at a predetermined rotational speed by a polygon motor 3M. The laser light reflected by the polygon mirror 3 passes through the fθ lens 4 and the barrel toroidal lens (BTL) 5 (see FIG. 4), is reflected by the folding mirror 6, and further passes through the dustproof glass 70. The light is condensed on a photoreceptor 31 as a recording medium. By these optical systems, the light beam scans the surface of the photoreceptor 31 at a constant speed. Further, in order to detect the main scanning timing, a synchronization sensor 61 is disposed on the scanning optical path of the beam from the LD 63.

In the image forming unit illustrated in FIG. 4, the light beam scanning device 1 is applied to the photosensitive member 31 by the beam scanning method with the light generated by the LD 63 that is controlled to be turned on by image data, as described with reference to FIG. 3. Write an image. That is, a photosensitive drum as shown in FIGS. 3 and 4 is used as the photosensitive member 31, and in order to move the writing position of the light beam, a rotation driving unit (not shown) performs a sub-scanning direction (in main scanning). After being rotated and driven in the orthogonal direction and uniformly charged by a charger, an image is written by repeatedly scanning in the main scanning direction with a light beam to form an electrostatic latent image.
Around the photosensitive member 31, a charger 36, a developing unit 32, a transfer unit 33, a cleaning unit 34, and a static eliminator 35 are provided. According to the order of charging, exposure, development, and transfer, which is a normal electrophotographic process, The electrostatic latent image formed on the photoconductor 31 is used as a visualized image, and an image is formed on a recording medium (transfer paper) through a transfer process.
The image formed on the transfer paper is fixed on the transfer paper by a fixing device (not shown).
Further, the image forming apparatus (MFP machine) is equipped with a transfer sheet feeding / conveying mechanism (not shown) from transfer to discharge.

Next, control of the optical writing device will be described. This control (see FIG. 5 to be described later) relates to operations of a light emission data processing unit, a driver unit that controls on / off of the light emission source based on the light emission data, and the like.
There are two types of configurations adopted when using a plurality of LD light emitting elements, such as an image forming apparatus for forming a color image, and a configuration including a plurality of LD units and a configuration including an LD unit using an LD array. To do. However, regardless of which configuration is employed, a control signal is required for each drive section of the LD unit.
The relationship between the light emission timing of the LD 63 and the synchronization detection signal detected by the synchronization sensor 61 arranged on the scanning optical path will be described. The synchronization detection unit includes a synchronization sensor 61 and an amplification unit that amplifies and outputs a signal detected by the sensor. Generally, during the period when the LD beam is scanned on the synchronization sensor 61, the transistor of the amplification unit is An L (Low) level signal is output.
The control side of the LD 63 has a function of turning on the LD 63 during a period of scanning over the synchronization sensor 61, and a counter that generates an LD emission start timing upon receiving a synchronization detection signal from the synchronization detection unit during this period. It has a function of controlling the phase of the synchronous clock (pixel clock).
In general, a synchronous clock (pixel clock) is formed from a source clock that is driven at high speed in an oscillation block by a counter, and the counter is reset by a synchronous detection signal from a synchronous detection unit. The phase control is realized by expanding and contracting the period. As a result, when the LD 63 scans the surface to be scanned, the image writing start point in the scanning direction can be kept constant, and the image formed in each scan can be prevented from being displaced.

The present invention provides a problem to be solved in reducing the influence on the EMC and AC timing caused by the high-frequency clock signal used in the transmission circuit when data is transmitted between the processing blocks in the control of the optical writing apparatus. Yes.
In the data bus transfer method, as described in the above [Background Art] section, if there are n control objects (data transmission destinations), the bus width must be increased n times and the bus width needs to be widened. In addition, when using a transmission line formed as a pattern on a printed circuit board or a circuit configuration using a cable, the problem of radiated electromagnetic noise is large, and countermeasures are accompanied by many difficulties.
In the light beam scanning apparatus 1 (see FIG. 4) of the exposure unit described above, the effective scanning rate indicating the scanning region with respect to the surface to be scanned of the polygon mirror is normally about 60%. This pixel clock has a frequency that is about twice as high as the pixel clocks of other parts, making it difficult to prevent unnecessary radiation in the exposure unit.

Furthermore, in the bus transfer type I / F, synchronization for data transmission is necessary. That is, a method in which a clock signal is used for synchronization of data transmission and an operation of latching data at the falling edge or rising edge of the clock signal to determine the data is performed in both the transmission side and the transmission side transmission circuit units. Is generally adopted. For this purpose, it is necessary to transmit a clock together with data from the transmission side. This clock has been used at a higher frequency in order to respond to higher processing speed.
Data transmission by this method is usually performed by a data transmission I / F having a circuit configuration shown in FIG.
As shown in FIG. 7, the control unit of the optical writing device includes a writing LD unit 20 having an LD 63 driven by the LD driver 21 and a light emission data processing unit 10 provided in the preceding stage of the writing LD unit 20. The light emission data processing unit 10 includes a processing block (1) 11 and a processing block (2) 12 each equipped with a transmission circuit.
In addition, the processing block (2) 12 of the light emission data processing unit 10 and the LD driver 21 of the writing LD unit 20 perform data transmission between them by means of a transmission circuit provided respectively. In this data transmission, the clock CLK (2) 16 is transmitted from the reception side to the transmission side in order to perform the operation of latching the data with the clock signal and determining the data, and the data is synchronized with the transmitted clock. By performing an operation to determine the data transmission, data transmission without data deviation is realized.

FIG. 8 shows the relationship between the data transmitted from the transmission side and the clock transmitted from the transmission side in order to latch the data on the reception side by the operation of the data transmission I / F (FIG. 7). It is a timing chart.
FIG. 8 shows an example of 4-bit data. Since 4-bit data 0 to 3 are latched by a clock having a predetermined cycle shown in the figure, the rise and fall of the data are performed in synchronization with the rise of the clock. Is called.
In the operation of this conventional method, as shown in FIG. 8, the signal level of the 4-bit data signal of data 0 to 3 changes only at the portion where the data value has changed. For example, when the value changes from 2h to 6h in 4bit data, the signal level actually changes only from 0 to 1 (positive logic from L to H) in the 3rd bit. Thus, the rate of periodically changing becomes lower. Moreover, for example, even in a state where 0h → fh → 0h → fh →... Is repeated (as shown in the latter half of the figure), as shown in FIG. As a result, it can be seen that even if the data cycle is the minimum, it is only twice the synchronization clock signal.
Therefore, the change in the signal due to the data has less influence on the EMC than the change due to the clock signal for synchronization, and does not become a problem. However, the clock signal for synchronization has a larger influence because a higher frequency is used. .

As described above, the clock signal for synchronization transmitted by this conventional method greatly affects EMC and AC timing.
Therefore, the present invention provides a system that can synchronize clocks for performing a latch operation for determining data in both transmission and reception without transmitting the clock for synchronization in the above-described prior art. To solve this problem. That is, by providing a circuit for transmitting a synchronization signal (a signal for adjusting the phase of a clock generated on each side, not a clock) used in common for transmission circuits on the transmission side and the reception side, a conventional method is provided. It is possible to eliminate the synchronization clock and reduce the influence on the EMC.
FIG. 5 shows a circuit configuration of the data transmission I / F according to the embodiment of the present invention.
As shown in FIG. 5, the control unit of the optical writing device includes a writing LD unit 20 having an LD 63 driven by the LD driver 21 and a light emission data processing unit 10 provided in the preceding stage of the writing LD unit 20.
The light emission data processing unit 10 is provided to process data transmitted from a scanner, PC, FAX, or the like into data used for writing control of the exposure unit. This is because the light emission (writing) control synchronization process with respect to the scanning of the light beam scanning device 1 (the operation of the polygon mirror 3) and the speed changing process corresponding to the writing effective scanning rate are required. A processing block is usually provided in front of the LD driver 21. Further, if pixel density conversion, smoothing processing, or the like is necessary, the same processing is performed before the writing LD section. In the circuit of FIG. 5, these are shown as processing block (1) 11 and processing block (2) 12 equipped with a transmission circuit.

In addition, the processing block (2) 12 of the light emission data processing unit 10 and the LD driver 21 of the writing LD unit 20 transmit data between them by means of a data transmission circuit provided in each.
In order to synchronize each clock signal (clock CLK (2) and clock CLK (3)) used for data transmission between the processing block (2) 12 and the LD driver 21, a synchronization signal transmission circuit is provided. This synchronization signal transmission circuit uses a detection signal from a synchronization sensor 61 (see FIG. 3) as a synchronization signal source as a synchronization signal to the light emission data processing unit 10 and the writing LD unit 20 via a transmission medium (cable or the like). The data is transmitted and input to both the clock generator CLK (2) 17 and the clock generator CLK (3) 25.
Therefore, the clock generator CLK (2) 17 and the clock generator CLK (3) 25 that receive the synchronization signal input from the synchronization signal transmission circuit are clock generators having a function of controlling the phase of the clock signal to be generated.

FIG. 6 shows a block diagram (A) of the internal configuration of the clock generator that can be used as the clock CLK (2) and the clock CLK (3), and a timing chart (B) of signals related to the circuit operation.
The clock generators 17 and 25 shown in FIG. 6A include an oscillator 17k such as a crystal oscillator or a ceramic oscillator and an n-ary counter 17c, and an internal clock oscillated by the oscillator 17k is input to the n-ary counter 17c for synchronization. The signal is input to the reset terminal of the n-ary counter 17c. As shown in FIG. 6B, the clock generators 17 and 25 are synchronous signals with an n-ary counter 17c (in the example of FIG. 6B, binary is shown, and CLK is four times the cycle of the internal clock). The phase of the clock CLK output is controlled.
In the above configuration, the clock generator · CLK (2) 17 and the clock generator · CLK (3) 25 are assumed to be the same, and the generated clock frequency is the same. If the generated clock frequency is an integral multiple of the other frequency, only the data transmission density is different, and the problem of data shift does not occur. Therefore, it is possible to implement under such conditions.

The transmission unit of the data transmission circuit of the processing block (2) 12 has an LD driver in synchronism with the falling or rising of the clock supplied from the clock generator CLK (2) 17 having the function of controlling the clock phase. Data is transmitted to 21. At this time, it is not necessary to send only transmission data and send a clock for synchronization as in the prior art. When the LD 63 is composed of a plurality of light emitting elements, data for the light emitting elements is transmitted.
The data transmission circuit on the LD driver 21 side that receives the transmitted data performs a latch operation using the clock generated by the clock generator CLK (3) 25 in order to determine the transmitted data.
In this operation, even if the frequency of the clock CLK (2) and clock CLK (3) on the transmission side and the reception side are the same, but the phases of the clocks are different, a data phase shift occurs. In the form, by transmitting a common synchronization signal to the transmission side and the reception side and controlling the clock phase based on the synchronization signal, the data transmitted in the clock phase of the transmission side is synchronized with the clock phase of the reception side Data can be received with a clock, and there is no data phase shift.
As described above, according to the transmission I / F of the present embodiment, data transmission between the processing block (2) 12 and the LD driver 21 can be realized by transmission of data and a synchronization signal. In FIG. 3, unnecessary radiation that occurs on the transmission path does not occur.

The following embodiment is a data transmission I / F aiming at solving the same problem as in the above embodiment (see FIG. 5), but the synchronization signal transmission circuit can be further simplified. Is intended to do.
In the above embodiment (refer to FIG. 5), in order to synchronize the clock CLK (2) and the clock CLK (3) on the transmission side and the reception side in the data transmission between the processing block (2) 12 and the LD driver 21. A circuit configuration for transmitting the synchronization signal to the clock generators 17 and 25 via a transmission medium (cable or the like) is employed. In this embodiment, instead of this circuit configuration, control data used for light emission control added to image data transmitted between the processing block (2) 12 and the LD driver 21 is used to provide the above-described embodiment. This eliminates the need for a circuit for transmitting a synchronization signal via a transmission medium (such as a cable).
The control data used for the light emission control used here needs to have a predetermined temporal relationship with the transmitted image data. For this purpose, for example, phase control data (data for controlling the pixel dot placement position to be “right-justified”, “left-justified”, “center”) used for smoothing, which has been conventionally added as a light emission control condition for image data, is used. Is possible.
This phase control data is transmitted to the LD driver 21 as an additional bit to the image data in the light emission data generated in the processing block (2) 12 with a certain bit arrangement relationship with the image bit string.
Therefore, the LD driver 21 can obtain a synchronization signal based on the phase control data added to the light emission data, and eliminates the need for a circuit for transmitting the synchronization signal via a transmission medium (cable or the like). It becomes possible to simplify the circuit.

The following embodiment is a data transmission I / F aiming at solving the same problem as in the above-described embodiment (see FIG. 5), but the image data transmission circuit further reduces unnecessary radiation. It is intended to make the configuration possible.
In the above embodiment (see FIG. 5), when transmitting the light emission data between the processing block (2) 12 and the LD driver 21, the number of bits representing the number of gradations of the image (video) signal is determined. It has been shown as an embodiment that a method of transmitting data in parallel is adopted. In the present embodiment, instead of this method, a serial transmission method is adopted, thereby making it possible to reduce unnecessary radiation as compared with the case where the unnecessary radiation is generated by the parallel transmission method.
When adopting the serial transmission system, the transmission processing block (2) 12 has a circuit for converting parallel data sent from the preceding processing block into serial data as a transmission circuit, and via a serial bus. The converted data is transmitted to the LD driver 21 on the receiving side. Accordingly, the LD driver 21 on the receiving side includes a circuit that converts the received serial data into parallel data, and restores the data to make it usable as a drive signal for controlling the light emission of the LD 63. Note that the serial interface itself using the parallel-to-serial conversion circuit and the serial-to-parallel conversion circuit described above is an existing technology, and the present embodiment can be implemented by applying these existing technologies.

The following embodiment is a data transmission I / F aiming at solving the same problem as in each of the above embodiments (see FIG. 5), but the data transmission speed of the image data transmission circuit is reduced. It is intended to use a data transmission circuit capable of further reducing unnecessary radiation without causing it to occur.
In the above embodiment, it is possible to reduce unnecessary radiation generated in the transmission path by eliminating the transmission of the high-frequency clock, but the unnecessary radiation due to the data transmission is smaller than that due to the high-frequency clock, but still exists. However, when a parallel interface is used for transmission of image data, there is a possibility that the size cannot be ignored. When a serial interface is used, if the transmission speed is increased, there is a possibility that it cannot be ignored.
Therefore, in this embodiment, when transmitting light emission data between the processing block (2) 12 and the LD driver 21, the data transmission speed is lowered by adopting an LVDS (Low Voltage Differential Signaling) type interface. This makes it possible to further reduce unnecessary radiation.
The LVDS interface includes an LVDS driver in the transmission circuit of the processing block (2) 12 on the transmission side and an LVDS receiver in the transmission circuit of the LD driver 21 on the reception side.
The LVDS driver converts the TTL / CMOS signal output from the preceding processing block into an LVDS signal. The LVDS receiver restores the LVDS signal to a TTL / CMOS signal and makes it a signal usable by the LD driver 21.
Compared to the TTL / CMOS signal level, the level of the LVDS signal is smaller in each stage, the bus width is narrower, and unnecessary radiation occurring on the transmission path can be reduced without reducing the transmission speed. Note that the LVDS interface itself is an existing technology, and the present embodiment can be implemented by applying the existing LVDS interface.

1 is a diagram illustrating a configuration concept of an image forming apparatus (MFP machine) according to an embodiment of the present invention. . An example of an LD (laser diode) unit that the exposure unit of the image forming apparatus (FIG. 1) has as a light source is shown. 1 shows an example of a light beam scanning device included in an exposure unit of an image forming apparatus (FIG. 1). 1 shows an example of an image forming unit of an image forming apparatus (FIG. 1). 1 shows a circuit configuration of a data transmission I / F according to an embodiment of the present invention. A block diagram (A) of the internal configuration of CLK (2) and CLK (3) in the data transmission I / F of FIG. 5 and a timing chart (B) of signals related to circuit operation are shown. The circuit structure of the conventional data transmission I / F is shown. 9 is a timing chart showing the relationship between data and a data latch clock in a conventional data transmission I / F (FIG. 7).

Explanation of symbols

1 .. Light beam scanning device 3.. Polygon mirror 10... Data processing unit for light emission 11.. Processing block (1) 12... Processing block (2) 15. Clock generator CLK (2), 17 Clock generator with phase control function CLK (2), 17k Oscillator, 17c, n-ary counter, 20 LD LD unit, 21 LD driver, 25 ... Clock generator with phase control function CLK (3), 31 ... Photoconductor, 50 ... ADF (automatic document feeder), 61 ... Sync sensor (synchronization signal source), 63 LD (laser diode), 100. Image forming apparatus (MFP machine), 200 External device (PC), 300 External device (FAX)

Claims (4)

  Light emission source, data processing unit for light emission, driver unit for controlling on / off of lighting source based on data for light emission, data transmission interface for transmitting data processed by data processing unit for light emission to driver unit And an image forming apparatus having an optical writing device comprising a scanning unit that scans light generated by a light source on a writing surface, wherein the data transmission interface includes a synchronization signal transmission circuit that transmits a synchronization signal, and the synchronization signal A clock generator for generating first and second clocks having a function of controlling the phase of the clock signal based on a synchronization signal transmitted from the signal transmission circuit, and in synchronization with the clock generated by the first clock generator A data transmission circuit that transmits data for light emission and a generator that is transmitted in synchronization with the clock generated by the second clock generator. An image forming apparatus comprising the circuit for latching the use data.   2. The image forming apparatus according to claim 1, wherein the synchronization signal transmission circuit is a circuit that uses control data inserted into light emission data transmitted by the data transmission circuit as a synchronization signal. Image forming apparatus.   3. The image forming apparatus according to claim 1, wherein the data transmission circuit is a serial data transmission type circuit.   4. The image forming apparatus according to claim 1, wherein the data transmission circuit is an LVDS (Low Voltage Differential Signaling) circuit.

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