JP2006268595A - Data processing method for information processing apparatus - Google Patents

Abstract

In an information processing apparatus having a function of downloading data, it is not necessary to prepare download data which is a program conforming to each hardware version.
An information processing apparatus includes a ROM, a RAM, a rewritable nonvolatile memory, an external interface, and a processor. In this data processing method, data B for hardware change to be used is stored in the nonvolatile memory 40 by the boot time program BP stored in the ROM 20. Next, the data B for after hardware change is read by the boot program BP, or the data for before hardware change stored in the nonvolatile memory 40 by the main program MP stored in the nonvolatile memory 40 Read A. Thereafter, the read data B after hardware change is selected by the transfer guard means 31 a and stored in the RAM 30.
[Selection] Figure 1

Description

  The present invention relates to a data processing method for storing and transferring data in an information processing device such as a peripheral device having a function of downloading data from a host computer outside a device, a host device such as a server, and a telephone subscriber accommodation device. It is.

  Conventionally, technologies related to information processing devices such as peripheral devices and telephone exchanges that download data from host devices outside the device, such as host computers and servers, and perform predetermined program processing based on the downloaded data include the following: There are some which are described in the literature.

Japanese Patent Laying-Open No. 2004-259224 (FIG. 1)

  In an information processing apparatus having a function of downloading data, when there is a problem with the information processing apparatus and it is necessary to change the hardware configuration, the hardware is generally set such that the data to be downloaded does not need to be changed. A way to make changes is taken. Here, “download data” refers to data required on a certain “main program” such as an operating system (hereinafter referred to as “OS”) or an application program (hereinafter referred to as “main program”). "Subprogram" etc., such as "AP". However, if the “download data” used before the change due to the hardware change does not work properly, the conventional technology described in Patent Document 1 etc. is modified according to the hardware change point. A data processing method for downloading and using the added data is used.

  For example, in FIG. 1 of Patent Document 1 and this explanation (paragraphs 0036 to 0039, 0060, 0062, 0063, etc.), in a peripheral device such as a printer, which is an information processing device capable of communicating with a server or a host computer, When the internal specifications (hardware configuration) are changed for bug correction or performance improvement, the AP that matches the changed peripheral device is downloaded from the server, and the downloaded AP is updated in a timely manner (the latest Technology to be updated).

FIG. 7 is a schematic configuration diagram showing a conventional information processing apparatus as described above.
The information processing apparatus of FIG. 7 is an apparatus installed in a subscriber accommodation apparatus provided between a telephone station having an exchange and a subscriber house having a terminal such as a telephone in a telephone exchange system, for example. .

  The information processing apparatus includes a processor 1 such as a central processing unit (hereinafter referred to as “CPU”) that manages the entire apparatus, and a read-only memory (hereinafter referred to as “boot”) that stores a program that boots when the power is turned on. ROM ”) 2, and a random access memory (hereinafter referred to as“ RAM ”) 3 for storing working data to which the main program MP operates and data A required on the main program MP is transferred. , A rewritable nonvolatile memory 4 for storing the main program MP and the downloaded data A, and an external interface 5 for downloading data from a host device outside the device and accessing the processor 1 and the like. These are connected to each other by a bus 6. The nonvolatile memory 4 has a main program storage area 4a for storing the main program MP and a data storage area 4b for storing data A. The ROM 2, RAM 3, nonvolatile memory 4, and external interface 5 are managed by the processor 1.

  The boot time program BP stored in the ROM 2 is a program for performing a minimum necessary operation. The main program MP stored in the nonvolatile memory 4 is a program for performing a normal operation, and operates on the RAM 3 using the download data A (the main program MP and the download data A are both transferred to the RAM 3). ). Further, the data A is written in the nonvolatile memory 4 by downloading the current hardware data A from the host device outside the device.

FIG. 8 is a flowchart showing a data processing method in the information processing apparatus of FIG.
In the data processing method in the information processing apparatus of FIG. 7, data storage and data transfer are performed by the following steps S1 to S9.

  When the information processing apparatus is powered on (step S1), the processor 1 boots the ROM 2 (step S2) and starts up with the boot program BP (step S3). If the main program MP is not stored in the nonvolatile memory 4 (step S4), the processing by the boot time program BP is continued (step S5-1), and the minimum necessary operation (limited operation). Is started (step S6).

  When the main program MP is stored in the non-volatile memory 4, the main program MP is activated (step S5-2) and tries to access the data A in the data storage area 4b in the non-volatile memory 4. (Step S7). If data A is not stored in the data storage area 4b in the nonvolatile memory 4, the current hardware data (data A modified according to the hardware change location) is downloaded from the host device outside the device. Then (step S8-1), the data storage area 4b is accessed again to confirm the presence or absence of data (step S7). If the current hardware data A is already stored in the data storage area 4b in the nonvolatile memory 4, the main program MP accesses the nonvolatile memory 4 and transfers the data A to the RAM 3 (step S8- 2) Based on the data A, the processor 1 starts a normal operation (step S9).

  In this type of information processing apparatus, if the data A used before the change does not operate normally due to the hardware change, it is necessary to use the data B modified according to the changed part of the hardware. The data B can be used on the main program MP by downloading from a host device outside the device.

  However, since the conventional data processing method of the information processing apparatus requires new download data B for each version of hardware (version, improved version), the user wants to use new hardware but wants to change the download data A. If there is a restriction such that there is no change due to the relationship with the host device, it cannot be solved by the conventional method. If the main program MP can be changed, it is sufficient to use a measure such as embedding new hardware data B in the main program MP. However, the main program MP is also changed due to the relationship with the host device. Under circumstances where it cannot be performed (for example, when the main program MP of this information processing device is changed when viewed from the host device managing the information processing device in FIG. This cannot be handled by the conventional method. Therefore, in such a case, the host device is shown to the host device as if the host device has downloaded the download data A before the hardware change to the information processor and is executing this data A. It is necessary to have a method of operating with data B that has been modified in accordance with the hardware change location.

  Further, as described above, in the prior art, since there is new download data B for each hardware version, the hardware of the information processing apparatus and the download data A, B,. It can also be a cause of misrecognizing the correspondence relationship. For the maintenance manager of the host device, it is ideal that the download data A,... Can be used in common regardless of the hardware version.

  In order to solve the above problems, in the data processing method of the information processing apparatus of the present invention, there is a program memory that stores a boot-time program that is read at startup, and a main program that operates or data that is necessary on the main program. Data memory to be transferred and stored, the main program, data after hardware change used in the main program, and data before hardware change downloaded from outside and used in the main program A rewritable non-volatile memory that stores data, an external interface that exchanges data with the outside, the boot-time program, the main program, the data before hardware change, and the hardware Controller that controls the entire device according to the data after the hardware change When, using the information processing apparatus having a.

  Then, the data after hardware change to be used is stored in the nonvolatile memory or the program memory by the boot time program, and the data after hardware change is read by the boot time program, or The data before hardware change is read out by the main program, and the data after hardware change read out is selected by a selection means and stored in the data memory.

  According to the data processing method in the information processing apparatus of the present invention, the data changed with the hardware change is stored in the nonvolatile memory in the information processing apparatus in advance, and the common data before and after the hardware change is stored in the apparatus. It becomes possible to download from the outside, and it becomes unnecessary to prepare download data externally for each hardware version. Therefore, even if there is a restriction that you want to use new hardware but do not want to change the download data or cannot change it, operate the new hardware without changing the download data that was used before the hardware change. Things are possible.

  In addition, by sharing the download data regardless of the hardware version, it is possible to avoid the situation where maintenance managers such as the host device outside the device misrecognize the correspondence between the hardware and the download data, In addition, reliability in maintenance management is improved.

  An information processing apparatus according to an embodiment of the present invention is an apparatus having a data download function including a program memory, a data memory, a rewritable nonvolatile memory, an external interface, and a control unit. In this data processing method in the information processing apparatus, the data after hardware change to be used is stored in the non-volatile memory or the program memory by the boot time program stored in the program memory. Next, the data for after hardware change is read by the boot time program, or the data for before hardware change stored in the nonvolatile memory is read by the main program stored in the nonvolatile memory. Thereafter, the read data for hardware change is selected by the selection means and stored in the data memory.

(Configuration of Example 1)
FIG. 1 is a schematic configuration diagram of an information processing apparatus showing Embodiment 1 of the present invention.

  This information processing device is a device installed in a subscriber accommodation device or the like of a telephone exchange system, and includes control means (for example, a processor such as a CPU) 10 that manages the entire device, a program that boots when power is turned on, and the like. Data for storing a program memory (for example, ROM) 20 and a main program MP that are stored and data B for current hardware necessary for the main program MP is transferred. A memory (for example, RAM) 30, an interface unit 31 for input / output (hereinafter referred to as “I / O”) of the RAM 30, a main program MP and downloaded data A and B can be rewritten. Data from non-volatile memory 40 such as a flash memory and a higher-level device outside the device. And an external interface 50 for accessing the processor 10 or the like, which are connected to each other by a bus 60. The ROM 20, the RAM 30, the interface unit 31 of the RAM 30, the nonvolatile memory 40, and the external interface 50 are managed by the processor 10.

  In the information processing apparatus according to the first embodiment, as before, data before the hardware change of the information processing apparatus is downloaded from a host device (not shown) outside the apparatus, and the hardware after the change of the information processing apparatus is downloaded. In order to perform an operation corresponding to the above, the following configuration is adopted.

  The ROM 20 stores a boot time program BP for performing the minimum necessary operation as in the prior art, and further, a program BP1 for writing the current hardware data B to the free area 43 of the nonvolatile memory 40, and A program BP2 for transferring the current hardware data B from the nonvolatile memory 40 to the RAM 30 is stored.

  The non-volatile memory 40 has a main program storage area 41 for storing the main program MP and a data storage area 42 for storing pre-hardware data A that matches the hardware before the hardware change, as in the conventional case. Furthermore, it has a free area 43 for storing the current hardware data B that matches the hardware after the change. The main program MP stored in the nonvolatile memory 40 is a program for performing a normal operation, and operates using hardware data A and B stored in the nonvolatile memory 40. The previous hardware data A is written in the data storage area 42 by being downloaded from a host device outside the device.

  The free area 43 of the nonvolatile memory 40 is an area other than the main program storage area 41 and the data storage area 42, and is an area for storing the current hardware data B modified according to the hardware change location. It is. The previous hardware data A stored in the data storage area 42 and the current hardware data B stored in the empty area 43 are transferred to the RAM 30 side. However, the current hardware data B is written by designating the empty area 43 of the non-volatile memory 40 when a write order (command) to the non-volatile memory 40 is received in addition to downloading. The program BP1 "is executed. It is the main program MP that transfers the previous hardware data A stored in the data storage area 42 to the RAM 30, and there is also a program for transferring the current hardware data B stored in the empty area 43 to the RAM 30. Since it is necessary, this program BP2 is stored in the ROM 20.

  Since the previous hardware data A and the current hardware data B are transferred to the RAM 30, it is necessary to identify which data the main program MP uses. Therefore, the interface unit 31 of the RAM 30 is provided with selection means (for example, transfer guard means) 31a, and determines that only data (flag = 1) for which a transfer permission flag is set can be transferred to the RAM 30. The previous hardware data A is transferred to the RAM 30 without setting the transfer permission flag (flag = 0), and the current hardware data B is set with the transfer permission flag (flag = 1). In the interface unit 31 of the RAM 30, the transfer guard means 31a prohibits the transfer of the data A with no transfer permission flag to the RAM 30 and the transfer of only the data B with the transfer permission flag to the RAM 30. The main program MP starts to operate using data B corresponding to the current hardware. The transfer guard unit 31a includes, for example, a flag detection unit that detects a transfer permission flag that is sent and a switching unit that selects and outputs the data B to the RAM 30 only when the detection result is “1”. ing.

(Data processing method of Example 1)
FIG. 2 is a flowchart showing a data processing method in the information processing apparatus of FIG.

  In the data processing method in the information processing apparatus of FIG. 1, data storage and data transfer are performed by the following steps S10 to S21.

  When the information processing apparatus is powered on (step S10), the processor 10 boots the ROM 20 (step S11) and starts up with the boot time program BP in the ROM 20 (step S12). In the free space 43 in the nonvolatile memory 40, the current hardware data B is stored in advance, and a transfer permission flag from the nonvolatile memory 40 to the RAM 30 is set by the boot time program BP (flag = 1). Since data B is transferred (step S13), transfer to the RAM 30 is permitted by the transfer guard means 31a in the interface unit 31 (step S14) and stored in the RAM 30.

  If the main program MP is not stored in the main program area 41 of the nonvolatile memory 40 (step S15), the processing by the boot time program BP is continued (step S16-1), and the minimum necessary operation is performed. (Limited operation) is started (step S17). When the main program MP is stored in the nonvolatile memory 40 (step S15), the main program MP is activated (step S16-2), and the data A in the data storage area 42 of the nonvolatile memory 40 is displayed. (Step S18). If the data A is not stored in the data storage area 42 of the nonvolatile memory 40, the previous hardware data A is downloaded from the host device outside the apparatus (step S19-1), and the data storage area 42 is accessed again. Then, the presence or absence of data A is confirmed (step S18).

  If the previous hardware data A has already been stored in the data storage area 42 of the nonvolatile memory 40, the main program MP does not set a transfer permission flag from the nonvolatile memory 40 to the RAM 30 (flag = 0). Since data A is transferred (step S19-2), transfer to the RAM 30 is prohibited by the transfer guard means 31a (step S20). As a result, the current hardware data B already stored in the RAM 30 is not overwritten. Finally, the main program MP starts normal operation by the processor 10 using the current hardware data B stored in the RAM 30 (S21).

  Here, the transfer guard means 31 a provided in the interface unit 31 of the RAM 30 will be described.

  One bit is added to the data transferred to the RAM 30 as a transfer permission flag. If the flag bit = 1, transfer to the RAM 30 is permitted, and if the flag bit = 0, transfer is prohibited. The following two methods (1) and (2) are conceivable as the flag bit adding method.

  (1) A method in which 1 bit is added to data B in advance with flag bit = 1 and written to the nonvolatile memory 40

  (2) Method of storing data B in the nonvolatile memory 40 without adding a flag bit and adding 1 bit as flag bit = 1 at the time of transfer to the RAM 30

  However, since the data A is transferred to the RAM 30 by the main program MP, 1 bit cannot be added with the flag bit = 0 at the time of transfer as shown in (2). Therefore, as shown in (1), when data A is downloaded, a flag bit is set to 0 and 1 bit is added and stored in the non-volatile memory 40, or a flag bit is not added and identification is performed based on the presence or absence of a flag bit Take.

(Effect of Example 1)
The first embodiment has the following effects (a) and (b).

  (A) According to the first embodiment, the data B changed with the hardware change is stored in the nonvolatile memory 40 in the information processing apparatus in advance, and the common data A before and after the hardware change is stored in the apparatus. It becomes possible to download from an external host device, and it becomes unnecessary to prepare download data on the host device side for each hardware version. Therefore, even if there is a restriction that you want to use new hardware but do not want to change the download data or cannot change it, operate the new hardware without changing the download data A used before the hardware change. It becomes possible to make it.

  (B) By sharing the download data A regardless of the hardware version, it is possible to avoid a situation in which the maintenance manager on the upper device side outside the device erroneously recognizes the correspondence between the hardware and the download data A. In addition, the reliability in maintenance management is improved.

(Configuration of Example 2)
FIG. 3 is a schematic configuration diagram of an information processing apparatus according to the second embodiment of the present invention. Elements common to those in FIG. 1 illustrating the first embodiment are denoted by common reference numerals.

  In the first embodiment, the transfer guard means 31a is provided in the I / O interface unit 31 of the RAM 30, and the data to be used is selected by identifying the transfer permission flag. On the other hand, in the second embodiment, instead of the identification by the transfer permission flag, the data transfer destination is identified by changing the address space of the RAM 30A recognized by the processor 10 before and after the hardware change. Yes.

  Therefore, in the information processing apparatus according to the second embodiment, a new RAM 30A having an address for storing the current hardware data B is used instead of the RAM 30 and the interface unit 31 having the transfer guard unit 31a according to the first embodiment. Furthermore, in place of the program BP2 stored in the ROM 20 of the first embodiment, the “program BP20 for transferring data B from the nonvolatile memory 40 to the RAM 30A having a predetermined address” is stored in the ROM 20A. That is, the address space serving as the RAM area is changed on the address space recognized by the processor 10.

  In the first embodiment, the transfer destination address designated by the “program BP2 for transferring“ current hardware data B ”to the RAM 30 (this is included in the boot time program BP)” stored in the ROM 20 is the main address. The program MP may be the same as the transfer destination address when transferring the previous hardware data A to the RAM 30. For example, if the transfer destination address designated by the main program MP is 1000H, for example, the transfer destination address designated by the program BP2 may be 1000H.

  On the other hand, in the second embodiment, the transfer destination address specified by the program BP20 at the time of booting needs to be a free area in an address space other than 1000H, for example, 5000H. That is, in the address space recognized by the processor 10, the RAM address is set to 1000H before the hardware change and 5000H after the hardware change. As a result, when the main program MP transfers the previous hardware data A to the RAM 30A, it tries to transfer it to 1000H. However, after the hardware change, the address of the RAM 30A is 5000H. It will not be done. Further, since the program BP20 at the time of booting transfers the current hardware data B to the RAM 30A, it is transferred to the address 5000H, so it can be transferred to the RAM 30A because it is an actual address. Accordingly, since the data B corresponding to the current hardware is transferred to the RAM 30A, the main program MP running on the RAM 30A starts operating using it.

  Other configurations of the information processing apparatus in the second embodiment are the same as those in the first embodiment.

(Data processing method of Example 2)
FIG. 4 is a flowchart showing a data processing method in the information processing apparatus of FIG.

  In the data processing method in the information processing apparatus of FIG. 3, data storage and data transfer are performed by the following steps S30 to S41.

  When the information processing apparatus is powered on (step S30), the processor 10 boots the ROM 20A (step S31) and starts up with the boot time program BP in the ROM 20A (step S32). The current hardware data B is stored in the empty area 43 of the nonvolatile memory 40 in advance, and the data B is transferred from the nonvolatile memory 40 to the RAM 30A as the transfer destination address = 5000H by the program BP20 at the time of booting ( In step S33), the data B is stored in the RAM 30A because it matches the address space of the RAM area recognized by the processor 10 (step S34).

  If the main program MP is not stored in the nonvolatile memory 40 (step S35), the processing by the boot time program BP is continued (step S36-1), and the necessary minimum operation (limited operation) is performed. Start (step S37).

  When the main program MP is stored in the nonvolatile memory 40 (step S35), the main program MP is activated (step S36-2), and the data stored in the data storage area 42 of the nonvolatile memory 40 is stored. An attempt is made to access A (step S38). If the data A is not stored in the data storage area 42 of the nonvolatile memory 40, the previous hardware data A is downloaded from the host device outside the apparatus (step S39-1), and the data storage area 42 is accessed again. Then, the presence or absence of data A is confirmed (step S38).

  When the previous hardware data A is already stored in the data storage area 42 of the nonvolatile memory 40, the data A is transferred from the nonvolatile memory 40 to the RAM 30A by the main program MP with the transfer destination address = 1000H. (Step S39-2) Since the address space of the RAM area recognized by the processor 10 does not match, the transfer destination is unknown and the transfer is stopped (Step S40). Therefore, the current hardware data B already stored in the RAM 30A is not overwritten. Finally, the main program MP starts normal operation using the current hardware data B stored in the RAM 30A (step S41).

(Effect of Example 2)
According to the second embodiment, similar to the first embodiment, the download data A can be shared regardless of the hardware version of the information processing apparatus. Even if there is a restriction that A does not want to be changed or cannot be changed, new hardware can be operated without changing the download data A used before the hardware change. Further, a situation in which the maintenance manager misrecognizes the correspondence between the hardware and the download data A is avoided, and the reliability in maintenance management is additionally improved. In particular, in the second embodiment, since the above control is performed by the program BP20 or the like instead of the transfer guard means 31a of the first embodiment, the amount of hardware can be reduced.

(Configuration of Example 3)
FIG. 5 is a schematic configuration diagram of an information processing apparatus showing Embodiment 3 of the present invention. Elements common to those in FIGS. 1 and 3 showing Embodiments 1 and 2 are denoted by common reference numerals. ing.

  In the first embodiment, the transfer guard unit 31a is provided in the I / O interface unit 31 of the RAM 30, and the data to be used is identified by the transfer permission flag. In the second embodiment, the data transfer destination is identified by changing the address space of the RAM 30A recognized by the processor 10 before and after the hardware change.

  On the other hand, in the third embodiment, a main program storage area for storing the main program MP instead of the transfer guard means 31a for permitting / prohibiting data transfer in the I / O interface unit 31 of the RAM 30 of the first embodiment. 41 and a non-volatile memory 40B having a data storage area 42B for storing the current hardware data B, the I / O interface unit 44 is provided with a selection means (for example, write guard means) 44a for data writing. At this time, the version is identified, whether writing to the nonvolatile memory 40B is permitted / prohibited is determined, writing of the previous hardware data A is prohibited based on the determination result, and writing of the current hardware data B is permitted. I am doing so. The write guard unit 44a includes, for example, a determination unit that determines permission / prohibition of writing, and a switching unit that selects the current hardware data B based on the determination result and outputs it to the nonvolatile memory 40B. . When the interface unit 44 prohibits writing to the pre-download hardware data A sent from the host device outside the device, the interface unit 44 appears to be operating normally to the host device. Return the downloaded answer to the host device.

  Data B is not downloaded from a higher-level device outside the device, but is written in advance in the data storage area 42B in the nonvolatile memory 40B. However, in order to realize the writing of the current hardware data B, in the first embodiment, the “program BP1 to be written to the nonvolatile memory 40 when the writing order to the nonvolatile memory 40 comes” In the third embodiment, the program BP10 in which the write destination is changed to the data storage area 42B (= data download area) is replaced with the ROM 20B. In the boot time program BP. Thus, when data is transferred to the RAM 30, the transfer source area is the data storage area 42B of the nonvolatile memory 40B, and can be transferred to the RAM 30 by the main program MP. Therefore, the “program BP2 for transferring the current hardware data B to the RAM 30” stored in the ROM 20 as in the first embodiment becomes unnecessary, and instead of the write program BP1 in the first embodiment, the transfer destination Different write programs BP10 may be provided in the boot time program BP. As described above, the data B corresponding to the current hardware is transferred to the RAM 30, and the main program MP running on the RAM 30 starts to operate using it.

(Data processing method of Example 3)
FIG. 6 is a flowchart showing a data processing method in the information processing apparatus of FIG.

  In the data processing method in the information processing apparatus of FIG. 5, data storage and data transfer are performed by the following steps S50 to S60.

  When the information processing apparatus is powered on (step S50), the processor 10 boots the ROM 20B (step S51) and starts up with the boot time program BP (step S52). The current hardware data B is written and stored in advance in the data storage area 42B of the nonvolatile memory 40B. If the main program MP is not stored in the nonvolatile memory 40B (step S53), the processing by the boot time program BP is continued (step S54-1), and the necessary minimum operation (limited operation) is performed. Start (step S55). When the main program MP is stored in the nonvolatile memory 40B (step S53), the main program MP is activated (step S54-2), and the data stored in the data storage area 42B of the nonvolatile memory 40B. Access to B is attempted (step S56).

  When data B is not stored in the data storage area 42B of the nonvolatile memory 40B, the previous hardware data A is downloaded from the host device outside the device (step S57-1). Since the write guard means 44a prohibits writing to the nonvolatile memory 40B (step S59-1), the already written data B for the current hardware is not overwritten. . When the interface unit 44 prohibits writing to the pre-download hardware data A sent from the host device outside the device, the interface unit 44 appears to be operating normally to the host device. Return the downloaded answer to the host device. After executing the download, the data storage area 42B is accessed again to confirm the presence or absence of the data B (step S56). If the current hardware data B is already stored in the data storage area 42B of the nonvolatile memory 40B, the main program MP accesses the nonvolatile memory 40B and transfers the data B to the RAM 30 (step S57-2). Then, normal operation is started (step S60).

  Here, the write guard means 44a provided in the interface unit 44 of the nonvolatile memory 40B will be described.

  When writing data to the nonvolatile memory 40B, the version information of the data is identified. The following two methods (1) and (2) are conceivable.

  (1) A method for identifying whether or not data is permitted to be written to the nonvolatile memory 40B by using the header information or the like when there is header information or the like indicating the version in the data structure.

  (2) A method of identifying whether or not the data file name is data that permits writing to the nonvolatile memory 40B when there is information indicating the version, etc.

(Effect of Example 3)
According to the third embodiment, similar to the first and second embodiments, it is possible to share the download data A regardless of the hardware version. Even if there is a restriction that the change is not desired or cannot be changed, it is possible to operate new hardware without changing the download data A used before the hardware change. Further, a situation in which the maintenance manager misrecognizes the correspondence between the hardware and the download data A is avoided, and the reliability in maintenance management is additionally improved. In particular, in the third embodiment, in the nonvolatile memory 40B, the data storage area 42B is the same before and after the hardware change, so that the capacity of the nonvolatile memory 40B can be reduced as compared with the first and second embodiments.

  This invention is not limited to the said Examples 1-3, A various deformation | transformation is possible. As a fourth embodiment which is this modification, for example, there are the following (A) to (D).

  (A) In each of the first to third embodiments, the information processing apparatus is managed by the processor 10, but a configuration in which operation is managed by another digital signal processor (DSP) or the like may be used.

  (B) In each of the first to third embodiments, the current hardware data B has been described as being stored in advance in the nonvolatile memories 40 and 40B. However, the current hardware data B is stored in the boot ROMs 20, 20A and 20B. The configuration may be such that the program is transferred to the RAM 30 or 30A by the boot program BP.

   (C) In each of the first to third embodiments, the data storage method and the transfer method have been described as data used on the main program MP or a subprogram operating on the main program MP. Can be expanded as a method of storing and transferring the main program MP itself. That is, even if the main program MPB for the current hardware is stored in advance in the nonvolatile memory 40B (or the boot ROM 20B) and the main program MPA for the previous hardware is downloaded, the write guard means 44a Since writing to the nonvolatile memory 40B is prohibited, the operation can be started by the main program MPB for the current hardware.

   (D) According to the present invention, the download data A can be shared regardless of the hardware version. Finally, the user wants to use new hardware but does not want to change the download data A. There are regulations that cannot be changed, etc., but sometimes it is necessary to change the download data due to hardware changes, or sometimes to change the download data by modifying the download data, etc. (D1) (D3) demonstrates.

   (D1) In the first embodiment, by downloading data to be changed from the outside of the apparatus to the free area 43 of the nonvolatile memory 40, the data is transferred to the RAM 30 with the transfer permission flag = 1, so that it operates with the downloaded data. Thus, the above case can be dealt with.

   (D2) In Example 2, by downloading data to be changed from the outside of the apparatus to the empty area 43 of the nonvolatile memory 40, the data is transferred from the nonvolatile memory 40 to the RAM 30A, and operates with the downloaded data. The above case can also be handled.

   (D3) In the third embodiment, the version of data to be downloaded is added to the write permission setting of the write guard means 44a provided in the interface unit 44 of the nonvolatile memory 40B, or the version of data to be prohibited from being downloaded is set. Set it. Next, by downloading data to be changed from the outside of the apparatus to the data storage area 42B of the nonvolatile memory 40B, writing to the nonvolatile memory 40B is permitted by the write guard means 44a and then transferred to the RAM 30. The above data can be handled and the above case can be handled.

   Further, as described above, when the storage method and transfer method of the main program MP itself are expanded in the third embodiment, the following two configurations (D-1) and (D-2) are used as described above. Can also handle cases.

   (D-1) Configuration in which main program MPB for current hardware is previously stored in nonvolatile memory 40B

   The main program version to be downloaded or the main program version to be prohibited from downloading is set in the write permission setting of the write guard means 44a provided in the interface unit 44 of the nonvolatile memory 40B.

  (D-2) Configuration in which main program MPB for current hardware is stored in boot ROM 20B in advance

  The version of the main program to be downloaded is added to the write permission setting of the write guard means 44a provided in the interface unit 44 of the nonvolatile memory 40B, or the version of the main program to be prohibited from being downloaded is set, and the nonvolatile memory is set. When there is a write in 40B, the main program written in the nonvolatile memory 40B is operated instead of the main program in the ROM 20B.

  As described above, according to the fourth embodiment, even when it is desired to change the download data in accordance with the hardware change in the above case, or sometimes it is necessary to correct the malfunction of the hardware by changing the download data. Operation can be guaranteed.

  The information processing apparatus of the present invention can be used in various devices such as peripheral devices and telephone subscriber accommodation devices.

BRIEF DESCRIPTION OF THE DRAWINGS It is a schematic block diagram of the information processing apparatus which shows Example 1 of this invention. It is a flowchart which shows the data processing method in the information processing apparatus of FIG. It is a schematic block diagram of the information processing apparatus which shows Example 2 of this invention. It is a flowchart which shows the data processing method in the information processing apparatus of FIG. It is a schematic block diagram of the information processing apparatus which shows Example 3 of this invention. It is a flowchart which shows the data processing method in the information processing apparatus of FIG. It is a schematic block diagram of the conventional information processing apparatus. It is a flowchart which shows the data processing method in the information processing apparatus of FIG.

Explanation of symbols

10 Processor 20, 20A, 20B ROM
30,30A RAM
31a Transfer guard means 40, 40B Non-volatile memory 44a Write guard means 50 External interface 60 Bus

Claims (5)

A program memory for storing a boot-time program to be read at startup;
A data memory in which a main program operates or data required for the main program is transferred and stored;
A rewritable nonvolatile memory that stores the main program, data for hardware change used in the main program, and data for hardware change downloaded from outside and used in the main program Sex memory,
An external interface for exchanging data with the outside;
Control means for controlling the entire apparatus according to the boot time program, the main program, the data before hardware change, and the data after hardware change;
A data processing method for an information processing apparatus comprising:
According to the boot time program, the data for changing the hardware to be used is stored in the nonvolatile memory or the program memory,
Read the data after the hardware change by the boot program, or read the data before the hardware change by the main program,
A data processing method of an information processing apparatus, wherein the read data after hardware change is selected by a selection means and stored in the data memory.   As the selection means, a transfer guard means is provided in the input / output interface section of the data memory, and the read data after hardware change is selected and stored in the data memory by the transfer guard means. The data processing method of the information processing apparatus according to claim 1.   As the selection means, an address space changing means is provided in the control means, and the data after the hardware change read out by the address space changing means is stored in the address space of the data memory. The data processing method of the information processing apparatus according to claim 1. A program memory for storing a boot-time program to be read at startup;
A data memory in which a main program operates or data required for the main program is transferred and stored;
A rewritable non-volatile memory for storing the main program and data for hardware change used in the main program;
An external interface for exchanging data with the outside;
Control means for controlling the entire apparatus according to the boot time program, the main program, and the data for after the hardware change,
A data processing method for an information processing apparatus comprising:
The write guard means provided in the input / output interface unit of the non-volatile memory writes the data before hardware change downloaded from the outside via the external interface to the non-volatile memory. Prohibit, send a pseudo download completion response signal to the outside,
The boot-time program causes the write guard means to select the data for after the hardware change that the user wants to use, and stores the data in the nonvolatile memory.
A data processing method for an information processing apparatus, wherein the main program reads out the data after hardware change and stores the data in the data memory.   The data for hardware change is downloaded from the outside via the external interface and stored in a storage area in the nonvolatile memory that can be transferred to the data memory. The data processing method of the information processing apparatus of any one of 1-4.

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