JP2006201735A - Plasma display panel driving apparatus and plasma display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a PDP driving device that reduces the breakdown voltage of a separation switch element or reduces the number of separation switch elements, thereby achieving both reduction in power consumption and improvement in size.
An initialization pulse generator (2A) uses a sum of voltages (Vt + V1 + V2) of a positive voltage source (Et) and two constant voltage sources (E1, E2) as an upper limit of the initialization pulse voltage to generate a high-side ramp waveform. Applying from the generator (QR1) to the high-side scan switch element (SC1) and using the ground potential as the lower limit of the initialization pulse voltage, the low-side ramp waveform generator (QR2) to the low-side scan switch element (SC2) Apply. The sustaining pulse generator (3A) applies the upper and lower limits of the sustaining voltage pulse to the low-side scan switch element (Q2Y) through the common sustaining pulse transmission path (J1-SC2).
[Selection] Figure 2

Description

  The present invention relates to a driving device for a plasma display panel (PDP).

  A plasma display is a display device that utilizes a light emission phenomenon associated with gas discharge. A display portion of a plasma display, that is, a plasma display panel (PDP) is more advantageous than other display devices in terms of a large screen, thinning, and a wide viewing angle. PDPs are roughly classified into a DC type that operates with a DC pulse and an AC type that operates with an AC pulse. The AC type PDP has a particularly high brightness and a simple structure. Therefore, the AC type PDP is suitable for mass production and pixel definition and is widely used.

The AC type PDP has, for example, a three-electrode surface discharge type structure (see, for example, Patent Document 1). In this structure, address electrodes are arranged in the vertical direction of the panel on the rear substrate of the PDP, and sustain electrodes and scanning electrodes are alternately arranged in the horizontal direction of the panel on the front substrate of the PDP. In general, the address electrode and the scan electrode can individually change the potential one by one.
Discharge cells are installed at intersections between pairs of adjacent sustain electrodes and scan electrodes and address electrodes. On the surface of the discharge cell, a layer made of a dielectric (dielectric layer), a layer for protecting the electrode and the dielectric layer (protective layer), and a layer containing a phosphor (fluorescent layer) are provided. Gas is sealed inside the discharge cell. When a discharge occurs in the discharge cell by applying a pulse voltage between the sustain electrode, the scan electrode, and the address electrode, the gas molecules are ionized and emit ultraviolet rays. The ultraviolet rays excite the phosphor on the surface of the discharge cell to generate fluorescence. Thus, the discharge cell emits light.

  In general, the PDP driving apparatus controls the potentials of the sustain electrode, the scan electrode, and the address electrode of the PDP in accordance with an ADS (Address Display-period Separation) method. The ADS method is a kind of subfield method. In the subfield method, one field of an image is divided into a plurality of subfields. The subfield includes an initialization period, an address period, and a discharge sustain period. Particularly in the ADS system, the above three periods are set in common for all the discharge cells of the PDP (see, for example, Patent Document 1).

In the initialization period, an initialization pulse voltage is applied between the sustain electrode and the scan electrode. Thereby, wall charges are made uniform in all the discharge cells.
In the address period, a scan pulse voltage is sequentially applied to the scan electrodes, and a signal pulse voltage is applied to some of the address electrodes. The address electrode to which the signal pulse voltage is to be applied is selected based on the video signal input from the outside. When a scan pulse voltage is applied to one of the scan electrodes and a signal pulse voltage is applied to one of the address electrodes, a discharge is generated in the discharge cell located at the intersection between the scan electrode and the address electrode. The discharge accumulates wall charges on the surface of the discharge cell.
In the sustain period, the sustain sustain voltage is applied simultaneously and periodically to all pairs of sustain electrodes and scan electrodes. At that time, in the discharge cell in which the wall charges are accumulated during the address period, the gas discharge is maintained and light emission occurs. Since the length of the discharge sustaining period is different for each subfield, the light emission time per field of the discharge cell, that is, the luminance of the discharge cell is adjusted by selecting the subfield to emit light.

FIG. 24 is a diagram illustrating an equivalent circuit of the scan electrode driving unit 110, the sustain electrode driving unit 120, and the PDP 20 of the conventional PDP driving device (see, for example, Patent Document 2). Here, the equivalent circuit of the PDP 20 is represented only by the stray capacitance Cp (hereinafter referred to as the panel capacitance of the PDP 20) between the sustain electrode X and the scan electrode Y, and the path of the current flowing through the PDP 20 during discharge in the discharge cell is omitted. Is done.
In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 25). In FIG. 25, the ON periods of the switching elements Q1, Q2, QS, QR1, QR2, SA1, SA2, SC1, SC2, Q1X, and Q2X shown in FIG. 24 are indicated by hatching.

  During the initialization period, in scan electrode driver 110, scan pulse generator 111 maintains low-side scan switch element SC2 in the ON state. The initialization pulse generator 112 applies an initialization pulse voltage to the scan electrode Y through the low side scan switch element SC2. At the same time, in the sustain electrode driver 120, the second sustaining pulse generator 123 applies the initialization pulse voltage to the sustain electrode X. As a result, the potential of scan electrode Y and sustain electrode X changes. On the other hand, the address electrode A is maintained at the ground potential (≈0).

The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage.
<Mode I>
In scan electrode driver 110, first low-side sustain switch element Q2, separation switch element QS, low-side auxiliary switch element SA2, and low-side scan switch element SC2 are maintained in the ON state. In sustain electrode driver 120, second low-side sustain switch element Q2X is maintained in the ON state. The remaining switch elements are kept off. Thereby, both the scan electrode Y and the sustain electrode X are maintained at the ground potential.

<Mode II>
In scan electrode driver 110, first low-side sustain switch element Q2 is turned off, and first high-side sustain switch element Q1 is turned on. As a result, the potential of the scan electrode Y rises to the potential Vs of the external power supply Es.
In sustain electrode driver 120, the on / off states of all the switch elements are maintained as they are. Thereby, sustain electrode X is maintained at the ground potential.

<Mode III>
In scan electrode driver 110, separation switch element QS is turned off, and high-side ramp waveform generator QR1 is turned on. As a result, the potential of the scan electrode Y rises from the potential Vs of the external power supply Es to the upper limit Vr of the initialization pulse voltage at a constant speed.
In sustain electrode driver 120, the on / off states of all the switch elements are maintained as they are. Thereby, sustain electrode X is maintained at the ground potential.
In this way, the voltage applied to all the discharge cells of the PDP 20 increases uniformly to the upper limit Vr of the initialization pulse voltage. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20.

In order to make the wall charges uniform in all the discharge cells of the PDP 20 during the initialization period, the upper limit Vr of the initialization pulse voltage must be sufficiently high. Accordingly, the upper limit Vr of the initialization pulse voltage is generally set higher than the potential Vs of the external power supply Es.
In mode III, the potential exceeds the potential Vs of the external power supply Es in the path from the separation switch element QS through the low-side scan switch element SC2 to the connection point J of the series connection 1S of the two scan switch elements SC1 and SC2 (see FIG. 24). ). On the other hand, the separation switch element QS is turned off, and the current from the low-side scan switch element SC2 to the output terminal (the connection point between the two sustain switch elements Q1 and Q2) J1 of the first discharge sustain pulse generator 113 is cut off. The As a result, the initialization pulse voltage reliably rises to the upper limit Vr without being clamped by the potential Vs of the external power supply Es by the body diode of the first high-side sustain switching element Q1.

<Mode IV>
In scan electrode driver 110, high-side ramp waveform generator QR1 is turned off, and separation switch element QS is turned on. As a result, the potential of the scan electrode Y drops to the potential Vs of the external power supply Es.
In sustain electrode driver 120, the on / off states of all the switch elements are maintained as they are. Thereby, sustain electrode X is maintained at the ground potential.

<Mode V>
In the scan electrode driving unit 110, the on / off states of all the switch elements are maintained as they are. Thereby, the scan electrode Y is maintained at the potential Vs of the external power supply Es.
In sustain electrode driver 120, second low-side sustain switch element Q2X is turned off and second high-side sustain switch element Q1X is turned on. As a result, the potential of the sustain electrode X rises to the potential Vs of the external power supply Es.

<Mode VI>
In scan electrode driver 110, first high-side sustain switch element Q1 is turned off, and low-side ramp waveform generator QR2 is turned on. As a result, the potential of the scan electrode Y drops to the ground potential at a constant speed.
In sustain electrode driver 120, the on / off states of all the switch elements are maintained as they are. Thereby, sustain electrode X is maintained at potential Vs of external power supply Es.
Accordingly, a voltage having a polarity opposite to that applied in modes II to V is applied to the discharge cell of PDP 20. Thereby, wall charges are uniformly removed and uniformed in all the discharge cells.

During the address period, in the sustain electrode driver 120, the second high-side sustain switch element Q1X is maintained in the ON state. The remaining switch elements are kept off. Thereby, sustain electrode X is maintained at potential Vs of external power supply Es.
In scan electrode driver 110, first low-side sustain switch element Q2, separation switch element QS, and high-side auxiliary switch element SA1 are maintained in the ON state. Accordingly, one end of the series connection 1S of the scan switch elements SC1 and SC2 is maintained at a potential Vp = V1 (hereinafter referred to as an upper limit of the scan pulse voltage) which is higher than the ground potential by the voltage V1 of the first constant voltage source E1. Is maintained at ground potential.

At the start of the address period, for all scan electrodes Y, the high side scan switch element SC1 is maintained in the on state and the low side scan switch element SC2 is maintained in the off state. As a result, the potentials of all the scan electrodes Y are uniformly maintained at the upper limit Vp of the scan pulse voltage.
Subsequently, the scan electrode driver 110 changes the potential of the scan electrode Y as follows (see the scan pulse voltage SP shown in FIG. 25). When one of the scan electrodes Y is selected, the high side scan switch element SC1 connected to the scan electrode Y is turned off and the low side scan switch element SC2 is turned on. As a result, the potential of the scan electrode Y drops to the ground potential. When the scan electrode Y is maintained at the ground potential for a predetermined time, the low-side scan switch element SC2 connected to the scan electrode Y is turned off and the high-side scan switch element SC1 is turned on. As a result, the potential of the scan electrode Y rises to the upper limit Vp of the scan pulse voltage. Scan electrode driver 110 sequentially performs the same switching operation as described above for series connection 1S of scan switch elements SC1 and SC2 connected to each scan electrode. Thus, the scan pulse voltage SP is sequentially applied to each scan electrode.

During the address period, one of the address electrodes A is selected based on the video signal input from the outside, and the potential of the selected address electrode A rises to the upper limit Va of the signal pulse voltage for a predetermined time.
For example, as shown in FIG. 25, when the scan pulse voltage SP is applied to one of the scan electrodes Y and the signal pulse voltage Va is applied to one of the address electrodes A, the scan electrode Y and the address electrode A Is higher than the voltage between the other electrodes. Accordingly, discharge occurs in the discharge cell located at the intersection between the scan electrode Y and the address electrode A. Due to the discharge, new wall charges are accumulated on the surface of the discharge cell.

During the discharge sustain period, in scan electrode driver 110, scan pulse generator 111 maintains low-side scan switch element SC2 in the on state, and initialization pulse generator 112 maintains separation switch element QS in the on state. The first sustaining pulse generator 113 turns on the two sustain switching elements Q1 and Q2 alternately. As a result, the potential of the scan electrode Y is switched between the potential Vs of the external power supply Es and the ground potential. That is, the sustaining voltage pulse is applied to the scan electrode Y through the separation switch element QS and the low side scan switch element SC2.
At the same time, in the sustain electrode driver 120, the second sustaining pulse generator 123 turns on the two sustain switch elements Q1X and Q2X alternately. As a result, the potential of the scan electrode Y is switched between the potential Vs of the external power supply Es and the ground potential. That is, the sustaining voltage pulse is applied to the sustaining electrode X.
Since the two sustaining pulse generators 113 and 123 operate in opposite phases, the sustaining voltage pulse is alternately applied to the scan electrode Y and the sustain electrode X (see FIG. 25). Thereby, an AC voltage is generated between the scan electrode Y and the sustain electrode X in each discharge cell of the PDP 20. At that time, since discharge is maintained in the discharge cell in which wall charges are accumulated during the address period, light emission occurs.

  Each of the two power recovery units 114 and 124 includes an inductor and a recovery capacitor (not shown). In the first power recovery unit 114, when the potential of the scan electrode Y rises and falls, the inductor resonates with the panel capacitance Cp of the PDP 20, and the power is efficiently exchanged between the recovery capacitor and the panel capacitance Cp. Similarly, in the second power recovery unit 124, when the potential of the sustain electrode X rises and falls, the inductor resonates with the panel capacitance Cp, and the power is efficiently exchanged between the recovery capacitor and the panel capacitance Cp. Thus, the reactive power due to charging / discharging of the panel capacitance is reduced when the sustaining voltage pulse is applied.

In order to reduce the power consumption of the PDP, it is desirable to reduce the voltage applied to each of the sustain electrode, the scan electrode, and the address electrode. For example, when the lower limit of the initialization pulse voltage and the scan pulse voltage is set lower than the ground potential, the voltage applied to the sustain electrode can be reduced during the initialization period and the address period. Thereby, the power consumption of the PDP is reduced without changing the voltage applied to the discharge cells of the PDP.
For the purpose of setting the lower limit of the initialization pulse voltage lower than the ground potential, for example, as shown in FIG. 26, the low-side ramp waveform generator QR2 is replaced with a ground conductor, and an external negative voltage source En (voltage: −Vn <0) may be connected (for example, see Patent Document 3). Thereby, in mode VI in the initialization period, unlike FIG. 25, the lower limit −Vn of the initialization pulse voltage is lower than the ground potential.

  In such a PDP driving device, the scan electrode driving unit 110 includes another separation switch element QS1 (see FIG. 26). During the ON period of the low-side ramp waveform generator QR2 (see mode VI shown in FIG. 25), the path from the separation switch element QS1 to the connection point J between the two scan switch elements SC1 and SC2 through the low-side scan switch element SC2 The potential is lower than the ground potential. However, the separation switch element QS1 is turned off, and the current from the output terminal J1 of the first discharge sustain pulse generator 113 to the low-side scan switch element SC2 is cut off. Thereby, the initialization pulse voltage is surely lowered to the negative lower limit −Vn without being clamped at the ground potential by the body diode of the first low-side sustain switching element Q2.

JP 2004-13168 Japanese Patent Laid-Open No. 2003-15600 JP 2000-293135 A

In the conventional PDP driving device as described above, both the initialization pulse generating unit and the sustaining pulse generating unit raise and lower the potential of the scan electrode through the same scan switch element (for example, the low side scan switch element SC2).
Therefore, in order to prevent the initialization pulse voltage from being clamped at the upper limit or lower limit of the sustaining voltage pulse, the sustaining pulse generator is separated from the scan switch element (for example, the low-side scan switch element SC2) during the initialization period. There must be.

In the conventional PDP driving device, the separation switch element is installed between the discharge sustain pulse generator and the scan switch element.
In the example shown in FIG. 24, the separation switch element QS is inserted between the output terminal J1 of the first sustaining pulse generation unit 113 and the low-side scan switch element SC2, and goes from the low-side scan switch element SC2 to the output terminal J1. Cut off current.
In the example shown in FIG. 26, another separation switch element QS1 is inserted between the output terminal J1 of the first sustaining pulse generator 113 and the low-side scan switch element SC2, and the current is in the opposite direction. Cut off current. That is, the pair of separation switch elements QS and QS1 form a bidirectional switch.

In the discharge sustain period, the separation switch element is turned on, and the discharge sustain pulse generator is connected to the scan switch element.
In the initialization period, the separation switch element is turned off, and the sustaining pulse generator is separated from the scan switch element.
Thus, the initialization pulse voltage rises to a predetermined upper limit and falls to a predetermined lower limit without being clamped by either the upper limit or the lower limit of the discharge sustaining pulse voltage.

  In the separation switch element, during the discharge sustain period, a current (current due to gas discharge in the discharge cell and current due to charging / discharging of the panel capacitance) accompanying the application of the sustain pulse voltage to the PDP flows. Since this amount of current is generally larger than the current accompanying application of other pulse voltages, it is important to reduce conduction loss in the separation switch element in order to reduce power consumption in the PDP driving device. In particular, the on-resistance of the separation switch element must be set sufficiently low. Therefore, the number or size of the separation switch elements is large. As a result, it has been difficult to achieve both reduction in power consumption and improvement in downsizing.

  In the example shown in FIG. 26, the lower limit of the initialization pulse voltage is set lower than the ground potential, that is, the lower limit of the discharge sustaining pulse voltage. At that time, in order to prevent the initialization pulse voltage from being clamped at the lower limit of the sustaining voltage pulse, a bidirectional switch has to be formed by the separation switch element. In this case, since the number of separation switch elements is further increased, it has been difficult to reduce the conduction loss and improve the miniaturization.

  Further, in the example shown in FIG. 26, the potential fluctuates within a range equal to the amplitude of the initialization pulse voltage at one end of the serial connection 1S of the separation switch elements QS and QS1, and the potential is equal to the amplitude of the sustaining pulse voltage at the other end. Fluctuates in range. Therefore, the isolation switch element is required to have a high breakdown voltage equal to or higher than the difference between the upper limit of the initialization pulse voltage and the lower limit of the sustaining pulse voltage. Therefore, it is difficult to lower the on-resistance of the separation switch element. As a result, it has been more difficult to reduce the conduction loss and improve the size reduction in the separation switch element.

  An object of the present invention is to provide a PDP driving device that reduces the withstand voltage of the separation switch element or reduces the number of separation switch elements, thereby achieving both reduction of power consumption and improvement of miniaturization.

The PDP driving device according to the present invention is mounted on a plasma display. The plasma display includes the following PDP. The PDP is
A discharge cell that emits light by discharge of the gas enclosed therein, and
A sustain electrode and a scan electrode for applying an initialization pulse voltage, a scan pulse voltage, and a sustain discharge pulse voltage to the discharge cell are provided.

The PDP driving device according to the present invention is:
Two switch elements connected in series, including a high-side scan switch element and a low-side scan switch element whose connection point is connected to the scan electrode of the PDP,
A scan pulse generator for applying a scan pulse voltage to the scan electrodes by alternately turning on the high-side scan switch element and the low-side scan switch element at a predetermined timing;
A sustaining pulse generator for applying a sustaining pulse voltage to the scan electrode by turning on either the high-side scan switch element or the low-side scan switch element; and
A circuit that alternately turns on the high-side scan switch element and the low-side scan switch element at a predetermined timing and applies an initialization pulse voltage to the scan electrode.
An initialization pulse generator that raises the initialization pulse voltage to an upper limit during the on-period of the high-side scan switch element and lowers it to a lower limit during the on-period of the low-side scan switch element;
Have

The initialization pulse generator is preferably
A high-side ramp waveform generator that raises the applied voltage to the high-side scan switch element at a predetermined speed;
A low-side ramp waveform generator that lowers the applied voltage to the low-side scan switch element at a predetermined speed;
Have

Hereinafter, a path through which the sustaining voltage pulse is transmitted between either the high-side scanning switch element or the low-side scanning switch element and the sustaining pulse generator is referred to as a sustaining pulse transmission path. Further, a path through which the initialization pulse voltage is transmitted between the initialization pulse generator and the high side scan switch element during the period when the initialization pulse voltage rises to the upper limit is called a high side initialization pulse transmission path. A path through which the initialization pulse voltage is transmitted between the initialization pulse generator and the low side scan switch element during the period when the initialization pulse voltage drops to the lower limit is referred to as a low side initialization pulse transmission path. As is clear from these definitions, the sustaining pulse transmission path shares an end with at least one of the high-side initialization pulse transmission path and the low-side initialization pulse transmission path, that is, is directly connected.
In the PDP driving device according to the present invention, unlike the conventional PDP driving device, the high side initialization pulse transmission path and the low side initialization pulse transmission path are separated. Therefore, in each initialization pulse transmission path, the potential fluctuation range is smaller than the difference between the upper and lower limits of the initialization pulse voltage. Therefore, the potential fluctuation range in the sustaining pulse transmission path is smaller than the fluctuation range in the conventional PDP driving device. As a result, the breakdown voltage of the separation switch element is reduced or the number thereof is reduced.
In the above PDP driving device according to the present invention, in particular, there can be the following four patterns for the sustaining pulse transmission path.

In the first pattern, the upper and lower limits of the discharge sustain pulse voltage pass through the common discharge sustain pulse transmission path connecting the discharge sustain pulse generator and the low-side scan switch element to the scan pulse generator. Applied. Preferably,
A high-side sustain switch element connected to an external power source and applied with a voltage equal to the upper limit of the discharge sustain pulse voltage;
A low-side sustain switching element connected to an external power source or a ground conductor and applied with a voltage equal to the lower limit of the sustaining voltage pulse;
Including a sustaining pulse generator;
The high-side sustain switch element and the low-side sustain switch element are connected in series, and the connection point is connected to the low-side scan switch element through the discharge sustain pulse transmission path.
In this case, the sustaining pulse transmission path may not be directly connected to the high side initialization pulse transmission path. Therefore, the potential of the sustaining pulse transmission path is maintained within a range sufficiently lower than the upper limit of the initialization pulse voltage.

  The sustaining pulse transmission path may be completely separated from the high side initialization pulse transmission path during the initialization period. At this time, since the upper limit of the potential of the sustaining pulse transmission path is equal to the upper limit of the sustaining voltage pulse, there is substantially no current flowing into the sustaining pulse generating section through the sustaining pulse transmission path. Therefore, a separation switch element (hereinafter referred to as a second separation switch element) for interrupting the current need not be installed. That is, the number of separation switch elements is reduced.

A constant voltage source that includes a positive electrode connected to the high-side scan switch element and a negative electrode connected to the low-side scan switch element, and maintains a constant voltage between the positive electrode and the negative electrode;
May be included in the PDP driving device according to the present invention. In particular, the constant voltage source maintains a constant voltage between the sustaining pulse transmission path and the high-side initialization pulse transmission path.
When the difference between the upper limit of the initialization pulse voltage and the voltage of the constant voltage source is lower than the upper limit of the sustaining voltage pulse, the upper limit of the potential of the sustaining pulse transmission path is equal to the upper limit of the sustaining voltage pulse. Therefore, the second separation switch element may not be installed. That is, the number of separation switch elements is reduced.

When the difference between the upper limit of the initialization pulse voltage and the voltage of the constant voltage source is higher than the upper limit of the sustaining voltage pulse, the second separation switch element is installed. During the period when the initialization pulse voltage exceeds the sum of the voltage of the constant voltage source and the upper limit of the discharge sustain pulse voltage, the second separation switch element generates the discharge sustain pulse from the negative electrode of the constant voltage source through the discharge sustain pulse transmission path. Cut off the current going to the section. In the sustaining pulse transmission path, the upper limit of the potential is lower than the upper limit of the initialization pulse voltage by the voltage of the constant voltage source. Therefore, the breakdown voltage of the second separation switch element is sufficiently lower than that of the conventional separation switch element.
The second isolation switch element is preferably a wide bandgap semiconductor switch element. The wide band gap semiconductor includes, for example, silicon carbide (SiC), diamond, gallium nitride (GaN), or zinc oxide (ZnO).
The wide bandgap semiconductor switch element has a smaller increase in on-resistance as the breakdown voltage increases than the conventional silicon semiconductor switch element. That is, the wide band gap semiconductor switch element has a high breakdown voltage and a low on-resistance. Therefore, using a wide band gap semiconductor switch element as a separation switch element is extremely effective in reducing conduction loss and improving size reduction.

In the first pattern, the sustaining pulse transmission path is directly connected to the low-side initialization pulse transmission path.
If the lower limit of the initialization pulse voltage is equal to the lower limit of the sustaining voltage pulse, there is substantially no current flowing from the sustaining pulse generator to the sustaining pulse transmission path during the initialization period. Therefore, a separation switch element (hereinafter referred to as a first separation switch element) for interrupting the current need not be installed. That is, the number of separation switch elements is reduced.
When the lower limit of the initialization pulse voltage is lower than the lower limit of the sustaining pulse voltage, the first separation switch element is installed. The first isolation switch element is preferably a wide bandgap semiconductor switch element. During the period in which the initialization pulse voltage is lower than the lower limit of the sustaining voltage pulse, the first separation switch element cuts off the current from the sustaining pulse generator to the low side scan switching element through the sustaining pulse transmission path. Thereby, the initialization pulse voltage is surely lowered to a predetermined lower limit without being clamped at the lower limit of the sustaining voltage pulse.

Preferably,
A constant voltage source including a negative electrode connected to the low-side scanning switch element, and maintaining a constant voltage between the positive electrode and the negative electrode;
A high-side auxiliary switch element that connects the positive electrode of the constant voltage source to the high-side scan switch element;
A low-side auxiliary switch element that connects both ends of the series connection of the high-side scan switch element and the low-side scan switch element; and
Auxiliary switch drive unit that alternately turns on and off the high-side auxiliary switch element and the low-side auxiliary switch element,
Are further included in the scan pulse generator.

In the address period, the auxiliary switch driving unit maintains the high-side auxiliary switch element in the on state and maintains the low-side auxiliary switch element in the off state. Thereby, in the serial connection of the two scanning switch elements, the high-side terminal potential is maintained higher than the low-side terminal potential by the voltage of the constant voltage source. In this state, when the two scan switch elements are alternately turned on and off, the potential of the scan electrode changes by the voltage of the constant voltage source. Thus, a scan pulse voltage is applied to the scan electrode.
In the discharge maintaining period, the auxiliary switch driving unit maintains the high-side auxiliary switch element in the off state and maintains the low-side auxiliary switch element in the on state. Thereby, the series connection of the two scanning switch elements is short-circuited through the low-side auxiliary switch element. In this state, the same discharge sustaining pulse voltage is simultaneously applied to the two scan switch elements, so that no overvoltage occurs in any of the scan switch elements.

In the above PDP driving device according to the present invention, the upper limit of the initialization pulse voltage is applied to the scan electrode through the high side scan switch element, and the lower limit is applied to the scan electrode through the low side scan switch element. Therefore, when installing two auxiliary switch elements, the low-side auxiliary switch element must be maintained in the off state during the initialization period. Further, in the first pattern, when the initialization pulse voltage is raised to the upper limit, clamping by a constant voltage source must be avoided. Therefore, at least during the period in which the initialization pulse voltage is increased to the upper limit, the high-side auxiliary switch element must also be maintained in the off state.
Preferably, when the initialization pulse generator raises the initialization pulse voltage to an upper limit, the high-side auxiliary switch element is prevented from being turned on by the auxiliary switch driver.
More preferably,
A high-side ramp waveform generator for increasing the applied voltage to the high-side scan switch element at a predetermined speed; and
An initialization switch drive unit that turns on and off the high-side ramp waveform generation unit, and suppresses turning on of the high-side auxiliary switch element by the auxiliary switch drive unit, particularly when turning on.
Has an initialization pulse generator.
Thus, when the auxiliary switch elements are installed in the above PDP driving apparatus according to the present invention, the two auxiliary switch elements can be driven by the same auxiliary switch driving unit, so that the number of parts can be reduced and the size can be kept small.

In the second pattern, the upper and lower limits of the sustaining voltage pulse pass through the common sustaining pulse transmission path connecting the sustaining pulse generator and the high-side scan switch element to the scanning pulse generator. Applied. Preferably,
A high-side sustain switch element connected to an external power source and applied with a voltage equal to the upper limit of the discharge sustain pulse voltage;
A low-side sustain switching element connected to an external power source or a ground conductor and applied with a voltage equal to the lower limit of the sustaining voltage pulse;
Including a sustaining pulse generator;
The high side sustain switch element and the low side sustain switch element are connected in series, and the connection point is connected to the high side scan switch element through the discharge sustain pulse transmission path.
In this case, the sustaining pulse transmission path may not be directly connected to the low-side initialization pulse transmission path. Therefore, the potential of the sustaining pulse transmission path is maintained within a range sufficiently higher than the lower limit of the initialization pulse voltage.

  Since the sustaining pulse transmission path is directly connected to the high-side initialization pulse transmitting path, the potential of the sustaining pulse transmission path can exceed the upper limit of the sustaining voltage pulse. Therefore, a second separation switch element is preferably installed. During the period in which the initialization pulse voltage exceeds the upper limit of the sustaining voltage pulse, the second separation switching element cuts off the current from the high-side scan switching element through the sustaining pulse transmission path to the sustaining pulse generating unit. Thereby, the initialization pulse voltage rises to a predetermined upper limit without being clamped at the upper limit of the discharge sustaining pulse voltage.

  The sustaining pulse transmission path may be completely separated from the low-side initialization pulse transmission path during the initialization period. At this time, since the lower limit of the potential of the sustaining pulse transmission path is equal to the lower limit of the sustaining voltage pulse, there is substantially no current flowing out from the sustaining pulse generation section to the sustaining pulse transmission path. Therefore, the first separation switch element for interrupting the current need not be installed. That is, the number of separation switch elements is reduced.

When the lower limit of the initialization pulse voltage is lower than the lower limit of the sustaining pulse voltage,
Including a positive electrode connected to the high-side scan switch element and a negative electrode connected to the low-side scan switch element, even if the voltage between the positive electrode and the negative electrode is low, the lower limit of the sustaining voltage pulse and the initialization pulse voltage A constant voltage source, which is kept equal to the difference between the lower limit,
May be included in the PDP driving device according to the present invention.
In particular, the constant voltage source maintains the potential of the sustaining pulse transmission path higher than the potential of the low-side initialization pulse transmission path by the above voltage. Thereby, the sum of the lower limit of the initialization pulse voltage and the voltage of the constant voltage source is equal to or higher than the lower limit of the discharge sustaining pulse voltage. Therefore, the lower limit of the potential of the sustaining pulse transmission path is maintained equal to the lower limit of the sustaining voltage pulse. Therefore, the first separation switch element need not be installed. That is, the number of separation switch elements is reduced.

In the third pattern,
An upper limit of the sustaining voltage pulse is applied to the scan pulse generating unit through a high side sustaining pulse transmission path connecting between the sustaining pulse generating unit and the high side scan switching element;
The lower limit of the sustaining voltage pulse is applied to the scan pulse generating unit through the low side sustaining pulse transmission path connecting the sustaining pulse generating unit and the low side scan switching element.
Preferably, the discharge sustain pulse generator includes a high side sustain switch element and a low side sustain switch element as follows.
The high side sustain switch element is connected between the external power supply and the high side scan switch element, and is applied with a voltage equal to the upper limit of the discharge sustain pulse voltage. Accordingly, during the ON period of the high side sustain switch element, a voltage equal to the upper limit of the discharge sustain pulse voltage is applied to the high side scan switch element.
The low side sustain switch element is connected between the external power supply or ground conductor and the low side scan switch element, and is applied with a voltage equal to the lower limit of the discharge sustain pulse voltage. Accordingly, during the ON period of the low side sustain switch element, a voltage equal to the lower limit of the discharge sustain pulse voltage is applied to the low side scan switch element.

In the third pattern, the high-side sustaining pulse transmission path can be completely separated from the low-side sustaining pulse transmission path. Accordingly, the high-side sustaining pulse transmission path may not be directly connected to the low-side initialization pulse transmission path. Similarly, the low-side sustaining pulse transmission path may not be directly connected to the high-side initialization pulse transmission path.
Other,
A constant voltage source that includes a positive electrode connected to the high-side scan switch element and a negative electrode connected to the low-side scan switch element, and maintains a constant voltage between the positive electrode and the negative electrode;
May be included in the PDP driving device according to the present invention. In particular, the constant voltage source maintains the potential of the high-side sustaining pulse transmission path by a certain value higher than the potential of the low-side sustaining pulse transmission path.
Accordingly, the potential of the high-side sustaining pulse transmission path is maintained within a range sufficiently higher than the lower limit of the initialization pulse voltage, and the potential of the low-side sustaining pulse transmission path is within a range sufficiently lower than the upper limit of the initialization pulse voltage. Maintained.

Since the high-side sustaining pulse transmission path is directly connected to the high-side initialization pulse transmitting path, the potential of the high-side sustaining pulse transmission path can exceed the upper limit of the sustaining voltage pulse during the initialization period. Therefore, a second separation switch element is preferably installed. In a period in which the initialization pulse voltage exceeds the upper limit of the sustaining voltage pulse, the second separation switch element cuts off the current from the high-side scan switching element through the high-side sustaining pulse transmission path to the sustaining pulse generator. . Thereby, the initialization pulse voltage rises to a predetermined upper limit without being clamped at the upper limit of the discharge sustaining pulse voltage.
In the high side sustaining pulse transmission path, the potential fluctuation range is limited to the range from the upper limit of the sustaining voltage pulse to the upper limit of the initialization pulse voltage. Therefore, the breakdown voltage of the second separation switch element is sufficiently lower than that of the conventional separation switch element.

The low-side sustaining pulse transmission path is directly connected to the low-side initialization pulse transmission path.
When the lower limit of the initializing pulse voltage is low but equal to the lower limit of the sustaining voltage pulse, there is substantially no current flowing out from the sustaining pulse generator to the low-side sustaining pulse transmission path during the initializing period. Therefore, the first separation switch element for cutting off the current may not be installed. That is, the number of separation switch elements is reduced.
When the lower limit of the initialization pulse voltage is lower than the lower limit of the sustaining pulse voltage, the first separation switch element is installed. During the period in which the initialization pulse voltage is lower than the lower limit of the sustaining voltage pulse, the first separation switch element cuts off the current from the sustaining pulse generator to the low side scan switching element through the low side sustaining pulse transmission path. Thereby, the initialization pulse voltage is surely lowered to a predetermined lower limit without being clamped at the lower limit of the sustaining voltage pulse.
In the low-side sustaining pulse transmission path, the potential fluctuation range is limited to the range from the lower limit of the initialization pulse voltage to the lower limit of the sustaining voltage pulse. Accordingly, the breakdown voltage of the first separation switch element is sufficiently lower than that of the conventional separation switch element.

In the fourth pattern,
An upper limit of the sustaining voltage pulse is applied to the scan pulse generator through the sustain sustaining pulse transmission line connecting the sustaining pulse generator and the low-side scan switch element;
The lower limit of the sustaining voltage pulse is applied to the scanning pulse generator through the low-side sustaining pulse transmission path that connects between the sustaining pulse generator and the high-side scan switch element.
Preferably, the discharge sustain pulse generator includes a high side sustain switch element and a low side sustain switch element as follows.
The high side sustain switch element is connected between the external power source and the low side scan switch element, and is applied with a voltage equal to the upper limit of the discharge sustain pulse voltage. Accordingly, during the ON period of the high side sustain switch element, a voltage equal to the upper limit of the discharge sustain pulse voltage is applied to the low side scan switch element.
The low side sustain switch element is connected between the external power supply or ground conductor and the high side scan switch element, and is applied with a voltage equal to the lower limit of the discharge sustain pulse voltage. Accordingly, during the ON period of the low side sustain switch element, a voltage equal to the lower limit of the discharge sustain pulse voltage is applied to the high side scan switch element.

In the fourth pattern, similarly to the third pattern, the high-side sustaining pulse transmission path can be completely separated from the low-side sustaining pulse transmitting path. Accordingly, the high-side sustaining pulse transmission path may not be directly connected to the low-side initialization pulse transmission path. Similarly, the low-side sustaining pulse transmission path may not be directly connected to the high-side initialization pulse transmission path.
Other,
A constant voltage source that includes a positive electrode connected to the high-side scan switch element and a negative electrode connected to the low-side scan switch element, and maintains a constant voltage between the positive electrode and the negative electrode;
May be included in the PDP driving device according to the present invention. In particular, the constant voltage source maintains the potential of the low-side sustaining pulse transmission path by a certain value higher than the potential of the high-side sustaining pulse transmission path.
Therefore, the potential of the low-side sustaining pulse transmission path is maintained within a range sufficiently higher than the lower limit of the initialization pulse voltage, and the potential of the high-side sustaining pulse transmission path is within a range sufficiently lower than the upper limit of the initialization pulse voltage. Maintained.

When the lower limit of the initializing pulse voltage is lower than the lower limit of the sustaining voltage pulse, preferably, even if the constant voltage source lowers the voltage between the positive electrode and the negative electrode, the lower limit of the sustaining voltage pulse and the lower limit of the initializing pulse voltage Keep equal to the difference between. Accordingly, the lower limit of the potential is equal to the lower limit of the sustaining voltage pulse in the low-side sustaining pulse transmission path.
When the potential of the low-side sustaining pulse transmission path is maintained above the lower limit of the sustaining voltage pulse, there is substantially no current flowing from the sustaining pulse generator to the low-side sustaining pulse transmission path during the initialization period. Therefore, the first separation switch element for cutting off the current may not be installed. That is, the number of separation switch elements is reduced.

When the difference between the upper limit of the initializing pulse voltage and the voltage of the constant voltage source is lower than the upper limit of the sustaining voltage pulse, the potential of the high-side sustaining pulse transmission path is maintained within the upper limit of the sustaining voltage pulse. The Therefore, the second separation switch element may not be installed. That is, the number of separation switch elements is reduced.
When the difference between the upper limit of the initialization pulse voltage and the voltage of the constant voltage source is higher than the upper limit of the sustaining voltage pulse, the second separation switch element is installed. During the period when the initialization pulse voltage exceeds the sum of the voltage of the constant voltage source and the upper limit of the sustaining voltage pulse, the second separation switch element maintains the discharge from the negative electrode of the constant voltage source through the high side sustaining pulse transmission path. Cut off the current going to the pulse generator. In the high-side sustaining pulse transmission path, the upper limit of the potential is lower than the upper limit of the initialization pulse voltage by the voltage of the constant voltage source. Therefore, the breakdown voltage of the second separation switch element is sufficiently lower than that of the conventional separation switch element.

In the PDP driving device according to the present invention, as described above, the breakdown voltage of the separation switch element is reduced, or the number of separation switch elements is reduced. In the separation switch element, since a decrease in breakdown voltage leads to a decrease in on-resistance, both reduction of conduction loss and further miniaturization are easy. Further, the reduction of the separation switch element itself is effective for both the reduction of power consumption and the miniaturization of the entire PDP driving device. Thus, the PDP driving device according to the present invention is easier to improve power saving and size reduction than the conventional device.
Furthermore, the smaller the number of separation switch elements, the lower the parasitic inductance due to the circuit elements and wiring on the sustaining pulse transmission path. Therefore, the voltage applied to the PDP has little ringing, so the PDP driving device according to the present invention is advantageous for further improving the image quality of the plasma display.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, exemplary embodiments of the invention will be described with reference to the drawings.
Embodiment 1
The plasma display according to the first embodiment of the present invention includes a PDP driving device 10, a PDP 20, and a control unit 30 (see FIG. 1).
The PDP 20 is, for example, an AC type, and has a three-electrode surface discharge type structure. Address electrodes A1, A2, A3,... Are arranged on the back substrate of the PDP 20 in the vertical direction of the panel. On the front substrate of PDP 20, sustain electrodes X1, X2, X3,... And scan electrodes Y1, Y2, Y3,... Are alternately arranged in the horizontal direction of the panel. The sustain electrodes X1, X2, X3,... Are connected to each other and have substantially the same potential. The address electrodes A1, A2, A3,... And the scan electrodes Y1, Y2, Y3,.

  Discharge cells are installed at intersections between adjacent pairs of sustain electrodes and scan electrodes (for example, sustain electrode X2 and scan electrode Y2) and address electrodes (for example, address electrode A2) (for example, shown in FIG. 1). (See the shaded area P). On the surface of the discharge cell, a layer made of a dielectric (dielectric layer), a layer for protecting the electrode and the dielectric layer (protective layer), and a layer containing a phosphor (fluorescent layer) are provided. Gas is sealed inside the discharge cell. When a predetermined pulse voltage is applied between the sustain electrode, the scan electrode, and the address electrode, discharge occurs in the discharge cell. At that time, gas molecules in the discharge cell are ionized and emit ultraviolet rays. The ultraviolet rays excite the phosphor on the surface of the discharge cell to generate fluorescence. Thus, the discharge cell emits light.

The PDP driver 10 includes a scan electrode driver 11, a sustain electrode driver 12, and an address electrode driver 13 (see FIG. 1).
Input terminals of scan electrode driving unit 11 and sustain electrode driving unit 12 are connected to power supply unit Es. The power supply unit Es first converts an AC voltage from an external commercial AC power supply (not shown) into a constant DC voltage (for example, 400 V). The power supply unit Es further converts the DC voltage into a predetermined DC voltage Vs (for example, 155 V). The DC voltage Vs is applied to the PDP driving device 10.
The output terminals of the scan electrode drive unit 11 are individually connected to the scan electrodes Y1, Y2, Y3,. The scan electrode driver 11 individually changes the potentials of the scan electrodes Y1, Y2, Y3,.
The output terminal of the sustain electrode driver 12 is connected to the sustain electrodes X1, X2, X3,. The sustain electrode driver 12 changes the potentials of the sustain electrodes X1, X2, X3,.
The address electrode driver 13 is individually connected to each of the address electrodes A1, A2, A3,. The address electrode driver 13 generates a signal pulse voltage based on an external video signal, and selects some of the address electrodes A1, A2, A3,. The signal pulse voltage is applied to the selected address electrode.

  The PDP driving device 10 controls the potential of each electrode of the PDP 20 in accordance with an ADS (Address Display-period Separation) method. The ADS method is a kind of subfield method. For example, in Japanese television broadcasting, images are sent one field at a time in 1/60 second (= about 16.7 msec) intervals. That is, the display time per field is constant. In the subfield method, each field is divided into a plurality of subfields. Further, in the ADS system, the following three periods (initialization period, address period, and discharge sustain period) are commonly set for all the discharge cells of the PDP 20 for each subfield. In particular, the length of the discharge sustain period varies from subfield to subfield. Different pulse voltages are applied to the discharge cells in the initialization period, the address period, and the discharge sustain period as follows.

In the initialization period, the initialization pulse voltage is applied to the sustain electrodes X1, X2, X3,... And the scan electrodes Y1, Y2, Y3,. Thereby, wall charges are made uniform in all the discharge cells.
In the address period, the scan electrode driver 11 sequentially applies a scan pulse voltage to each of the scan electrodes Y1, Y2, Y3,. At the same time, the address electrode driver 13 applies a signal pulse voltage to some of the preselected address electrodes A1, A2, A3,. When a scan pulse voltage is applied to one of the scan electrodes and a signal pulse voltage is applied to one of the address electrodes, a gas discharge occurs in the discharge cell located at the intersection between the scan electrode and the address electrode. . Due to the discharge, new wall charges are accumulated on the surface of the discharge cell.
In the discharge sustain period, the scan electrode drive unit 11 and the sustain electrode drive unit 12 alternately generate the sustain pulse voltage for the scan electrodes Y1, Y2, Y3,... And the sustain electrodes X1, X2, X3,. Apply. At this time, in the discharge cell in which wall charges are accumulated during the address period, gas discharge and wall charge accumulation are repeated, so that the light emission of the phosphor is maintained.
Since the length of the discharge sustaining period is different for each subfield, the light emission time per field of the discharge cell, that is, the luminance of the discharge cell is adjusted by selecting the subfield to emit light.

  Scan electrode driving unit 11, sustain electrode driving unit 12, and address electrode driving unit 13 each include a switching inverter. The control unit 30 performs switching control for these drive units. Thereby, an initialization pulse voltage, a scan pulse voltage, a signal pulse voltage, and a discharge sustaining pulse voltage are generated with a predetermined waveform and timing, respectively. In particular, the control unit 30 selects an address electrode to which a signal pulse voltage is applied based on an external video signal. The controller 30 further determines the length of the discharge sustain period after the application of the signal pulse voltage, that is, the subfield to which the signal pulse voltage is to be applied. As a result, each discharge cell emits light with appropriate luminance. In this way, the video corresponding to the video signal is reproduced on the PDP 20.

FIG. 2 is an equivalent circuit diagram of the scan electrode driver 11, the sustain electrode driver 12, and the PDP 20.
Scan electrode driver 11 includes a scan pulse generator 1A, an initialization pulse generator 2A, and a first sustaining pulse generator 3A.
Sustain electrode driver 12 includes a second sustaining pulse generator 3X.
The equivalent circuit of the PDP 20 is represented only by the panel capacitance Cp, and the path of the current flowing through the PDP 20 during discharge in the discharge cells is omitted.

The scan pulse generator 1A includes a first constant voltage source E1, a first bypass switch element QB1, a high side scan switch element SC1, a low side scan switch element SC2, a high side auxiliary switch element SA1, and a low side auxiliary switch element SA2. Including.
The first constant voltage source E1 maintains the positive electrode potential higher than the negative electrode potential by a constant voltage V1 based on the output voltage Vs of the power supply unit Es, for example, by a DC-DC converter (not shown).
The first bypass switch element QB1, the two scan switch elements SC1, SC2, and the two auxiliary switch elements SA1, SA2 are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used.

MOSFETs have polarity because they include body diodes in parallel. In a MOSFET, generally, an anode of a body diode is connected in parallel with a source, and a cathode is connected in parallel with a drain.
On the other hand, both IGBT and bipolar transistor are different from MOSFET and do not include a body diode. However, in the IGBT and the bipolar transistor, the emitter corresponds to the source of the MOSFET and the collector corresponds to the drain of the MOSFET in terms of the function as a switching element.
Hereinafter, the two terminals of the switch element are referred to as an anode and a cathode.
When the switch element is a MOSFET, the anode corresponds to the source and the cathode corresponds to the drain.
When the switch element is an IGBT or a bipolar transistor, the anode corresponds to the emitter and the cathode corresponds to the collector.

The positive electrode of the first constant voltage source E1 is connected to the anode of the first bypass switch element QB1. The cathode of the first bypass switch element QB1 is connected to the cathode of the high side auxiliary switch element SA1. The anode of the high side auxiliary switch element SA1 is connected to the cathode of the high side scan switch element SC1 and the cathode of the low side auxiliary switch element SA2.
The anode of the high side scan switch element SC1 is connected to the cathode of the low side scan switch element SC2. A connecting point J between them is connected to one of the scanning electrodes Y of the PDP 20. Here, the series connection 1S of the high-side scan switch element SC1 and the low-side scan switch element SC2 is actually provided in the same number as the plurality of scan electrodes Y1, Y2,... (See FIG. 1). One is connected to each of ...
Both the anode of the low-side scanning switch element SC2 and the anode of the low-side auxiliary switch element SA2 are connected to the negative electrode of the first constant voltage source E1.

The two auxiliary switch elements SA1, SA2 are preferably turned on and off alternately like the two scan switch elements SC1, SC2.
The installation of the two auxiliary switch elements SA1 and SA2 is intended to prevent overvoltage with respect to the two scan switch elements SC1 and SC2. Thereby, malfunction of the two scanning switch elements SC1 and SC2 is avoided. When there is little risk of malfunction, the auxiliary switch elements SA1 and SA2 need not be installed. In that case, the cathode of the high-side scan switch element SC1 is directly connected to the cathode of the first bypass switch element QB1, and the anode of the low-side scan switch element SC2 is connected through the first constant voltage source E1.
Further, the high-side auxiliary switch element SA1 may be connected between the negative electrode of the first constant voltage source E1 and the anode of the low-side scan switch element SC2, separately from the position shown in FIG. In this case, the cathode of the first bypass switch element QB1 is directly connected to the cathode of the high side scan switch element SC1.

The initialization pulse generator 2A includes a positive voltage source Et, a second constant voltage source E2, an initialization switch unit Q5, a high side ramp waveform generator QR1, and a low side ramp waveform generator QR2.
The positive voltage source Et maintains the output terminal at a constant positive potential Vt based on the output voltage Vs of the power supply unit Es by, for example, a DC-DC converter (not shown). In particular, the voltage Vt of the positive voltage source Et is lower than the output voltage Vs of the power supply unit Es by the voltage of the first constant voltage source E1: Vt = Vs−V1.
The second constant voltage source E2 maintains the positive electrode potential higher than the negative electrode potential by a constant voltage V2 based on the output voltage Vs of the power supply unit Es, for example, by a DC-DC converter (not shown). In particular, a potential Vr = Vs + V2 that is higher than the potential Vs of the power supply unit Es by the voltage V2 of the second constant voltage source E2 is set as the upper limit of the initialization pulse voltage.

The initialization switch unit Q5 is a bidirectional switch and includes, for example, a series connection of two switch elements. The two switch elements are preferably MOSFETs. In addition, it may be an IGBT or a bipolar transistor in which diodes are connected in parallel. The anodes or the cathodes of the two switch elements are connected to each other, and these switch elements are turned on and off in synchronization with each other.
The initialization switch unit Q5 may be a parallel connection of two IGBTs or bipolar transistors. In that case, one collector of the two transistors is connected to the other emitter.

Ramp waveform generators QR1 and QR2 preferably include N-channel MOSFETs (NMOS). The gate and drain of the NMOS are connected by an element including a capacitor. When the ramp waveform generators QR1 and QR2 are turned on, the voltage between both ends changes to zero at a substantially constant speed.
In addition, the ramp waveform generators QR1 and QR2 may be configured by a discharge circuit. The discharge circuit includes a capacitor and a resistor, and the time constant corresponds to the decay time of the voltage across the ramp waveform generators QR1 and QR2.

The positive voltage source Et is connected to the cathode of the low-side ramp waveform generator QR2 through the initialization switch unit Q5. The anode of the low side ramp waveform generator QR2 is grounded.
The cathode of the low side ramp waveform generator QR2 is further connected to the negative electrode of the first constant voltage source E1. The positive electrode of the first constant voltage source E1 is connected to the negative electrode of the second constant voltage source E2. The positive electrode of the second constant voltage source E2 is connected to the cathode of the high side ramp waveform generator QR1. The anode of the high side ramp waveform generator QR1 is connected to the cathode of the high side auxiliary switch element SA1.

The first discharge sustain pulse generator 3A includes a first high-side sustain switch element Q1, a first low-side sustain switch element Q2, and a first power recovery unit 4.
The two sustain switch elements Q1, Q2 are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used. More preferably, it is a wide band gap semiconductor switch element.

The cathode of the first high-side sustain switch element Q1 is connected to the power supply unit Es. The anode of the first high side sustain switch element Q1 is connected to the cathode of the first low side sustain switch element Q2. The anode of the first low-side sustain switch element Q2 is grounded.
The connection point J1 between the first high-side sustain switch element Q1 and the first low-side sustain switch element Q2 is the output terminal of the first discharge sustain pulse generator 3A, and is directly connected to the anode of the low-side scan switch element SC2 To do.
In the scan electrode driving unit 11 according to Embodiment 1 of the present invention, unlike the conventional apparatus, the path from the output terminal J1 of the first discharge sustaining pulse generating unit 3A to the anode of the low-side scan switching element SC2 (hereinafter referred to as the sustaining pulse) A separation switch element for interrupting the current flowing through the transmission path) is not installed.

The first power recovery unit 4 includes a first recovery capacitor C, a first high-side recovery switch element Q3, a first low-side recovery switch element Q4, a first high-side diode D1, a first low-side diode D2, And a first inductor L (see FIGS. 2 and 3A).
The capacity of the first recovery capacitor C is sufficiently larger than the panel capacity Cp of the PDP 20. The voltage across the first recovery capacitor C is maintained substantially equal to the half value Vs / 2 of the output voltage Vs of the power supply unit Es.
The two recovery switch elements Q3 and Q4 are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used. More preferably, it is a wide band gap semiconductor switch element.

One end of the first recovery capacitor C is grounded, and the other end is connected to the cathode of the first high-side recovery switch element Q3 and the anode of the first low-side recovery switch element Q4. The anode of the first high side recovery switch element Q3 is connected to the anode of the first high side diode D1. The cathode of the first high side diode D1 is connected to the anode of the first low side diode D2. The cathode of the first low side diode D2 is connected to the cathode of the first low side recovery switch element Q4.
A connection point between the first high-side diode D1 and the first low-side diode D2 is connected to one end of the first inductor L. The other end 40 of the first inductor L is preferably connected to a wiring directly connected to the output terminal J1 of the first sustaining pulse generating unit 3A (see FIG. 2). In addition, it may be connected to a wiring (for example, node J2) directly connected to the positive electrode of the first constant voltage source E1, or a wiring (for example, node J3) directly connected to the cathode of the high-side scan switch element SC1.

The first high side recovery switch element Q3 and the first high side diode D1 may be connected in reverse. That is, the other end of the first recovery capacitor C is connected to the anode of the first high-side diode D1, the cathode of the first high-side diode D1 is connected to the cathode of the first high-side recovery switch element Q3, The anode of the first high-side recovery switch element Q3 may be connected to one end of the first inductor L.
Similarly, the first low side recovery switch element Q4 and the first low side diode D2 may be connected in reverse. That is, the other end of the first recovery capacitor C is connected to the cathode of the first low-side diode D2, the anode of the first low-side diode D2 is connected to the anode of the first low-side recovery switch element Q4, The cathode of the low-side recovery switch element Q4 may be connected to one end of the first inductor L.

In the first power recovery unit 4 shown in FIG. 2 and FIG. 3 (A), a current accompanying charging / discharging of the recovery capacitor C flows through one inductor L in both directions.
In addition, for example, as shown in FIG. 3 (B), inductors L1 and L2 in which the discharge current and the charging current of the recovery capacitor C are different may flow, respectively.
The other ends 41 and 42 of the two inductors L1 and L2 are a wiring directly connected to the output terminal J1 of the first discharge sustaining pulse generator 3A and a wiring directly connected to the positive electrode of the first constant voltage source E1 (for example, the node J2) Or a wiring (for example, node J3) directly connected to the cathode of the high-side scan switch element SC1 may be connected, or may be separately connected to any two of them.

The second sustaining pulse generator 3X includes a second high-side sustain switch element Q1X, a second low-side sustain switch element Q2X, and a second power recovery unit 4X (see FIG. 2).
The two sustain switch elements Q1X and Q2X are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used. More preferably, it is a wide band gap semiconductor switch element.

The cathode of the second high-side sustain switch element Q1X is connected to the power supply unit Es. The anode of the second high side sustain switch element Q1X is connected to the cathode of the second low side sustain switch element Q2X. The anode of the second low side sustain switch element Q2X is grounded.
A connection point J1X between the second high-side sustain switch element Q1X and the second low-side sustain switch element Q2X is connected to the sustain electrode X of the PDP 20.

The second power recovery unit 4X includes a second recovery capacitor CX, a second high side recovery switch element Q3X, a second low side recovery switch element Q4X, a second high side diode D1X, a second low side diode D2X, And a second inductor LX.
The capacity of the second recovery capacitor CX is sufficiently larger than the panel capacity Cp of the PDP 20. The voltage across the second recovery capacitor CX is maintained substantially equal to the half value Vs / 2 of the output voltage Vs of the power supply unit Es.
The two recovery switch elements Q3X and Q4X are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used. More preferably, it is a wide band gap semiconductor switch element.

One end of the second recovery capacitor CX is grounded, and the other end is connected to the cathode of the second high side recovery switch element Q3X and the anode of the second low side recovery switch element Q4X. The anode of the second high side recovery switch element Q3X is connected to the anode of the second high side diode D1X. The cathode of the second high side diode D1X is connected to the anode of the second low side diode D2X. The cathode of the second low side diode D2X is connected to the cathode of the second low side recovery switch element Q4X. A connection point J2X between the second high-side diode D1X and the second low-side diode D2X is connected to one end of the second inductor LX. The other end of the second inductor LX is connected to a connection point J1X between the two sustain switch elements Q1X and Q2X.
The second power recovery unit 4X may have a configuration shown in FIG. 3B, for example, apart from the configuration shown in FIG.

  In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 4). In FIG. 4, each ON period of the switch elements Q1 to Q5, QB1, QR1, QR2, SA1, SA2, SC1, and SC2 included in the scan electrode driver 11 and the switch elements Q1X to Q4X included in the sustain electrode driver 12 Is indicated by hatching.

In the initialization period, the potential of the scan electrode Y and the sustain electrode X is changed by application of the initialization pulse voltage. On the other hand, the address electrode A is maintained at the ground potential (≈0).
The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage. For each mode, the on / off states of the switch elements included in scan electrode drive unit 11 and sustain electrode drive unit 12 are switched. However, during the initialization period, the high-side auxiliary switch element SA1 is maintained in the on state, and the low-side auxiliary switch element SA2 is maintained in the off state. Further, the recovery switch elements Q3, Q4, Q3X, Q4X are all maintained in the off state.

<Mode I>
In scan electrode driver 11, first low-side sustain switch element Q2, first bypass switch element QB1, and low-side scan switch element SC2 are turned on. As a result, the sustaining pulse transmission path J1-SC2 and the scan electrode Y are maintained at the ground potential.
In sustain electrode driver 12, second low-side sustain switch element Q2X is turned on. Thereby, sustain electrode X is maintained at the ground potential.

<Mode II>
In scan electrode driver 11, first low-side sustain switch element Q2 and low-side scan switch element SC2 are turned off, and high-side scan switch element SC1 and initialization switch part Q5 are turned on. Thereby, the scan electrode Y is maintained at a potential higher than the potential Vt of the positive voltage source Et by the first constant voltage source E1, that is, the potential Vs of the power supply unit Es: Vs = Vt + V1.
The sustaining pulse transmission path J1-SC2 is maintained at the potential Vt of the positive voltage source Et. That is, the potential is lower than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1: Vt = Vs−V1.
In sustain electrode driver 12, since the state of mode I is maintained, sustain electrode X is maintained at the ground potential.

<Mode III>
In scan electrode driver 11, first bypass switch element QB1 is turned off, and high-side ramp waveform generator QR1 is turned on. As a result, the potential of the scan electrode Y rises at a constant speed by the voltage V2 of the second constant voltage source E2, and reaches the upper limit Vr = Vs + V2 of the initialization pulse voltage. That is, the initialization pulse voltage reaches the upper limit Vr during the ON period of the high side scan switch element SC1.
An initialization pulse voltage transmission path (hereinafter referred to as a high-side initialization pulse transmission path) passes from the anode of the high-side ramp waveform generator QR1 through the high-side auxiliary switch element SA1 to the cathode of the high-side scan switch element SC1. Discharge sustaining pulse transmission path J1-SC2 is connected to high side initialization pulse transmission path QR1-SA1-SC1 through two constant voltage sources E1, E2. Therefore, the sustaining pulse transmission path J1-SC2 is maintained at the potential Vt of the positive voltage source Et. That is, the potential is lower than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1: Vt = Vs−V1.

In sustain electrode driver 12, since the state of mode II is maintained, sustain electrode X is maintained at the ground potential.
Thus, the applied voltage rises relatively slowly to the upper limit Vr of the initialization pulse voltage uniformly for all the discharge cells of the PDP 20. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20. At that time, since the increasing rate of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

In modes II and III, as described above, the sum Vt + V1 = Vs of the positive voltage source Et and the first constant voltage source E1 is used instead of the potential Vs of the power supply unit Es. In addition, the series connection of the positive voltage source Et and the initialization switch unit Q5 may be omitted. At that time, the sum V1 + V2 of the voltages of the first constant voltage source E1 and the second constant voltage source E2 is the upper limit Vr of the initialization pulse voltage, or a value Vr−Vs lower than that by the output voltage Vs of the power supply unit Es. Is set to one of the following.
Due to the on / off state of the two sustain switch elements Q1 and Q2, in mode II, the scan electrode Y is maintained at a potential higher by the voltage V1 of the first constant voltage source E1 than either the ground potential or the potential Vs of the power supply unit Es. The In mode III, the potential of scan electrode Y rises from the potential in mode II to the upper limit Vr of the initialization pulse voltage. The sustaining pulse transmission path J1-SC2 is maintained at either the ground potential or the potential Vs of the power supply unit Es through modes II and III.

In the above example, the sum Vt + V1 of the voltages of the positive voltage source Et and the first constant voltage source E1 is set equal to the potential Vs of the power supply unit Es: Vt + V1 = Vs. In addition, the sum Vt + V1 of these voltages may be set higher than the potential Vs of the power supply unit Es: Vt + V1> Vs.
In that case, since the potential of the scan electrode Y is higher than the above value Vs at the start of mode III, the time required for the initialization pulse voltage to reach the upper limit Vr, that is, the time of mode III is shortened. Therefore, the entire initialization time is shortened.

<Mode IV>
In the scan electrode drive unit 11, the high side ramp waveform generation unit QR1, the initialization switch unit Q5, and the high side scan switch element SC1 are turned off, the first high side sustain switch element Q1, the first bypass switch element QB1, And the low side scanning switch element SC2 is turned on. As a result, the potential of the scan electrode Y drops to the potential Vs of the power supply unit Es. On the other hand, the sustaining pulse transmission path J1-SC2 is maintained at the potential Vs of the power supply unit Es.
In sustain electrode driver 12, since the state of mode III is maintained, sustain electrode X is maintained at the ground potential.

<Mode V>
In scan electrode driving section 11, since the state of mode IV is maintained, discharge sustaining pulse transmission path J1-SC2 and scan electrode Y are both maintained at potential Vs of power supply section Es.
In sustain electrode driver 12, second low-side sustain switch element Q2X is turned off, and second high-side sustain switch element Q1X is turned on. As a result, the potential of the sustain electrode X rises to the potential Vs of the power supply unit Es.
Thus, scan electrode Y and sustain electrode X are maintained at the same potential Vs.

<Mode VI>
In scan electrode driver 11, first high-side sustain switch element Q1 is turned off, and low-side ramp waveform generator QR2 is turned on. As a result, the potentials of the sustaining pulse transmission path J1-SC2 and the scan electrode Y both drop from the potential Vs of the power supply unit Es to the ground potential at a constant speed. That is, the initialization pulse voltage reaches the lower limit, that is, the ground potential during the ON period of the low-side scan switch element SC2.
An initialization pulse voltage transmission path (hereinafter referred to as a low-side initialization pulse transmission path) extends from the cathode of the low-side ramp waveform generator QR2 to the anode of the low-side scan switch element SC2. A part of the sustaining pulse transmission path J1-SC2 overlaps with the low-side initialization pulse transmission path QR2-SC2. However, the lower limit of the initialization pulse voltage is equal to the ground potential, as is the lower limit of the sustaining voltage pulse. Therefore, the potential of the sustaining pulse transmission path J1-SC2 is maintained at the ground potential or higher.

In sustain electrode drive unit 12, since the state of mode V is maintained, sustain electrode X is maintained at potential Vs of power supply unit Es.
In this way, a voltage having a polarity opposite to that applied in modes II to V is uniformly applied to all discharge cells of the PDP 20. In particular, the applied voltage drops relatively slowly. Thereby, wall charges are uniformly removed and uniformed in all the discharge cells. At that time, since the rate of drop of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

During the address period, in the sustain electrode driver 12, the second high-side sustain switch element Q1X is maintained in the on state, and the remaining switch elements are maintained in the off state. Thereby, sustain electrode X is maintained at potential Vs of power supply unit Es.
In scan electrode driver 11, first low-side sustain switch element Q2, first bypass switch element QB1, and high-side auxiliary switch element SA1 are maintained in the ON state. Therefore, the cathode of the high-side scan switch element SC1 is maintained at a potential Vp = V1 (hereinafter referred to as the upper limit of the scan pulse voltage) that is higher than the ground potential by the voltage V1 of the first constant voltage source E1.
On the other hand, the sustaining pulse transmission path J1-SC2, particularly the anode of the low-side scan switch element SC2, is maintained at the ground potential.

At the start of the address period, for all the scan electrodes Y1, Y2, Y3,... (See FIG. 1), the high side scan switch element SC1 is maintained in the on state and the low side scan switch element SC2 is maintained in the off state. Thereby, all the scan electrodes Y are uniformly maintained at the upper limit Vp of the scan pulse voltage.
Subsequently, the scan electrode driver 11 sequentially changes the potentials of the scan electrodes Y1, Y2, Y3,... As follows (see the scan pulse voltage SP shown in FIG. 4). When one of the scan electrodes Y is selected, the high side scan switch element SC1 connected to the scan electrode Y is turned off and the low side scan switch element SC2 is turned on. As a result, the potential of the scan electrode Y drops to the ground potential. When the scan electrode Y is maintained at the ground potential for a predetermined time, the low-side scan switch element SC2 connected to the scan electrode Y is turned off and the high-side scan switch element SC1 is turned on. As a result, the potential of the scan electrode Y rises to the upper limit Vp of the scan pulse voltage.
The scan electrode driver 11 sequentially performs the same switching operation as described above for the series connection 1S of the scan switch elements SC1, SC2 connected to the scan electrodes Y1, Y2, Y3,. Thus, the scan pulse voltage SP is sequentially applied to each of the scan electrodes Y1, Y2, Y3,.

During the address period, the address electrode driver 13 selects one of the address electrodes A based on the video signal input from the outside, and sets the potential of the selected address electrode A to the upper limit Va of the signal pulse voltage for a predetermined time. Raise.
For example, as shown in FIG. 3, when the scan pulse voltage SP is applied to one of the scan electrodes Y and the signal pulse voltage Va is applied to one of the address electrodes A, the scan electrode Y and the address electrode A Is higher than the voltage between the other electrodes. Accordingly, discharge occurs in the discharge cell located at the intersection between the scan electrode Y and the address electrode A. Due to the discharge, new wall charges are accumulated on the surface of the discharge cell.

  In the discharge sustain period, the scan electrode driving unit 11 and the sustain electrode driving unit 12 alternately discharge sustain pulse voltages to the scan electrodes Y1, Y2, Y3,... And the sustain electrodes X1, X2, X3,. Apply as follows. At this time, in the discharge cell in which wall charges are accumulated during the address period, gas discharge and wall charge accumulation are repeated, so that the light emission of the phosphor is maintained.

  During the discharge sustain period, in the scan pulse generator 1A, the first bypass switch element QB1, the low-side auxiliary switch element SA2, and the low-side scan switch element SC2 are maintained in the on state, and the high-side auxiliary switch element SA1 and the high-side scan switch The element SC1 is kept off. As a result, the first sustaining pulse generator 3A passes the sustaining pulse transmission path J1-SC2 and the low-side scan switch element SC2, and raises or lowers the potential of the scan electrode Y as follows. At that time, the potential of the sustaining pulse transmission path J1-SC2 changes between the potential Vs of the power supply unit Es and the ground potential (≈0). That is, the upper limit of the sustaining voltage pulse is equal to the potential Vs of the power supply unit Es, and the lower limit is equal to the ground potential.

  At the start of the discharge sustain period, the first low-side sustain switch element Q2 is maintained in the ON state in the first discharge sustain pulse generator 3A, and the second low-side sustain switch element Q2X in the second discharge sustain pulse generator 3X Is kept on. The remaining switch elements are kept off. Thereby, both the scan electrode Y and the sustain electrode X are maintained at the ground potential.

  In the first sustaining pulse generator 3A, the first high-side recovery switch element Q3 is turned on. Thereby, the ground terminal → first recovery capacitor C → first high side recovery switch element Q3 → first high side diode D1 → first inductor L → low side scanning switch element SC2 → panel capacitance Cp → second The low side sustain switch element Q2X → the ground terminal loop conducts (the arrow indicates the direction of the current, see FIG. 2). At that time, the series circuit of the first inductor L and the panel capacitance Cp is resonated with the voltage Vs / 2 applied from the first recovery capacitor C. Therefore, the potential of the sustaining pulse transmission path J1-SC2 and the scan electrode Y rises smoothly.

When the resonance current attenuates to substantially zero, the first high-side diode D1 is turned off, and the potential of the scan electrode Y reaches the upper limit Vs of the sustaining voltage pulse. At that time, the first high-side recovery switch element Q3 is turned off, and the first high-side sustain switch element Q1 is turned on. As a result, the potential of the sustaining pulse transmission path J1-SC2 and the scan electrode Y is clamped to the upper limit Vs of the sustaining voltage pulse.
When the discharge is maintained in the PDP 20, electric power for maintaining the discharge current is supplied from the power supply unit Es through the first high-side sustain switch element Q1.

  When the scan electrode Y is maintained at the upper limit Vs of the sustaining voltage pulse for a predetermined time, in the first sustaining pulse generating unit 3A, the first high-side sustaining switch element Q1 is turned off and the first low-side recovery is performed. Switch element Q4 is turned on. Thereby, the ground terminal → second low side sustain switch element Q2X → panel capacitance Cp → low side scan switch element SC2 → first inductor L → first low side diode D2 → first low side recovery switch element Q4 → first The loop from the recovery capacitor C to the ground terminal is conducted (the arrow indicates the direction of the current, see Fig. 2). At that time, the series circuit of the first inductor L and the panel capacitance Cp is resonated by applying the voltage Vs / 2 between the scan electrode Y and the first recovery capacitor C. Accordingly, the potential between the sustaining pulse transmission path J1-SC2 and the scan electrode Y falls smoothly.

  When the resonance current attenuates to substantially zero, the first low-side diode D2 is turned off, and the potentials of the sustaining pulse transmission path J1-SC2 and the scan electrode Y reach the ground potential. At that time, the first low-side recovery switch element Q4 is turned off, and the first low-side sustain switch element Q2 is turned on. Thereby, the potential of the sustaining pulse transmission path J1-SC2 and the scan electrode Y is clamped to the ground potential.

  Since the low-side auxiliary switch element SA2 is maintained in the on state during the discharge sustain period, the current from the scan electrode Y to the output terminal J1 of the first discharge sustain pulse generator 3A is not only the low-side scan switch element SC2, It can also pass through the body diode of the high-side scan switch element SC1. Thereby, in the serial connection 1S of the scan switch elements SC1 and SC2, the occurrence of latch-up due to the increase in the amount of current is effectively suppressed.

In the first discharge sustaining pulse generating unit 3A, the first low-side sustaining switch element Q2 is maintained in the ON state, so that both the sustaining pulse transmission path J1-SC2 and the scan electrode Y are maintained at the ground potential.
In the second sustaining pulse generator 3X, first, the second low-side sustain switching element Q2X is turned off, and the second high-side recovery switching element Q3X is turned on. The remaining switch elements are kept off. Thereby, the ground terminal → second recovery capacitor CX → second high side recovery switch element Q3X → second high side diode D1X → second inductor LX → panel capacitance Cp → low side scan switch element SC2 → first The low side sustain switch element Q2 → the ground terminal loop conducts (the arrow indicates the direction of the current, see FIG. 2). At that time, the series circuit of the second inductor LX and the panel capacitance Cp is resonated by applying the voltage Vs / 2 from the second recovery capacitor CX. Therefore, the potential of the sustain electrode X rises smoothly.

When the resonance current decays to substantially zero, the second high-side diode D1X is turned off, and the potential of the sustain electrode X reaches the upper limit Vs of the sustaining voltage pulse. At that time, the second high-side recovery switch element Q3X is turned off, and the second high-side sustain switch element Q1X is turned on. Thereby, the potential of the sustain electrode X is clamped to the upper limit Vs of the sustaining voltage pulse.
When the discharge is maintained in the PDP 20, the power for maintaining the discharge current is supplied from the power supply unit Es through the second high-side sustain switch element Q1X.

  When the sustain electrode X is maintained at the upper limit Vs of the discharge sustain pulse voltage for a predetermined time, in the second discharge sustain pulse generator 3X, the second high-side sustain switch element Q1X is turned off and the second low-side recovery is performed. Switch element Q4X is turned on. Thereby, the ground terminal → the first low side sustain switch element Q2 → the low side scan switch element SC2 → the panel capacitance Cp → the second inductor LX → the second low side diode D2X → the second low side recovery switch element Q4X → the second The loop from the recovery capacitor CX to the ground terminal is conducted (the arrow indicates the direction of the current, see Fig. 2). At that time, the series circuit of the second inductor LX and the panel capacitance Cp is resonated by applying the voltage Vs / 2 between the sustain electrode X and the second recovery capacitor CX. Therefore, the potential of the sustain electrode X falls smoothly.

  When the resonance current attenuates to substantially zero, the second low-side diode D2X is turned off, and the potential of the sustain electrode X reaches the ground potential. At that time, the second low-side recovery switch element Q4X is turned off, and the second low-side sustain switch element Q2X is turned on. Thereby, the potential of the sustain electrode X is clamped to the ground potential.

The power supplied from the first recovery capacitor C to the panel capacitance Cp as the scan electrode Y increases in potential is recovered from the panel capacitance Cp to the first recovery capacitor C as the scan electrode Y decreases in potential. Similarly, the power supplied from the second recovery capacitor CX to the panel capacitance Cp as the sustain electrode X increases in potential is recovered from the panel capacitance Cp to the second recovery capacitor CX as the sustain electrode X decreases in potential. Is done. Thus, the panel capacitance Cp of the PDP 20 and the inductor L or LY resonate at the rise and fall of the sustaining voltage pulse, and the power is efficiently exchanged between the panel capacitance Cp and the recovery capacitor C or CX. That is, reactive power due to charging / discharging of the panel capacitance is reduced when the sustaining voltage pulse is applied.
Even when the power recovery units 4 and 4X have the configuration shown in FIG. 3B, the above switching operation is exactly the same. In particular, the switching operation may be common even if the end points 41 and 42 of the two inductors L1 and L2 are connected to any of the nodes J1, J2 and J3.

In the PDP driving device 10 according to the first embodiment of the present invention, as described above, the potential of the sustaining pulse transmission path (the output terminal J1 of the first sustaining pulse generator 3A to the anode of the low-side scan switch element SC2) is in the initialization period. In both the address period and the address period, the discharge sustain pulse voltage is maintained within the fluctuation range (above the ground potential and less than the potential Vs of the power supply unit Es). Therefore, unlike the conventional driving device (see FIG. 24), the initialization pulse voltage is not clamped to the upper limit Vs or the lower limit (≈0) of the sustaining voltage pulse even if no separation switch element is installed. The predetermined upper limit Vr or lower limit −Vn is reliably reached.
Thus, in the PDP driving device 10 according to Embodiment 1 of the present invention, the conduction loss due to the separation switch element is reduced. Therefore, the power consumption is lower than that of the conventional driving device. Further, the size can be easily reduced by removing the separation switch element. In addition, since the parasitic inductance due to the circuit elements and wiring on the sustaining pulse transmission path is reduced, ringing included in the voltage applied to the PDP is reduced. As a result, the PDP driving apparatus 10 according to Embodiment 1 of the present invention is advantageous for further improving the image quality of the plasma display.

In the initialization pulse generator 2A according to Embodiment 1 of the present invention, the negative electrode of the second constant voltage source E2 is connected to the positive electrode of the first constant voltage source E1. In addition, the negative electrode of the second constant voltage source E2 may be grounded and separated from the first constant voltage source E1.
In this case, the voltage V2 of the second constant voltage source E2 is set to a value higher than the value in the above example by the output voltage Vs of the power supply unit Es, that is, the upper limit Vr of the initialization pulse voltage.
Further, when the upper limit Vr of the initialization pulse voltage is lower than the sum Vs + V1 of the output voltage Vs of the power supply unit Es and the voltage V1 of the first constant voltage source E1 (V2 = Vr <Vs + V1), the first constant voltage source E1 May be directly connected to the cathode of the high-side auxiliary switch element SA1. Thereby, since the first bypass switch element QB1 can be removed, the number of parts can be reduced.
In addition, since the breakdown voltage of the two scanning switch elements SC1 and SC2 may be about the voltage V1 of the first constant voltage source E1, their conduction loss and size can be reduced.

<< Embodiment 2 >>
The plasma display according to the second embodiment of the present invention has the same configuration as the plasma display according to the first embodiment (see FIG. 1). Therefore, the description of Embodiment 1 and FIG. 1 are used for details of the configuration.
The sustain electrode driver (not shown) according to the second embodiment of the present invention has the same configuration as the sustain electrode driver 12 (see FIG. 2) according to the first embodiment. Therefore, the description of Embodiment 1 and FIG. 2 are used for details of the configuration.

  In the scan electrode driver 11 according to the second embodiment of the present invention, the initialization pulse generator 2B is different from the initialization pulse generator 2A according to the first embodiment (see FIG. 2), and the negative voltage source En and the second bypass switch Element QB2 (see FIGS. 5 and 6). Further, a first separation switch element QS1 is installed. Other components are the same as those according to the first embodiment. In FIGS. 5 and 6, the same components as those shown in FIG. Furthermore, for details of these similar components, the description of Embodiment 1 of the present invention is incorporated.

The negative voltage source En maintains the output terminal at a constant negative potential −Vn based on the output voltage Vs of the power supply unit Es by, for example, a DC-DC converter (not shown).
The second bypass switch element QB2 and the first separation switch element QS1 are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used.
The first separation switch element QS1 is more preferably a wide band gap semiconductor switch element. Since the first separation switch element QS1 requires a large current capacity, the first separation switch element QS1 may be a parallel connection of a plurality of switch elements, for example.
When the current capacity of the low side ramp waveform generator QR2 is sufficiently large, the second bypass switch element QB2 may not be installed.

  The negative voltage source En is connected to the anode of the low side ramp waveform generator QR2 and the anode of the second bypass switch element QB2. The cathode of the second bypass switch element QB2 is connected to the anode of the low side scan switch element SC2. When the low-side ramp waveform generator QR2 or the second bypass switch element QB2 is turned on, a negative voltage −Vn is applied to the anode of the low-side scan switch element SC2.

The first separation switch element QS1 can be connected in the following two ways.
In the first aspect, the cathode of the first separation switch element QS1 is connected to the output terminal J1 of the first sustaining pulse generation unit 3A, and the anode is connected to the anode of the low-side scan switch element SC2 (see FIG. 5). ).
In the second embodiment, the cathode of the first separation switch element QS1 is connected to the cathode of the first low-side sustain switch element Q2, and the anode is connected to the anode of the first high-side sustain switch element Q1 (FIG. 6). reference). The connection point J1 between the first separation switch element QS1 and the first high-side sustain switch element Q1 is an output terminal of the first discharge sustain pulse generator 3B and is connected to the anode of the low-side scan switch element SC2 The
The first separation switch element QS1 and the first low-side sustain switch element Q2 may be connected in reverse. That is, the cathode of the first separation switch element QS1 may be grounded, and the anode may be connected to the anode of the first low-side sustain switch element Q2.
In any of the above two types of connections, the current flowing from the ground terminal to the anode of the low-side scan switch element SC2 through the first low-side sustain switch element Q2 and the discharge sustain pulse transmission path J1-SC2 Element QS1 can be shut off.

The first power recovery unit 4 has the same circuit configuration as the first power recovery unit 4 (see FIGS. 2 and 3) according to the first embodiment. Therefore, in FIGS. 5 and 6, an equivalent circuit of the first power recovery unit 4 is not shown. For the details of the equivalent circuit, the description of Embodiment 1 and FIGS.
In particular, as shown in FIG. 3 (B), when the first power recovery unit 4 includes two inductors L1 and L2, their other ends 41 and 42 are connected to the same node but connected to different nodes. May be.

  In FIG. 5, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wiring directly connected to the output terminal J1 of the first sustaining pulse generator 3A; wiring directly connected to the positive electrode of the first constant voltage source E1 (for example, Connected to any one of the node J2); the wiring directly connected to the cathode of the high-side scanning switch element SC1 (for example, the node J3); or the wiring directly connected to the anode of the first separation switch element QS1 (for example, the node J4). Or separately connected to any two.

  In FIG. 6, the other ends 41 and 42 of the inductors L1 and L2 are, for example, the node J1 on the sustaining pulse transmission path J1-SC2; the wiring directly connected to the positive electrode of the first constant voltage source E1 (for example, the node J2); Any one of the wiring directly connected to the cathode of the side scanning switch element SC1 (for example, the node J3); or the wiring between the first separation switching element QS1 and the first low-side sustain switching element Q2 (the node J5); Or any two separately.

  However, when the first separation switch element QS1 and the first low-side sustain switch element Q2 are connected with a polarity opposite to that shown in FIG. 6, the first power is applied to the node J5 between the switch elements. The collection unit 4 is not connected. This is because the first power recovery unit 4 should be connected to the scan electrode Y during a period (dead time) in which both of the two sustain switch elements Q1 and Q2 are maintained in the OFF state during the discharge sustain period. (See Figure 4).

  In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 7). In FIG. 7, the ON periods of the switching elements Q1, Q2, QS1, Q5, QR1, QB1, QR2, QB2, SA1, SA2, SC1, and SC2 included in the scan electrode driving unit 11 are indicated by hatched portions.

In the initialization period, the potential of the scan electrode Y and the sustain electrode X is changed by application of the initialization pulse voltage. On the other hand, the address electrode A is maintained at the ground potential (≈0).
The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage. For each mode, the on / off state of the switch element included in the scan electrode driving unit 11 is switched. However, during the initialization period, the high-side auxiliary switch element SA1 is maintained in the on state, and the second bypass switch element QB2 and the low-side auxiliary switch element SA2 are maintained in the off state.

<Mode I>
The first low-side sustain switch element Q2, the first separation switch element QS1, the first bypass switch element QB1, and the low-side scan switch element SC2 are turned on. As a result, the sustaining pulse transmission path J1-SC2 and the scan electrode Y are maintained at the ground potential.

<Mode II>
The first low side sustain switch element Q2 and the low side scan switch element SC2 are turned off, and the initialization switch section Q5 and the high side scan switch element SC1 are turned on. As a result, the potential of the scan electrode Y rises to a potential higher than the potential Vt of the positive voltage source Et by the voltage V1 of the first constant voltage source E1, that is, the potential Vs of the power supply unit Es: Vt + V1 = Vs.
The sustaining pulse transmission path J1-SC2, particularly the anode of the low-side scanning switch element SC2, is maintained at the potential Vt of the positive voltage source Et. The potential Vt is lower than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1. Therefore, in mode II, it is sufficient that at least one of the first separation switch element QS1 and the first high-side sustain switch element Q1 is maintained in the off state.

<Mode III>
The first bypass switch element QB1 is turned off, and the high side ramp waveform generator QR1 is turned on. As a result, the potential of the scan electrode Y rises at a constant speed by the voltage V2 of the second constant voltage source E2, and reaches the upper limit Vr = Vs + V2 of the initialization pulse voltage. That is, the initialization pulse voltage reaches the upper limit Vr during the ON period of the high side scan switch element SC1.
The sustaining pulse transmission path J1-SC2 is connected to the high side initialization pulse transmission path QR1-SA1-SC1 through the two constant voltage sources E1, E2. Accordingly, the sustaining pulse transmission path J1-SC2, particularly the anode of the low-side scan switch element SC2, is maintained at the potential Vt of the positive voltage source Et. The potential Vt is lower than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1. Therefore, in mode III, as in mode II, it is sufficient that at least one of first separation switch element QS1 and first high-side sustain switch element Q1 is maintained in the off state.
Thus, the applied voltage rises relatively slowly to the upper limit Vr of the initialization pulse voltage uniformly for all the discharge cells of the PDP 20. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20. At that time, since the increasing rate of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

In modes II and III, as described above, the sum Vt + V1 = Vs of the positive voltage source Et and the first constant voltage source E1 is used instead of the potential Vs of the power supply unit Es. In addition, the series connection of the positive voltage source Et and the initialization switch unit Q5 may be omitted. At that time, the sum V1 + V2 of the voltages of the first constant voltage source E1 and the second constant voltage source E2 is the upper limit Vr of the initialization pulse voltage, or a value Vr−Vs lower than that by the output voltage Vs of the power supply unit Es. Is set to one of the following. Further, the first separation switch element QS1 is maintained in the on state.
Due to the on / off state of the two sustain switch elements Q1 and Q2, in mode II, the scan electrode Y is maintained at a potential higher by the voltage V1 of the first constant voltage source E1 than either the ground potential or the potential Vs of the power supply unit Es. The In mode III, the potential of scan electrode Y rises from the potential in mode II to the upper limit Vr of the initialization pulse voltage. The sustaining pulse transmission path J1-SC2 is maintained at either the ground potential or the potential Vs of the power supply unit Es through modes II and III.

In the above example, the sum Vt + V1 of the voltages of the positive voltage source Et and the first constant voltage source E1 is set equal to the potential Vs of the power supply unit Es: Vt + V1 = Vs. In addition, the sum Vt + V1 of these voltages may be set higher than the potential Vs of the power supply unit Es: Vt + V1> Vs.
In that case, since the potential of the scan electrode Y is higher than the above value Vs at the start of mode III, the time required for the initialization pulse voltage to reach the upper limit Vr, that is, the time of mode III is shortened. Therefore, the entire initialization time is shortened.

<Mode IV>
Initialization switch part Q5, high side ramp waveform generation part QR1, and high side scan switch element SC1 are turned off, first high side sustain switch element Q1, first separation switch element QS1, first bypass switch element QB1 , And the low side scan switch element SC2 is turned on. However, in FIG. 6, the first separation switch element QS1 may not be turned on.
As a result, the potential of the scan electrode Y drops to the potential Vs of the power supply unit Es. On the other hand, the sustaining pulse transmission path J1-SC2 is maintained at the potential Vs of the power supply unit Es.

<Mode V>
In scan electrode driving section 11, since the state of mode IV is maintained, discharge sustaining pulse transmission path J1-SC2 and scan electrode Y are both maintained at potential Vs of power supply section Es.
In the sustain electrode driver 12, the second low-side sustain switch element Q2X is turned off and the second high-side sustain switch element Q1X is turned on (see FIG. 2). As a result, the potential of the sustain electrode X rises to the potential Vs of the power supply unit Es.
Thus, scan electrode Y and sustain electrode X are maintained at the same potential Vs.

<Mode VI>
The first high-side sustain switch element Q1 and the first separation switch element QS1 are turned off, and the low-side ramp waveform generator QR2 is turned on. As a result, the potentials of the sustaining pulse transmission path on the anode side of the first separation switch element QS1 and the scan electrode Y both drop to the potential −Vn of the negative voltage source En at a constant speed. That is, the initialization pulse voltage reaches the lower limit −Vn during the ON period of the low-side scan switch element SC2.
The low-side initialization pulse transmission path extends from the cathode of the low-side ramp waveform generator QR2 to the anode of the low-side scan switch element SC2. A part of the sustaining pulse transmission path J1-SC2 overlaps with the low-side initialization pulse transmission path QR2-SC2. However, the first separation switch element QS1 is maintained in the OFF state, and the current from the output terminal J1 of the first sustaining pulse generation unit 3A (or 3B) to the low-side scan switch element SC2 is cut off. Accordingly, the potential of the anode side of the first separation switch element QS1, that is, the potential of the low-side initialization pulse transmission path QR2-SC2 can surely drop to the negative potential -Vn. That is, the initialization pulse voltage reliably reaches the lower limit −Vn without being clamped to the ground potential, that is, the lower limit of the sustaining voltage pulse.

In sustain electrode drive unit 12, since the state of mode V is maintained, sustain electrode X is maintained at potential Vs of power supply unit Es.
In this way, a voltage having a polarity opposite to that applied in modes II to V is uniformly applied to all discharge cells of PDP 20. Thereby, wall charges are uniformly removed and uniformed in all the discharge cells. At that time, since the rate of drop of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.
In particular, the lower limit −Vn of the initialization pulse voltage is negative and lower than the lower limit (= ground potential≈0) in the first embodiment: −Vn <0. Therefore, the voltage applied to the discharge cell of the PDP 20 is sufficiently increased, so that the wall charges are sufficiently removed. In addition, the voltage applied to the sustain electrode X in the initialization period may be reduced. Thereby, power consumption is reduced.

  During the address period, the first bypass switch element QB1, the second bypass switch element QB2, and the high-side auxiliary switch element SA1 are kept on, and the first separation switch element QS1 and the low-side auxiliary switch element SA2 are off. Maintained in a state. Accordingly, the cathode of the high-side scan switch element SC1 is set to a potential Vp = V1−Vn (hereinafter referred to as the upper limit of the scan pulse voltage) that is higher than the potential −Vn of the negative voltage source En by the voltage V1 of the first constant voltage source E1. Maintained. On the other hand, in the sustaining pulse transmission path J1-SC2, the anode side of the first separation switch element QS1 (particularly the anode of the low-side scan switch element SC2) is the potential −Vn of the negative voltage source En (hereinafter referred to as the lower limit of the scan pulse voltage). Is maintained).

At the start of the address period, for all the scan electrodes Y1, Y2, Y3,... (See FIG. 1), the high side scan switch element SC1 is maintained in the on state and the low side scan switch element SC2 is maintained in the off state. Thereby, all the scan electrodes Y are uniformly maintained at the upper limit Vp of the scan pulse voltage.
Subsequently, the scan electrode driver 11 sequentially changes the potentials of the scan electrodes Y1, Y2, Y3,... As follows (see the scan pulse voltage SP shown in FIG. 6). When one of the scan electrodes Y is selected, the high side scan switch element SC1 connected to the scan electrode Y is turned off and the low side scan switch element SC2 is turned on. As a result, the potential of the scan electrode Y drops to the lower limit −Vn of the scan pulse voltage. When the potential of the scan electrode Y is maintained at the lower limit −Vn of the scan pulse voltage for a predetermined time, the low side scan switch element SC2 connected to the scan electrode Y is turned off and the high side scan switch element SC1 is turned on. Is done. As a result, the potential of the scan electrode Y rises to the upper limit Vp of the scan pulse voltage.
The scan electrode driver 11 sequentially performs the same switching operation as described above for the series connection 1S of the scan switch elements SC1, SC2 connected to the scan electrodes Y1, Y2, Y3,. Thus, the scan pulse voltage SP is sequentially applied to each of the scan electrodes Y1, Y2, Y3,.

During the address period, the address electrode driver 13 selects one of the address electrodes A based on an externally input video signal, and the potential of the selected address electrode A is set to the upper limit Vb of the signal pulse voltage for a predetermined time. Raise. Here, the upper limit Vb of the signal pulse voltage according to the second embodiment of the present invention may be lower than the upper limit Va (see FIG. 4) in the first embodiment of the present invention.
For example, as shown in FIG. 7, when the scan pulse voltage SP is applied to one of the scan electrodes Y and the signal pulse voltage Vb is applied to one of the address electrodes A, the scan electrode Y and the address electrode A Is higher than the voltage between the other electrodes. Accordingly, discharge occurs in the discharge cell located at the intersection between the scan electrode Y and the address electrode A. Due to the discharge, new wall charges are accumulated on the surface of the discharge cell.

During the discharge sustain period, the first separation switch element QS1, the first bypass switch element QB1, the low side auxiliary switch element SA2, and the low side scan switch element SC2 are maintained in the ON state. The remaining switch elements, particularly the second bypass switch element QB2, the high side auxiliary switch element SA1, and the high side scan switch element SC1 are maintained in the OFF state. Thereby, the first sustaining pulse generating section 3A (or 3B) raises and lowers the potential of the scanning electrode Y through the sustaining pulse transmission path J1-SC2 and the low-side scanning switch element SC2. At that time, the potential of the sustaining pulse transmission path J1-SC2 changes between the upper limit Vs and the lower limit (ground potential) of the sustaining voltage pulse.
However, in FIG. 6, when the first power recovery unit 4 is not connected to the node J5 between the first separation switch element QS1 and the first low-side sustain switch element Q2, the first separation switch element QS1 May be turned on / off in synchronization with the first low-side sustain switching element Q2.

  In the discharge sustain period, the scan electrode driving unit 11 and the sustain electrode driving unit 12 alternately discharge sustain pulse voltages to the scan electrodes Y1, Y2, Y3,... And the sustain electrodes X1, X2, X3,. Application is performed in the same manner as in the first embodiment (see FIG. 4). At this time, in the discharge cell in which wall charges are accumulated during the address period, gas discharge and wall charge accumulation are repeated, so that the light emission of the phosphor is maintained.

  Since the low-side auxiliary switch element SA2 is maintained in the on state during the discharge sustain period, the current from the scan electrode Y to the output terminal J1 of the first discharge sustain pulse generator 3A is not only the low-side scan switch element SC2, It can also pass through the body diode of the high-side scan switch element SC1. Thereby, in the serial connection 1S of the scan switch elements SC1 and SC2, the occurrence of latch-up due to the increase in the amount of current is effectively suppressed.

In the PDP driving device according to the second embodiment of the present invention, as described above, the potential of the sustaining pulse transmission path J1-SC2 is maintained below the upper limit Vs of the sustaining voltage pulse during both the initialization period and the address period. There is substantially no current flowing through the output terminal J1 and flowing into the first sustaining pulse generator 3A (or 3B). Therefore, unlike the conventional driving device (see FIG. 26), the initialization pulse voltage is not clamped to the upper limit of the discharge sustaining pulse voltage even if the separation switch element for cutting off the current is not installed. Reach up to the upper limit Vr.
Thus, since the number of separation switch elements is reduced, the conduction loss due to the separation switch elements is low in the PDP driving device according to Embodiment 2 of the present invention. Therefore, the power consumption is lower than that of the conventional driving device. Furthermore, the size can be easily reduced by reducing the number of separation switch elements. In addition, since the parasitic inductance due to the circuit elements and wiring on the sustaining pulse transmission path is reduced, ringing included in the voltage applied to the PDP is reduced. As a result, the PDP driving apparatus according to Embodiment 2 of the present invention is advantageous for further improving the image quality of the plasma display.

<< Embodiment 3 >>
The plasma display according to Embodiment 3 of the present invention has the same configuration as the plasma display according to Embodiment 1 (see FIG. 1). Therefore, the description of Embodiment 1 and FIG. 1 are used for details of the configuration.
The sustain electrode driver (not shown) according to the third embodiment of the present invention has the same configuration as the sustain electrode driver 12 (see FIG. 2) according to the first embodiment. Therefore, the description of Embodiment 1 and FIG. 2 are used for details of the configuration.

In the scan electrode driver 11 according to the third embodiment of the present invention, the scan pulse generator 1B is different from the scan pulse generator 1A according to the first and second embodiments (see FIGS. 2, 5, and 6), and the first bypass switch element Does not include QB1 (see Figures 8-11). That is, the positive electrode of the first constant voltage source E1 is directly connected to the cathode of the high-side auxiliary switch element SA1.
Unlike the components of the initialization pulse generator 2B (see FIG. 5) according to the second embodiment, the initialization pulse generator 2C includes a positive voltage source Er, an initialization switch element Q6, and a protection diode Dp (FIGS. 8 to 8). 11).
Further, unlike the scan electrode driving unit 11 (see FIGS. 5 and 6) according to the second embodiment, a second separation switch element QS2 is provided in addition to the first separation switch element QS1.
Other components are the same as those according to the first or second embodiment. 8 to 11, the same reference numerals as those shown in FIGS. Furthermore, for details of these similar components, the description of Embodiment 1 or 2 of the present invention is incorporated.

The positive voltage source Er maintains the potential of the output terminal at the upper limit Vr of the initialization pulse voltage based on the output voltage Vs of the power supply unit Es by, for example, a DC-DC converter (not shown).
The initialization switch element Q6 and the second separation switch element QS2 are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used.
The second separation switch element QS2 is more preferably a wide band gap semiconductor switch element. Since the second separation switch element QS2 requires a large current capacity, the second separation switch element QS2 may be, for example, a parallel connection of a plurality of switch elements.

The positive voltage source Er is connected to the cathode of the high side ramp waveform generator QR1. A path from the anode of the high side ramp waveform generator QR1 to the cathode of the high side scan switch element SC1 through the high side auxiliary switch element SA1 is used as a high side initialization pulse transmission path.
When the high side ramp waveform generator QR1 is turned on, a high voltage is applied from the positive voltage source Er to the cathode of the high side scan switch element SC1 through the high side ramp waveform generator QR1 and the high side auxiliary switch element SA1. . The applied voltage rises to the upper limit Vr of the initialization pulse voltage at a constant speed.

The anode of the protection diode Dp is connected to the power supply unit Es, and the cathode is connected to the cathode of the initialization switch element Q6. The anode of the initialization switch element Q6 is connected to the cathode of the high side auxiliary switch element SA1.
During the ON period of the initialization switch element Q6, the cathode potential of the high-side auxiliary switch element SA1 is maintained at the potential Vs or higher of the power supply unit Es.

The connection between the two separation switch elements QS1 and QS2 can be performed in the following four ways.
In the first embodiment, two separation switch elements QS1 and QS2 are connected in series (see FIG. 8). That is, the cathodes or anodes of the two separation switch elements QS1 and QS2 are directly connected. One end of the series connection is connected to the output terminal J1 of the first sustaining pulse generator 3A, and the other end is connected to the anode of the low side scan switch element SC2.
In the second embodiment, the cathode of the first separation switch element QS1 is connected to the cathode of the first low-side sustain switch element Q2, and the anode is connected to the anode of the first high-side sustain switch element Q1 (FIG. 9). reference).
The first separation switch element QS1 and the first low-side sustain switch element Q2 may be connected in reverse. That is, the anode of the second separation switch element QS2 is a connection point between the first separation switch element QS1 and the first high-side sustain switch element Q1 (the output terminal of the first discharge sustain pulse generator 3B). Connected to J1, the cathode is connected to the anode of the low-side scan switch element SC2.

In the third embodiment, the anode of the second separation switch element QS2 is connected to the anode of the first high side sustain switch element Q1, and the cathode is connected to the cathode of the first low side sustain switch element Q2 (FIG. 10). reference).
The second separation switch element QS2 and the first high-side sustain switch element Q1 may be connected in reverse. That is, the anode of the second separation switch element QS2 may be connected to the power supply unit Es, and the cathode may be connected to the cathode of the first high-side sustain switch element Q1.
The cathode of the first separation switch element QS1 is connected to the connection point (the output terminal of the first discharge sustain pulse generator 3C) J1 between the second separation switch element QS2 and the first low-side sustain switch element Q2. The anode is connected to the anode of the low-side scan switch element SC2.

In the fourth aspect, the cathode of the first separation switch element QS1 is connected to the cathode of the first low-side sustain switch element Q2, and the anode is connected to the output terminal J1 of the first discharge sustain pulse generator 3D ( (See Figure 11). The first separation switch element QS1 and the first low-side sustain switch element Q2 may be connected in reverse.
The anode of the second separation switch element QS2 is connected to the anode of the first high-side sustain switch element Q1, and the cathode is connected to the output terminal J1 of the first discharge sustain pulse generator 3D. The second separation switch element QS2 and the first high-side sustain switch element Q1 may be connected in reverse.
The output terminal J1 of the first sustaining pulse generator 3D is directly connected to the anode of the low side scan switch element SC2.

In any of the above four types of connections, the current flowing from the ground terminal to the anode of the low-side scan switch element SC2 through the first low-side sustain switch element Q2 and the discharge sustain pulse transmission path J1-SC2 Element QS1 can be shut off.
Similarly, the second separation switch element QS2 cuts off the current from the power source Es through the first high-side sustain switch element Q1 and the discharge sustain pulse transmission path J1-SC2 to the anode of the low-side scan switch element SC2. it can.

The first power recovery unit 4 has the same circuit configuration as the first power recovery unit 4 (see FIGS. 2 and 3) according to the first embodiment. Therefore, in FIGS. 8 to 11, illustration of an equivalent circuit of the first power recovery unit 4 is omitted. For the details of the equivalent circuit, the description of Embodiment 1 and FIGS.
In particular, as shown in FIG. 3 (B), when the first power recovery unit 4 includes two inductors L1 and L2, their other ends 41 and 42 are connected to the same node but connected to different nodes. May be.

  In FIG. 8, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wiring directly connected to the output terminal J1 of the first sustaining pulse generating unit 3A; wiring directly connected to the positive electrode of the first constant voltage source E1 (for example, Node J2); wiring directly connected to the cathode of the high-side scanning switch element SC1 (for example, node J3); wiring directly connected to the anode of the low-side scanning switch element SC2 (for example, node J4); or between the two separation switch elements QS1 and QS2 Any one of the nodes J6; or separately connected to any two of them.

  In FIG. 9, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wiring directly connected to the output terminal J1 of the first sustaining pulse generator 3B; wiring directly connected to the positive electrode of the first constant voltage source E1 (for example, Node J2); wiring directly connected to the cathode of the high-side scanning switch element SC1 (for example, node J3); wiring directly connected to the anode of the low-side scanning switch element SC2 (for example, node J4); or the first separation switch element QS1 and the first Is connected to any one of the nodes J5 between the one low-side sustain switch element Q2, or is separately connected to any two of them.

  In FIG. 10, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wiring directly connected to the output terminal J1 of the first sustaining pulse generator 3C; wiring directly connected to the positive electrode of the first constant voltage source E1 (for example, Node J2); wiring directly connected to the cathode of the high-side scan switch element SC1 (for example, node J3); wiring directly connected to the anode of the low-side scan switch element SC2 (for example, node J4); or the second separation switch element QS2 and the second Is connected to any one of the nodes J7 between the one high-side sustain switching element Q1 and separately connected to any two of them.

  In FIG. 11, the other ends 41 and 42 of the inductors L1 and L2 are, for example, the discharge sustain pulse transmission path J1-SC2 (for example, the output terminal J1 of the first discharge sustain pulse generator 3D); Wiring directly connected to the positive electrode (for example, node J2); Wiring directly connected to the cathode of the high-side scanning switch element SC1 (for example, node J3); Node between the first separation switch element QS1 and the first low-side sustain switch element Q2 J5; or any one of the nodes J7 between the second isolation switch element QS2 and the first high-side sustain switch element Q1, or separately connected to any two.

However, when the first separation switch element QS1 and the first low-side sustain switch element Q2 are connected with a polarity opposite to that shown in FIGS. The power recovery unit 4 is not connected.
Similarly, when the second separation switch element QS2 and the first high-side sustain switch element Q1 are connected with a polarity opposite to the polarity shown in FIGS. 8 and 10, the node J7 between the switch elements has The first power recovery unit 4 is not connected.

  In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 12). In FIG. 12, the ON periods of the switch elements Q1, Q2, QS1, QS2, Q6, QR1, QR2, QB2, SA1, SA2, SC1, and SC2 included in the scan electrode driving unit 11 are indicated by hatched portions.

In the initialization period, the potential of the scan electrode Y and the sustain electrode X is changed by application of the initialization pulse voltage. On the other hand, the address electrode A is maintained at the ground potential (≈0).
The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage. For each mode, the on / off state of the switch element included in the scan electrode driving unit 11 is switched. However, during the initialization period, the high-side auxiliary switch element SA1 is maintained in the on state, and the second bypass switch element QB2 and the low-side auxiliary switch element SA2 are maintained in the off state.

<Mode I>
The first low-side sustain switch element Q2, the first separation switch element QS1, the second separation switch element QS2, and the low-side scan switch element SC2 are turned on. As a result, the sustaining pulse transmission path J1-SC2 and the scan electrode Y are maintained at the ground potential. However, in FIGS. 10 and 11, the second separation switch element QS2 may not be turned on.

<Mode II>
The first low-side sustain switch element Q2, the two separation switch elements QS1 and QS2, and the low-side scan switch element SC2 are turned off, and the initialization switch element Q6 and the high-side scan switch element SC1 are turned on. As a result, the potential of the scan electrode Y rises to the potential Vs of the power supply unit Es.
A portion of the sustaining pulse transmission path J1-SC2 that is directly connected to the anode of the low-side scan switch element SC2 is maintained at a potential that is lower than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1. Therefore, in FIGS. 8 and 10, it is sufficient that at least one of the first separation switch element QS1 and the first high-side sustain switch element Q1 is maintained in the off state.

<Mode III>
Since the initialization switch element Q6 is turned off and the high side ramp waveform generator QR1 is turned on, the potential of the scan electrode Y rises at a constant rate, and the potential of the positive voltage source Er (the upper limit of the initialization pulse voltage) Reach Vr. That is, the initialization pulse voltage reaches the upper limit Vr during the ON period of the high side scan switch element SC1.
Thus, the applied voltage rises relatively slowly to the upper limit Vr of the initialization pulse voltage uniformly for all the discharge cells of the PDP 20. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20. At that time, since the increasing rate of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

Discharge sustaining pulse transmission path J1-SC2 is connected to high-side initialization pulse transmission path QR1-SA1-SC1 through first constant voltage source E1. Accordingly, the potential of the portion of the sustaining pulse transmission path J1-SC2 that is directly connected to the anode of the low-side scanning switch element SC2 is the first constant voltage source E1 than the potential of the high-side initialization pulse transmission path QR1-SA1-SC1. The voltage V1 is kept low.
When the difference Vr−V1 between the upper limit Vr of the initialization pulse voltage and the voltage V1 of the first constant voltage source E1 is lower than the potential of the power source Es, that is, the upper limit Vs of the discharge sustaining pulse voltage (Vr−V1 <Vs) The potential of sustain pulse transmission path J1-SC2 is maintained below the upper limit Vs of discharge sustain pulse voltage. Accordingly, since the initialization pulse voltage is not clamped at the upper limit Vs of the discharge sustaining pulse voltage, the second separation switch element QS2 may not be installed. Thereby, the number of separation switch elements is reduced.
Further, in FIGS. 8 and 10, it is sufficient that at least one of the first separation switch element QS1 and the first high-side sustain switch element Q1 is maintained in the off state.

When the difference Vr−V1 between the upper limit Vr of the initialization pulse voltage and the voltage V1 of the first constant voltage source E1 is higher than the potential of the power supply unit Es, that is, the upper limit Vs of the discharge sustaining pulse voltage (Vr−V1> Vs) In sustain pulse transmission path J1-SC2, the potential of the portion directly connected to the anode of low side scan switch element SC2 exceeds the upper limit Vs of the sustain pulse voltage. However, the second separation switch element QS2 is maintained in the OFF state, and the current flowing from the discharge sustaining pulse transmission path J1-SC2 to the output terminal J1 of the first sustaining pulse generating unit 3A (3B, 3C, or 3D) Cut off. Therefore, the initialization pulse voltage reliably reaches the upper limit Vr without being clamped to the upper limit Vs of the discharge sustaining pulse voltage.
At that time, the both-ends voltage of the second separation switch element QS2 is maintained below the difference Vr−V1 between the upper limit Vr of the initialization pulse voltage and the voltage V1 of the first constant voltage source E1. That is, the breakdown voltage of the second isolation switch element QS2 is sufficiently lower than the breakdown voltage of the conventional isolation switch element (about the upper limit Vr of the initialization pulse voltage).

<Mode IV>
The high side ramp waveform generator QR1 and the high side scan switch element SC1 are turned off, and the first high side sustain switch element Q1, the two separation switch elements QS1 and QS2, and the low side scan switch element SC2 are turned on. However, in FIGS. 9 and 11, the first separation switch element QS1 may not be turned on.
As a result, the potential of the scan electrode Y drops to the potential Vs of the power supply unit Es. On the other hand, the sustaining pulse transmission path J1-SC2 is maintained at the potential Vs of the power supply unit Es.

<Mode V>
In scan electrode driving section 11, since the state of mode IV is maintained, discharge sustaining pulse transmission path J1-SC2 and scan electrode Y are both maintained at potential Vs of power supply section Es.
In the sustain electrode driver 12, the second low-side sustain switch element Q2X is turned off and the second high-side sustain switch element Q1X is turned on (see FIG. 2). As a result, the potential of the sustain electrode X rises to the potential Vs of the power supply unit Es.
Thus, scan electrode Y and sustain electrode X are maintained at the same potential Vs.

<Mode VI>
The first high-side sustain switch element Q1 and the two separation switch elements QS1 and QS2 are turned off, and the low-side ramp waveform generator QR2 is turned on. As a result, in the sustaining pulse transmission path J1-SC2, the potential of the portion directly connected to the anode of the low-side scan switch element SC2 and the potential of the scan electrode Y both drop to the potential -Vn of the negative voltage source En at a constant speed. To do. That is, the initialization pulse voltage reaches the lower limit −Vn during the ON period of the low-side scan switch element SC2.
The low-side initialization pulse transmission path extends from the cathode of the low-side ramp waveform generator QR2 to the anode of the low-side scan switch element SC2. A part of the sustaining pulse transmission path J1-SC2 overlaps with the low-side initialization pulse transmission path QR2-SC2. However, the first separation switch element QS1 is maintained in the OFF state, and the current from the output terminal J1 of the first sustaining pulse generation unit 3A (3B, 3C, or 3D) to the low-side scan switch element SC2 is cut off. Therefore, in the sustaining pulse transmission path J1-SC2, the potential of the portion directly connected to the anode of the low-side scan switch element SC2 can drop to the negative potential -Vn. That is, the initialization pulse voltage reliably reaches the lower limit −Vn without being clamped to the ground potential, that is, the lower limit of the sustaining voltage pulse.

In sustain electrode driving unit 12, since the state of mode V is maintained, the potential of sustain electrode X is maintained at the potential Vs of power supply unit Es.
In this way, a voltage having a polarity opposite to that applied in modes II to V is uniformly applied to all discharge cells of PDP 20. Thereby, wall charges are uniformly removed and uniformed in all the discharge cells. At that time, since the rate of drop of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.
In particular, the lower limit −Vn of the initialization pulse voltage is lower than the ground potential: −Vn <0. Therefore, the voltage applied to the discharge cell of the PDP 20 is sufficiently increased, so that the wall charges are sufficiently removed. In addition, the voltage applied to the sustain electrode X in the initialization period may be reduced. Thereby, power consumption is reduced.

In the address period and the discharge sustain period, the scan electrode driver 11 operates in exactly the same manner as the scan electrode driver 11 according to the second embodiment. Therefore, the description of Embodiment 2 is used for the details.
However, in FIGS. 9 and 11, when the first power recovery unit 4 is not connected to the node J5 between the first separation switch element QS1 and the first low-side sustain switch element Q2, during the discharge sustain period, The first separation switch element QS1 may be turned on / off in synchronization with the first low-side sustain switch element Q2. Similarly, in FIGS. 10 and 11, when the first power recovery unit 4 is not connected to the node J7 between the second separation switch element QS2 and the first high-side sustain switch element Q1, the second The separation switch element QS2 may be turned on / off in synchronization with the first high-side sustain switch element Q1.
Further, in FIGS. 9 to 11, unlike FIG. 8, the current accompanying the gas discharge in the PDP 20 flows only in one direction through at least one of the two separation switch elements QS1 and QS2. Therefore, the separation switch element has low conduction loss.

  Since the low side auxiliary switch element SA2 is maintained in the ON state during the discharge sustain period, the current from the scan electrode Y to the output terminals J1 of the first discharge sustain pulse generators 3A to 3D is only the low side scan switch element SC2. Alternatively, it can pass through the body diode of the high-side scan switch element SC1. Thereby, in the serial connection 1S of the scan switch elements SC1 and SC2, the occurrence of latch-up due to the increase in the amount of current is effectively suppressed.

In the PDP driving device according to Embodiment 3 of the present invention, as described above, the second separation switch element QS2 is removed, or the withstand voltage thereof is sufficiently low. Therefore, in the PDP driving device according to Embodiment 3 of the present invention, the conduction loss due to the second separation switch element QS2 is low, and the miniaturization is easy.
When the second separation switch element QS2 can be removed, the parasitic inductance on the sustaining pulse transmission path is further reduced, so that ringing included in the voltage applied to the PDP is reduced. As a result, the PDP driving apparatus according to Embodiment 3 of the present invention is advantageous for further improving the image quality of the plasma display.

<< Embodiment 4 >>
The plasma display according to Embodiment 4 of the present invention has the same configuration as the plasma display according to Embodiment 1 (see FIG. 1). Therefore, the description of Embodiment 1 and FIG. 1 are used for details of the configuration.
The sustain electrode driver (not shown) according to the fourth embodiment of the present invention has the same configuration as the sustain electrode driver 12 (see FIG. 2) according to the first embodiment. Therefore, the description of Embodiment 1 and FIG. 2 are used for details of the configuration.

In the scan electrode driving unit 11 according to the fourth embodiment of the present invention, the initialization pulse generator 2C1 is different from the initialization pulse generator 2C according to the third embodiment (see FIGS. 8 to 11) in the initial stage connected to the power source Es. This does not include a series circuit composed of the switch element Q6 and the protective diode Dp (see FIG. 13).
Further, the anode of the high side ramp waveform generator QR1 is directly connected to the cathode of the high side scan switch element SC1.
In addition, during the period in which the initialization switch driver DR2 maintains the high-side ramp waveform generator QR1 in the on state, the on-side of the high-side auxiliary switch element SA1 by the auxiliary switch driver DR1 is suppressed as described later (FIG. 14 and 15).
Other components and their operations are the same as the components according to the third embodiment and their operations. In particular, the two separation switch elements QS1 and QS2 may be installed at the same positions as in FIGS. 9 to 11 in addition to the positions shown in FIG. 13-15, the same code | symbol as the code | symbol shown by FIGS. 8-12 is attached | subjected to those similar components. Furthermore, the description of Embodiment 3 of this invention is used for the details of these similar components and operations.

The auxiliary switch driver DR1 sends the same first control signal CT1 to the two auxiliary switch elements SA1 and SA2 (see FIG. 14). The first control signal CT1 is a logic signal. Preferably, the H level indicates that the auxiliary switch element as the transmission destination is ON, and the L level indicates OFF. The first control signal CT1 is applied to the high-side auxiliary switch element SA1 with the original polarity through the buffer B1, and is applied to the low-side auxiliary switch element SA2 with the reverse polarity by the first inverter B2. .
Apart from the above, the auxiliary switch driver DR1 may send two different control signals to the two auxiliary switch elements SA1 and SA2. Each control signal is a logic signal. Preferably, the H level indicates that the transmission destination auxiliary switch element is ON, and the L level indicates OFF. In this case, the polarities are maintained opposite to each other between the two control signals.

  The initialization switch driver DR2 sends a second control signal CT2 to the high side ramp waveform generator QR1 (see FIG. 14). The second control signal CT2 is a logic signal. Preferably, the H level indicates that the high side ramp waveform generator is on and the L level indicates that it is off. The second control signal CT2 is applied to the high side ramp waveform generator QR1 with the original polarity, and to the high side auxiliary switch element SA1 with the reverse polarity by the second inverter B3.

  In particular, at the node W between the output terminal of the buffer B1 and the output terminal of the second inverter B3, a wired OR circuit, that is, a negative logic OR circuit is configured. Therefore, the high-side auxiliary switch element SA1 is turned on / off according to the first control signal CT1 while the second control signal CT2 is at the L level, and the high-side auxiliary switch element is ON while the second control signal CT2 is at the H level. SA1 is maintained in the off state regardless of the level of the first control signal CT1.

In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as shown in FIG. In FIG. 15, the ON periods of the switch elements Q1, Q2, QS1, QS2, QR1, QR2, QRB2, SA1, SA2, SC1, and SC2 included in the scan electrode driving unit 11 are indicated by hatched portions.
The operation of the fourth embodiment differs from the operation of the third embodiment only in the modes I to III in the initialization period. Therefore, the operation in those periods will be described below, and the description in Embodiment 3 is used for the operations in other periods.

<Mode I>
The first low-side sustain switch element Q2, the first separation switch element QS1, the second separation switch element QS2, and the low-side scan switch element SC2 are turned on. As a result, the sustaining pulse transmission path J1-SC2 and the scan electrode Y are maintained at the ground potential. However, the second separation switch element QS2 may not be turned on at the positions shown in FIGS.
On the other hand, since the two control signals CT1 and CT2 are both maintained at the L level, the high side auxiliary switch element SA1 and the high side ramp waveform generator QR1 are maintained in the off state, and the low side auxiliary switch element SA2 is maintained in the on state. Is done.
Further, the high side scan switch element SC1 is maintained in the off state, and the low side scan switch element SC2 is maintained in the on state.

<Mode II>
The first low side sustain switch element Q2 is turned off, and the first high side sustain switch element Q1 is turned on. As a result, the potential of the sustaining pulse transmission path J1-SC2 and the potential of the scan electrode Y rise to the potential Vs of the power supply unit Es. However, the first separation switch element QS1 may not be turned on at the positions shown in FIGS.

<Mode III>
The second separation switch element QS2 is turned off. Here, the first high-side sustain switch element Q1 and the first separation switch element QS1 may maintain either the on state or the off state.
On the other hand, since the two control signals CT1 and CT2 are both switched to the H level, the high side ramp waveform generator QR1 is turned on and the two auxiliary switch elements SA1 and SA2 are both turned off.
Further, the high side scan switch element SC1 is turned on and the low side scan switch element SC2 is turned off.
Thus, the initialization pulse voltage is not clamped to the potential Vs + V1 of the positive voltage of the first constant voltage source E1, that is, the voltage V1 of the first constant voltage source E1 higher than the upper limit Vs of the discharge sustaining pulse voltage. Reach up to Vr.

In the scan electrode driving unit 11 according to the fourth embodiment of the present invention, unlike the scan electrode driving unit 11 according to the third embodiment, the anode of the high-side ramp waveform generating unit QR1 is directly connected to the cathode of the high-side scan switch element SC1. The path of the control signal CT1 and the path of the second control signal CT2 are connected by the second inverter B3 and the wired OR circuit W (see FIGS. 13 and 14). By such a relatively simple circuit change, the two auxiliary switch elements SA1 and SA2 can both be maintained in the OFF state during the ON period of the high side ramp waveform generator QR1 without changing the configuration of the auxiliary switch drive unit DR1 ( (See Figure 15). As a result, as shown in FIG. 13, the series circuit (see FIGS. 8 to 11) including the initialization switch element Q6 connected to the power supply unit Es and the protection diode Dp is reduced. Thus, the number of parts and the size of the scan electrode driving unit 11 are reduced.
Similarly, the bypass switch element QB1 can be reduced in the scan electrode driving unit 11 according to Embodiments 1 and 2 of the present invention (see FIGS. 1 and 5).

<< Embodiment 5 >>
The plasma display according to Embodiment 5 of the present invention has the same configuration as the plasma display according to Embodiment 1 (see FIG. 1). Therefore, the description of Embodiment 1 and FIG. 1 are used for details of the configuration.

The scan electrode driving unit 11 according to the fifth embodiment of the present invention is different from the scan electrode driving unit 11 according to the first to third embodiments (refer to FIGS. 2, 5, 6, and 8 to 11), and generates a scan pulse generating unit 1C and an initialization pulse. The configuration differs from that of the part 2D (see FIG. 16). Further, a second separation switch element QS2 is included. Other components are the same as those according to the first to third embodiments.
In FIG. 16, the same reference numerals as those shown in FIGS. Furthermore, the description of Embodiments 1-3 of this invention is used for the detail of those similar components.

The scan pulse generator 1C includes two scan pulse generators 1A (see FIGS. 2, 5, and 6) according to the first and second embodiments and scan pulse generator 1B (see FIGS. 8 to 11) according to the third embodiment. It includes a series connection 1S of scan switch elements SC1 and SC2, a first constant voltage source E1, and two auxiliary switch elements SA1 and SA2.
However, the voltage V1 of the first constant voltage source E1 is higher than the output voltage Vn of the negative voltage source En: V1> Vn.
The positive electrode of the first constant voltage source E1 is connected to the cathode of the high side scanning switch element SC1 and the cathode of the high side auxiliary switch element SA1. The anode of the low-side auxiliary switch element SA2 and the anode of the high-side auxiliary switch element SA1 are connected to the cathode of the low-side auxiliary switch element SA2. The anode of the low-side auxiliary switch element SA2 is connected to the negative electrode of the first constant voltage source E1.

Similar to the scan pulse generators 1A and 1B according to the first to third embodiments, the two auxiliary switch elements SA1 and SA2 may not be installed. In that case, the anode of the low-side scan switch element SC2 is directly connected to the negative electrode of the first constant voltage source E1, and the cathode of the high-side scan switch element SC1 is connected through the first constant voltage source E1.
The low-side auxiliary switch element SA2 may be further connected between the positive electrode of the first constant voltage source E1 and the cathode of the high-side scan switch element SC1, separately from the position shown in FIG. In that case, the negative electrode of the first constant voltage source E1 is directly connected to the anode of the low-side scanning switch element SC2.

In addition to the negative voltage source En, the two ramp waveform generators QR1, QR2, and the second bypass switch element QB2, the initialization pulse generator 2D includes a protection diode Dn, a second constant voltage source E2, and a third constant generator. A voltage source E3, a first positive voltage source Eu, and two initialization switch sections Q5 and Q7 are included.
The protection diode Dn blocks current from the negative voltage source En to the first constant voltage source E1. When the positive electrode of the first constant voltage source E1 is grounded through the second isolation switch element QS2 and the first low-side sustain switch element Q2, the protective diode Dn is connected to the first constant voltage through the negative voltage source En. Prevent source E1 ground fault.
In the second constant voltage source E2, similarly to the second constant voltage source E2 according to the first and second embodiments (see FIGS. 2, 5, and 6), the output voltage V2 is the upper limit Vr of the initialization pulse voltage and the discharge sustaining pulse voltage. Is equal to the difference between the upper limit (= potential of the power supply unit Es) Vs: V2 = Vr−Vs.
The third constant voltage source E3 maintains the positive electrode potential higher than the negative electrode potential by a constant voltage V3 based on the output voltage Vs of the power supply unit Es by, for example, a DC-DC converter (not shown). The voltage V3 is equal to the voltage V1 of the first constant voltage source E1 and is lower than the voltage V2 of the second constant voltage source E2: V3 = V1 <V2.
The first positive voltage source Eu maintains the output terminal at a constant potential Vu based on the output voltage Vs of the power supply unit Es by, for example, a DC-DC converter (not shown). The potential Vu is lower than the upper limit Vs of the sustaining voltage pulse: Vu <Vs.

The two initialization switch parts Q5 and Q7 are both bidirectional switches, and include, for example, a series connection of two switch elements. These switch elements are preferably MOSFETs. In addition, it may be an IGBT or a bipolar transistor in which diodes are connected in parallel. In each initialization switch unit, anodes or cathodes of two switch elements are connected, and these switch elements are turned on and off in synchronization with each other.
The two initialization switch parts Q5 and Q7 may be a parallel connection of two IGBTs or bipolar transistors. In that case, one collector of the two transistors is connected to the other emitter.

  The negative voltage source En is connected to the cathode of the protection diode Dn. The anode of the protection diode Dn is connected to the anode of the low side ramp waveform generator QR2 and the anode of the second bypass switch element QB2. Both the cathode of the second bypass switch element QB2 and the cathode of the low side ramp waveform generator QR2 are connected to both the anode of the low side auxiliary switch element SA2 and the negative electrode of the first constant voltage source E1.

The negative electrode of the second constant voltage source E2 is connected to the output terminal J1 of the first sustaining pulse generator 3A, and the positive electrode is connected to the cathode of the high side ramp waveform generator QR1. The anode of the high side ramp waveform generator QR1 is connected to the cathode of the high side scan switch element SC1.
The negative electrode of the third constant voltage source E3 is connected to the output terminal J1 of the first sustaining pulse generation unit 3A, and the positive electrode is connected to the cathode of the high side scan switch element SC1 through the first initialization switch unit Q5. .
The anode of the second separation switch element QS2 is connected to the output terminal J1 of the first discharge sustaining pulse generator 3A, and the cathode is connected to the cathode of the high side scan switch element SC1.
The first positive voltage source Eu is connected to the anode of the second separation switch element QS2 through the second initialization switch unit Q7.

Unlike the scan electrode driving unit 11 according to the first to third embodiments, the scan electrode driving unit 11 according to the fifth embodiment of the present invention connects the second separation switch element QS2 from the output terminal J1 of the first discharge sustaining pulse generating unit 3A. A path that passes through to the cathode of the high-side scan switch element SC1 is used as a discharge sustaining pulse voltage transmission path.
On the other hand, the path from the anode of the high side ramp waveform generator QR1 to the cathode of the high side scan switch element SC1 is used as a high side initialization pulse transmission path. Further, a path from the cathode of the low side ramp waveform generator QR2 to the anode of the low side scan switch element SC2 through the low side auxiliary switch element SA2 is used as the low side initialization pulse transmission path.
The first constant voltage source E1 maintains the potential of the sustaining pulse transmission path J1-SC1 higher than the potential of the low-side initialization pulse transmission path QR2-SA2-SC2 by a certain voltage V1.

The first power recovery unit 4 has the same circuit configuration as the first power recovery unit 4 (see FIGS. 2 and 3) according to the first embodiment. Accordingly, an equivalent circuit of the first power recovery unit 4 is not shown in FIG. For the details of the equivalent circuit, the description of Embodiment 1 and FIGS.
In particular, as shown in FIG. 3 (B), when the first power recovery unit 4 includes two inductors L1 and L2, their other ends 41 and 42 are connected to the same node but connected to different nodes. May be.
In FIG. 16, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wiring directly connected to the output terminal J1 of the first sustaining pulse generating unit 3A; wiring directly connected to the cathode of the second separation switch element QS2 (for example, Node J4); a wire directly connected to the anode of the low-side scan switch element SC2 (for example, node J8); or a wire directly connected to the negative electrode of the first constant voltage source E1 (for example, node J9). , Or any two separately.

The sustain electrode driver 12 according to the fifth embodiment of the present invention differs from the sustain electrode driver 12 according to the first embodiment (see FIG. 2) in addition to the second discharge sustain pulse generator 3X and the initialization / scan pulse generator. 2X and separation switch part Q7X are included (see FIG. 16).
Other components are the same as those according to the first embodiment. In FIG. 16, the same reference numerals as those shown in FIG. 2 are given to the same constituent elements as those in the first embodiment. Furthermore, the description of Embodiment 1 of this invention is used for the detail of those similar components.
In particular, the second power recovery unit 4X has the same circuit configuration as the second power recovery unit 4X (see FIG. 2) according to the first embodiment of the present invention. Therefore, in FIG. 16, the equivalent circuit of the second power recovery unit 4X is not shown, and the description of the first embodiment and FIG. 2 are used for details of the equivalent circuit.

The initialization / scanning pulse generator 2X includes a fourth constant voltage source Ec, a second positive voltage source Ed, a high side switch element Q5X, and a low side switch element Q6X.
The fourth constant voltage source Ec maintains the positive electrode potential higher than the negative electrode potential by a constant voltage Vc based on the output voltage Vs of the power supply unit Es, for example, by a DC-DC converter (not shown). The voltage Vc is lower than the output voltage Vs of the power supply unit Es: Vc <Vs.
The second positive voltage source Ed maintains the output terminal at a constant potential Vd based on the output voltage Vs of the power supply unit Es by, for example, a DC-DC converter (not shown). The potential Vd is sufficiently lower than both the output voltage Vs of the power supply unit Es and the voltage Vc of the fourth constant voltage source Ec: Vd << Vs, Vc.
The two switch elements Q5X and Q6X are preferably MOSFETs. In addition, an IGBT or a bipolar transistor may be used. More preferably, it is a wide band gap semiconductor switch element.

The separation switch unit Q7X is a bidirectional switch and includes, for example, a series connection of two switch elements. These switch elements are preferably MOSFETs. In addition, it may be an IGBT or a bipolar transistor in which diodes are connected in parallel. In the separation switch portion Q7X, the anodes or the cathodes of the two switch elements are connected to each other, and these switch elements are turned on and off in synchronization with each other.
The separation switch part Q7X may be a parallel connection of two IGBTs or bipolar transistors. In that case, one collector of the two transistors is connected to the other emitter.

  The second positive voltage source Ed is connected to the cathode of the high side switch element Q5X. The anode of the high side switch element Q5X is connected to the cathode of the low side switch element Q6X. The anode of the low side switch element Q6X is grounded. A connection point J3X between the two switch elements Q5X and Q6X is connected to the negative electrode of the fourth constant voltage source Ec. The positive electrode of the fourth constant voltage source Ec is connected to the sustain electrode X of the PDP 20 through the separation switch part Q7X.

  In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 17). In FIG. 17, the switch elements Q1, Q2, QS2, Q5, Q7, QR1, QR2, QB2, SA1, SA2, SC1, and SC2 included in the scan electrode driver 11, and the switches included in the sustain electrode driver 12 Each on-period of the elements Q1X, Q2X, Q5X, Q6X, and Q7X is indicated by hatching.

In the initialization period, the potential of the scan electrode Y and the sustain electrode X is changed by application of the initialization pulse voltage. On the other hand, the potential of the address electrode A is maintained at the ground potential (≈0).
The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage. The on / off state of each switch element is switched for each mode.
However, during the initialization period, in the scan electrode driving unit 11, the second initialization switch unit Q7, the second bypass switch element QB2, and the high side auxiliary switch element SA1 are maintained in the off state, and the low side auxiliary switch element SA2 It remains on. In sustain electrode driver 12, second high-side sustain switch element Q1X and high-side switch element Q5X are maintained in the off state.

<Mode I>
In scan electrode driver 11, first low-side sustain switch element Q2, second separation switch element QS2, and high-side scan switch element SC1 are turned on. As a result, the sustaining pulse transmission path J1-SC1 and the scan electrode Y are maintained at the ground potential.
In sustain electrode driver 12, second low-side sustain switch element Q2X is turned on. Thereby, sustain electrode X is maintained at the ground potential.

<Mode II>
In scan electrode driver 11, first low-side sustain switch element Q2 is turned off, and first high-side sustain switch element Q1 is turned on. As a result, the potential of the sustaining pulse transmission path J1-SC1 and the scan electrode Y rises to the potential Vs of the power supply unit Es.
In sustain electrode driver 12, since the state of mode I is maintained, sustain electrode X is maintained at the ground potential.

<Mode III>
In the scan electrode driver 11, the second separation switch element QS2 is turned off, and the high side ramp waveform generator QR1 is turned on. As a result, the potential of the high-side initialization pulse transmission path QR1-SC1 and the scan electrode Y rises at a constant speed by the voltage V2 of the second constant voltage source E2, and reaches the upper limit Vr = Vs + V2 of the initialization pulse voltage . That is, the initialization pulse voltage reaches the upper limit Vr during the ON period of the high side scan switch element SC1.
A part of the sustaining pulse transmission path J1-SC1 overlaps with the high-side initialization pulse transmission path QR1-SC1. However, the second separation switch element QS2 is maintained in the OFF state, and the current from the high side scan switch element SC1 toward the output terminal J1 of the first discharge sustain pulse generator 3A is cut off. Therefore, on the cathode side of the second separation switch element QS2, the potential of the sustaining pulse transmission path can surely exceed the upper limit Vs of the sustaining pulse voltage. That is, the initialization pulse voltage reliably reaches the upper limit Vr of the initialization pulse voltage without being clamped to the upper limit Vs of the discharge sustaining pulse voltage.
At that time, the voltage across the second separation switch element QS2 is maintained at about the voltage V2 of the second constant voltage source E2. That is, the breakdown voltage of the second isolation switch element QS2 is sufficiently lower than the breakdown voltage of the conventional isolation switch element (about the upper limit Vr of the initialization pulse voltage).

In sustain electrode driver 12, since the state of mode II is maintained, sustain electrode X is maintained at the ground potential.
Thus, the applied voltage rises relatively slowly to the upper limit Vr of the initialization pulse voltage uniformly for all the discharge cells of the PDP 20. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20. At that time, since the increasing rate of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

<Mode IV>
In scan electrode driver 11, high-side ramp waveform generator QR1 is turned off, and first initialization switch unit Q5 is turned on. As a result, the potential of the high-side initialization pulse transmission path QR1-SC1 and the scan electrode Y drops to the potential Vt that is higher than the potential Vs of the power supply unit Es by the voltage V3 of the third constant voltage source E3: Vt = Vs + V3 < Vs + V2 = Vr. Here, since the second separation switch element QS2 is maintained in the OFF state, the output terminal J1 of the first sustaining pulse generation unit 3A is maintained at the potential Vs of the power supply unit Es.
In sustain electrode driver 12, since the state of mode III is maintained, sustain electrode X is maintained at the ground potential.
Accordingly, since the voltage between the scan electrode Y and the sustain electrode X drops in the discharge cell of the PDP 20, weak light emission stops.

<Mode V>
In scan electrode driver 11, high side scan switch element SC1 is turned off and low side scan switch element SC2 is turned on. That is, a voltage is applied to the scan electrode Y through the low-side scan switch element SC2. In particular, since the voltage is canceled between the first and third constant voltage sources E1 and E3 (V1 = V3), the potential of the scan electrode Y drops to the potential Vs of the power supply unit Es.
The high-side initialization pulse transmission path, particularly the cathode of the high-side scan switch element SC1, is maintained at the potential Vt = Vs + V3 in mode IV. At that time, since the second separation switch element QS2 is maintained in the OFF state, the output terminal J1 of the first discharge sustaining pulse generating unit 3A is maintained at the potential Vs of the power supply unit Es.
In the sustain electrode driver 12, the second low-side sustain switch element Q2X is turned off, and the low-side switch element Q6X and the separation switch part Q7X are turned on. As a result, the potential of the sustain electrode X is increased by the voltage Vc of the fourth constant voltage source Ec.
Thus, the voltage Vs−Vc is applied between the scan electrode Y and the sustain electrode X in the discharge cell of the PDP 20.

In modes IV to V, the potential of the scan electrode Y drops in two steps from the upper limit Vr of the initialization pulse voltage. In addition, the mode IV may be omitted, that is, the potential of the scan electrode Y may drop from the upper limit Vr of the initialization pulse voltage to the potential Vs of the power supply unit Es in one step. Thereby, the initialization time is shortened.
When the mode IV is omitted, the series connection of the third constant voltage source E3 and the first initialization switch unit Q5 may be omitted. At that time, in mode V, the high side ramp waveform generator QR1 is maintained in the ON state, and the scan electrode Y is maintained at the potential Vr−V1 that is lower than the upper limit Vr of the initialization pulse voltage by the voltage V1 of the first constant voltage source E1. The

<Mode VI>
In scan electrode driving unit 11, first high-side sustain switch element Q1 and first initialization switch unit Q5 are turned off, and low-side ramp waveform generating unit QR2 is turned on. As a result, the potentials of the low-side initialization pulse transmission path QR2-SA2-SC2 and the scan electrode Y both fall at a constant speed to the potential of the negative voltage source En (lower limit of the initialization pulse voltage) -Vn. That is, the initialization pulse voltage reaches the lower limit −Vn during the ON period of the low-side scan switch element SC2.
Here, the portion of the sustaining pulse transmission path J1-SC1 directly connected to the cathode of the second separation switch element QS2, that is, the potential of the high side initialization pulse transmission path QR1-SC1, is the low side initialization pulse transmission path QR2. It is higher than the potential of −SA2−SC2 by the voltage V1 of the first constant voltage source E1. Therefore, in mode VI, the entire sustaining pulse transmission path J1-SC1 is maintained at a potential higher than the ground potential regardless of whether the second separation switch element QS2 is on or off.

In sustain electrode driver 12, since the state of mode V is maintained, sustain electrode X is maintained at potential Vc in mode V.
Accordingly, a voltage having a polarity opposite to that applied in modes II to V is applied to the discharge cell of PDP 20. In particular, the applied voltage drops relatively slowly. Thereby, wall charges are uniformly removed and uniformed in all the discharge cells. At that time, since the rate of drop of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.
In particular, the lower limit −Vn of the initialization pulse voltage is lower than the ground potential: −Vn <0. Therefore, the voltage applied to the discharge cell of the PDP 20 is sufficiently increased, so that the wall charges are sufficiently removed. In addition, the voltage applied to the sustain electrode X in the initialization period may be reduced. Thereby, power consumption is reduced.

In mode V, the voltage cancels between the first and third constant voltage sources E1, E3: V1 = V3. Accordingly, the potential of the scan electrode Y is equal to the potential Vs of the power supply unit Es at the start time of the mode V and the mode VI.
In addition, the voltage V1 of the first constant voltage source E1 may be higher than the voltage V3 of the third constant voltage source E3: V1> V3. At that time, at the start of mode V and mode VI, the potential of the scan electrode Y is lower than the potential Vs of the power supply unit Es by the voltage difference V1−V3 between the two constant voltage sources E1 and E3: Vs− (V1 −V3). Thereby, since the time of mode VI is shortened, the entire initialization time is shortened.

  During the address period, in the sustain electrode driver 12, the high-side switch element Q5X and the separation switch part Q7X are maintained in the on state, and the other switch elements Q1X, Q2X, and Q6X are maintained in the off state. Accordingly, the sustain electrode X is maintained at the potential Vc + Vd that is higher than the potential Vd of the second positive voltage source Ed by the voltage Vc of the fourth constant voltage source Ec.

  During the address period, in the scan electrode driving unit 11, the second bypass switch element QB2 and the low-side auxiliary switch element SA2 are maintained in the ON state. Here, the second separation switch element QS2 may be maintained in either an on / off state. At that time, the anode of the low-side scan switch element SC2 is maintained at the potential −Vn of the negative voltage source En (hereinafter referred to as the lower limit of the scan pulse voltage). On the other hand, in the sustaining pulse transmission path J1-SC1, the cathode side of the second separation switch element QS2 (particularly the cathode of the high side scan switch element SC1) is the first constant voltage source from the lower limit −Vn of the scan pulse voltage. It is maintained at a potential Vp = V1-Vn (hereinafter referred to as the upper limit of the scan pulse voltage) which is higher by the voltage V1 of E1.

During the address period, similarly to the scan electrode drive unit 11 according to the second embodiment, the scan electrode drive unit 11 sequentially switches on / off states of the scan switch elements SC1, SC2 connected to the scan electrodes Y1, Y2, Y3,. . Thus, the scan pulse voltage SP is sequentially applied to each of the scan electrodes Y1, Y2, Y3,.
The address electrode driver 13 changes the potential of the selected address electrode A in the same manner as the address electrode driver 13 according to the second embodiment.
As a result, new wall charges are accumulated on the surface of a predetermined discharge cell.

During the discharge sustain period, in the scan electrode driver 11, the second separation switch element QS2, the high side auxiliary switch element SA1, and the high side scan switch element SC1 are maintained in the on state, and the low side auxiliary switch element SA2 is in the off state. Maintained. Thereby, the output terminal J1 of the first discharge sustaining pulse generating unit 3A is connected to the scan electrode Y through the high side scan switch element SC1.
In scan electrode driver 11, first sustaining pulse generator 3A turns on and off two sustain switch elements Q1 and Q2 alternately. As a result, the potential of the scan electrode Y changes between the potential Vs of the power supply unit Es and the ground potential. At that time, the current from the output terminal J1 of the first sustaining pulse generator 3A toward the scan electrode Y can pass through not only the high-side scan switch element SC1 but also the body diode of the low-side scan switch element SC2. Thereby, in the serial connection 1S of the scan switch elements SC1 and SC2, the occurrence of latch-up due to the increase in the amount of current is effectively suppressed.

In sustain electrode driver 12, separation switch Q7X is maintained in the off state, and second discharge sustain pulse generator 3X alternately turns on and off two sustain switch elements Q1X and Q2X. As a result, the potential of the sustain electrode X changes between the potential Vs of the power supply unit Es and the ground potential.
Scan electrode driver 11 and sustain electrode driver 12 alternately apply a sustain discharge pulse voltage to scan electrode Y and sustain electrode X, respectively. At that time, in the discharge cell in which the wall charges are accumulated during the address period, the gas discharge and the accumulation of the wall charges are repeated, so that the light emission of the phosphor is maintained.

The discharge sustain period, the address period, and the discharge sustain period are repeated for each subfield, for example.
In addition, for example, as in the following mode VII, the discharge sustain pulse voltage for the scan electrode Y at the end of the discharge sustain period is used instead of the initialization pulse voltage in the above-described modes I to V in the initialization period. (See mode VII shown in FIG. 17).

<Mode VII>
At the end of the discharge sustain period, the mode VII of the next initialization period is started with the discharge sustain pulse voltage LP applied last to the scan electrode Y rising. Here, the width of the last sustaining voltage pulse LP is narrower than the width of the other sustaining voltage pulses. As a result, in the discharge cells that have emitted light during the discharge sustain period, wall charges are removed at the start of mode VII.
In scan electrode driver 11, first high-side sustain switch element Q1 and high-side auxiliary switch element SA1 are turned off, and second initialization switch part Q7 and low-side auxiliary switch element SA2 are turned on. As a result, the potential of the sustaining pulse transmission path J1-SC1 and the scan electrode Y drops to the potential Vu of the first positive voltage source Eu. Since the potential Vu is lower than the upper limit Vs of the sustaining voltage pulse, the entire sustaining pulse transmission path J1-SC1 is stably maintained at the potential Vu.

In sustain electrode driver 12, second low-side sustain switch element Q2X is turned off, and high-side switch element Q5X and separation switch part Q7X are turned on. As a result, the potential of the sustain electrode X is increased by the voltage Vc of the fourth constant voltage source Ec.
Thus, in mode VII, similarly to mode V, potential Vu of scan electrode Y is maintained slightly higher than potential Vc of sustain electrode X.

After the mode VII, the above-described mode VI is executed, and the potential of the scan electrode Y drops to the lower limit −Vn (<0) of the initialization pulse voltage at a constant speed. On the other hand, sustain electrode X is maintained at potential Vc (> 0) in mode VII.
Accordingly, a voltage having a polarity opposite to that applied in mode VII is applied to the discharge cell of PDP 20. As a result, the wall charges are uniformly removed and made uniform in all the discharge cells. At that time, since the rate of decrease of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.
The light emission of the discharge cell in mode VII and mode VI immediately thereafter is weaker than that in modes I to VI. For example, during one field period, initialization in modes I to VI may be performed only in the first subfield, and initialization in modes VII to VI may be performed in the remaining subfields. At this time, since the “black” light emission level by the PDP 20 is reduced, the contrast of the PDP 20 is improved.

In the PDP driving apparatus according to the fifth embodiment of the present invention, as described above, the potential of the sustaining pulse transmission path J1-SC1 is maintained at the ground potential, that is, the lower limit of the sustaining voltage pulse voltage over both the initialization period and the address period. Is done. Accordingly, there is substantially no current flowing out from the output terminal J1 of the first sustaining pulse generating unit 3A. Therefore, even if the separation switch element for cutting off the current is not installed, the initialization pulse voltage can be surely reached the lower limit −Vn without being clamped to the lower limit of the sustaining voltage pulse.
Thus, since the number of separation switch elements is reduced, the conduction loss due to the separation switch elements is low in the PDP driving device according to Embodiment 5 of the present invention. Therefore, the power consumption is lower than that of the conventional driving device. Furthermore, the size can be easily reduced by reducing the number of separation switch elements. In addition, since parasitic inductance due to circuit elements and wiring on the sustaining pulse transmission path is reduced, ringing included in the voltage applied to the PDP is reduced. As a result, the PDP driving apparatus according to Embodiment 5 of the present invention is advantageous for further improving the image quality of the plasma display.

In the initialization pulse generator 2D according to the fifth embodiment of the present invention, the series connection of the third constant voltage source E3 and the first initialization switch Q5 is the output of the first discharge sustaining pulse generator 3A. Between the terminal J1 and the cathode of the high side scanning switch element SC1, it is connected in parallel with the second separation switch element QS2.
In addition, a series connection of the third constant voltage source E3 and the first initialization switch unit Q5 may be connected between the anode of the second separation switch element QS2 and the ground terminal (third constant The negative electrode of the voltage source E3 is grounded). In that case, the voltage V3 of the third constant voltage source E3 and the voltage V2 = Vr−Vs of the second constant voltage source E2 are equal to the potential Vt of the scan electrode Y in the above mode IV. The voltage V3 of the third constant voltage source E3 is set: V3 = Vt−V2 = Vt− (Vr−Vs). In modes IV and V in the initialization period, the first high-side sustain switch element Q1 is maintained in the off state, and the high-side ramp waveform generator QR1 is maintained in the on state. Thereby, the cathode of the high-side scan switch element SC1 is maintained at the same potential Vt as described above.
Further, when the output voltage Vu of the first positive voltage source Eu may be equal to the voltage V3 of the third constant voltage source E3, the common constant voltage source is the first positive voltage source Eu and the third constant voltage. It may also be used as the source E3. Thereby, the number of constant voltage sources and bidirectional switches to be connected to them can be reduced.

  In addition to the above, a series connection of the third constant voltage source E3 and the first initialization switch unit Q5 may be connected between the cathode of the second separation switch element QS2 and the ground terminal (third The negative terminal of the constant voltage source E3 is grounded). In that case, the voltage V3 of the third constant voltage source E3 is set equal to the potential Vt of the scan electrode Y in the above mode IV: V3 = Vt. In modes IV and V in the initialization period, even if the first high-side sustain switch element Q1 is maintained in the OFF state, the cathode of the high-side scan switch element SC1 is maintained at the same potential Vt as described above.

Embodiment 6
The plasma display according to Embodiment 6 of the present invention has the same configuration as the plasma display according to Embodiment 1 (see FIG. 1). Therefore, the description of Embodiment 1 and FIG. 1 are used for details of the configuration.
The sustain electrode driver (not shown) according to the sixth embodiment of the present invention has the same configuration as the sustain electrode driver 12 (see FIG. 2) according to the first embodiment. Therefore, the description of Embodiment 1 and FIG. 2 are used for details of the configuration.

In the scan electrode driver 11 according to the sixth embodiment of the present invention, unlike the scan electrode driver 11 according to the first to third and fifth embodiments, the output terminal J1 of the first discharge sustaining pulse generator 3B is a high-side scan switch element. Directly connected to the cathode of SC1 (see Figure 18).
The initialization pulse generator 2E includes the same components as those of the initialization pulse generator 2C according to the third embodiment (see FIGS. 8 to 11), and the positive voltage source Et according to the first and second embodiments (FIGS. 2, 5, 6). And a second protection diode Dn similar to the protection diode Dn according to the fifth embodiment (see FIG. 16).
In the first discharge sustaining pulse generating unit 3B, as in the second connection mode according to the second embodiment (see FIG. 6), the second separation switch element QS2 and the first separation switch element QS2 are connected between the power supply unit Es and the output terminal J1. A series connection with the high side sustain switch element Q1 is installed.
Other components are the same as those according to the first to third and fifth embodiments. 18, the same reference numerals as those shown in FIGS. 2, 5, 6, 8 to 11 and 16 are attached to the similar components. Furthermore, the description of Embodiments 1-3 of this invention is used for the detail of those similar components.

The first positive voltage source Er maintains the potential of the output terminal at the upper limit Vr of the initialization pulse voltage.
The first positive voltage source Er is connected to the cathode of the high side ramp waveform generator QR1. The anode of the high side ramp waveform generator QR1 is directly connected to the cathode of the high side scan switch element SC1.

The second positive voltage source Et maintains the output terminal at a constant potential Vt. The potential Vt is preferably higher than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1: Vt = Vs + V1.
The second positive voltage source Et is connected to the anode of the first protection diode Dp. The cathode of the first protection diode Dp is connected to the cathode of the initialization switch element Q6. The anode of the initialization switch element Q6 is directly connected to the cathode of the high side scan switch element SC1.

The first power recovery unit 4 has the same circuit configuration as the first power recovery unit 4 (see FIGS. 2 and 3) according to the first embodiment. Accordingly, an equivalent circuit of the first power recovery unit 4 is not shown in FIG. For the details of the equivalent circuit, the description of Embodiment 1 and FIGS.
In particular, as shown in FIG. 3 (B), when the first power recovery unit 4 includes two inductors L1 and L2, their other ends 41 and 42 are connected to the same node but connected to different nodes. May be.
In FIG. 18, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wiring directly connected to the output terminal J1 of the first sustaining pulse generating unit 3B; the first high-side sustaining switch element Q1 and the second separation switch Either a node J7 between the element QS2; a wiring directly connected to the anode of the low-side scan switch element SC2 (for example, the node J8); or a wiring directly connected to the negative electrode of the first constant voltage source E1 (for example, the node J9). Connected to one, or connected separately to any two.
However, when the first high-side sustain switch element Q1 and the second separation switch element QS2 are connected with a polarity opposite to the polarity shown in FIG. 18, the first node is at the node J7 between the switch elements. The power recovery unit 4 is not connected.

  In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 19). In FIG. 19, the ON periods of the switch elements Q1, Q2, QS2, Q6, QR1, QR2, QB2, SA1, SA2, SC1, and SC2 included in the scan electrode driving unit 11 are indicated by hatched portions.

In the initialization period, the potential of the scan electrode Y and the sustain electrode X is changed by application of the initialization pulse voltage. On the other hand, the address electrode A is maintained at the ground potential (≈0).
The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage. For each mode, the on / off state of the switch element included in the scan electrode driving unit 11 is switched. However, during the initialization period, the second bypass switch element QB2 and the high-side auxiliary switch element SA1 are maintained in the off state, and the low-side auxiliary switch element SA2 is maintained in the on state.

<Mode I>
Since first low-side sustain switch element Q2 and high-side scan switch element SC1 are turned on, discharge sustain pulse transmission path J1-SC1 and scan electrode Y are maintained at the ground potential. The second separation switch element QS2 may not be turned on.
<Mode II>
The first low side sustain switch element Q2 is turned off, and the first high side sustain switch element Q1 and the second separation switch element QS2 are turned on. As a result, the potential of the sustaining pulse transmission path J1-SC1 and the scan electrode Y rises to the potential Vs of the power supply unit Es.

<Mode III>
Since the second separation switch element QS2 is turned off and the high side ramp waveform generator QR1 is turned on, the potential of the discharge sustaining pulse transmission path J1-SC1 and the scan electrode Y is constant at the potential of the power supply unit Es. It rises from Vs and reaches the potential of the first positive voltage source Er (upper limit of the initialization pulse voltage) Vr. That is, the initialization pulse voltage reaches the upper limit Vr during the ON period of the high side scan switch element SC1.
Here, in FIG. 18, the high-side sustain switch element Q1 may not be turned on.
Thus, the applied voltage rises relatively slowly to the upper limit Vr of the initialization pulse voltage uniformly for all the discharge cells of the PDP 20. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20. At that time, since the increasing rate of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

Discharge sustaining pulse transmission path J1-SC1 overlaps with high-side initialization pulse transmission path QR1-SC1. However, since the second separation switch element QS2 is maintained in the off state, the potential of the sustaining pulse transmission path J1-SC1 can surely exceed the upper limit Vs of the sustaining voltage pulse. That is, the initialization pulse voltage reliably reaches the upper limit Vr without being clamped at the upper limit Vs of the discharge sustaining pulse voltage.
At that time, the voltage across the second separation switch element QS2 is maintained at about the difference Vr−Vs between the upper limit Vr of the initialization pulse voltage and the potential Vs of the power supply unit Es. That is, the breakdown voltage of the second isolation switch element QS2 is sufficiently lower than the breakdown voltage of the conventional isolation switch element (about the upper limit Vr of the initialization pulse voltage). Therefore, the second isolation switch element QS2 has low conduction loss.

<Mode IV>
Since the high-side ramp waveform generator QR1 is turned off and the initialization switch element Q6 is turned on, the potential of the sustaining pulse transmission path J1-SC1 and the scan electrode Y reaches the potential Vt of the second positive voltage source Et. Descend.
<Mode V>
The high side scan switch element SC1 is turned off and the low side scan switch element SC2 is turned on. That is, a voltage is applied to the scan electrode Y through the low-side scan switch element SC2. Since the output voltage Vt of the second positive voltage source Et is applied to the scan electrode Y through the first constant voltage source E1, the potential of the scan electrode Y drops to the potential Vs of the power supply unit Es: Vs = Vt −V1. On the other hand, the sustaining pulse transmission path J1-SC1 is maintained at the potential Vt of the second positive voltage source Et.
Thus, in the discharge cell of the PDP 20, the scan electrode Y and the sustain electrode X are maintained at the same potential Vs.

In modes IV to V, the potential of the scan electrode Y drops in two steps from the upper limit Vr of the initialization pulse voltage. In addition, the mode IV may be omitted, that is, the potential of the scan electrode Y may drop from the upper limit Vr of the initialization pulse voltage to the potential Vs of the power supply unit Es in one step. Thereby, the initialization time is shortened.
When the mode IV is omitted, the second positive voltage source Et, the first protection diode Dp, and the initialization switch element Q6 may be omitted. At that time, in mode V, the high side ramp waveform generator QR1 is maintained in the ON state, and the scan electrode Y is maintained at the potential Vr−V1 that is lower than the upper limit Vr of the initialization pulse voltage by the voltage V1 of the first constant voltage source E1. The

<Mode VI>
Since the initialization switch element Q6 is turned off and the low-side ramp waveform generator QR2 is turned on, the potential of the low-side initialization pulse transmission path QR2-SA2-SC2 and the scan electrode Y is negative voltage source En at a constant speed. The potential drops to -Vn. That is, the initialization pulse voltage reaches the lower limit −Vn during the ON period of the low-side scan switch element SC2.
The potential of the sustaining pulse transmission path J1-SC1 is higher by the voltage V1 of the first constant voltage source E1 than the potential of the low-side initialization pulse transmission path QR2-SA2-SC2. Therefore, in mode VI, the entire sustaining pulse transmission path J1-SC1 is maintained at a potential higher than the ground potential. That is, the initialization pulse voltage reliably reaches the lower limit −Vn without being clamped to the ground potential (lower limit of the sustaining voltage pulse).

In sustain electrode driving unit 12, since the state of mode V is maintained, the potential of sustain electrode X is maintained at the potential Vs of power supply unit Es.
In this way, a voltage having a polarity opposite to that applied in modes II to V is uniformly applied to all discharge cells of the PDP 20. As a result, the wall charges are uniformly removed and made uniform in all the discharge cells. At that time, since the rate of decrease of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.
In particular, the lower limit −Vn of the initialization pulse voltage is lower than the ground potential: −Vn <0. Accordingly, the applied voltage to the discharge cell of the PDP 20 is sufficiently increased, so that the wall charges are sufficiently removed. In addition, the voltage applied to the sustain electrode X in the initialization period may be reduced. Thereby, power consumption is reduced.

In the address period and the discharge sustain period, the scan electrode driver 11 operates in exactly the same manner as the scan electrode driver 11 according to the fifth embodiment. Therefore, the description of Embodiment 5 is used for the details.
However, if the first power recovery unit 4 is not connected to the node J7 between the second separation switch element QS2 and the first high-side sustain switch element Q1, the second separation switch during the discharge maintenance period The element QS2 may be turned on / off in synchronization with the first high-side sustain switching element Q1.
Furthermore, during the discharge sustain period, the current associated with the gas discharge in the PDP 20 flows only in one direction through the second separation switch element QS2. Therefore, the second separation switch element QS2 has low conduction loss.

  Since the high-side auxiliary switch element SA1 is maintained in the ON state during the discharge sustain period, the current from the output terminal J1 of the first discharge sustain pulse generator 3B to the scan electrode Y is only the high-side scan switch element SC1. Instead, it can pass through the body diode of the low-side scan switch element SC2. Thereby, in the serial connection 1S of the scan switch elements SC1 and SC2, the occurrence of latch-up due to the increase in the amount of current is effectively suppressed.

In the PDP driving apparatus according to the sixth embodiment of the present invention, as described above, the potential of the sustaining pulse transmission path J1-SC1 is maintained at the ground potential, that is, the lower limit of the sustaining voltage pulse, over both the initialization period and the address period. Is done. Accordingly, there is substantially no current flowing out from the output terminal J1 of the first sustaining pulse generating unit 3B. Therefore, even if the separation switch element for cutting off the current is not installed, the initialization pulse voltage can be surely reached the lower limit −Vn without being clamped to the lower limit of the sustaining voltage pulse.
Thus, since the number of separation switch elements is reduced, the conduction loss due to the separation switch elements is low in the PDP driving device according to Embodiment 6 of the present invention. Therefore, the power consumption is lower than that of the conventional driving device. Furthermore, the size can be easily reduced by reducing the number of separation switch elements. In addition, since the parasitic inductance due to the circuit elements and wiring on the sustaining pulse transmission path is reduced, ringing included in the voltage applied to the PDP is reduced. As a result, the PDP driving apparatus according to Embodiment 6 of the present invention is advantageous for further improving the image quality of the plasma display.

<< Embodiment 7 >>
The plasma display according to Embodiment 7 of the present invention has the same configuration as the plasma display according to Embodiment 1 (see FIG. 1). Therefore, the description of Embodiment 1 and FIG. 1 are used for details of the configuration.
The sustain electrode driver (not shown) according to the seventh embodiment of the present invention has the same configuration as the sustain electrode driver 12 (see FIG. 2) according to the first embodiment. Therefore, the description of Embodiment 1 and FIG. 2 are used for details of the configuration.

In the scan electrode driving unit 11 according to Embodiment 7 of the present invention, unlike the scan electrode driving unit 11 according to Embodiments 1 to 6, the first discharge sustaining pulse generating unit 3E has two output terminals J11 and J12 (see FIG. 20).
The anode of the first high-side sustain switch element Q1 is connected to the cathode of the high-side scan switch element SC1 through the high-side output terminal J11 and the second separation switch element QS2. That is, the upper limit Vs of the sustaining voltage pulse is passed through a path (hereinafter referred to as a high-side sustaining pulse transmission path) from the high-side output terminal J11 to the high-side scanning switch element SC1 through the second separation switch element QS2. , Applied to the scan electrode Y.
The cathode of the first low side sustain switch element Q2 is connected to the anode of the low side scan switch element SC2 through the low side output terminal J12 and the first separation switch element QS1. That is, the lower limit (= ground voltage) of the sustaining voltage pulse is a path (hereinafter referred to as a low-side sustaining pulse transmission path) from the low-side output terminal J12 to the low-side scanning switch element SC2 through the first separation switch element QS1. Through, it is applied to the scan electrode Y.

  The first low-side sustain switch element Q2 and the first separation switch element QS1 may be connected in reverse. That is, the cathode of the first separation switch element QS1 is grounded, the anode is connected to the anode of the first low side sustain switch element Q2, and the cathode of the first low side sustain switch element Q2 is connected to the low side output terminal J12. Also good.

  The scan pulse generator 1B has the same configuration as the scan pulse generator 1B (see FIGS. 8 to 11) according to the third embodiment (see FIG. 20). In particular, the potential of the high-side sustaining pulse transmission path J11-QS2-SC1 is maintained higher than the potential of the low-side sustaining pulse transmission path J12-QS1-SC2 by the voltage V1 of the first constant voltage source E1.

The initialization pulse generator 2F generates the initialization pulse according to the fifth embodiment except that the first positive voltage source Eu and the second initialization switch unit Q7 are not connected in series and do not include the second protection diode Dn. It has the same configuration as the part 2D (see FIG. 16) (see FIG. 20).
In addition, the initialization pulse generator may have the same configuration as that of the initialization pulse generator 2E according to the sixth embodiment (see FIG. 18). In that case, the first high-side sustain switch element Q1 and the second separation switch element QS2 may be connected with a polarity opposite to the polarity shown in FIG. That is, the anode of the second separation switch element QS2 is connected to the power supply unit Es, the cathode is connected to the cathode of the first high side sustain switch element Q1, and the anode of the first high side sustain switch element Q1 is the high side It may be connected to the output terminal J11.

  Other components are the same as the components according to the first to third embodiments. In FIG. 20, the same components as those shown in FIGS. 8 to 11 and FIG. Furthermore, the description of Embodiments 1-3, 5, and 6 of this invention is used for the detail of those similar components.

The first power recovery unit 4 has the same circuit configuration as the first power recovery unit 4 (see FIGS. 2 and 3) according to the first embodiment. Therefore, in FIG. 20, an equivalent circuit of the first power recovery unit 4 is not shown. For the details of the equivalent circuit, the description of Embodiment 1 and FIGS.
In particular, as shown in FIG. 3 (B), when the first power recovery unit 4 includes two inductors L1 and L2, their other ends 41 and 42 are connected to the same node but connected to different nodes. May be.
In FIG. 20, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wires directly connected to the two output terminals J11 and J12 of the first discharge sustaining pulse generating unit 3E; to the cathode of the high-side scan switch element SC1 Wiring directly connected (eg, node J2); Wiring directly connected to the positive electrode of the first constant voltage source E1 (eg, node J3); or Wiring directly connected to the negative electrode of the first constant voltage source E1 (eg, node J4); Either one is connected, or any two are connected separately.

  In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 21). In FIG. 21, the ON periods of the switching elements Q1, Q2, QS1, QS2, Q5, QR1, QR2, QB2, SA1, SA2, SC1, and SC2 included in the scan electrode driving unit 11 are indicated by hatched portions.

In the initialization period, the potential of the scan electrode Y and the sustain electrode X is changed by application of the initialization pulse voltage. On the other hand, the address electrode A is maintained at the ground potential (≈0).
The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage. For each mode, the on / off state of the switch element included in the scan electrode driving unit 11 is switched. However, during the initialization period, the second bypass switch element QB2 is maintained in the off state.

<Mode I>
Since the first low-side sustain switch element Q2, the first separation switch element QS1, and the low-side scan switch element SC2 are turned on, the low-side discharge sustain pulse transmission path J12-QS1-SC2 and the scan electrode Y are at the ground potential. Maintained. On the other hand, the potential of the high-side sustaining pulse transmission path J11-QS2-SC1 is maintained at a potential equal to or higher than the voltage V1 of the first constant voltage source E1 from the ground potential.
<Mode II>
The first low-side sustain switch element Q2, the first separation switch element QS1, and the low-side scan switch element SC2 are turned off, and the first high-side sustain switch element Q1, the second separation switch element QS2, and the high-side scan Switch element SC1 is turned on. As a result, the high side sustaining pulse transmission path J11-QS2-SC1 is maintained at the potential Vs of the power supply unit Es, so that the potential of the scan electrode Y rises to the potential Vs of the power supply unit Es.
On the other hand, the low-side sustaining pulse transmission path J12-QS1-SC2 is maintained at the potential Vs-V1, which is lower than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1.

<Mode III>
Since the second separation switch element QS2 is turned off and the high-side ramp waveform generator QR1 is turned on, the potential of the high-side initialization pulse transmission path QR1-SC1 and the scan electrode Y is constant at the second speed. The voltage rises by the voltage V2 of the constant voltage source E2, and reaches the upper limit Vr = Vs + V2 of the initialization pulse voltage. That is, the initialization pulse voltage reaches the upper limit Vr during the ON period of the high side scan switch element SC1.
Thus, the applied voltage rises relatively slowly to the upper limit Vr of the initialization pulse voltage uniformly for all the discharge cells of the PDP 20. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20. At that time, since the increasing rate of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

A part QS2-SC1 of the high-side sustaining pulse transmission path J11-QS2-SC1 overlaps with the high-side initialization pulse transmission path QR1-SC1. However, since the second separation switch element QS2 is maintained in the off state, the cathode potential of the high side scan switch element SC1 can surely exceed the upper limit Vs of the sustaining voltage pulse. That is, the initialization pulse voltage reliably reaches the upper limit Vr without being clamped at the upper limit Vs of the sustaining pulse voltage.
At that time, the voltage across the second separation switch element QS2 is maintained at about the voltage V2 = Vr−Vs of the second constant voltage source E2. That is, the breakdown voltage of the second isolation switch element QS2 is sufficiently lower than the breakdown voltage of the conventional isolation switch element (about the upper limit Vr of the initialization pulse voltage). Therefore, the second isolation switch element QS2 has low conduction loss.
On the other hand, the potential of the low-side discharge sustaining pulse transmission path J12-QS1-SC2 rises to a potential Vr-V1 that is lower than the upper limit Vr of the initialization pulse voltage by the voltage V1 of the first constant voltage source E1.

<Mode IV>
In scan electrode driver 11, high-side ramp waveform generator QR1 is turned off, and first initialization switch unit Q5 is turned on. As a result, the potential of the high-side initialization pulse transmission path QR1-SC1 and the scan electrode Y drops to the potential Vt that is higher than the potential Vs of the power supply unit Es by the voltage V3 of the third constant voltage source E3: Vt = Vs + V3 <Vs + V2 = Vr. Here, since the second separation switch element QS2 is maintained in the OFF state, the high-side output terminal J11 is maintained at the potential Vs of the power supply unit Es.
On the other hand, the potential of the low-side sustaining pulse transmission path J12-QS1-SC2 is lower than the potential Vt = Vs + V3 = Vs + V1 of the high-side initialization pulse transmission path QR1-SC1, by the voltage V1 of the first constant voltage source E1, that is, It drops to the potential Vs of the power supply unit Es.
In sustain electrode driver 12, since the state of mode III is maintained, sustain electrode X is maintained at the ground potential.
Accordingly, since the voltage between the scan electrode Y and the sustain electrode X drops in the discharge cell of the PDP 20, weak light emission stops.

<Mode V>
In scan electrode driver 11, high side scan switch element SC1 is turned off and low side scan switch element SC2 is turned on. That is, a voltage is applied to the scan electrode Y through the low-side scan switch element SC2. In particular, since the voltage is canceled between the first and third constant voltage sources E1 and E3 (V1 = V3), the low-side discharge sustaining pulse transmission path J12-QS1-SC2 is maintained at the potential Vs of the power supply unit Es. The Accordingly, the potential of the scan electrode Y drops to the potential Vs of the power supply unit Es.
On the other hand, high-side initialization pulse transmission path QR1-SC1 is maintained at potential Vt = Vs + V3 in mode IV. However, since the second separation switch element QS2 is maintained in the OFF state, the high side output terminal J11 is maintained at the potential Vs of the power supply unit Es.
In the sustain electrode driver 12, the second low-side sustain switch element Q2X is turned off (see FIG. 2), so that the potential of the sustain electrode X rises to the potential Vs of the power supply unit Es.
Thus, scan electrode Y and sustain electrode X are maintained at the same potential Vs.

In modes IV to V, the potential of the scan electrode Y drops in two steps from the upper limit Vr of the initialization pulse voltage. In addition, the mode IV may be omitted, that is, the potential of the scan electrode Y may drop from the upper limit Vr of the initialization pulse voltage to the potential Vs of the power supply unit Es in one step. Thereby, the initialization time is shortened.
When the mode IV is omitted, the series connection of the third constant voltage source E3 and the first initialization switch unit Q5 may be omitted. At that time, in mode V, the high side ramp waveform generator QR1 is maintained in the ON state, and the scan electrode Y is maintained at the potential Vr−V1 that is lower than the upper limit Vr of the initialization pulse voltage by the voltage V1 of the first constant voltage source E1. Is done.

<Mode VI>
In scan electrode driving unit 11, first high-side sustain switch element Q1 and first initialization switch unit Q5 are turned off, and low-side ramp waveform generating unit QR2 is turned on. As a result, the potentials of the low-side initialization pulse transmission path QR2-SC2 and the scan electrode Y both drop to the potential of the negative voltage source En (lower limit of the initialization pulse voltage) −Vn at a constant speed. That is, the initialization pulse voltage reaches the lower limit −Vn during the ON period of the low-side scan switch element SC2.
A part of the low-side sustaining pulse transmission path J12-QR1-SC2 overlaps with the low-side initialization pulse transmission path QR2-SC2. However, the first separation switch element QS1 is maintained in the OFF state, and the current from the low side output terminal J12 to the low side scan switch element SC2 is cut off. Therefore, on the anode side of the first separation switch element QS1, the potential of the low-side initialization pulse transmission path QR2-SC2 can surely drop to the negative potential -Vn. That is, the initialization pulse voltage reliably reaches the lower limit −Vn without being clamped to the ground potential, that is, the lower limit of the sustaining voltage pulse.

In sustain electrode driving unit 12, since the state of mode V is maintained, the potential of sustain electrode X is maintained at the potential Vs of power supply unit Es.
In this way, a voltage having a polarity opposite to that applied in modes II to V is uniformly applied to all discharge cells of the PDP 20. As a result, the wall charges are uniformly removed and made uniform in all the discharge cells. At that time, since the rate of decrease of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.
In particular, the lower limit −Vn of the initialization pulse voltage is lower than the ground potential: −Vn <0. Accordingly, the applied voltage to the discharge cell of the PDP 20 is sufficiently increased, so that the wall charges are sufficiently removed. In addition, the voltage applied to the sustain electrode X in the initialization period may be reduced. Thereby, power consumption is reduced.

In mode V, the voltage cancels between the first and third constant voltage sources E1, E3: V1 = V3. Accordingly, the potential of the scan electrode Y is equal to the potential Vs of the power supply unit Es at the start time of the mode V and the mode VI.
In addition, the voltage V1 of the first constant voltage source E1 may be higher than the voltage V3 of the third constant voltage source E3: V1> V3. At that time, at the start of mode V and mode VI, the potential of the scan electrode Y is lower than the potential Vs of the power supply unit Es by the voltage difference V1−V3 between the two constant voltage sources E1 and E3: Vs− (V1 −V3). Thereby, since the time of mode VI is shortened, the entire initialization time is shortened.

In the address period and the discharge sustain period, the scan electrode driver 11 operates in the same manner as the scan electrode driver 11 according to the fourth embodiment. Therefore, the description of Embodiment 4 is used for the details.
Particularly in the discharge sustaining period, the current associated with the gas discharge in the PDP 20 flows only in one direction in each of the separation switch elements QS1 and QS2. Therefore, both of the two separation switch elements QS1 and QS2 have low conduction loss.

In the discharge sustain period, the two separation switch elements QS1 and QS2 are both maintained in the on state.
In addition, when the first power recovery unit 4 is not directly connected to the low-side output terminal J12, the first separation switch element QS1 may be turned on / off in synchronization with the first low-side sustain switch element Q2.
Similarly, when the first power recovery unit 4 is not directly connected to the high side output terminal J11, the second separation switch element QS2 may be turned on / off in synchronization with the first high side sustain switch element Q1.

In FIG. 21, during the discharge sustain period, the high side auxiliary switch element SA1 and the low side scan switch element SC2 are maintained in the off state, and the low side auxiliary switch element SA2 and the high side scan switch element SC1 are maintained in the on state. At that time, the current from the high-side output terminal J11 of the first sustaining pulse generator 3E toward the scan electrode Y can pass through not only the high-side scan switch element SC1 but also the body diode of the low-side scan switch element SC2.
The on / off states of the two scanning switch elements SC1, SC2 may be reversed. At that time, the current from the scan electrode Y toward the low-side output terminal J12 of the first sustaining pulse generator 3E can pass through not only the low-side scan switch element SC2 but also the body diode of the high-side scan switch element SC1.
In either case, in the series connection 1S of the scan switch elements SC1 and SC2, the occurrence of latch-up due to an increase in current amount can be effectively suppressed.

In addition, during the discharge sustain period, when the first high side sustain switch element Q1 is turned on, the high side scan switch element SC1 is turned on, and when the first low side sustain switch element Q2 is turned on. The low side scan switch element SC2 may be turned on.
However, during the period (dead time) in which the two sustain switch elements Q1 and Q2 are both maintained in the off state, one of the two scan switch elements SC1 and SC2 is maintained in the on state. Through the scanning switch element, a current accompanying resonance between the inductor (see FIG. 3) included in the first power recovery unit 4 and the panel capacitance Cp of the PDP 20 flows.

Embodiment 8
The plasma display according to the eighth embodiment of the present invention has the same configuration as the plasma display according to the first embodiment (see FIG. 1). Therefore, the description of Embodiment 1 and FIG. 1 are used for details of the configuration.
The sustain electrode driver (not shown) according to the eighth embodiment of the present invention has the same configuration as the sustain electrode driver 12 (see FIG. 2) according to the first embodiment. Therefore, the description of Embodiment 1 and FIG. 2 are used for details of the configuration.

The scan electrode driver 11 according to the eighth embodiment of the present invention is common in the configuration of the scan electrode driver 11 (see FIG. 20) according to the seventh embodiment, the scan pulse generator 1B, and the first discharge sustain pulse generator 3E. (See Figure 22).
However, unlike the scan electrode driver 11 according to the seventh embodiment, the scan electrode driver 11 according to the eighth embodiment does not include the first separation switch element QS1.
Further, the initialization pulse generator 2E has the same configuration as the initialization pulse generator 2E (see FIG. 18) according to the sixth embodiment. However, in place of the second positive voltage source Et, the first protection diode Dp is connected to a power supply unit Es (or a positive voltage source having the same potential Vs as the power supply unit Es).
In addition, the polarity of the connection between the two output terminals J11 and J12 of the first sustaining pulse generator 3E and the series connection 1S of the two scan switch elements SC1 and SC2 is the scan electrode driver 11 according to the seventh embodiment. The opposite polarity (see Fig. 20) is as follows.

The high side output terminal J11 is connected to the anode of the low side scanning switch element SC2 through the second separation switch element QS2. That is, the upper limit Vs of the sustaining voltage pulse passes through a path (hereinafter referred to as a high-side sustaining pulse transmission path) from the high-side output terminal J11 through the second separation switch element QS2 to the low-side scanning switch element SC2. Applied to scan electrode Y.
The low side output terminal J12 is directly connected to the cathode of the high side scan switch element SC1. That is, the lower limit (= ground voltage) of the sustaining voltage pulse is applied to the scan electrode Y through a path from the low-side output terminal J12 to the high-side scan switch element SC1 (hereinafter referred to as a low-side sustaining pulse transmission path). Is done.
The potential of the high-side sustaining pulse transmission path J11-QS2-SC2 is maintained lower than the potential of the low-side sustaining pulse transmission path J12-SC1 by the voltage V1 of the first constant voltage source E1.

  The first high-side sustain switch element Q1 and the second separation switch element QS2 may be connected with a polarity opposite to that shown in FIG. That is, the anode of the second separation switch element QS2 is connected to the power supply unit Es, the cathode is connected to the cathode of the first high side sustain switch element Q1, and the anode of the first high side sustain switch element Q1 is the high side It may be connected to the output terminal J11.

  Other components are the same as those according to the first to seventh embodiments. In FIG. 22, the same reference numerals as those shown in FIGS. Furthermore, the description of Embodiments 1-7 of this invention is used for the detail of those similar components.

The first power recovery unit 4 has the same circuit configuration as the first power recovery unit 4 (see FIGS. 2 and 3) according to the first embodiment. Accordingly, an equivalent circuit of the first power recovery unit 4 is not shown in FIG. For the details of the equivalent circuit, the description of Embodiment 1 and FIGS.
In particular, as shown in FIG. 3 (B), when the first power recovery unit 4 includes two inductors L1 and L2, their other ends 41 and 42 are connected to the same node but connected to different nodes. May be.
In FIG. 22, the other ends 41 and 42 of the inductors L1 and L2 are, for example, wires directly connected to the two output terminals J11 and J12 of the first discharge sustaining pulse generator 3E; the positive electrode of the first constant voltage source E1 Is connected to any one of the wirings directly connected to the node (for example, the node J2); or the wirings directly connected to the negative electrode of the first constant voltage source E1 (for example, the node J4); The

  In the initialization period, the address period, and the discharge sustain period, the potentials of the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 change as follows (see FIG. 23). In FIG. 23, the ON periods of the switching elements Q1, Q2, QS2, Q6, QR1, QR2, QB2, SA1, SA2, SC1, and SC2 included in the scan electrode driving unit 11 are indicated by hatched portions.

In the initialization period, the potential of the scan electrode Y and the sustain electrode X is changed by application of the initialization pulse voltage. On the other hand, the address electrode A is maintained at the ground potential (≈0).
The initialization period is divided into the following six modes I to VI according to changes in the initialization pulse voltage. For each mode, the on / off state of the switch element included in the scan electrode driving unit 11 is switched. However, during the initialization period, the second bypass switch element QB2 and the low-side auxiliary switch element SA2 are maintained in the off state, and the high-side auxiliary switch element SA1 is maintained in the on state.

<Mode I>
The first low side sustain switch element Q2 and the high side scan switch element SC1 are turned on. Thereby, the low-side sustaining pulse transmission path J12-SC1 and the scan electrode Y are maintained at the ground potential. On the other hand, the potential of the high-side sustaining pulse transmission path J11-QS2-SC2 is maintained at a potential lower than the voltage V1 of the first constant voltage source E1 from the ground potential.
<Mode II>
The first low-side sustain switch element Q2 is turned off, and the initialization switch element Q6 is turned on. As a result, the potential of the low-side sustaining pulse transmission path J12-SC1 and the scan electrode Y rises to the potential Vs of the power supply unit Es.
On the other hand, the high-side sustaining pulse transmission path J11-QS2-SC2 rises to the potential Vs-V1 which is lower than the potential Vs of the power supply unit Es by the voltage V1 of the first constant voltage source E1.

<Mode III>
The initialization switch element Q6 is turned off, and the high side ramp waveform generator QR1 is turned on. As a result, the potential of the high-side initialization pulse transmission path QR1-SC1, that is, the low-side sustaining pulse transmission path J12-SC1, and the scan electrode Y rises at a constant speed and reaches the upper limit Vr of the initialization pulse voltage. That is, the initialization pulse voltage reaches the upper limit Vr during the ON period of the high side scan switch element SC1.
Thus, the applied voltage rises relatively slowly to the upper limit Vr of the initialization pulse voltage uniformly for all the discharge cells of the PDP 20. Thereby, uniform wall charges are accumulated in all the discharge cells of the PDP 20. At that time, since the increasing rate of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.

  When the difference Vr−V1 between the upper limit Vr of the initialization pulse voltage and the voltage V1 of the first constant voltage source E1 is lower than the potential Vs of the power supply unit Es (Vr−V1 <Vs), the high-side sustaining pulse transmission path J11 The potential of -QS2-SC2 is maintained below the upper limit Vs of the sustaining voltage pulse. Therefore, since the initialization pulse voltage is not clamped at the upper limit Vs of the sustaining voltage pulse, the second separation switch element QS2 need not be installed. Thereby, the number of separation switch elements is reduced.

When the difference Vr−V1 between the upper limit Vr of the initialization pulse voltage and the voltage V1 of the first constant voltage source E1 is higher than the potential Vs of the power supply unit Es (Vr−V1> Vs), the high-side discharge sustain pulse transmission In the path J11-QS2-SC1, on the cathode side QS2-SC1 of the second separation switch element QS2, the potential can exceed the upper limit Vs of the sustaining voltage pulse. However, since the second separation switch element QS2 is maintained in the off state, the cathode potential of the high side scan switch element SC1 can surely exceed the upper limit Vs of the sustaining voltage pulse. That is, the initialization pulse voltage reliably reaches the upper limit Vr without being clamped at the upper limit Vs of the discharge sustaining pulse voltage.
At that time, the voltage across the second separation switch element QS2 is the difference Vr between the potential Vr−V1 which is lower than the upper limit Vr of the initialization pulse voltage by the voltage V1 of the first constant voltage source E1 and the potential Vs of the power supply unit Es. It is maintained at about −V1−Vs. That is, the breakdown voltage of the second isolation switch element QS2 is sufficiently lower than the breakdown voltage of the conventional isolation switch element (about the upper limit Vr of the initialization pulse voltage). Therefore, the second isolation switch element QS2 has low conduction loss.

<Mode IV>
In the scan electrode driver 11, the high side ramp waveform generator QR1 and the high side scan switch element SC1 are turned off, the first high side sustain switch element Q1, the second separation switch element QS2, and the low side scan switch element SC2 Is turned on. Accordingly, the high-side sustaining pulse transmission path J11-QS2-SC2 is maintained at the potential Vs of the power supply unit Es, so that the potential of the scan electrode Y drops to the potential Vs of the power supply unit Es.
The low-side sustaining pulse transmission path J12-SC1 is maintained at a potential higher than the potential Vs of the high-side sustaining pulse transmission path J11-QS2-SC2 by the voltage V1 of the first constant voltage source E1.
In sustain electrode driver 12, since the state of mode III is maintained, sustain electrode X is maintained at the ground potential.
Accordingly, since the voltage between the scan electrode Y and the sustain electrode X drops in the discharge cell of the PDP 20, weak light emission stops.

<Mode V>
In scan electrode driving unit 11, since the state of mode IV is maintained, scan electrode Y is maintained at potential Vs of power supply unit Es.
In the sustain electrode driver 12, the second low-side sustain switch element Q2X is turned off (see FIG. 2), so that the potential of the sustain electrode X rises to the potential Vs of the power supply unit Es.
Thus, scan electrode Y and sustain electrode X are maintained at the same potential Vs.

<Mode VI>
In scan electrode driver 11, first high-side sustain switch element Q1 and second separation switch element QS2 are turned off, and low-side ramp waveform generator QR2 is turned on. As a result, the potentials of the low-side initialization pulse transmission path QR2-SC2 and the scan electrode Y both drop to the potential of the negative voltage source En (lower limit of the initialization pulse voltage) −Vn at a constant speed. That is, the initialization pulse voltage reaches the lower limit −Vn during the ON period of the low-side scan switch element SC2.
The potential of the low-side sustaining pulse transmission path J12-SC1 is higher than the potential of the low-side initialization pulse transmission path QR2-SC2 by the voltage V1 of the first constant voltage source E1, particularly higher than the ground potential. Therefore, the potential of the low-side initialization pulse transmission path QR2-SC2 is negative potential −Vn even if a separation switch element for cutting off the current flowing from the low-side sustaining pulse transmission path J12-SC1 to the low-side output terminal J12 is not installed. Can surely descend. That is, the initialization pulse voltage reliably reaches the lower limit −Vn without being clamped to the ground potential, that is, the lower limit of the sustaining voltage pulse. Thus, the number of separation switch elements is reduced.

In sustain electrode driving unit 12, since the state of mode V is maintained, the potential of sustain electrode X is maintained at the potential Vs of power supply unit Es.
In this way, a voltage having a polarity opposite to that applied in modes II to V is uniformly applied to all discharge cells of the PDP 20. As a result, the wall charges are uniformly removed and made uniform in all the discharge cells. At that time, since the rate of decrease of the applied voltage is small, the light emission of the discharge cell is suppressed to be weak.
In particular, the lower limit −Vn of the initialization pulse voltage is lower than the ground potential: −Vn <0. Accordingly, the applied voltage to the discharge cell of the PDP 20 is sufficiently increased, so that the wall charges are sufficiently removed. In addition, the voltage applied to the sustain electrode X in the initialization period may be reduced. Thereby, power consumption is reduced.

In the address period and the discharge sustain period, the scan electrode driver 11 operates in exactly the same manner as the scan electrode driver 11 according to the fifth embodiment. Therefore, the description of Embodiment 5 is used for the details.
Particularly in the discharge sustaining period, the second separation switch element QS2 has a low conduction loss because the current associated with the gas discharge in the PDP 20 flows only in one direction in the second separation switch element QS2.

In the discharge sustain period, the second separation switch element QS2 is maintained in the on state.
In addition, when the first power recovery unit 4 is not directly connected to the high side output terminal J11, the second separation switch element QS2 may be turned on and off in synchronization with the first high side sustain switch element Q1.

In FIG. 23, during the discharge sustain period, the high side auxiliary switch element SA1 and the high side scan switch element SC1 are maintained in the off state, and the low side auxiliary switch element SA2 and the low side scan switch element SC2 are maintained in the on state. At that time, the current from the scan electrode Y toward the low-side output terminal J12 of the first sustaining pulse generator 3E can pass through not only the low-side scan switch element SC2 but also the body diode of the high-side scan switch element SC1.
The on / off states of the two scanning switch elements SC1, SC2 may be reversed. At that time, the current from the high-side output terminal J11 of the first sustaining pulse generator 3E toward the scan electrode Y can pass through not only the high-side scan switch element SC1 but also the body diode of the low-side scan switch element SC2.
In either case, in the series connection 1S of the scan switch elements SC1 and SC2, the occurrence of latch-up due to an increase in current amount can be effectively suppressed.

In addition, during the discharge sustain period, when the first high side sustain switch element Q1 is turned on, the high side scan switch element SC1 is turned on, and when the first low side sustain switch element Q2 is turned on. The low side scan switch element SC2 may be turned on.
However, during the period (dead time) in which the two sustain switch elements Q1 and Q2 are both maintained in the off state, one of the two scan switch elements SC1 and SC2 is maintained in the on state. Through the scanning switch element, a current accompanying resonance between the inductor (see FIG. 3) included in the first power recovery unit 4 and the panel capacitance Cp of the PDP 20 flows.

In the PDP driving device according to the eighth embodiment of the present invention, as described above, in particular, the potential of the low-side sustaining pulse transmission path J12-SC1 is equal to or higher than the lower limit (= ground potential) of the sustaining voltage pulse during both the initialization period and the address period. Therefore, there is substantially no current flowing into the first sustaining pulse generating unit 3E through the low-side output terminal J12. Therefore, unlike the conventional driving device (see FIG. 24), the initialization pulse voltage is not clamped to the lower limit of the sustaining voltage pulse even if a separation switch element for cutting off the current is not installed. It reaches the lower limit -Vn reliably.
Thus, since the number of separation switch elements is reduced, the conduction loss due to the separation switch elements is low in the PDP driving device according to Embodiment 8 of the present invention. Therefore, the power consumption is lower than that of the conventional driving device. Furthermore, the size can be easily reduced by reducing the number of separation switch elements. In addition, since the parasitic inductance due to the circuit elements and wiring on the sustaining pulse transmission path is reduced, ringing included in the voltage applied to the PDP is reduced. As a result, the PDP driving apparatus according to Embodiment 8 of the present invention is advantageous for further improving the image quality of the plasma display.

  In the scan electrode driving unit 11 according to the eighth embodiment of the present invention, as in the scan electrode driving unit 11 according to the fourth embodiment, the second path between the path of the first control signal CT1 and the path of the second control signal CT2 is the second. The inverter B3 and the wired OR circuit W may be connected (see FIG. 14). Thereby, both the auxiliary switch elements SA1 and SA2 can be maintained in the OFF state during the ON period of the high-side ramp waveform generating unit QR1 without changing the configuration of the auxiliary switch driving unit DR1 (see FIG. 15). As a result, as in FIG. 13, the series circuit including the initialization switch element Q6 connected to the power supply unit Es and the protection diode Dp can be reduced.

  The present invention relates to a PDP driving device, and as described above, the pulse generators are connected in a manner different from that of a conventional driving device. Thus, the present invention is an industrially applicable invention.

It is a block diagram which shows the structure of the plasma display by embodiment of this invention. FIG. 3 is an equivalent circuit diagram of a scan electrode driving unit 11, a sustain electrode driving unit 12, and a PDP 20 according to Embodiment 1 of the present invention. 3 is an equivalent circuit diagram of a first power recovery unit 4 according to an embodiment of the present invention. FIG. The first embodiment of the present invention includes the voltage applied to the scan electrode Y, sustain electrode X, and address electrode A of the PDP 20 in the initialization period, the address period, and the discharge sustain period, and the scan electrode driver 11 includes 4 is a waveform diagram showing each on period of switch elements Q1 to Q5, QB1, QR1, QR2, SA1, SA2, SC1, and SC2, and each on period of switch elements Q1X to Q4X included in sustain electrode driver 12. FIG. FIG. 5 is an equivalent circuit diagram of a scan electrode driving unit 11 and a PDP 20 according to Embodiment 2 of the present invention. The first separation switch element QS1 is connected according to the first aspect. FIG. 5 is an equivalent circuit diagram of a scan electrode driving unit 11 and a PDP 20 according to Embodiment 2 of the present invention. The first separation switch element QS1 is connected according to the second mode. Embodiment 2 of the present invention includes the applied voltage to the scan electrode Y, sustain electrode X, and address electrode A of the PDP 20 in the initialization period, address period, and discharge sustain period, and the scan electrode driver 11 includes FIG. 6 is a waveform diagram showing ON periods of switch elements Q1, Q2, QS1, Q5, QR1, QB1, QR2, QB2, SA1, SA2, SC1, and SC2. FIG. 5 is an equivalent circuit diagram of a scan electrode driver 11 and a PDP 20 according to Embodiment 3 of the present invention. The two separation switch elements QS1 and QS2 are connected according to the first aspect. FIG. 5 is an equivalent circuit diagram of a scan electrode driver 11 and a PDP 20 according to Embodiment 3 of the present invention. The two separation switch elements QS1 and QS2 are connected according to the second mode. FIG. 5 is an equivalent circuit diagram of a scan electrode driver 11 and a PDP 20 according to Embodiment 3 of the present invention. The two separation switch elements QS1 and QS2 are connected according to the third mode. FIG. 5 is an equivalent circuit diagram of a scan electrode driver 11 and a PDP 20 according to Embodiment 3 of the present invention. The two separation switch elements QS1 and QS2 are connected according to the fourth mode. The third embodiment of the present invention includes the voltage applied to the scan electrode Y, sustain electrode X, and address electrode A of the PDP 20 in the initialization period, the address period, and the discharge sustain period, and the scan electrode driver 11 includes FIG. 6 is a waveform diagram showing ON periods of switch elements Q1, Q2, QS1, QS2, Q6, QR1, QR2, QB2, SA1, SA2, SC1, and SC2. FIG. 6 is an equivalent circuit diagram of a scan electrode driving unit 11 and a PDP 20 according to Embodiment 4 of the present invention. For the scan electrode driver 11 according to Embodiment 4 of the present invention, the signal line between the auxiliary switch driver DR1 and the auxiliary switch elements SA1 and SA2, and the initialization switch driver DR2 and the high side ramp waveform generator QR1 It is a block diagram which shows the signal line in between. The fourth embodiment of the present invention includes the applied voltage to the scan electrode Y, sustain electrode X, and address electrode A of the PDP 20 in the initialization period, address period, and discharge sustain period, and the scan electrode driver 11 includes FIG. 6 is a waveform diagram showing ON periods of switch elements Q1, Q2, QS1, QS2, QR1, QR2, QB2, SA1, SA2, SC1, and SC2. FIG. 9 is an equivalent circuit diagram of a scan electrode driving unit 11, a sustain electrode driving unit 12, and a PDP 20 according to Embodiment 5 of the present invention. The fifth embodiment of the present invention includes the applied voltage to the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 in the initialization period, the address period, and the discharge sustain period, and is included in the scan electrode driver 11. Switch elements Q1, Q2, QS2, Q5, Q7, QR1, QR2, QB2, SA1, SA2, SC1, SC2 each ON period, and switch elements Q1X, Q2X, Q5X, Q6X, included in the sustain electrode drive unit 12, It is a wave form diagram which shows each ON period of Q7X. FIG. 10 is an equivalent circuit diagram of a scan electrode driving unit 11 and a PDP 20 according to Embodiment 6 of the present invention. Embodiment 6 of the present invention includes the applied voltage to the scan electrode Y, sustain electrode X, and address electrode A of the PDP 20 in the initialization period, address period, and discharge sustain period, and the scan electrode driver 11 includes FIG. 6 is a waveform diagram showing ON periods of switch elements Q1, Q2, QS2, Q6, QR1, QR2, QB2, SA1, SA2, SC1, and SC2. FIG. 10 is an equivalent circuit diagram of a scan electrode driver 11 and a PDP 20 according to Embodiment 7 of the present invention. The embodiment 7 of the present invention includes the applied voltage to the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 in the initialization period, the address period, and the discharge sustain period, and is included in the scan electrode driving unit 11 FIG. 6 is a waveform diagram showing ON periods of switch elements Q1, Q2, QS1, QS2, Q5, QR1, QR2, QB2, SA1, SA2, SC1, and SC2. FIG. 10 is an equivalent circuit diagram of a scan electrode driver 11 and a PDP 20 according to an eighth embodiment of the present invention. The eighth embodiment of the present invention includes the voltage applied to the scan electrode Y, sustain electrode X, and address electrode A of the PDP 20 in the initialization period, the address period, and the discharge sustain period, and is included in the scan electrode driver 11. FIG. 6 is a waveform diagram showing ON periods of switch elements Q1, Q2, QS2, Q6, QR1, QR2, QB2, SA1, SA2, SC1, and SC2. FIG. 6 is a diagram showing an equivalent circuit of a scan electrode driving unit 110, a sustain electrode driving unit 120, and a PDP 20 for a conventional PDP driving device. Regarding the conventional PDP driving device, the voltage applied to the scan electrode Y, the sustain electrode X, and the address electrode A of the PDP 20 in the initialization period, the address period, and the discharge sustain period, and the switch included in the scan electrode driver 110 4 is a waveform diagram showing the on periods of elements Q1, Q2, QS, QR1, QR2, SA1, SA2, SC1, and SC2, and the on periods of switch elements Q1X and Q2X included in sustain electrode driver 120. FIG. It is a figure which shows the equivalent circuit of the scanning electrode drive part 110 in which the minimum -Vn of the initialization pulse voltage is less than a grounding potential about the conventional PDP drive device.

Explanation of symbols

1A scan pulse generator
SC1 High-side scan switch element
SC2 Low-side scan switch element
SA1 High-side auxiliary switch element
SA2 Low side auxiliary switch element
V1 First constant voltage source
QB1 Bypass switch element
2A initialization pulse generator
QR1 High-side ramp waveform generator
QR2 Low-side ramp waveform generator
Q5 Initialization switch section
Vt positive voltage source
V2 Second constant voltage source
3A First discharge sustain pulse generator
Q1 First high-side sustain switch element
Q2 First low-side sustain switch element
4 First power recovery unit
Q3 First high-side recovery switch element
Q4 First low-side recovery switch element
L 1st inductor
C First recovery capacitor
D1 First high-side diode
D2 First low-side diode
3X Second sustaining pulse generator
Q1X Second high-side sustain switch element
Q2X Second low-side sustain switch element
4X Second power recovery unit
LX second inductor
CX second recovery capacitor
D1X Second high-side diode
D2X second low-side diode
Es Power supply
Vs DC voltage applied from the power supply unit Es
20 PDP
X PDP20 sustain electrode
Y PDP20 scan electrode
Panel capacity of Cp PDP20

Claims (23)

Two switch elements connected in series, including a high-side scan switch element and a low-side scan switch element whose connection point is connected to a scan electrode of a plasma display panel (PDP),
A scan pulse generator for applying a scan pulse voltage to the scan electrodes by alternately turning on the high-side scan switch element and the low-side scan switch element at a predetermined timing;
A discharge sustaining pulse generating unit configured to turn on one of the high side scan switching element and the low side scan switching element and apply a sustaining voltage pulse to the scan electrode; and
The high-side scan switch element and the low-side scan switch element are alternately turned on at a predetermined timing to apply an initialization pulse voltage to the scan electrode,
Raising the initialization pulse voltage to an upper limit during the on-period of the high-side scan switch element and lowering to a lower limit during the on-period of the low-side scan switch element;
Initialization pulse generator;
A PDP driving device. A high-side ramp waveform generator that raises the applied voltage to the high-side scan switch element at a predetermined speed;
A low-side ramp waveform generator that lowers the applied voltage to the low-side scan switch element at a predetermined speed;
The initialization pulse generator has,
The PDP driving device according to claim 1. The upper and lower limits of the sustaining voltage pulse are applied to the scan pulse generator through a common sustaining pulse transmission path that connects the sustaining pulse generator and the low-side scan switch element. The
The PDP driving device according to claim 1. A high-side sustain switch element connected to an external power source and applied with a voltage equal to the upper limit of the discharge sustain pulse voltage;
A low-side sustain switch element connected to an external power source or a ground conductor and applied with a voltage equal to the lower limit of the discharge sustain pulse voltage;
Including the discharge sustain pulse generator;
The high-side sustain switch element and the low-side sustain switch element are connected in series, and the connection point is connected to the low-side scan switch element through the discharge sustain pulse transmission path;
The PDP driving device according to claim 3. Even if the lower limit of the initialization pulse voltage is low, it is equal to the lower limit of the sustaining voltage pulse,
The PDP driving device according to claim 3. When the lower limit of the initialization pulse voltage is lower than the lower limit of the discharge sustaining pulse voltage, the discharge sustaining pulse transmission path from the discharge sustaining pulse generation unit during the period in which the initialization pulse voltage is lower than the lower limit of the discharge sustaining pulse voltage. A first isolation switch element that cuts off current flowing through the low side scan switch element through
The PDP driving device according to claim 3, further comprising: A constant voltage source including a positive electrode connected to the high-side scan switch element and a negative electrode connected to the low-side scan switch element, and maintaining a constant voltage between the positive electrode and the negative electrode; and
When the difference between the upper limit of the initialization pulse voltage and the voltage of the constant voltage source is higher than the upper limit of the discharge sustaining pulse voltage, the initialization pulse voltage is equal to the voltage of the constant voltage source and the upper limit of the discharge sustaining pulse voltage. A second separation switch element that cuts off a current from the negative electrode of the constant voltage source through the discharge sustain pulse transmission path to the discharge sustain pulse generator during a period exceeding the sum of
The PDP driving device according to claim 3, further comprising: A constant voltage source that maintains a constant voltage between the positive electrode and the negative electrode, including a negative electrode connected to the low-side scan switch element;
A high-side auxiliary switch element that connects the positive electrode of the constant voltage source to the high-side scan switch element;
A low-side auxiliary switch element that connects both ends of the series connection of the high-side scan switch element and the low-side scan switch element; and
An auxiliary switch driving unit for alternately turning on and off the high-side auxiliary switch element and the low-side auxiliary switch element;
Is further included in the scan pulse generator;
When the initialization pulse generator raises the initialization pulse voltage to an upper limit, the auxiliary switch driver prevents the high-side auxiliary switch element from being turned on;
The PDP driving device according to claim 3. A high-side ramp waveform generator for increasing the voltage applied to the high-side scan switch element at a predetermined speed; and
An on / off switch for the high-side ramp waveform generator, particularly an on-off switch driving unit for suppressing the on-side of the high-side auxiliary switch element by the auxiliary switch driving unit when turning on.
The initialization pulse generator further has
The PDP driving device according to claim 8. An upper limit and a lower limit of the discharge sustain pulse voltage are applied to the scan pulse generation unit through a common discharge sustain pulse transmission path connecting the discharge sustain pulse generation unit and the high side scan switch element. To be
The PDP driving device according to claim 1. A high-side sustain switch element connected to an external power source and applied with a voltage equal to the upper limit of the discharge sustain pulse voltage;
A low-side sustain switch element connected to an external power source or a ground conductor and applied with a voltage equal to the lower limit of the discharge sustain pulse voltage;
Including the discharge sustain pulse generator;
The high-side sustain switch element and the low-side sustain switch element are connected in series, and the connection point is connected to the high-side scan switch element through the discharge sustain pulse transmission path;
The PDP driving device according to claim 10. Second separation that cuts off a current from the high-side scan switch element through the discharge sustain pulse transmission path to the discharge sustain pulse generator during a period in which the initialization pulse voltage exceeds the upper limit of the discharge sustain pulse voltage Switch element,
The PDP driving device according to claim 10, further comprising: When the lower limit of the initialization pulse voltage is lower than the lower limit of the sustaining voltage pulse,
A positive electrode connected to the high-side scan switch element, and a negative electrode connected to the low-side scan switch element, and the lower limit of the discharge sustaining pulse voltage, even if the voltage between the positive electrode and the negative electrode is low A constant voltage source that is maintained equal to the difference from the lower limit of the initialization pulse voltage;
The PDP driving device according to claim 10, further comprising: An upper limit of the sustaining voltage pulse is applied to the scan pulse generating unit through a high side sustaining pulse transmission path connecting between the sustaining pulse generating unit and the high side scan switching element;
A lower limit of the sustaining voltage pulse is applied to the scan pulse generating unit through a low side sustaining pulse transmission path connecting the sustaining pulse generating unit and the low side scan switching element;
The PDP driving device according to claim 1. A high-side sustain switch element connected between an external power supply and the high-side scan switch element, to which a voltage equal to the upper limit of the discharge sustain pulse voltage is applied; and
A low-side sustain switch element connected between an external power source or a ground conductor and the low-side scan switch element, to which a voltage equal to the lower limit of the discharge sustain pulse voltage is applied;
Including the discharge sustain pulse generator,
The PDP driving device according to claim 14. Even if the lower limit of the initialization pulse voltage is low, it is equal to the lower limit of the sustaining voltage pulse,
The PDP driving device according to claim 14. When the lower limit of the initialization pulse voltage is lower than the lower limit of the discharge sustain pulse voltage, the low side discharge sustain pulse transmission is performed from the discharge sustain pulse generator during the period in which the initialization pulse voltage is lower than the lower limit of the discharge sustain pulse voltage. A first separation switch element that cuts off a current flowing through the path to the low-side scan switch element;
The PDP driving device according to claim 14, further comprising: A second block for cutting off a current from the high-side scan switching element through the high-side discharge sustaining pulse transmission path to the discharge sustaining pulse generating unit during a period in which the initialization pulse voltage exceeds the upper limit of the sustaining voltage pulse. Separation switch element,
The PDP driving device according to claim 14, further comprising: An upper limit of the sustaining pulse voltage is applied to the scan pulse generating unit through a high side sustaining pulse transmission path connecting between the sustaining pulse generating unit and the low side scan switching element;
A lower limit of the sustaining voltage pulse is applied to the scan pulse generator through a sustain sustaining pulse transmission path connecting the sustaining pulse generator and the high-side scan switch element;
The PDP driving device according to claim 1. A high-side sustain switch element connected between an external power source and the low-side scan switch element, to which a voltage equal to the upper limit of the sustaining voltage pulse is applied; and
A low-side sustain switch element connected between an external power source or a ground conductor and the high-side scan switch element, and applied with a voltage equal to a lower limit of the discharge sustain pulse voltage;
Including the discharge sustain pulse generator,
The PDP driving device according to claim 19. When the lower limit of the initialization pulse voltage is lower than the lower limit of the sustaining voltage pulse,
A positive electrode connected to the high-side scan switch element, and a negative electrode connected to the low-side scan switch element, and the lower limit of the discharge sustaining pulse voltage, even if the voltage between the positive electrode and the negative electrode is low A constant voltage source that is maintained equal to the difference from the lower limit of the initialization pulse voltage;
The PDP driving device according to claim 19, further comprising: A constant voltage source including a positive electrode connected to the high-side scan switch element and a negative electrode connected to the low-side scan switch element, and maintaining a constant voltage between the positive electrode and the negative electrode; and
When the difference between the upper limit of the initialization pulse voltage and the voltage of the constant voltage source is higher than the upper limit of the discharge sustaining pulse voltage, the initialization pulse voltage is equal to the voltage of the constant voltage source and the upper limit of the discharge sustaining pulse voltage. A second separation switch element for cutting off a current from the negative electrode of the constant voltage source to the discharge sustaining pulse generator during a period exceeding the sum of
The PDP driving device according to claim 19, further comprising: A discharge cell that emits light by the discharge of the gas enclosed therein; and
A sustain electrode and a scan electrode for applying an initialization pulse voltage, a scan pulse voltage, and a discharge sustain pulse voltage to the discharge cell,
A PDP having: and
Two switch elements connected in series, the connection point of which includes a high-side scan switch element and a low-side scan switch element connected to the scan electrode, the high-side scan switch element and the low-side scan switch element; Are alternately turned on at a predetermined timing to apply the scan pulse voltage to the scan electrodes;
A discharge sustaining pulse generator that turns on one of the high-side scan switch element and the low-side scan switch element to apply the sustaining voltage pulse to the scan electrode; and
A circuit for alternately turning on the high-side scan switch element and the low-side scan switch element at a predetermined timing and applying the initialization pulse voltage to the scan electrode; An initialization pulse generator that raises the scanning switch element to the upper limit during the on-period and lowers the lower-side scanning switch element to the lower limit during the on-period
A PDP driving device having:
A plasma display comprising:

Images