JP2006222360A - III-V nitride semiconductor and method of manufacturing the same - Google Patents
III-V nitride semiconductor and method of manufacturing the same Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 75
- 150000004767 nitrides Chemical class 0.000 title claims abstract description 74
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 83
- 239000010409 thin film Substances 0.000 claims abstract description 32
- 239000002994 raw material Substances 0.000 claims abstract description 11
- 229910021478 group 5 element Inorganic materials 0.000 claims abstract description 6
- 238000005979 thermal decomposition reaction Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 33
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 14
- 239000013078 crystal Substances 0.000 claims description 13
- 238000001657 homoepitaxy Methods 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 4
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- VCZQFJFZMMALHB-UHFFFAOYSA-N tetraethylsilane Chemical compound CC[Si](CC)(CC)CC VCZQFJFZMMALHB-UHFFFAOYSA-N 0.000 claims description 3
- CZDYPVPMEAXLPK-UHFFFAOYSA-N tetramethylsilane Chemical compound C[Si](C)(C)C CZDYPVPMEAXLPK-UHFFFAOYSA-N 0.000 claims description 3
- 238000000927 vapour-phase epitaxy Methods 0.000 claims description 3
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 abstract description 13
- 230000002542 deteriorative effect Effects 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 23
- 239000001257 hydrogen Substances 0.000 description 13
- 229910052739 hydrogen Inorganic materials 0.000 description 13
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 12
- 235000012431 wafers Nutrition 0.000 description 10
- 239000010408 film Substances 0.000 description 7
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 6
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 6
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- 230000000630 rising effect Effects 0.000 description 4
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 4
- 238000002441 X-ray diffraction Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 239000001294 propane Substances 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- 238000001947 vapour-phase growth Methods 0.000 description 3
- 229910021529 ammonia Inorganic materials 0.000 description 2
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- 238000000354 decomposition reaction Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000012798 spherical particle Substances 0.000 description 1
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Abstract
【課題】炉内付着物からＧａやＮラジカルの発生が起こってもＳｉ基板表面を劣化させず、さらにはスループットを落すことなく良質なIII−Ｖ族窒化物半導体薄膜を実現すること。
【解決手段】加熱したＳｉ基板上に複数のIII族元素またはＶ族元素を含む原料ガスを供給し、熱分解反応させてIII−Ｖ族窒化物半導体を成長させるIII−Ｖ族窒化物半導体の製造方法において、Ｓｉ元素を含む原料ガスを供給しながらＳｉ基板１を加熱することにより、Ｓｉ基板１上にＳｉを成長しつつＳｉ基板１を昇温し、その後にIII−Ｖ族窒化物半導体、例えばＡｌＮ層２の成長を行う。
【選択図】 図１To achieve a high-quality group III-V nitride semiconductor thin film without deteriorating the surface of a Si substrate even when Ga or N radicals are generated from deposits in a furnace, and further without reducing throughput.
A III-V nitride semiconductor in which a source gas containing a plurality of group III elements or group V elements is supplied onto a heated Si substrate and a group III-V nitride semiconductor is grown by a thermal decomposition reaction. In the manufacturing method, the Si substrate 1 is heated while supplying a raw material gas containing Si element, so that the temperature of the Si substrate 1 is raised while growing Si on the Si substrate 1, and then the group III-V nitride semiconductor is grown. For example, the AlN layer 2 is grown.
[Selection] Figure 1
Description
本発明は、III−Ｖ族窒化物半導体及びその製造方法に係り、特に、Ｓｉ基板上に良質なIII−Ｖ族窒化物半導体を成長する技術であって、従来品よりも特性に優れ、且つ低コストな窒化物半導体デバイス用エピタキシャルウェハの供給を実現する技術に関するものである。 The present invention relates to a group III-V nitride semiconductor and a method for manufacturing the group III-V nitride semiconductor, and in particular, a technique for growing a high-quality group III-V nitride semiconductor on a Si substrate, which is superior in characteristics to conventional products, and The present invention relates to a technique for realizing supply of an epitaxial wafer for a nitride semiconductor device at a low cost.
ＧａＮ、ＡｌＮ、ＩｎＮ、およびこれらの混晶を最適な構造で積層成長させたIII−Ｖ族窒化物半導体エピタキシャルウェハは、既に青色発光ダイオード（ＬＥＤ）用エピタキシャルウェハとして市場に出回っており、さらには青色レーザダイオード（ＬＤ）用エピタキシャルウェハや紫外ＬＥＤ用エピタキシャルウェハなども開発されつつある。また、近年の高出力トランジスタの需要に伴い、窒化物半導体結晶の用途は光デバイスに留まらず、ＧａＮ−ＨＥＭＴ用エピタキシャルウェハとして開発もなされるようになってきた。これら光・電子デバイス用エピタキシャルウェハに用いられる基板として実用レベルにあり、且つ市場に流通している基板は、サファイア基板とＳｉＣ基板だけである。 III-V nitride semiconductor epitaxial wafers in which GaN, AlN, InN, and mixed crystals thereof are stacked and grown in an optimum structure have already been put on the market as epitaxial wafers for blue light emitting diodes (LEDs). Blue laser diode (LD) epitaxial wafers and ultraviolet LED epitaxial wafers are also being developed. With the recent demand for high-power transistors, the use of nitride semiconductor crystals is not limited to optical devices, but has been developed as epitaxial wafers for GaN-HEMT. As substrates used for these epitaxial wafers for optical / electronic devices, there are only sapphire substrates and SiC substrates that are in practical use and are on the market.
また、これら市場に出ているエピタキシャルウェハのほとんどが有機金属気相成長法（ＭＯＶＰＥ法）にて成長したものである。なぜならば、ＭＯＶＰＥ法は、分子線エピタキシャル成長法（ＭＢＥ法）などとは異なり、高真空を必要とせず、一度に多数枚の基板上に均一に製膜することが容易であるからである。そのため高いスループットが実現でき、比較的低コストで製造できる。 Most of the epitaxial wafers on the market are grown by metal organic vapor phase epitaxy (MOVPE). This is because, unlike the molecular beam epitaxial growth method (MBE method) or the like, the MOVPE method does not require a high vacuum and can easily form a film uniformly on a large number of substrates at a time. Therefore, high throughput can be realized and manufacturing can be performed at a relatively low cost.
近年、ＭＯＶＰＥ法によるＳｉ基板上へのIII−Ｖ族窒化物半導体の成長に関する研究が盛んになりつつある。それは、Ｓｉ基板が、サファイア基板やＳｉＣ基板と比べて低価格なため、エピタキシャルウェハのさらなる低コスト化が可能になるからである。さらには大口径化が容易、且つ既存のＳｉデバイス用プロセスラインの適用が可能なため、デバイスの低コスト化も望める。 In recent years, research on the growth of III-V nitride semiconductors on Si substrates by the MOVPE method has been actively conducted. This is because the Si substrate is less expensive than the sapphire substrate or the SiC substrate, so that the cost of the epitaxial wafer can be further reduced. Furthermore, since the diameter can be easily increased and the existing process line for Si devices can be applied, it is possible to reduce the cost of the device.
しかし、Ｓｉ基板上に良質なIII−Ｖ族窒化物半導体を成長することは困難である。その主な原因として、Ｓｉ基板との格子定数差によるIII−Ｖ族窒化物半導体の劣化、また、熱膨張係数差によるエピタキシャルウェハの反りおよびクラックの発生が挙げられる。この問題を解決するために、昔から様々なバッファー層構造が提案されており、近年では超格子構造バッファー層などにより、商業化の動きがなされている。 However, it is difficult to grow a high-quality III-V nitride semiconductor on a Si substrate. The main causes include degradation of the group III-V nitride semiconductor due to the difference in lattice constant with the Si substrate, and the occurrence of warpage and cracks in the epitaxial wafer due to the difference in thermal expansion coefficient. In order to solve this problem, various buffer layer structures have been proposed for a long time, and in recent years, there has been a commercialization trend due to a superlattice structure buffer layer and the like.
しかし、それ以外にIII−Ｖ族窒化物半導体に大きな影響を及ぼしているのが、炉内内壁の窒化物付着物から発生するＧａやＮラジカルとＳｉ基板の反応である。これは１０００℃以上の高温で成長を行う、ＭＯＶＰＥ法で顕著に起こる問題である。ＧａはＳｉをエッチングする働きがあり、Ｓｉ基板に直径数μｍ程度の穴を開けてしまうこともある。そのため、III−Ｖ族窒化物半導体の表面の平坦性が著しく低下してしまう。また、ＮラジカルはＳｉ基板の最表面のＳｉ原子と反応して、アモルファス状のＳｉxＮyをＳｉ基板の表面に形成してしまう。このアモルファス膜が存在すると、Ｓｉ基板上に成長したIII−Ｖ族窒化物半導体の配向性が失われてしまう。この炉内付着物からのＧａやＮラジカルの発生は、炉内温度が８００℃以上になると始まると報告されている（非特許文献１参照）。つまり基板昇温時に表面反応が始まっていることになる。 However, other than that, the III-V nitride semiconductor has a great influence on the reaction between Ga and N radicals generated from the nitride deposits on the inner wall of the furnace and the Si substrate. This is a problem that occurs remarkably in the MOVPE method in which growth is performed at a high temperature of 1000 ° C. or higher. Ga has a function of etching Si, and a hole having a diameter of about several μm may be formed in the Si substrate. Therefore, the flatness of the surface of the III-V nitride semiconductor is significantly reduced. Further, N radicals react with Si atoms on the outermost surface of the Si substrate to form amorphous Si x N y on the surface of the Si substrate. If this amorphous film exists, the orientation of the III-V nitride semiconductor grown on the Si substrate is lost. It has been reported that the generation of Ga and N radicals from the in-furnace deposit starts when the in-furnace temperature reaches 800 ° C. or higher (see Non-Patent Document 1). That is, the surface reaction starts when the substrate temperature rises.
ここで、Ｓｉ基板の表面に何らかの処理を施してから所望の薄膜を形成する形態のものとして、従来、次のものがある。 Here, conventionally, there is the following as a form in which a desired thin film is formed after applying some treatment to the surface of the Si substrate.
（１）Ｓｉ基板の表面に１原子層以上の水素原子から成るパッシベーション膜を形成して表面が酸素や水素で汚染されていない清浄な状態にし、次いで必要に応じて低温での熱処理を行った後に、エピタキシャル成長法にて異種半導体結晶層を形成する方法（例えば、特許文献１参照）。 (1) A passivation film composed of one or more hydrogen atoms is formed on the surface of the Si substrate so that the surface is not contaminated with oxygen or hydrogen, and then heat treatment is performed at a low temperature as necessary. Later, a method of forming a heterogeneous semiconductor crystal layer by an epitaxial growth method (see, for example, Patent Document 1).
（２）シリコン基板上にＧａのバリア層を形成した後に、ＧａＮの薄膜を成長させる方法（例えば、特許文献２参照）。 (2) A method of growing a GaN thin film after forming a Ga barrier layer on a silicon substrate (see, for example, Patent Document 2).
（３）Ｓｉ基板上に、シラン（ＳｉＨ4）とプロパン（Ｃ3Ｈ8）を原料ガスとして用いた気相成長法により、温度１３５０℃でＳｉＣ層を形成し、次に、アンモニア（ＮＨ3）とトリメチルガリウム（ＴＭＧａ）を原料ガスとしたＭＯＣＶＤ法により、基板温度６００℃でＧａＮバッファ膜を堆積する方法（例えば、特許文献３参照）。
ところで、炉内内壁の窒化物付着物から発生するＧａやＮラジカルとＳｉ基板が反応するという上記問題に対し、理想的にはIII−Ｖ族窒化物半導体を成長する度に、炉内の掃除を行い、付着物を完全に取り除けばいいのだが、現実的には困難である。そのため生産するときには、ある程度の炉内付着物が存在する状態でIII−Ｖ族窒化物半導体の成長を繰り返さなくてはならない。 By the way, in response to the above-mentioned problem that the Ga or N radical generated from the nitride deposit on the inner wall of the furnace reacts with the Si substrate, ideally, every time a group III-V nitride semiconductor is grown, the inside of the furnace is cleaned. However, it is practically difficult to remove all the deposits. Therefore, when producing, the growth of the III-V nitride semiconductor must be repeated in the presence of a certain amount of deposits in the furnace.
現在のところ、付着物からのＧａやＮラジカルの発生抑止のため、主に、以下に示すような手法が行われている。 At present, the following methods are mainly used to suppress the generation of Ga and N radicals from the deposits.
(i) III−Ｖ族窒化物半導体の成長温度よりも、高い温度で炉内空焼きを行ってから薄膜成長を行う。 (i) Thin film growth is performed after in-furnace baking at a temperature higher than the growth temperature of the III-V nitride semiconductor.
(ii) 付着物の多い部分を着脱式にし、III−Ｖ族窒化物半導体を成長する度に交換する。 (ii) A part with a lot of deposits is made removable, and is exchanged every time a group III-V nitride semiconductor is grown.
(iii) 事前にＡｌＮの成長を行い、炉内付着物の表面のコーティングをしてから、III−Ｖ族窒化物半導体の成長を開始する。 (iii) The growth of AlN is performed in advance and the surface of the deposit in the furnace is coated, and then the growth of the III-V nitride semiconductor is started.
しかしながら、どの方法も完全には付着物からのＧａやＮラジカルの発生を抑止できないため、良質なIII−Ｖ族窒化物半導体の成長は難しく、スループットも犠牲にしているため低コスト化も困難である。 However, since none of the methods can completely suppress the generation of Ga and N radicals from the deposit, it is difficult to grow a high-quality III-V nitride semiconductor, and at the expense of throughput, it is difficult to reduce the cost. is there.
また、特許文献１〜３のうち、特に、特許文献３におけるように、Ｓｉ基板上に、シランとプロパンを原料ガスとして気相成長法によりＳｉＣ層を形成し、次に、ＭＯＣＶＤ法によりＧａＮバッファ膜を堆積するという方法も、上記問題に対する解決策として有効であるが、この場合には、シランの他にプロパンを原料ガスとして用い、Ｓｉ基板をＳｉＣ層のための成長温度１３５０℃にする必要がある。 Further, among Patent Documents 1 to 3, in particular, as in Patent Document 3, a SiC layer is formed on a Si substrate by vapor phase growth using silane and propane as source gases, and then a GaN buffer is formed by MOCVD. A method of depositing a film is also effective as a solution to the above problem. In this case, it is necessary to use propane as a source gas in addition to silane, and set the Si substrate to a growth temperature of 1350 ° C. for the SiC layer. There is.
そこで、本発明の目的は、上記課題を解決し、従来とは異なる方法により、炉内付着物からＧａやＮラジカルの発生が起こっても、Ｓｉ基板表面を劣化させず、さらにはスループットを落すことなく良質なIII−Ｖ族窒化物半導体薄膜を実現することにある。 Therefore, the object of the present invention is to solve the above-mentioned problems, and even if Ga and N radicals are generated from the deposits in the furnace by a method different from the conventional method, the surface of the Si substrate is not deteriorated and the throughput is further reduced. The object is to realize a high-quality group III-V nitride semiconductor thin film.
上記目的を達成するため、本発明は、次のように構成したものである。 In order to achieve the above object, the present invention is configured as follows.
請求項１の発明に係るIII−Ｖ族窒化物半導体の製造方法は、加熱したＳｉ基板上に複数のIII族元素またはＶ族元素を含む原料ガスを供給し、熱分解反応させて化合物半導体の薄膜結晶を成長させるIII−Ｖ族窒化物半導体の製造方法において、Ｓｉ元素を含む原料ガスを供給しながらＳｉ基板を加熱することにより、Ｓｉ基板上にＳｉを成長しつつＳｉ基板を昇温し、その後に薄膜成長を行う温度になった時点でIII−Ｖ族窒化物半導体の成長を行うことを特徴とする。ここで、III−Ｖ族窒化物半導体としては、例えば、ＡｌＮ層やＧａＮ層が考えられるが、特にこれらに限られるわけでない。また、上記III−Ｖ族窒化物半導体の製造方法としては、例えば、ＭＯＶＰＥ法が考えられるが、特にこれに限られるわけではない。 In the method for producing a group III-V nitride semiconductor according to the first aspect of the present invention, a source gas containing a plurality of group III elements or group V elements is supplied onto a heated Si substrate and subjected to a thermal decomposition reaction to produce a compound semiconductor. In a method for producing a group III-V nitride semiconductor for growing a thin film crystal, heating the Si substrate while supplying a source gas containing Si element raises the temperature of the Si substrate while growing Si on the Si substrate. Then, the group III-V nitride semiconductor is grown at a time when the temperature for thin film growth is reached. Here, as the group III-V nitride semiconductor, for example, an AlN layer and a GaN layer are conceivable, but not particularly limited thereto. Moreover, as a manufacturing method of the said III-V group nitride semiconductor, although the MOVPE method can be considered, for example, it is not necessarily restricted to this.
請求項２の発明は、請求項１記載のIII−Ｖ族窒化物半導体の製造方法において、Ｓｉ元素を含む原料ガスの供給を、III−Ｖ族窒化物半導体の成長を開始した時点で停止することを特徴とする。 According to a second aspect of the present invention, in the method for producing a group III-V nitride semiconductor according to the first aspect, the supply of the source gas containing Si element is stopped when the growth of the group III-V nitride semiconductor is started. It is characterized by that.
請求項３の発明は、請求項１又は２記載のIII−Ｖ族窒化物半導体の製造方法において、III−Ｖ族窒化物半導体を有機金属気相成長法（ＭＯＶＰＥ法）にて成長することを特徴とする。 The invention of claim 3 is the method for producing a group III-V nitride semiconductor according to claim 1 or 2, wherein the group III-V nitride semiconductor is grown by metal organic vapor phase epitaxy (MOVPE method). Features.
請求項４の発明は、請求項１〜３のいずれかに記載のIII−Ｖ族窒化物半導体の製造方法において、Ｓｉ基板を室温からIII−Ｖ族窒化物半導体薄膜の成長温度まで昇温する過程において、基板温度が８００℃以上のときに、Ｓｉ元素を含む原料ガスの供給を開始することを特徴とする。 The invention of claim 4 is the method for producing a group III-V nitride semiconductor according to any one of claims 1 to 3, wherein the temperature of the Si substrate is raised from room temperature to the growth temperature of the group III-V nitride semiconductor thin film. In the process, when the substrate temperature is 800 ° C. or higher, supply of a source gas containing Si element is started.
請求項５の発明は、請求項１〜４のいずれかに記載のIII−Ｖ族窒化物半導体の製造方法において、Ｓｉ元素を含む原料ガスの炉内濃度が５×１０-7ｍｏｌ／cm3以上になるように供給することを特徴とする。 The invention according to claim 5 is the method for producing a group III-V nitride semiconductor according to any one of claims 1 to 4, wherein the concentration of the source gas containing Si element in the furnace is 5 × 10 −7 mol / cm 3. It is characterized by supplying so that it may become above.
請求項６の発明は、請求項１〜５のいずれかに記載のIII−Ｖ族窒化物半導体の製造方法において、Ｓｉ元素を含む原料ガスとしてモノシラン、ジシラン、ジクロロシラン、テトラメチルシラン、テトラエチルシランのいずれかを用いることを特徴とする。 The invention according to claim 6 is the method for producing a group III-V nitride semiconductor according to any one of claims 1 to 5, wherein the source gas containing Si element is monosilane, disilane, dichlorosilane, tetramethylsilane, tetraethylsilane. Any of the above is used.
請求項７の発明は、請求項１〜６のいずれかに記載のIII−Ｖ族窒化物半導体の製造方法において、Ｓｉ元素を含む原料ガスを供給した後、バッファー層として１０００℃以上でＡｌＮ層を成長し、その上に目的とするIII−Ｖ族窒化物半導体薄膜を成長することを特徴とする。 A seventh aspect of the present invention is the method for producing a group III-V nitride semiconductor according to any one of the first to sixth aspects, wherein a source gas containing Si element is supplied, and then the AlN layer is used as a buffer layer at 1000 ° C. or higher. And a target III-V nitride semiconductor thin film is grown thereon.
請求項８の発明に係るIII−Ｖ族窒化物半導体は、Ｓｉ元素を含む原料ガスを供給しながらＳｉ基板を加熱することにより、Ｓｉ基板上にＳｉを成長しつつＳｉ基板を昇温し、その後に薄膜成長を行う温度になった時点で原料を切り替えて基板上に複数のIII族元素またはＶ族元素を含む原料ガスを供給し、熱分解反応させて、ＡｌＮ層の薄膜結晶として成長させたことを特徴とする。 The group III-V nitride semiconductor according to the invention of claim 8 heats the Si substrate while supplying a source gas containing Si element, thereby raising the temperature of the Si substrate while growing Si on the Si substrate, After that, when the temperature for thin film growth is reached, the raw material is switched, and a raw material gas containing a plurality of group III elements or group V elements is supplied onto the substrate and subjected to a thermal decomposition reaction to grow as a thin film crystal of an AlN layer. It is characterized by that.
請求項９の発明は、請求項８記載のIII−Ｖ族窒化物半導体において、Ｓｉ基板を室温からＡｌＮ層の成長温度まで昇温する過程の途中において、基板温度がＳｉのホモエピタキシーを行い得る所定温度に達したときからＳｉ元素を含む原料ガスの供給を開始したことを特徴とする。 According to a ninth aspect of the present invention, in the group III-V nitride semiconductor according to the eighth aspect, homoetaxy can be performed when the substrate temperature is Si during the process of raising the temperature of the Si substrate from room temperature to the growth temperature of the AlN layer. The supply of the source gas containing Si element is started when the temperature reaches a predetermined temperature.
請求項１０の発明は、請求項９記載のIII−Ｖ族窒化物半導体において、上記Ｓｉのホモエピタキシーを行い得る所定温度を８００℃以上に設定し、ＡｌＮ層の成長温度を１０００℃以上に設定したことを特徴とする。 The invention according to claim 10 is the III-V nitride semiconductor according to claim 9, wherein the predetermined temperature at which the Si homo-epitaxy can be performed is set to 800 ° C. or higher, and the growth temperature of the AlN layer is set to 1000 ° C. or higher. It is characterized by that.
＜発明の要点＞
本発明の要点は、Ｓｉ元素を含む原料ガスを流しながらＳｉ基板を昇温し、薄膜成長を行う温度になった時点で原料を切り替えて、所望する薄膜の成長を開始することにある。
<Key points of the invention>
The main point of the present invention is to raise the temperature of the Si substrate while flowing a raw material gas containing Si element, and to start the growth of a desired thin film by switching the raw material when the temperature reaches a temperature for thin film growth.
補足説明するに、本発明においては、Ｓｉ基板上に同じＳｉを成長するというＳｉのホモエピタキシーを行いながら、III−Ｖ族窒化物半導体の成長を行う温度までＳｉ基板の昇温を行う。このとき、Ｓｉの原料ガスを、発生するＧａやＮラジカルよりも遥かに高い濃度で供給することにより、ＧａやＮは結晶品質に影響を与えない濃度にまで希釈されてホモエピタキシャル層内に取り込まれることになる。つまりホモエピタキシーを行いながら昇温することにより、Ｓｉ基板の表面が常に未反応な状態で露出することになる。 To supplementarily describe, in the present invention, the temperature of the Si substrate is raised to the temperature at which the group III-V nitride semiconductor is grown while performing the Si homoepitaxy of growing the same Si on the Si substrate. At this time, by supplying Si source gas at a concentration much higher than the generated Ga and N radicals, Ga and N are diluted to a concentration that does not affect the crystal quality and taken into the homoepitaxial layer. Will be. That is, by raising the temperature while performing homoepitaxy, the surface of the Si substrate is always exposed in an unreacted state.
Ｓｉホモエピタキシーは６００℃以上の温度で可能なため、原料ガスを設置すればＭＯＶＰＥ炉でも成長可能である。また、ＧａやＮラジカル発生抑止のプロセスを必要とせず、薄膜成長工程を連続して行うことが可能なためスループットの向上も期待できる。 Since Si homoepitaxy is possible at a temperature of 600 ° C. or higher, it can be grown in a MOVPE furnace if a source gas is installed. Further, since a process for suppressing the generation of Ga and N radicals is not required and the thin film growth process can be performed continuously, an improvement in throughput can be expected.
本発明によれば、加熱した基板上に複数のIII族元素またはＶ族元素を含む原料ガスを供給し、熱分解反応させて化合物半導体の薄膜結晶を成長させる気相成長法において、Ｓｉ元素を含む原料ガスを供給しながらＳｉ基板を加熱することにより、Ｓｉ基板上にＳｉを成長しつつＳｉ基板を昇温し、その後にＡｌＮ層やＧａＮ層といったIII−Ｖ族窒化物半導体薄膜の成長を行う。すなわち、本発明では、Ｓｉのホモエピタキシーを行いながら、III−Ｖ族窒化物薄膜の成長を行う温度までＳｉ基板の昇温を行う。従って、この昇温過程の間に炉内付着物からＧａやＮラジカルの発生が起こっても、その影響は少なく、Ｓｉ基板表面を劣化させない。Ｓｉ基板は表面が常に未反応な状態で露出することになる。このため、スループットを落すことなく良質なIII−Ｖ族窒化物半導体薄膜を実現することができる。 According to the present invention, in a vapor phase growth method in which a raw material gas containing a plurality of group III elements or group V elements is supplied onto a heated substrate and thermally decomposed to grow a thin film crystal of a compound semiconductor, By heating the Si substrate while supplying the source gas containing it, the Si substrate is heated while growing Si on the Si substrate, and then a group III-V nitride semiconductor thin film such as an AlN layer or a GaN layer is grown. Do. That is, in the present invention, the temperature of the Si substrate is increased to a temperature at which the III-V nitride thin film is grown while performing Si homoepitaxy. Therefore, even if Ga or N radicals are generated from the deposits in the furnace during this temperature rising process, the influence is small and the Si substrate surface is not deteriorated. The surface of the Si substrate is always exposed in an unreacted state. Therefore, a high-quality group III-V nitride semiconductor thin film can be realized without reducing the throughput.
よって、本発明によるＳｉ基板上のIII−Ｖ族窒化物半導体薄膜結晶によれば、従来よりもより低価格な青色ＬＥＤ、白色ＬＥＤ、紫外ＬＥＤ、またはＨＥＭＴデバイスを実現することができる。 Therefore, according to the group III-V nitride semiconductor thin film crystal on the Si substrate according to the present invention, a blue LED, a white LED, an ultraviolet LED, or a HEMT device can be realized at a lower price than before.
以下、本発明を図示の実施の形態に基づいて説明する。 Hereinafter, the present invention will be described based on the illustrated embodiments.
図１に示すように、単結晶のＳｉ基板１上に、バッファー層として高純度ＡｌＮ層２を形成し、その上にＧａＮ層（図示せず）をＭＯＶＰＥ法にて成長する。このＳｉ基板１上にＡｌＮ層２を形成するときのシーケンス を図２に示す。 As shown in FIG. 1, a high-purity AlN layer 2 is formed as a buffer layer on a single crystal Si substrate 1, and a GaN layer (not shown) is grown thereon by the MOVPE method. A sequence for forming the AlN layer 2 on the Si substrate 1 is shown in FIG.
図２に示すように、Ｓｉ基板を加熱して室温からＳｉホモエピタキシーが可能な第１設定温度（ホモエピタキシー開始温度）Ｔ１に達する直前までの昇温過程では、水素雰囲気のみとする。このホモエピタキシー開始温度Ｔ１の設定値は、Ｓｉホモエピタキシーが確実に可能な８００℃以上の温度とするのが好ましい。図２の場合、８００℃（図２のａ点）に設定し、この８００℃（図２のａ点）に昇温する直前までの間においては、水素雰囲気のみとする。 As shown in FIG. 2, only the hydrogen atmosphere is used in the temperature raising process until the Si substrate is heated to just reach the first set temperature (homoepitaxial start temperature) T <b> 1 at which Si homoepitaxy is possible from room temperature. The set value of the homoepitaxy start temperature T1 is preferably set to a temperature of 800 ° C. or higher at which Si homoepitaxy can be reliably performed. In the case of FIG. 2, the temperature is set to 800 ° C. (point “a” in FIG. 2), and only the hydrogen atmosphere is used until immediately before the temperature is raised to 800 ° C. (point “a” in FIG. 2).
そして、このホモエピタキシー開始温度Ｔ１の８００℃から第２設定温度（成長温度）Ｔ２である１１００℃以上に達するまでの昇温過程においては、Ｓｉ元素を含む原料ガスを供給しながらＳｉ基板の加熱を行う。図２では、成長温度Ｔ２を１１００℃として設定し、この成長温度１１００℃に達するまでの昇温過程（図２のａ点〜ｂ点の区間）においては、モノシラン（ＳｉＨ4）を流して、水素とモノシランの混合雰囲気下で昇温する。これによりＳｉ基板の表面にＳｉが成長する。このときのＳｉ元素を含む原料ガスであるモノシラン（ＳｉＨ4）は、その炉内濃度が５×１０-7ｍｏｌ／cm3以上になるように供給する。 In the temperature rising process from the homoepitaxy start temperature T1 of 800 ° C. to the second set temperature (growth temperature) T2 of 1100 ° C. or higher, the Si substrate is heated while supplying the source gas containing the Si element. I do. In FIG. 2, the growth temperature T2 is set to 1100 ° C., and monosilane (SiH 4 ) is allowed to flow in the temperature rising process (a section between points a and b in FIG. 2) until the growth temperature reaches 1100 ° C. The temperature is raised in a mixed atmosphere of hydrogen and monosilane. Thereby, Si grows on the surface of the Si substrate. Monosilane (SiH 4 ), which is a raw material gas containing Si element at this time, is supplied so that the concentration in the furnace becomes 5 × 10 −7 mol / cm 3 or more.
そして、成長温度Ｔ２の１１００℃に達し温度が安定化した適当な時点（図２のｂ点）にて、モノシラン（ＳｉＨ4）の供給を停止し、水素雰囲気中にトリメチルアルミニウム（ＴＭＡ）とアンモニア（ＮＨ3）を同時に流して、ＡｌＮ層２の成長を開始する。 Then, when the growth temperature T2 reaches 1100 ° C. and the temperature stabilizes (point b in FIG. 2), the supply of monosilane (SiH 4 ) is stopped, and trimethylaluminum (TMA) and ammonia are placed in a hydrogen atmosphere. (NH 3 ) is simultaneously supplied to start the growth of the AlN layer 2.
このＡｌＮ層２が所定の厚さ例えば２００nmまで成長した時点（図２のｃ点）で、ＴＭＡの供給を停止して、成長を停止すると共に、ＭＯＶＰＥ炉の降温を開始する。そして所定の温度Ｔ３、例えば６００℃まで基板の温度が降温した時点（図２のｄ点）で、ＮＨ3の供給を停止する。 When the AlN layer 2 is grown to a predetermined thickness, for example, 200 nm (point c in FIG. 2), the supply of TMA is stopped, the growth is stopped, and the temperature drop of the MOVPE furnace is started. Then, the supply of NH 3 is stopped when the temperature of the substrate drops to a predetermined temperature T3, for example, 600 ° C. (point d in FIG. 2).
このようにＳｉ元素を含む原料ガスをその炉内濃度が５×１０-7ｍｏｌ／cm3以上になるように供給しながらＳｉ基板の加熱を行うことにより、ＧａやＮは結晶品質に影響を与えない濃度まで希釈されてホモエピタキシャル層内に取り込まれることになる。つまりホモエピタキシーを行いながら昇温することにより、Ｓｉ基板の表面が常に未反応な状態で露出することになる。 Thus, by heating the Si substrate while supplying the source gas containing Si element so that the concentration in the furnace becomes 5 × 10 −7 mol / cm 3 or more, Ga and N affect the crystal quality. It will be diluted to a concentration not given and taken into the homoepitaxial layer. That is, by raising the temperature while performing homoepitaxy, the surface of the Si substrate is always exposed in an unreacted state.
本発明の効果を確認するため、試作例（サンプル）として、図１に示すように、単結晶のＳｉ基板１上に、高純度のＡｌＮ層２を形成し、その昇温過程における炉内雰囲気を、水素とモノシランの混合雰囲気（実施例）と、水素雰囲気（比較例）とに変えて作製した。そして、Ｓｉ基板上に成長したＡｌＮ層２の特性の変化、およびその上に成長したＧａＮ層の特性の比較を行った。 In order to confirm the effect of the present invention, as a prototype example (sample), a high-purity AlN layer 2 is formed on a single crystal Si substrate 1 as shown in FIG. Were prepared in a mixed atmosphere of hydrogen and monosilane (Example) and a hydrogen atmosphere (Comparative Example). Then, the characteristics of the AlN layer 2 grown on the Si substrate were changed, and the characteristics of the GaN layer grown on the AlN layer 2 were compared.
Ｓｉ基板１は＜１１１＞方向にｏｎ−Ａｘｉｓの仕様を用いた。また、ＡｌＮ層２の薄膜成長前に基板表面のＲＣＡ洗浄を行い、有機、無機の不純物、および酸化膜の除去を行った。 The Si substrate 1 uses on-axis specifications in the <111> direction. In addition, before the thin film of the AlN layer 2 was grown, RCA cleaning of the substrate surface was performed to remove organic and inorganic impurities and an oxide film.
本発明を適用して図１のサンプルを成長したときのシーケンス（実施例）を図２に 、また、従来法にて図１のサンプルを成長したときのシーケンス（比較例）を図３に示す。前者は、水素とモノシランの混合雰囲気中で昇温して薄膜（本発明適用品）を成長した場合であり、後者は水素雰囲気中で昇温してから薄膜（従来成長品）を成長した場合である。また、使用するＭＯＶＰＥ炉で事前にＧａＮを５０μｍ相当成長しており、できるだけ炉内付着物が多い環境に設定した。 FIG. 2 shows a sequence (Example) when the sample of FIG. 1 is grown by applying the present invention, and FIG. 3 shows a sequence (Comparative Example) when the sample of FIG. 1 is grown by the conventional method. . The former is a case where a thin film (product applied to the present invention) is grown by heating in a mixed atmosphere of hydrogen and monosilane, and the latter is a case where a thin film (conventional growth product) is grown after being heated in a hydrogen atmosphere. It is. Further, GaN was grown in advance in the MOVPE furnace to be used by 50 μm, and the environment was set as much as possible in the furnace.
測定したサンプルは図１に示すように、Ｓｉ基板１上にＡｌＮ層２を２００nm成長した単純な構造である。 As shown in FIG. 1, the measured sample has a simple structure in which an AlN layer 2 is grown on a Si substrate 1 by 200 nm.
従来成長品と本発明適用品共に、水素雰囲気中にトリメチルアルミニウム（ＴＭＡ）とＮＨ3を同時に流してＡｌＮ層２を成長した。このときの成長温度は１１００℃、炉内圧力は１３５Ｔｏｒｒ、ＴＭＡとＮＨ3の流量はそれぞれ２．００×１０-5ｍｏｌ／ｍｉｎ、４．４６×１０-3ｍｏｌ／ｍｉｎとした。 The AlN layer 2 was grown by flowing trimethylaluminum (TMA) and NH 3 simultaneously in a hydrogen atmosphere for both the conventionally grown product and the product to which the present invention was applied. At this time, the growth temperature was 1100 ° C., the furnace pressure was 135 Torr, and the flow rates of TMA and NH 3 were 2.00 × 10 −5 mol / min and 4.46 × 10 −3 mol / min, respectively.
また、本発明適用品の基板加熱においては、図２に示すように、室温から８００℃までの昇温過程は水素雰囲気で、８００℃から１１００℃までは水素とモノシラン混合雰囲気で行っており、モノシラン流量は５．５０×１０-4ｍｏｌ／ｍｉｎとした。 In addition, in the substrate heating of the product applied to the present invention, as shown in FIG. 2, the temperature rising process from room temperature to 800 ° C. is performed in a hydrogen atmosphere, and from 800 ° C. to 1100 ° C. is performed in a mixed atmosphere of hydrogen and monosilane. The monosilane flow rate was 5.50 × 10 −4 mol / min.
従来成長と本発明適用ＡｌＮ層の表面状態の比較を図４、図５に、また、Ｘ線の（００２）面回折のロッキングカーブの比較を図６に示す。図４はＳＥＭによる観察、図５はＡＦＭによる観察結果である。 4 and 5 show a comparison of the surface state of the conventional growth and the AlN layer applied to the present invention, and FIG. 6 shows a comparison of the rocking curves of the (002) plane diffraction of X-rays. FIG. 4 shows the observation by SEM, and FIG. 5 shows the observation by AFM.
ＳＥＭ観察より、従来成長品（図４（ａ））はＧａによるエッチングの跡と思われる穴が開いていることがわかる。一方、本発明適用品（図４（ｂ））は平坦な表面を実現していることが確認される。また、ＡＦＭの結果より、従来成長品（図５（ａ））の表面は球状の粒子が寄り集まっている形状であるのに対し、本発明適用品（図５（ｂ））はナノスケールの穴が開いているものの、一つの膜となっていることがわかる。また、図６から分かるように、本発明適用品は従来成長品に較べ回折ピークの半値幅も小さい。これより薄膜の配向性は、本発明を適用したことにより圧倒的に向上したことが確認された。 From the SEM observation, it can be seen that the conventionally grown product (FIG. 4A) has a hole that seems to be a trace of etching by Ga. On the other hand, it is confirmed that the product to which the present invention is applied (FIG. 4B) realizes a flat surface. Further, from the results of AFM, the surface of the conventionally grown product (FIG. 5A) has a shape in which spherical particles are gathered, whereas the product to which the present invention is applied (FIG. 5B) is nanoscale. Although the hole is open, it turns out that it is one film. As can be seen from FIG. 6, the half-width of the diffraction peak of the product to which the present invention is applied is smaller than that of the conventionally grown product. From this, it was confirmed that the orientation of the thin film was overwhelmingly improved by applying the present invention.
さらなる検討として、このＡｌＮ層（２００nm）上にＧａＮ層を２μｍ成長して、その評価を行なった。ＧａＮ層は水素雰囲気中にトリメチルガリウム（ＴＭＧ）とＮＨ3を同時に流して成長を行った。成長温度と圧力はＡｌＮ成長時と同じである。 As a further study, a 2 μm GaN layer was grown on this AlN layer (200 nm) and evaluated. The GaN layer was grown by flowing trimethylgallium (TMG) and NH 3 simultaneously in a hydrogen atmosphere. The growth temperature and pressure are the same as during AlN growth.
従来成長品と本発明適用品の表面状態の比較を図７、図８に、また、Ｘ線の（００２）面回折のロッキングカーブの比較を図９に示す。図８はノマルスキー顕微鏡による観察結果、図９はＡＦＭによる観察結果である。 7 and 8 show a comparison of the surface states of the conventional growth product and the product to which the present invention is applied, and FIG. 9 shows a comparison of the rocking curves of the (002) plane diffraction of X-rays. FIG. 8 shows the result of observation by a Nomarski microscope, and FIG. 9 shows the result of observation by AFM.
ノマルスキー顕微鏡による観察により、従来成長品（図７（ａ））は無数のクラックとクレーターのような穴が見られる。一方、本発明適用品（図７（ｂ））はクラックは激減しており、クレーターのような異常成長跡は一切存在していない。クレーターは、ＡｌＮの穴からＧａが浸透し、Ｓｉ表面が削られたことにより発生したものと考えられる。 By observation with a Nomarski microscope, the conventionally grown product (FIG. 7A) has numerous cracks and crater-like holes. On the other hand, in the product to which the present invention is applied (FIG. 7B), cracks are drastically reduced, and there is no abnormal growth trace like a crater. It is considered that the crater was generated by the penetration of Ga from the hole of AlN and the removal of the Si surface.
また、本発明適用品は、図８（ａ）に示すようにＡＦＭ観察でもナノメートルオーダーの穴が消えており、Ｘ線回折でも図９に示すように従来成長品に較べ半値幅が小さくなっており、結晶の品質が向上していることが確認された。 In addition, as shown in FIG. 8A, the nanometer-order hole disappears in the product to which the present invention is applied as shown in FIG. 8A, and the half-value width is smaller in X-ray diffraction than the conventional growth product as shown in FIG. It was confirmed that the crystal quality was improved.
本発明において、炉内付着物より発生するＧａやＮラジカルの量は、使用する装置や成長条件により異なるため、昇温時に流すＳｉを含む原料ガスの供給量は試行錯誤をしておさえなくてはならない。しかし供給を開始する温度は、ＧａＮの分解が始まる温度が最適と思われる。 In the present invention, the amount of Ga and N radicals generated from the deposits in the furnace varies depending on the apparatus used and the growth conditions. Therefore, the supply amount of the source gas containing Si that flows when the temperature is raised does not have to be trial and error. Must not. However, the temperature at which the supply is started seems to be optimal at the temperature at which decomposition of GaN begins.
本実施例では、Ｓｉ原料としてモノシランを用いたが、これより分解温度の低いジシラン、また、有機原料であるテトラメチルシリコンやテトラエチルシリコンを用いても同様な効果を得ることができる。 In this embodiment, monosilane was used as the Si raw material, but the same effect can be obtained by using disilane having a lower decomposition temperature, or tetramethyl silicon or tetraethyl silicon, which are organic raw materials.
１ Ｓｉ基板
２ ＡｌＮ層
1 Si substrate 2 AlN layer
Claims (10)
Ｓｉ元素を含む原料ガスを供給しながらＳｉ基板を加熱することにより、Ｓｉ基板上にＳｉを成長しつつＳｉ基板を昇温し、その後に薄膜成長を行う温度になった時点でIII−Ｖ族窒化物半導体薄膜の成長を行うことを特徴とするIII−Ｖ族窒化物半導体の製造方法。 In a method for producing a group III-V nitride semiconductor in which a raw material gas containing a plurality of group III elements or group V elements is supplied onto a heated Si substrate and a thin film crystal of a compound semiconductor is grown by thermal decomposition reaction,
By heating the Si substrate while supplying a raw material gas containing Si element, the temperature of the Si substrate is raised while growing Si on the Si substrate, and then the group III-V is reached at a temperature at which thin film growth is reached. A method for producing a group III-V nitride semiconductor, comprising growing a nitride semiconductor thin film.
Ｓｉ元素を含む原料ガスの供給を、III−Ｖ族窒化物半導体薄膜の成長を開始した時点で停止することを特徴とするIII−Ｖ族窒化物半導体の製造方法。 In the manufacturing method of the group III-V nitride semiconductor of Claim 1,
A method for producing a group III-V nitride semiconductor, characterized in that the supply of a source gas containing Si element is stopped when the growth of a group III-V nitride semiconductor thin film is started.
III−Ｖ族窒化物半導体薄膜を有機金属気相成長法にて成長することを特徴とするIII−Ｖ族窒化物半導体の製造方法。 In the manufacturing method of the group III-V nitride semiconductor of Claim 1 or 2,
A method for producing a group III-V nitride semiconductor, comprising growing a group III-V nitride semiconductor thin film by metal organic vapor phase epitaxy.
Ｓｉ基板を室温からIII−Ｖ族窒化物半導体薄膜の成長温度まで昇温する過程において、基板温度が８００℃以上のときに、Ｓｉ元素を含む原料ガスの供給を開始することを特徴とするIII−Ｖ族窒化物半導体の製造方法。 In the manufacturing method of the group III-V nitride semiconductor in any one of Claims 1-3,
In the process of raising the temperature of the Si substrate from room temperature to the growth temperature of the group III-V nitride semiconductor thin film, supply of a source gas containing Si element is started when the substrate temperature is 800 ° C. or higher. A method for producing a group V nitride semiconductor.
Ｓｉ元素を含む原料ガスの炉内濃度が５×１０-7ｍｏｌ／cm3以上になるように供給することを特徴とするIII−Ｖ族窒化物半導体の製造方法。 In the manufacturing method of the group III-V nitride semiconductor in any one of Claims 1-4,
A method for producing a group III-V nitride semiconductor, comprising supplying a source gas containing Si element so that a concentration in a furnace becomes 5 × 10 −7 mol / cm 3 or more.
Ｓｉ元素を含む原料ガスとしてモノシラン、ジシラン、ジクロロシラン、テトラメチルシラン、テトラエチルシランのいずれかを用いることを特徴とするIII−Ｖ族窒化物半導体の製造方法。 In the manufacturing method of the group III-V nitride semiconductor in any one of Claims 1-5,
One of monosilane, disilane, dichlorosilane, tetramethylsilane, and tetraethylsilane is used as a source gas containing Si element. A method for producing a group III-V nitride semiconductor, comprising:
Ｓｉ元素を含む原料ガスを供給した後、バッファー層として１０００℃以上でＡｌＮ層を成長し、その上に目的とするIII−Ｖ族窒化物半導体薄膜を成長することを特徴とするIII−Ｖ族窒化物半導体の製造方法。 In the manufacturing method of the III-V nitride semiconductor in any one of Claims 1-6,
After supplying a source gas containing Si element, an AlN layer is grown as a buffer layer at 1000 ° C. or higher, and a target group III-V nitride semiconductor thin film is grown thereon. A method for manufacturing a nitride semiconductor.
Ｓｉ基板を室温からＡｌＮ層の成長温度まで昇温する過程の途中において、基板温度がＳｉのホモエピタキシーを行い得る所定温度に達したときからＳｉ元素を含む原料ガスの供給を開始したことを特徴とするIII−Ｖ族窒化物半導体。 The group III-V nitride semiconductor according to claim 8,
In the middle of the process of raising the temperature of the Si substrate from room temperature to the growth temperature of the AlN layer, the supply of the source gas containing the Si element is started when the substrate temperature reaches a predetermined temperature at which Si homoepitaxy can be performed. III-V group nitride semiconductor.
上記Ｓｉのホモエピタキシーを行い得る所定温度を８００℃以上に設定し、ＡｌＮ層の成長温度を１０００℃以上に設定したことを特徴とするIII−Ｖ族窒化物半導体。 The group III-V nitride semiconductor according to claim 9,
A group III-V nitride semiconductor characterized in that the predetermined temperature at which the Si homoepitaxy can be performed is set to 800 ° C. or higher, and the growth temperature of the AlN layer is set to 1000 ° C. or higher.
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| JP2009007205A (en) * | 2007-06-28 | 2009-01-15 | Sumitomo Electric Ind Ltd | Method for making a substrate product |
| CN114631170A (en) * | 2019-11-05 | 2022-06-14 | 住友电工光电子器件创新株式会社 | Manufacturing method of epitaxial substrate and epitaxial substrate |
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| JP2009007205A (en) * | 2007-06-28 | 2009-01-15 | Sumitomo Electric Ind Ltd | Method for making a substrate product |
| CN114631170A (en) * | 2019-11-05 | 2022-06-14 | 住友电工光电子器件创新株式会社 | Manufacturing method of epitaxial substrate and epitaxial substrate |
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