JP2007006302A - Impedance conversion circuit, and high pass filter circuit and frequency conversion circuit employing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an impedance conversion circuit with an excellent characteristic. <P>SOLUTION: An input terminal T1 receiving an input signal voltage +Vin is connected to an inverting input terminal of an operational amplifier OP via a resistor R1. Resistors R2 and R3 are connected in series between the inverting input terminal and an output terminal of the operational amplifier OP. An input terminal T2 receiving an input signal voltage -Vin inverse to the input signal voltage +Vin is connected to the connection midpoint of the resistors R2, R3 via a resistor R4. A prescribed impedance means Z is connected to the connection midpoint among the resistors R2 to R4. Transfer functions being reciprocal numbers to the impedance of the impedance means Z are obtained between the input terminals T1, T2 and output terminals of the operational amplifier OP, respectively. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an impedance conversion circuit, and a high-pass filter circuit and a frequency conversion circuit using the same.

  An inductance element is an element that is difficult to be integrated into an IC. For this reason, a method of equivalently realizing an inductance element by an impedance conversion circuit has been considered. FIG. 27 shows an example of the impedance conversion circuit.

  In this circuit, an input terminal T1 is connected to an inverting input terminal of an operational amplifier (operational amplifier) OP through a resistor R1, and resistors R2 and R3 are connected in series between the inverting input terminal and the output terminal. The impedance element Z is connected between the connection middle point of the resistors R2 and R3 and the ground. The non-inverting input terminal of the operational amplifier OP is grounded, and the output terminal is connected to the output terminal T3.

Therefore,
Vin: signal voltage input to the terminal T1 Vout: signal voltage output from the terminal T3 Vi: signal voltage at the inverting input terminal of the operational amplifier OP Vo: signal voltage at the connection point of the resistors R2, R3 and the impedance element Z For example, since the signal current flowing from the terminal T1 to the resistor R1 is equal to the signal current flowing through the resistor R2, equation (1) in FIG. 28 is obtained.

And
Av: Assuming the voltage gain of the operational amplifier OP,
Vi x Av = Vout
Therefore, if the gain Av is sufficiently large,
Vi = Vout / Av
= 0
Can be considered. Therefore, equation (2) in FIG. 28 can be obtained from equation (1).

  Since the voltage Vo is also a voltage obtained by dividing the difference voltage between the output voltage Vout and the voltage Vi (= 0) by the resistors R3 and R2 and the impedance element Z, the expression (3) in FIG. However, ‖ indicates a parallel connection value.

  Therefore, when the transfer function Vout / Vin between the input terminal T1 and the output terminal T3 is obtained, the expression (4) shown in FIG. 28 is obtained from the expressions (2) and (3). That is, the transfer characteristic represented by the equation (4) is obtained between the input terminal T1 and the output terminal T3 of the circuit of FIG.

And when the capacitor C is connected as the impedance element Z,
Z = 1 / (sC)
s = jω
Therefore, Equation (4) becomes Equation (5) in FIG. Therefore, in the circuit of FIG. 27, when the capacitor C is connected as the impedance element Z, the inductance value Le is Le = R2 / R3 / C.
It acts as an inductance circuit.

  If the variable resistor R is connected as the impedance element Z, the equation (4) becomes the equation (6). Therefore, the circuit of FIG. 27 acts as a variable gain circuit in which the gain is changed by the variable resistor R. It will be.

For example, there are the following prior art documents.
Toshio Hori “Analog Filter Circuit Design Method”, General Electronic Publishing Company, published on January 10, 1998, page 169

  By the way, when the inductance circuit is configured by the circuit of FIG. 27, the transfer function is expressed by the equation (5) as described above. For this reason, the resistor (R2 + R3) is connected in series to the inductance circuit, and a pure inductance cannot be obtained. As a result, when the inductance circuit is configured by the circuit of FIG. 27 and the filter is configured by using the inductance, the Q value is lowered.

  Further, when the variable gain circuit is configured by the circuit of FIG. 27, the gain is expressed by the equation (6). Therefore, even when the gain is set to the minimum, the gain is (R2 + R3) / R1 times. Can't squeeze enough.

  In view of the above points, the present invention is intended to provide an impedance conversion circuit having excellent characteristics.

In this invention,
One of a pair of input terminals to which input signal voltages of opposite phases are supplied is connected to the inverting input terminal of the operational amplifier through the first resistor,
Second and third resistors are connected in series between the inverting input terminal and the output terminal of the operational amplifier.
The output terminal is connected to the output terminal,
The other of the pair of input terminals is connected to a connection midpoint of the second and third resistors through a fourth resistor,
A predetermined impedance means is connected to the connection midpoint of the second to fourth resistors,
The impedance conversion circuit is configured to obtain a reciprocal transfer function of the impedance means between the pair of input terminals and the output terminal.

  According to the present invention, when impedance conversion is performed, no unnecessary resistance component remains in the conversion result. In addition, impedance conversion can be performed with a smaller number of elements than conventional impedance conversion circuits, which is advantageous in reducing power consumption.

  In addition, since all operating points can be set at the center of the power supply voltage, a wide input / output dynamic range can be obtained and a circuit resistant to distortion can be obtained. Furthermore, a differential input / differential output configuration can be adopted, and analog signal processing that is resistant to noise such as radiation can be performed. Moreover, it can be used for a circuit in which analog processing and digital processing are mixed.

  Furthermore, a secondary high-pass filter can be configured with a small number of elements, which is advantageous for improving performance and reducing power consumption. In addition, in a superheterodyne receiving circuit such as a direct conversion system or a low IF conversion system, the mixer circuit and the subsequent stage can be connected very easily. This also reduces the external capacitors of the IC, which is advantageous for reducing the size and cost of circuit modules.

[1] Unbalanced Impedance Conversion Circuit In FIG. 1, a circuit 10 shows an example of an unbalanced impedance conversion circuit according to the present invention. That is, the first input terminal T1 is connected to the inverting input terminal of the operational amplifier (operational amplifier) OP through the resistor R1, and the resistors R2 and R3 are connected in series between the inverting input terminal and the output terminal. The impedance element Z is connected between the connection middle point of the resistors R2 and R3 and the ground.

  Further, the second input terminal T2 is connected to the connection midpoint of the resistors R2, R3 and the impedance element Z through the resistor R4. Input signal voltages + Vin and −Vin having opposite phases are supplied to the input terminals T1 and T2. Further, the non-inverting input terminal of the operational amplifier OP is grounded, the output terminal thereof is connected to the output terminal T3, and the output signal voltage Vout is taken out.

  Note that the operational amplifier OP has a sufficiently large voltage gain. Further, the entire impedance conversion circuit 10 is made into an IC. Furthermore, as will be described later, the impedance element Z may be a single element or a combination or circuit of a plurality of elements. The input signal voltage ± Vin may be obtained by supplying the original unbalanced input signal voltage + Vin to the differential amplifier, or may be obtained by using an inverting amplifier.

In such a configuration,
Vo: If the signal voltage at the connection point of the resistors R2 to R4 and the impedance element Z is used, the signal current flowing from the terminal T1 to the resistor R1 is equal to the signal current flowing through the resistor R2, so that in the case of FIG. Similar to equation (2), equation (11) in FIG. 2 is obtained.

  Further, since the sum of the currents flowing into the connection points of the resistors R2 to R4 and the impedance element Z is equal to the sum of the currents flowing out from the connection points, the equation (12) in FIG. 2 is obtained. When the expression (12) is summarized for the voltage Vo, the expression (13) in FIG. 2 is obtained, and the expression (14) in FIG. 2 is obtained by substituting the expression (11) into the expression (13). Then, when this equation (14) is summarized for the voltage Vin, the equation (15) in FIG. 2 is obtained.

  Therefore, when the transfer function Vout / Vin between the input terminals T1, T2 and the output terminal T3 is obtained, the transfer function is modified from the equation (15) to become the equation (16) in FIG. Then, when the variable r is determined as shown in equation (17) in FIG. 2, equation (16) becomes as shown in equation (18) in FIG. Further, if r = 0, equation (18) becomes equation (19) in FIG.

  That is, the circuit 10 of FIG. 1 operates as an impedance conversion circuit in which the transfer function Vout / Vin is expressed by the equation (19) when r = 0. At this time, according to the equation (19), the transfer function Vout / Vin includes neither a series resistance nor a parallel resistance, and indicates pure impedance (or admittance). Further, since the transfer function Vout / Vin is expressed by equation (19), if the impedance element Z is variable, the transfer function Vout / Vin can be variable.

  Here, when the condition for r = 0 is obtained, the equation (20) in FIG. 2 is obtained from the equation (17). Therefore, if the values of the resistors R1 to R3 are set so as to obtain the necessary characteristics as the impedance conversion circuit, and the value of the resistor R4 is set by the equation (20) according to the value, the equation (19) shows As a result, an impedance conversion circuit having a transfer function Vout / Vin can be obtained and necessary characteristics can be obtained.

  FIG. 3 shows the impedance conversion circuit 10 equivalently. Here, the equation (21) in FIG. 4 is obtained in the same manner as the equation (2), and this is modified to obtain the equation (22) in FIG. Then, the formula (23) is obtained by comparing the formula (22) with the formula (19).

[2] Inductance Circuit and Differentiation Circuit FIG. 5 shows an example in which an inductance circuit is configured by the impedance conversion circuit 10 described above, and a capacitor C is connected as the impedance element Z. So in this case,
Z = 1 / (sC)
s = jω
Therefore, Equation (19) becomes Equation (31) in FIG.

Therefore, the impedance conversion circuit 10 in this case has an inductance value Le of
Le = R2, R3, C
It acts as an inductance circuit. In this case, since the inductance Le is multiplied by the value R 2 · R 3 of the capacitance of the capacitor C, an equivalently large inductance Le can be obtained even if the capacitance of the capacitor C is small. Further, if the capacitor C is constituted by a variable capacitance diode, for example, the inductance Le can be made variable.

  Furthermore, even if this impedance conversion circuit 10 is used alone, it acts as an inductance Le, so that a differential characteristic can be obtained. As a result, it can be made to function as a differentiation circuit even when used alone.

[3] Capacitance Circuit and Integration Circuit FIG. 7 shows an example in which a capacitance circuit is configured by the impedance conversion circuit 10, and a coil L is connected as the impedance element Z. So in this case,
Z = sL
Therefore, Equation (19) becomes Equation (32) in FIG.

Therefore, the impedance conversion circuit 10 in this case has a capacitance Ce of
Ce = L / (R2 / R3)
It will act as a capacitance circuit.

  Furthermore, even if this impedance conversion circuit 10 is used alone, it acts as a capacitor Ce, so that an integration characteristic can be obtained, and as a result, it can be made to function as an integration circuit.

[4] Variable Gain Circuit FIG. 9 shows an example in which a variable gain circuit is configured by the impedance conversion circuit 10, and a variable resistor R is connected as the impedance element Z. So in this case,
Z = R
Therefore, equation (19) becomes equation (33) in FIG. Therefore, the impedance conversion circuit 10 in this case acts as a variable gain circuit whose gain varies depending on the value of the variable resistor R.

[5] High-Pass Filter FIG. 11 shows an example when a high-pass filter is configured by the impedance conversion circuit 10. In this example, a series circuit of a capacitor C and a resistor R is connected as the impedance element Z. So in this case,
Z = 1 / (sC) + R
Therefore, equation (19) becomes equation (34) in FIG.

  Therefore, the impedance conversion circuit 10 in this case functions as a high-pass filter. At this time, the cutoff frequency is determined by the product CR of the capacitor C and the resistor R.

[6] Low-Pass Filter FIG. 13 shows an example when a low-pass filter is configured by the impedance conversion circuit 10. In this example, a series circuit of a coil L and a resistor R is connected as the impedance element Z. So in this case,
Z = sL + R
Therefore, Equation (19) becomes Equation (35) in FIG.

  Therefore, the impedance conversion circuit 10 in this case functions as a low-pass filter. The cutoff frequency is also determined by the product CR of the capacitor C and the resistor R.

[7] Band Pass Filter FIG. 15 shows an example in which a band pass filter is configured by the impedance conversion circuit 10. In this example, a series resonant circuit 11 including a capacitor C, a coil L, and a resistor R is connected as the impedance element Z. So in this case,
Z = 1 / (sC) + sL + R
Therefore, equation (19) becomes equation (36) in FIG.

  Therefore, if the values Le, Ce, and Re are defined as shown in equation (37) in FIG. 16, equation (36) becomes equation (38) in FIG. This equation (38) is equivalent to a product obtained by multiplying a parallel circuit of an inductance Le, a capacitance Ce, and a resistance Re by a coefficient 1 / R1, as shown in FIG.

Therefore, the impedance conversion circuit 10 in this case acts as a band-pass filter whose center frequency is equal to the resonance frequency of the equivalent inductance Le and the equivalent capacitance Ce. And at this time, according to equation (37),
Le · Ce = L · C
Therefore, the center frequency of the bandpass filter (impedance conversion circuit 10) is also the resonance frequency of the coil L and the capacitor C.

  Therefore, the impedance conversion circuit 10 acts as a band-pass filter whose center frequency is equal to the resonance frequency of the coil L and the capacitor C. At this time, since the resonance circuit of the inductance Le and the capacitance Ce is Q-dumped by the resistor Re, the Q value of the passband characteristic of the bandpass filter can be changed by selecting the value of the resistor R. it can.

[8] Trap circuit (band elimination filter)
FIG. 18 shows an example when a trap circuit is configured by the impedance conversion circuit 10. In this example, a series circuit of a parallel resonance circuit 12 of a capacitor C and a coil L and a resistor R is connected as the impedance element Z. So in this case,
Z = ((1 / (sC)) ‖sL) + R
Therefore, Equation (19) becomes Equation (39) in FIG.

  Therefore, when the equivalent inductance Le, equivalent capacitance Ce, and equivalent resistance Re in equation (37) are applied to equation (39), equation (39) becomes equation (40) in FIG. This equation (40) is equivalent to a product obtained by multiplying a parallel circuit of a series resonant circuit of an inductance Le and a capacitor Ce and a resistor Re by a coefficient 1 / R1, as shown in FIG.

  Therefore, the impedance conversion circuit 10 in this case acts as a trap circuit that sets the resonance frequency of the capacitor Ce and the inductance Le to a null frequency. The null frequency is also equal to the resonance frequency of the coil L and the capacitor C. Further, since this trap circuit is also Q dumped by the resistor Re, the Q value of the passage blocking characteristic can be changed by selecting the value of the resistor R.

[9] Broadband Trap Circuit FIG. 21 shows an example when a wideband trap circuit is configured by the impedance conversion circuit 10. In this example, a series circuit of resistors R and parallel resonant circuits 121 to 12n of capacitors C1 to Cn and coils L1 to Ln is connected as the impedance element Z.

  Therefore, in this case, since each of the parallel resonance circuits 121 to 12n operates in the same manner as the parallel resonance circuit 12 of FIG. 18, by changing the parallel resonance frequency of the parallel resonance circuits 121 to 12n, a wide band trap A circuit can be realized.

[10] Balanced Impedance Conversion Circuit In FIG. 22, a circuit 20 is an example when the impedance conversion circuit is configured in a balanced type. That is, one set of the first operational amplifier OP and the resistors R1 to R4 is connected to the terminals T1 to T3 in the same manner as the impedance conversion circuit 10 in FIG. 1, and the second pair is connected to the terminals T2, T1, and T4. A pair of operational amplifier OP and resistors R1 to R4 are connected in the same manner. Further, the impedance element Z20 is connected between the connection midpoint of the first resistors R2 and R3 and the connection midpoint of the second resistors R2 and R3. In addition,
Z20 = 2 · Z
It is.

  Then, input signal voltages having opposite phases, that is, balanced input signal voltages + Vin and −Vin are supplied to the terminals T1 and T2, and the signal voltages + Vout and −Vout are taken out to the terminals T3 and T4. Note that the non-inverting input terminals of the operational amplifiers OP and OP are grounded. The voltage gain of the operational amplifiers OP and OP is sufficiently large. Further, the entire circuit 20 is integrated into an IC.

In such a configuration, as shown in FIG. 23, the impedance element Z20 of the circuit 20 of FIG. 22 is replaced with a series circuit of two impedance elements Z1 and Z2, and the connection midpoint thereof is grounded. However,
Z1 = Z2 = Z (= Z20 / 2)
And

  Then, the upper half of the circuit of FIG. 23 has the same configuration as the impedance conversion circuit 10 of FIG. 1, and the lower half has the same configuration. Therefore, the transfer function Vout / Vin between the input terminals T1 and T2 and the output terminals T3 and T4 is equal to that in FIG. 1, and is expressed by equation (18). That is, the circuit 20 of FIG. 23 also functions as an impedance conversion circuit.

  At this time, the signal current i1 flowing through the impedance element Z1 and the signal current i2 flowing through the impedance element Z2 are equal in magnitude and opposite in direction, and as a result, between the impedance elements Z1, Z2 and the ground. Signal current does not flow through. Therefore, the series circuit of the impedance elements Z1 and Z2 and the impedance element Z20 shown in FIG. 22 are equivalent.

  Therefore, if the resistors R1 to R4 are set as shown in equation (20), r = 0, and the circuit 20 of FIG. 22 operates as a balanced impedance conversion circuit, and its transfer function Vout / Vin is It is expressed by equation (19). At this time, the impedance conversion circuit 20 is configured as a balanced type and has a balanced operation. Therefore, the signal current does not flow to the ground, and the noise resistance is enhanced. .

[11] High-Pass Filter FIG. 24 shows an example when a second-order balanced high-pass filter is configured by the impedance conversion circuit 20. That is, each of the impedance conversion circuits 20A and 20B is configured in the same manner as the impedance conversion circuit 20, and is cascaded between the input terminals T1 and T2 and the output terminals T3 and T4. Of the impedance conversion circuits 20A and 20B, elements corresponding to those of the impedance conversion circuit 20 in FIG.

At this time, the impedance element Z20 of the preceding impedance conversion circuit 20A is a parallel circuit of the resistor RA and the capacitor CA, and the impedance element Z20 of the subsequent impedance conversion circuit 20B is the capacitor CB. In addition,
RA = 2 · R, CA = C1 / 2, CB = C2 / 2
It is.

  The output terminals of the operational amplifiers OPB and OPB of the subsequent impedance conversion circuit 20B are connected to the inverting input terminals of the operational amplifiers OP and OP of the previous impedance conversion circuit 20A through negative feedback resistors R5 and R5. The negative feedback resistors R6 and R6 are connected to the connection points of the resistors R2A, R3A, and R4A and the connection points of the resistors R2A, R3A, and R4A of the impedance conversion circuit 20A in the previous stage.

  According to such a configuration, the transfer functions Vout / Vin of the impedance circuits 20A and 20B are also shown in the same manner as the equation (18). Therefore, if the values of the resistors R5, R6, R4A are set as shown in the equation (41) in FIG. 25, r = 0 and the equation (42) in FIG. 25 is established. That is, a second-order biquad high-pass filter is configured.

  In general, when configuring a secondary high-pass filter, it is necessary to subtract the output component of the band-pass filter and the output component of the low-pass filter from the input signal. For the filter and for subtraction, three sets of six operational amplifiers are required. However, in the high-pass filter shown in FIG. 24, the impedance conversion circuit 20B in the subsequent stage acts as a differentiation circuit. In addition, two sets of operational amplifiers are sufficient, and therefore the number of elements can be reduced.

[12] High-pass filter for frequency conversion As a superheterodyne receiver, there is a so-called low-IF conversion method in which the intermediate frequency is made considerably lower than the reception frequency by bringing the local oscillation frequency close to the reception frequency. In addition, there is a so-called direct conversion system in which the intermediate frequency is made zero by setting the local oscillation frequency equal to the reception frequency.

  However, in these systems, a DC offset is generated in the mixer circuit, and the mixer output may include a DC component or a frequency component close to DC. For this reason, in this type of receiver IC, a negative feedback is applied to the mixer circuit so that no DC component is generated. However, if a direct current component is not generated by negative feedback, the negative feedback circuit for that purpose becomes complicated, so that the number of elements increases and power consumption increases. It will be shorter.

  FIG. 26 shows an example of a high-pass filter suitable for such a case. In other words, in this example, the mixer circuit 32 is configured in a balanced manner, and the balanced received signal ± SRX is extracted from the antenna tuning circuit 31 and supplied to the mixer circuit 32, and the balanced local oscillation is generated from the local oscillation circuit 33. The signal ± SLO is taken out and supplied to the mixer circuit 32. Thus, in the mixer circuit 32, the received signal ± SRX is frequency-converted to a balanced intermediate frequency signal ± SIF by the local oscillation signal ± SLO, and this intermediate frequency signal ± SIF is output from the mixer circuit 32.

  In this case, as described above, the low IF conversion method is adopted by bringing the local oscillation frequency close to the reception frequency, or the direct conversion method is adopted by making the local oscillation frequency equal to the reception frequency. In addition to the intermediate frequency signal ± SIF, the output signal of the mixer circuit 32 includes unnecessary signal components, for example, a DC component due to the DC offset described above.

Therefore, the output signal of the mixer circuit 32 is supplied to the balanced impedance conversion circuit 20. In this case, the impedance element Z of the impedance conversion circuit 20 is a series circuit of a resistor R20 and a capacitor C20. In addition,
R20 = 2 · R, C20 = C / 2
It is said. Although not shown, the output signal of the impedance circuit 20 is supplied to the intermediate frequency circuit.

  According to such a configuration, since the impedance conversion circuit 20 has the impedance element Z as a series circuit of the resistor R20 and the capacitor C20, the impedance conversion circuit 20 is similar to the impedance conversion circuit 10 of FIG. Acts as a high-pass filter.

  Therefore, even if the mixer circuit 32 has a DC offset, an intermediate frequency signal ± SIF (and other unnecessary frequency components) that does not include a DC component is extracted from the impedance conversion circuit 20. In this case, according to the mixer circuit 32 and the impedance conversion circuit 20, it is not necessary to provide a negative feedback circuit, so that the power consumption does not increase and the battery life is increased in the receiver using the battery as a power source. Can be long.

[13] Summary According to the impedance conversion circuit described above, as shown in the equation (19), when impedance conversion is performed, unnecessary resistance components do not remain in the conversion result. In addition, impedance conversion can be performed with a smaller number of elements than conventional impedance conversion circuits, which is advantageous in reducing power consumption. In addition, since the impedance conversion circuit can be configured with a small number of elements, the use frequency band is widened, and an active filter up to a high frequency can be configured.

  In addition, since a voltage / current conversion circuit is used for the input and drive units, all operating points can be set at the center of the power supply voltage, providing a wide input / output dynamic range and being resistant to distortion. It can be a circuit. Further, since the differential input / differential output configuration is easy, analog signal processing that is resistant to noise such as radiation can be performed. Moreover, it can be used for a circuit in which analog processing and digital processing are mixed.

  In addition, since sufficient characteristics can be obtained as a differentiation circuit, a secondary high-pass filter can be configured with a small number of elements, which is advantageous in improving performance and reducing power consumption.

  Furthermore, in a superheterodyne receiving circuit such as a direct conversion system or a low IF conversion system, the mixer circuit and the subsequent stage can be connected very easily. This also reduces the external capacitors of the IC, which is advantageous for reducing the size and cost of circuit modules. Further, a negative feedback circuit for preventing a DC offset is not required.

[List of abbreviations]
IC: Integrated Circuit
IF: Intermediate Frequency
Q: Quality Factor
Operational Amplifier: Operational Amplifier

It is a connection diagram showing one embodiment of the present invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a figure which shows the equivalent circuit of the circuit of FIG. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. FIG. 16 is an equivalent circuit diagram for explaining the circuit of FIG. 15. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. FIG. 19 is an equivalent circuit diagram for explaining the circuit of FIG. 18. It is a connection diagram which shows the other form of this invention. It is a connection diagram which shows the other form of this invention. It is a connection diagram for explaining the present invention. It is a connection diagram which shows the other form of this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG. It is a connection diagram which shows the other form of this invention. It is a circuit diagram for demonstrating this invention. It is a figure which shows the numerical formula for demonstrating the circuit of FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 and 20 ... Impedance conversion circuit, OP ... Operational amplifier, R1-R4 ... Resistor, T1 and T2 ... Input terminal, T3 and T4 ... Output terminal, Z ... Impedance element

Claims (6)

One of a pair of input terminals to which input signal voltages of opposite phases are supplied is connected to the inverting input terminal of the operational amplifier through the first resistor,
Second and third resistors are connected in series between the inverting input terminal and the output terminal of the operational amplifier.
The output terminal is connected to the output terminal,
The other of the pair of input terminals is connected to a connection midpoint of the second and third resistors through a fourth resistor,
A predetermined impedance means is connected to the connection midpoint of the second to fourth resistors,
An impedance conversion circuit configured to obtain a transfer function having a reciprocal of the impedance means between the pair of input terminals and the output terminal. The impedance conversion circuit according to claim 1,
When the first to fourth resistors are R1 to R4, the value is R4 = (R1-R2) R3 / (R2 + R3)
Impedance conversion circuit that is set to Having first and second operational amplifiers;
One input terminal of a pair of input terminals to which input signal voltages having opposite phases are supplied is connected to an inverting input terminal of the first operational amplifier through a first resistor,
Second and third resistors are connected in series between the inverting input terminal and the output terminal of the first operational amplifier.
The output terminal is connected to one output terminal of the pair of output terminals;
The other input terminal of the pair of input terminals is connected to a connection midpoint of the second and third resistors through a fourth resistor,
The other input terminal is connected to the inverting input terminal of the second operational amplifier through a fifth resistor;
Sixth and seventh resistors are connected in series between the inverting input terminal and the output terminal of the second operational amplifier.
The output terminal of the second operational amplifier is connected to the other output terminal of the pair of output terminals,
The one input terminal is connected to a connection midpoint of the sixth and seventh resistors through an eighth resistor;
A predetermined impedance means is connected between the connection midpoint of the second to fourth resistors and the connection midpoint of the sixth to eighth resistors,
An impedance conversion circuit configured to obtain a transfer function having a reciprocal number of the impedance means between the pair of input terminals and the pair of output terminals. The impedance conversion circuit according to claim 3,
When the first to eighth resistors are R1 to R8, their values are R1 = R5, R2 = R6, R3 = R7, R4 = R8.
R4 = (R1-R2) R3 / (R2 + R3)
Impedance conversion circuit that is set to Having first and second impedance conversion circuits;
Each of these first and second impedance conversion circuits is:
One input terminal of a pair of input terminals to which input signal voltages having opposite phases are supplied is connected to the inverting input terminal of the first operational amplifier through the first resistor,
Second and third resistors are connected in series between the inverting input terminal and the output terminal of the first operational amplifier.
The output terminal is connected to one output terminal of the pair of output terminals;
The other input terminal of the pair of input terminals is connected to a connection midpoint of the second and third resistors through a fourth resistor,
The other input terminal is connected to the inverting input terminal of the second operational amplifier through a fifth resistor;
Sixth and seventh resistors are connected in series between the inverting input terminal and the output terminal of the second operational amplifier.
The output terminal of the second operational amplifier is connected to the other output terminal of the pair of output terminals,
The one input terminal is connected to a connection midpoint of the sixth and seventh resistors through an eighth resistor;
A predetermined impedance means is connected between the connection midpoint of the second to fourth resistors and the connection midpoint of the sixth to eighth resistors,
The first and second impedance conversion circuits are cascaded through the input terminal and the output terminal,
A negative feedback resistor is connected between the output terminal of the second impedance conversion circuit and the inverting input terminals of the second and first operational amplifiers of the first impedance conversion circuit,
Between the output terminal of the second impedance conversion circuit and the connection midpoint of the second to fourth resistors and the connection midpoint of the sixth to eighth resistors of the first impedance conversion circuit Is connected to another negative feedback resistor,
The impedance means in the first impedance conversion circuit is a parallel circuit of a resistor and a capacitor;
The impedance means in the second impedance conversion circuit is another capacitor,
A high-pass filter circuit in which a secondary high-pass filter characteristic is obtained in a cascade circuit of the first impedance conversion circuit and the second impedance conversion circuit. The mixer circuit is configured as a balanced type,
One output terminal of the pair of output terminals of the mixer circuit is connected to the inverting input terminal of the first operational amplifier through the first resistor,
Second and third resistors are connected in series between the inverting input terminal and the output terminal of the first operational amplifier.
The other output end of the pair of output ends of the mixer circuit is connected to a connection midpoint of the second and third resistors through a fourth resistor,
The other output terminal is connected to the inverting input terminal of the second operational amplifier through a fifth resistor,
Sixth and seventh resistors are connected in series between the inverting input terminal and the output terminal of the second operational amplifier.
The one output terminal is connected to a connection midpoint of the sixth and seventh resistors through an eighth resistor,
A resistor and a capacitor are connected in series between the connection midpoint of the second to fourth resistors and the connection midpoint of the sixth to eighth resistors,
A frequency conversion circuit configured to extract a balanced intermediate frequency signal from the output terminals of the first and second operational amplifiers.

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