JP2007173651A - Multilayer ceramic capacitor, multilayer wiring board with built-in capacitor, and multilayer electronic device - Google Patents

Abstract

An object of the present invention is to obtain a multilayer ceramic capacitor or a multilayer wiring board with a built-in capacitor, which is a relay board with a built-in capacitor, which is small in size and has a large capacity and suppresses propagation delay of high-frequency signals and attenuation of high-frequency signals. A multilayer electronic device that can be miniaturized and densified is obtained.
In a multilayer ceramic capacitor (multi-layer wiring board with built-in capacitor) 10, an insulating material having a dielectric constant smaller than that of a dielectric layer of a signal wiring 14 formed in capacitor portions 11b, 11c, 12a, 12b, and 12c. Covered by part 17.
[Selection] Figure 1

Description

  The present invention relates to a multilayer ceramic capacitor and a multilayer wiring board with a built-in capacitor that reduce noise in signal wiring, and a multilayer electronic device using these, and can contribute particularly to miniaturization and high density of a multilayer semiconductor device. It is about technology.

  In recent years, portable devices typified by mobile phones and notebook personal computers have been strongly demanded to be smaller, lighter, lower in profile, multifunctional, and faster. Electronic components and electronic devices used in these portable devices The device is required to be mounted with higher density. As a result, a package on which electronic components such as semiconductor elements are mounted can be downsized to a chip size and scale, and one package has a plurality of electronic components mounted in order to achieve high-density mounting. Electronic devices have also been used. Such an electronic device mounting a plurality of conventional semiconductor elements or the like was mounted on a mounting (mother) substrate in a planar shape, but further reduces the occupation area of the electronic device on the mounting (mother) substrate, In order to achieve higher density and smaller size, a stacked electronic device in which a plurality of electronic devices are stacked one above the other has been developed.

  As an example, there is a BGA stacked semiconductor device in which a BGA (Ball Grid Array) type semiconductor device on which a semiconductor element is mounted is three-dimensionally stacked (see, for example, Patent Document 1). According to such a stacked semiconductor device, a small and highly functional module can be provided by stacking a plurality of semiconductor devices such as an MPU (Micro Processing Unit) unit and a memory unit.

  On the other hand, a semiconductor element with arithmetic processing such as an MPU requires a noise removing capacitor (bypass capacitor) in order to remove noise, for example, switching noise, which is generated along with the increase in functionality and speed. On the other hand, as a form in which the bypass capacitor acts on the semiconductor element, for example, three kinds of forms described below have been proposed.

  In the first embodiment, a chip capacitor as a bypass capacitor is mounted on a mounting (mother) substrate in the vicinity of the laminated semiconductor device. A mounting (mother) substrate often has a larger mounting area than a semiconductor device, and can be mounted with a chip capacitor.

  However, in this case, the wiring distance between the chip capacitor and the semiconductor element becomes long, and there is a problem that a drop in the power supply voltage becomes remarkable due to the occurrence of a high-speed signal propagation delay and an increase in the inductance component of the wiring pattern. It was. As a result, there is a problem in that the time for reaching the threshold voltage varies and it becomes difficult to operate the semiconductor element at high speed.

  In the second embodiment, a space for mounting a bypass capacitor is prepared in a semiconductor device, and a chip capacitor is mounted there. Generally, the shorter the wiring distance connecting the bypass capacitor and the semiconductor element, the higher the noise removal capability of the bypass capacitor. Therefore, in the second embodiment, the wiring distance can be shortened as compared with the first embodiment, so that the electrical characteristics are superior to those of the first embodiment.

  However, according to the second embodiment, in order to secure a space for mounting a bypass capacitor in a semiconductor device in which wiring is formed at a high density, the semiconductor device is increased in size and the degree of freedom in design is reduced. There was a problem of doing. Furthermore, in order to laminate a semiconductor device having a bypass capacitor to form a laminated semiconductor device, a connection pad for connecting a semiconductor element and a connection pad for connecting between the semiconductor devices are provided on the semiconductor element mounting surface of the semiconductor device. Since both are necessary, the design compatible with the high-density wiring of the semiconductor device becomes more difficult.

  In the third embodiment, a function as a bypass capacitor is imparted to the relay substrate of the laminated semiconductor device (see, for example, Patent Documents 2 and 3). That is, a relay board with a built-in capacitor such as a multilayer capacitor or a so-called multilayer wiring board with a built-in capacitor in which a capacitor portion is formed inside an insulating base is used as the relay board. According to such a form, since the bypass capacitor can be formed immediately below the semiconductor element, the distance between the wiring between the bypass capacitor and the semiconductor element is made shorter than when the bypass capacitor is mounted on the semiconductor device. be able to. Further, since it is not necessary to secure a space for mounting the bypass capacitor in the semiconductor device, the semiconductor device can be downsized and the degree of design freedom can be increased.

JP 2003-124439 A JP 2004-304158 A JP 2005-85853 A

  However, in the above-described relay board with a built-in capacitor, signal wirings for electrical connection between a plurality of semiconductor devices stacked on the relay board are formed inside the dielectric material constituting the capacitor. For this reason, when a high dielectric constant material such as barium titanate is used as the dielectric material, stray capacitance is generated between adjacent signal wires or between the signal wires and the electrode layer constituting the capacitor. There is a problem that noise is easily superimposed on a high-frequency signal.

  In addition, when high-frequency signals are transmitted through the signal wiring of the relay board with built-in capacitor, if the signal wiring is surrounded by a dielectric material, the propagation speed of a conductor surrounded by a dielectric material is generally the square root of the dielectric constant. Since the loss due to the dielectric material of the high-frequency signal is proportional to the dielectric loss tangent (tan δ) of the dielectric material, there is a problem that propagation delay or attenuation of the high-frequency signal occurs.

  The present invention has been devised in order to solve the above-described problems, and its purpose is to provide a relay board with a built-in capacitor that is small in size and large in capacity, and that suppresses propagation delay of high-frequency signals and attenuation of high-frequency signals. It is to obtain a multilayer ceramic capacitor or a multilayer wiring board with a built-in capacitor, and to obtain a multilayer electronic device that can be further reduced in size and density.

  The multilayer ceramic capacitor provided by the first aspect of the present invention includes a multilayer body in which a plurality of dielectric layers and a plurality of electrode layers are alternately stacked, and is formed in the multilayer body, and is formed in the multilayer body. And an insulating portion formed so as to cover the signal wiring and having a dielectric constant smaller than that of the plurality of dielectric layers.

  The multilayer wiring board with a built-in capacitor provided by the second aspect of the present invention includes an insulating base, a capacitor portion composed of a plurality of electrode layers and one or more dielectric layers, and a signal wiring formed on the capacitor portion. And an insulating portion formed so as to cover the signal wiring and having a dielectric constant smaller than that of the one or more dielectric layers.

  According to a third aspect of the present invention, there is provided a multilayer electronic device in which an electronic component is mounted on the multilayer ceramic capacitor or the multilayer wiring board with a built-in capacitor according to the first and second aspects.

The insulating part is preferably formed such that the dielectric constant is 10 or less and the dielectric loss tangent is 5 × 10 ⁻³ or less. Such an insulating part is formed as a glass ceramic sintered body, for example.

  For example, the signal wiring is formed as a through conductor extending in the thickness direction in the multilayer body. In this case, the insulating portion is formed in a cylindrical shape surrounding the periphery of the signal wiring as the through conductor.

The electrode layer and the signal wiring are preferably formed with Ag, Cu or Au as a main component, and the dielectric layer is preferably formed with a perovskite compound having a dielectric constant of 1500 or more as a main component. The dielectric layer preferably further contains SiO ₂ —BaO—TiO ₂ —Al ₂ O ₃ crystallized glass. In this case, the ratio of the perovskite compound is preferably 75 to 80% by volume, and the ratio of the SiO ₂ —BaO—TiO ₂ —Al ₂ O ₃ crystallized glass is preferably 20 to 25% by volume.

  In the multilayer ceramic capacitor and the multilayer wiring board with a built-in capacitor according to the present invention, the signal wiring formed in the multilayer body or the capacitor portion is covered with an insulating portion having a dielectric constant smaller than that of the dielectric layer. Therefore, stray capacitance generated between adjacent signal wirings or between the signal wirings and the electrode layer of the multilayer body or the capacitor portion can be reduced. As a result, electromagnetic coupling between the signal wirings or between the signal wirings and the electrode layer of the capacitor portion can be suppressed, and noise can be prevented from being superimposed on the high-frequency signal.

Moreover, when the dielectric constant is 10 or less and the dielectric loss tangent is 1 × 10 ⁻³ or less, the propagation delay and attenuation of the high-frequency signal can be more effectively suppressed as described below.

  In general, the propagation speed V of a high-frequency signal in a signal wiring surrounded by a material having a dielectric constant K can be described as V = C / √K, where C is the speed of light. Therefore, by covering the signal wiring with a glass ceramic sintered body having a dielectric constant of 10 or less, the propagation speed V can be increased and propagation delay can be prevented.

On the other hand, the high-frequency signal suffers loss (dielectric loss) due to the material surrounding the signal wiring. Therefore, by setting the dielectric loss of the insulating portion surrounding the signal wiring to a very small value of 5 × 10 ⁻³ or less, the dielectric loss of the high-frequency signal can be reduced and the signal attenuation can be suppressed.

In the multilayer ceramic capacitor and the multilayer wiring board with a built-in capacitor according to the present invention, the electrode layer and the signal wiring are mainly composed of any one of Ag, Cu and Au, and the dielectric layer has a dielectric constant of 75 to 80% by volume of 1500 or more. When the perovskite compound and 20 to 25% by volume of SiO ₂ —BaO—TiO ₂ —Al ₂ O ₃ crystallized glass are used, the conductor resistance is low and the dielectric layer has a high dielectric constant of 1000 or more. Therefore, a high-capacity multilayer ceramic capacitor or a multilayer wiring board with a built-in capacitor having high frequency characteristics can be obtained.

  In addition, since the multilayer electronic device of the present invention uses the multilayer ceramic capacitor or the multilayer wiring board with a built-in capacitor described above, it is possible to suppress the effect described above, that is, noise superimposed on the high-frequency signal. Thus, it is possible to enjoy the effect that the propagation delay and attenuation of the high-frequency signal can be more effectively suppressed. Further, by assuring the function as a capacitor in the multilayer electronic device with the multilayer ceramic capacitor or the multilayer wiring board with a built-in capacitor, the multilayer electronic device can be made small, short, and highly functional.

  Hereinafter, first to third embodiments of the present invention will be described in detail with reference to FIGS. 1 to 3.

  First, a multilayer ceramic capacitor according to a first embodiment of the present invention will be described with reference to FIG.

  A multilayer ceramic capacitor 10 shown in FIG. 1 includes a multilayer body 13 in which a plurality of dielectric layers 11a, 11b, 11c, and 11d and a plurality of electrode layers 12a, 12b, and 12c are alternately stacked. The laminated body 13 can function as a capacitor because the dielectric layers 11b and 11c exist between the plurality of electrode layers 12a to 12c.

  The plurality of electrode layers 12 a to 12 c are electrically connected by a signal wiring 14. A plurality of connection terminal portions 15 are formed on the surfaces of the dielectric layers 11a and 11d that are the outermost layers. Some of these connection terminal portions 15 are electrically connected by signal wirings 16 penetrating the stacked body 13. The signal wiring 16 is for electrically connecting a plurality of electronic components (not shown) connected to the multilayer ceramic capacitor 10, and is surrounded by an insulating portion 17.

  The insulating portion 17 is for reducing the stray capacitance generated between the signal wiring 14 and the signal wiring 16 or between the signal wiring 14 and the electrode layers 12a to 12c. That is, by covering the signal wiring 14 with the insulating portion 17, electromagnetic coupling between the signal wiring 14 and the signal wiring 16 or between the signal wiring 14 and the electrode layers 12a to 12c can be suppressed. It is possible to prevent noise from being superimposed on the high-frequency signal on the signal wiring 14.

In order to reliably obtain such an effect, the insulating portion 17 is formed so as to have a dielectric constant lower than that of the dielectric layers 11a to 11d. More specifically, the insulating portion 17 is formed, for example, so that the dielectric constant is 10 or less and the dielectric loss is 5 × 10 ⁻³ or less. In this case, since the propagation speed of the high-frequency signal propagating through the signal wiring 14 is fast and the dielectric loss can be reduced, propagation delay can be prevented and attenuation of the high-frequency signal can be suppressed. Such an insulating portion 17 having a dielectric constant and dielectric loss can be easily realized by using a general glass ceramic sintered body.

  The dielectric layers 11a to 11d are made of, for example, a perovskite compound mainly composed of barium titanate. As a result, the dielectric constant of the dielectric layer 11 can be as high as 1000 or more. As a result, it is possible to obtain a desired capacitance value with a smaller size and a smaller number of laminated layers, so that the multilayer ceramic capacitor 10 can be reduced in size and height.

  The electrode layers 12a to 12c, the signal wirings 14 and 16, and the connection terminal portion 15 are made of a low resistance conductor material such as Ag, Cu, or Au. As a result, the electrode layers 12a to 12c, the signal wirings 14 and 16, and the connection terminal portion 15 can be reduced in conduction resistance, thereby further suppressing the propagation delay and attenuation of the high-frequency signal and the decrease in the power supply voltage of the capacitor. It is preferable because it is possible.

  Such a multilayer ceramic capacitor 10 can be manufactured as follows.

  First, a glass powder is added to a perovskite compound powder mainly composed of barium titanate powder, and an organic binder, an organic solvent, a dispersant, a plasticizer, and the like are added and mixed to form a slurry, and the doctor blade method using the slurry Alternatively, a dielectric green sheet to be the dielectric layers 11a to 11d is formed by employing the calender roll method.

When glass powder is added to the perovskite compound powder, it is preferable to use crystallized glass powder that can make the dielectric constants of the dielectric layers 11a to 11d 1000 or more. As such crystallized glass, SiO ₂ —BaO—TiO ₂ —Al ₂ O ₃ can be used, and the ratio of the perovskite compound powder to the glass powder is 75 to 80% by volume: 20 to It is preferably 25% by volume.

  In general, since the dielectric constant of the sintered body of the perovskite compound powder and the glass powder follows the logarithmic mixing side, the dielectric layers 11a to 11d can be formed by setting the dielectric constants of the perovskite compound powder and the glass powder to, for example, 1500 or more and 100 or more, respectively. A dielectric constant can be made high with 1000 or more, and the capacity | capacitance of a multilayer ceramic capacitor can be made high.

  Further, since the volume ratio of the perovskite compound in the perovskite compound sintered body is 75 to 80% by volume and the ratio of the glass in the perovskite compound sintered body is relatively high, there is no segregation of glass between the perovskite compounds. The sintered state of the perovskite compound sintered body can be made stable with no composition variation or voids due to poor sintering or abnormally grown grains. Moreover, since the ratio of the glass in the perovskite compound sintered body is high, the influence of the diffusion of the glass component from the insulating portion 13 can be reduced. In addition, the high ratio of glass in the perovskite compound sintered body means that the perovskite compound filler is rearranged during the sintering process, and the dielectric layer 11 made of the perovskite compound sintered body and the glass ceramic sintered body. The difference in heat shrinkage characteristics with the insulating portion 13 is reduced. As a result, the stress between the insulating portion 13 and the dielectric layer 11 due to the difference in heat shrinkage characteristics is reduced, and the calcined body of the insulating portion 13 having low strength is not cracked. Since reliability can be made higher, it is suitable for the present invention.

  As the organic binder, those conventionally used for dielectric green sheets can be used. For example, acrylic (acrylic acid, methacrylic acid or ester homopolymer or copolymer thereof, specifically acrylic Acid ester copolymer, methacrylate ester copolymer, acrylic ester-methacrylic ester copolymer, etc.), polyvinyl butyral, polyvinyl alcohol, acrylic-styrene, polypropylene carbonate, cellulose and other homopolymers Or a copolymer is mentioned. As an organic solvent, for example, hydrocarbons, ethers, esters, ketones, alcohols, etc. so that a dielectric green sheet having an appropriate viscosity can be obtained by dispersing barium titanate powder, glass powder and resin binder. These organic solvents are mentioned. Further, a dispersant may be added in order to make the dispersion better.

  Next, a region for forming the insulating portion 13 is punched in the dielectric green sheets (11a to 11d) by processing such as die processing or punching, and this region is filled with glass ceramic paste by screen printing or the like. This glass ceramic paste becomes the insulating part 13 made of a glass ceramic sintered body by firing later.

  As the glass-ceramic paste, glass powder or ceramic powder and an organic binder, organic solvent, plasticizer, or the like added and mixed can be used.

Examples of the glass powder include SiO ₂ —B ₂ O ₃ system, SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ system, SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —MO system (where M is Ca , Sr, Ba or Zn), SiO ₂ —Al ₂ O ₃ —M ¹ O—M ² O system (wherein M ¹ and M ² are the same or different and represent Ca, Sr, Ba or Zn), SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —M ¹ O—M ² O system (where M ¹ and M ² are the same as above), SiO ₂ —B ₂ O ₃ —M ³ ₂ O system (However, M ³ represents Li, Na or K), SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —M ³ ₂ O (where M ³ is the same as above), Bi glass, etc. The powder can be used.

  Among the exemplified glass components, an amorphous glass having a softening temperature of 400 ° C. to 600 ° C. is selected from the viewpoint of relieving thermal stress with the sintered body (dielectric layers 11a to 11d) of the dielectric green sheet. It is preferable. Since amorphous glass having a low softening temperature can be deformed in a temperature region higher than the softening temperature, heat caused by a difference in thermal expansion coefficient between the dielectric layers 11a to 11d and the insulating portion 13 can be obtained. Stress can be relaxed. Examples of such a glass component include a SiO—BO—BaO—CaO—ZnO system and a BiO—SiO—BO system.

On the other hand, it is preferable to use a ceramic powder having a dielectric constant of 10 or less and a dielectric loss of 5 × 10 ⁻³ , for example, Al ₂ O ₃ , SiO ₂ , ZrO ₂ and alkaline earth metal. A composite oxide with an oxide, or a powder of a composite oxide containing at least one selected from Al ₂ O ₃ and SiO ₂ (for example, spinel, mullite, cordierite) can be used.

  Next, through holes are formed in the glass ceramic paste filled in the dielectric green sheets (11a to 11d) to form the insulating portion 13 by die processing, laser processing, punching, or the like. Further, the through-hole paste is filled in the through-hole by screen printing or the like with a metal powder such as Ag, Cu, Au or the like and glass powder added with an appropriate organic binder and solvent. The through conductor paste becomes the signal wiring 14 by firing.

  On the other hand, the paste which should become the electrode layer 12 by apply | coating the paste for electrodes which added the suitable organic binder and the solvent to the metal powder and glass powder on the surface of the dielectric green sheet (11b-11d) by screen printing etc. Similarly, on the dielectric green sheets (11a, 11d), a conductive paste in which an appropriate organic binder and solvent are added to and mixed with metal powder such as Ag, Cu, Au, and glass powder is screen-printed. The paste part which should become the connection terminal part 15 is formed by apply | coating with etc.

  Next, a plurality of dielectric green sheets (11a to 11d) are thermocompression bonded at a pressure of 3 to 20 MPa and a temperature of 50 to 80 ° C. to produce a laminate. Thereafter, when the metal powder forming the signal wiring 14, the electrode layer 12, and the connection terminal portion 15 is, for example, Ag or Au, at a temperature of 900 to 1000 ° C. in the atmosphere, for example, Cu, By firing this multilayer body at a temperature of 900 to 1000 ° C. in a nitrogen atmosphere, the multilayer ceramic capacitor 10 of the present invention is obtained.

  Here, it is preferable that the metal powder forming the signal wiring 14, the electrode layer 12, and the connection terminal portion 15 is Cu from the viewpoint of a semiconductor device generally used in a semiconductor element. In this case, it is necessary to perform firing in an appropriate oxygen partial pressure region where the oxygen partial pressure in the nitrogen atmosphere during firing is not less than the reduction concentration of barium titanate and not more than the oxidation partial pressure of Cu. As a result, oxygen can be prevented from escaping from the barium titanate crystal, and a capacitor layer having a high capacity and high reliability can be formed.

  Furthermore, the surface of the connection terminal portion 15 of the multilayer ceramic capacitor 10 obtained in this way may be plated in order to prevent corrosion or improve solder wettability when mounting electronic components.

  Next, a capacitor built-in multilayer wiring board according to a second embodiment of the present invention will be described with reference to FIG.

  The capacitor built-in multilayer wiring board 20 shown in FIG. 2 has a capacitor portion 22 formed between a pair of insulating layers 21a and 21b as insulating bases.

  The capacitor unit 22 corresponds to the multilayer ceramic capacitor 10 (see FIG. 1) described above. That is, the capacitor unit 22 includes a plurality of electrode layers 22a to 22e by alternately laminating a plurality of electrode layers 22a, 22b, 22c, 22d, and 22e and a plurality of dielectric layers 22A, 22B, 22C, and 22D. The dielectric layers 22A to 22D are interposed therebetween. These dielectric layers 22A to 22D are formed as sintered bodies of perovskite compounds mainly composed of barium titanate.

  The capacitor unit 22 has the same planar view dimensions (dimensions in the left and right direction in FIG. 2) as the insulating base (insulating layers 21a and 21), but the plan view dimensions of the capacitor unit 22 are the same. May be made smaller than the insulating bases 21a and 21b, and the entire capacitor portion 22 may be embedded in the insulating bases 21a and 21b.

  On the other hand, the insulating layers 21a and 21b are portions on which electronic components (not shown) such as semiconductor elements are mounted, and are provided with a plurality of connection terminal portions 24 for electrical connection with the mounted semiconductor elements. Yes. These insulating layers 21a and 21b are formed as a glass ceramic sintered body having a low dielectric constant and a low dielectric loss tangent value, for example.

  The capacitor built-in multilayer wiring board 20 further includes a signal wiring 25 for electrically connecting the electrode layers 22a to 22e to each other, and insulating layers 21a and 21b and a capacitor portion 22 (dielectric layers 22A to 22D and electrode layers 22a). To 22e) are formed. The signal wiring 26 is for connecting the connection terminal portions 24 formed on the upper and lower main surfaces of the insulating base (insulating layers 21 a and 21 b), and is surrounded by the insulating portion 27.

  As described above, the multilayer wiring substrate 10 with a built-in capacitor has the capacitor portion 22 corresponding to the multilayer ceramic capacitor 10 (see FIG. 1) described above. That is, the signal wiring 26 is surrounded by the insulating portion 27. Therefore, in the multilayer wiring board 20 with a built-in capacitor, as in the multilayer ceramic capacitor 10 shown in FIG. 1, when a high frequency signal in the capacitor section 22 passes through the signal wiring 26, noise and propagation delay are small, and dielectric loss is suppressed. can do.

  When the signal wiring 26 is surrounded by the insulating portion 27 and the insulating base (insulating layers 21a and 21b) is made of a glass ceramic sintered body having a low dielectric constant and a low dielectric loss tangent value, A configuration in which the capacitor portion 22 (dielectric layers 22A to 22D and electrode layers 22a to 22e) is penetrated as the wiring 26 can be employed. Therefore, the capacitor multilayer wiring board 10 does not require design restrictions such as the need to provide the signal wiring 26 while avoiding the capacitor portion 22. Therefore, the connection terminal portions 24 formed on the front and back surfaces of the capacitor built-in multilayer wiring board 20 can be efficiently connected using the wiring pattern. In particular, since a semiconductor element requiring a high-capacity bypass capacitor generally has a large number of terminal pads, a wiring pattern is efficiently used between the connection terminal portions 24 formed on the front and back surfaces of the multilayer wiring board 20 with a built-in capacitor. The effect of being able to connect is great.

  Furthermore, if a configuration in which the capacitor portion 22 (dielectric layers 22A to 22D and electrode layers 22a to 22e) is penetrated as the signal wiring 26 is adopted, an electronic device such as a semiconductor element mounted on the front and back surfaces of the capacitor built-in multilayer wiring board 20 is used. The wiring distance between the component and the capacitor unit 22 can be reduced. As a result, the inductance component of the wiring pattern including the signal wiring 26 is further reduced, and the reduction of the power supply voltage is suppressed, thereby enabling high-speed operation of electronic components such as semiconductor elements. Therefore, the capacitor built-in multilayer wiring board 20 can be suitably used as a capacitor built-in relay board that enables high-speed operation of electronic components such as semiconductor elements.

  The capacitor built-in multilayer wiring board 20 described above can be formed by a method similar to that of the multilayer capacitor 10 shown in FIG.

  That is, the multilayer wiring board 20 with a built-in capacitor forms a plurality of dielectric green sheets, prints a conductive paste to be the plurality of electrode layers 22a to 22e on the dielectric green sheets, and provides through holes to provide a signal. It can be formed by laminating and firing a plurality of dielectric green sheets after filling the through holes with conductive paste or insulating paste (glass ceramic paste) to be the wirings 25 and 26 or the insulating portion 27.

The insulating base (insulating layers 21a and 21b) in the multilayer wiring board 20 with a built-in capacitor is made of a sintered body of a glass component and ceramic powder. Examples of the glass component include SiO ₂ —B ₂ O ₃ system, SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ system, SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —MO system (where M is Ca, Sr, Mg, Ba or Zn), SiO ₂ —Al ₂ O ₃ —M ¹ O—M ² O system (provided that M ¹ and M ² are the same or different and Ca, Sr, Mg, Ba or Zn), SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —M ¹ O—M ² O system (where M ¹ and M ² are the same as above), SiO ₂ —B ₂ O ₃ — M ³ ₂ O system (where M ³ represents Li, Na or K), SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —M ³ ₂ O system (where M ³ is the same as above) , Pb glass, Bi glass and the like.

Examples of the ceramic powder include Al ₂ O ₃ , SiO ₂ , composite oxide of ZrO ₂ and alkaline earth metal oxide, composite oxide of TiO ₂ and alkaline earth metal oxide, Al ₂ O _3. And composite oxides containing at least one selected from SiO ₂ (for example, spinel, mullite, cordierite) and the like.

  The green sheet, which is a green sheet before firing of the insulating layers 21a and 21b, is made by adding and mixing glass powder and ceramic powder, an organic binder, an organic solvent, a plasticizer and the like into a slurry, and using the slurry, a doctor blade Molding is performed by adopting the method or calendar roll method. As the organic binder, those conventionally used for ceramic green sheets can be used. For example, acrylic (a homopolymer or copolymer of acrylic acid, methacrylic acid or esters thereof, specifically acrylic acid Ester copolymer, methacrylate ester copolymer, acrylic ester-methacrylic ester copolymer, etc.), polyvinyl butyral, polyvinyl alcohol, acrylic-styrene, polypropylene carbonate, cellulose, or other homopolymers or A copolymer is mentioned.

  As an organic solvent used in a slurry for forming a green sheet, the organic solvent, glass powder, ceramic powder, and an organic binder are kneaded to obtain a slurry having a viscosity suitable for green sheet forming, for example, carbonization. Examples thereof include hydrogen, ethers, esters, ketones, alcohols and the like.

  A through hole is formed in the green sheet produced as described above by mechanical processing such as die processing, laser processing, micro drilling, punching, or the like as necessary. This through hole is filled with a paste for penetrating conductor in which an appropriate organic binder and solvent are added and mixed with metal powder such as Ag, Cu, Ag-Pt, Ag-Pd and glass powder, and screened. A conductor 25 is formed.

  Next, glass powder is added to the perovskite compound filler powder mainly composed of barium titanate powder, and an organic binder, an organic solvent, a dispersant, a plasticizer, and the like are added and mixed to form a slurry. A dielectric green sheet to be the dielectric layer 21 is formed by employing a blade method or a calender roll method.

The perovskite compound filler powder and glass powder mainly composed of barium titanate are composed of 75 to 80% by volume of the perovskite compound filler powder mainly composed of barium titanate, and SiO ₂ —BaO—TiO ₂ —Al ₂ O ₃ . It is desirable to add 20 to 25% by volume of crystallized glass that contains and has a dielectric constant of 100 or more for depositing barium titanate.

  As the organic binder, those conventionally used for dielectric green sheets can be used. For example, acrylic (acrylic acid, methacrylic acid or ester homopolymer or copolymer thereof, specifically acrylic Acid ester copolymer, methacrylate ester copolymer, acrylic ester-methacrylic ester copolymer, etc.), polyvinyl butyral, polyvinyl alcohol, acrylic-styrene, polypropylene carbonate, cellulose and other homopolymers Or a copolymer is mentioned. As an organic solvent, for example, hydrocarbons, ethers, esters, ketones, alcohols, etc. so that a dielectric green sheet having an appropriate viscosity can be obtained by dispersing barium titanate powder, glass powder and resin binder. These organic solvents are mentioned. Further, a dispersant may be added in order to make the dispersion better.

  Next, a region for forming the insulating portion 27 is punched in the produced dielectric green sheet by processing such as die processing or punching, and a glass ceramic paste composed of a glass component and ceramic powder (ceramic filler) is punched in this region. Filled by screen printing or the like, the insulating part 27 formed of a glass ceramic sintered body having a dielectric constant of 10 or less is formed.

Examples of the glass component of the insulating portion 27 include a SiO ₂ —B ₂ O ₃ system, a SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ system, a SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —MO system ( However, M represents Ca, Sr, Ba or Zn), SiO ₂ —Al ₂ O ₃ —M ¹ O—M ² O system (where M ¹ and M ² are the same or different and Ca, Sr, Ba or Zn), SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —M ¹ O—M ² O system (where M ¹ and M ² are the same as above), SiO ₂ —B ₂ O ₃ — M ³ ₂ O system (where M ³ represents Li, Na or K), SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ —M ³ ₂ O system (where M ³ is the same as above) Bi-based glass and the like.

Moreover, as ceramic powder, for example, Al ₂ O ₃ , SiO ₂ , composite oxide of ZrO ₂ and alkaline earth metal oxide, composite oxide containing at least one selected from Al ₂ O ₃ and SiO ₂ ( For example, spinel, mullite, cordierite) and the like. Glass ceramic paste can be prepared by adding and mixing glass powder and ceramic powder with an organic binder, organic solvent, plasticizer and the like. Here, among them, it is preferable to select an amorphous glass having a softening temperature of 400 ° C. to 600 ° C. from the viewpoint of relaxing thermal stress with the sintered body of the dielectric green sheet. Since the amorphous glass having a low softening temperature can deform the glass component in a temperature region higher than the softening temperature, the thermal stress caused by the difference in the thermal expansion coefficient between the dielectric layer 11 and the insulating portion 13 is reduced. Can be relaxed. Examples of such glass components include SiO-BO-BaO-CaO-ZnO-based and BiO-SiO-BO-based.

  The electrode layer 23 formed between the insulating substrate (insulating layers 21a and 21b) and the dielectric layer 21 or between the dielectric layer 21 and the dielectric layer 21 is an organic binder or solvent suitable for metal powder and glass powder. It can be formed by applying the electrode paste to which is added and mixed by screen printing or the like.

  Here, the electrode layer 23 formed between the insulating base (insulating layers 21a and 21b) and the dielectric layer 21 is Ag, Au or Cu powder, which is a low melting point metal, and has an average particle size of 0.5 μm to 3 μm. It is preferable that the thickness is 10 μm to 15 μm. Since the electrode layer 23 is formed of a sintered body of Ag, Au powder or Cu powder having an average particle diameter of 0.5 μm to 3 μm, the electrode layer 23 is a dense sintered body in a temperature range of 700 ° C. to 900 ° C. can do. As a result, mutual diffusion of the glass between the insulating substrate (insulating layers 21a and 21b) and the dielectric layer can be prevented, and the reaction between the insulating substrate (insulating layers 21a and 21b) and the perovskite sintered body can be effectively suppressed. .

  Similarly, in the electrode layer 23 formed between the dielectric layer 21 and the dielectric layer 21, the metal material forming the electrode layer 23 is a sintered body of a low resistance material such as Ag, Cu, Au, or the like. Since it is possible to reduce the conduction resistance, it is preferable because the propagation delay and attenuation of the high frequency signal and the decrease in the power supply voltage of the capacitor can be further suppressed.

  Furthermore, the green sheet used as the insulating layer 26 and the dielectric green sheet are thermocompression bonded at a pressure of 3 to 20 MPa and a temperature of 50 to 80 ° C. to produce a laminate. After that, for example, when the sintered body of the metal powder forming the wiring layer 14 or the electrode layer 13 is Ag or Au, the metal powder forming the wiring layer 14 or the electrode layer 13 at a temperature of 800 to 1000 ° C. in the atmosphere. When the sintered body is Cu, the laminated body is fired at a temperature of 800 to 1000 ° C. in a nitrogen atmosphere to obtain the wiring board 10 with a built-in capacitor according to the present invention. Here, when firing in a nitrogen atmosphere, it is necessary to fire in an appropriate oxygen partial pressure region where the oxygen partial pressure in the nitrogen atmosphere during firing is not less than the reduction concentration of barium titanate and not more than the oxidation partial pressure of Cu. . As a result, oxygen can be prevented from escaping from the barium titanate crystal, and a capacitor layer having a high capacity and high reliability can be formed.

  In addition, when the laminate is fired, a constrained green sheet made of an inorganic component that does not substantially shrink and shrink at the temperature at which the green sheet sinters, such as alumina, is laminated on both sides of the laminate and fired. Since the shrinkage at the time of firing in the main surface direction of the multilayer body is restrained and suppressed by the sheet, warping and deformation of the capacitor built-in wiring board 10 can be more suitably suppressed.

  Furthermore, the connection terminal portion located on the surface of the multilayer wiring board 20 with a built-in capacitor is provided with nickel, copper, gold, and the like in order to improve solder wettability and prevent corrosion of the connection terminal portion when mounting electronic components on the surface. You may give plating layers, such as.

  Next, a stacked electronic device according to a third embodiment of the present invention will be described with reference to FIG.

  A stacked electronic device 30 shown in FIG. 3 includes semiconductor elements 31 and 32, semiconductor devices 33 and 34 on which the semiconductor elements are mounted, and a relay board 35 with a built-in capacitor.

  In this multilayer electronic device 30, semiconductor devices 33 and 34 in which semiconductor elements 31 and 32 are mounted in a semiconductor package are connected via a capacitor built-in relay substrate 35 using the multilayer ceramic capacitor of the present invention. It is formed as a module including 32. The capacitor built-in relay substrate 35 and the semiconductor devices 33 and 34 are electrically connected to each other at connection terminal portions 37A and 37B via solder bumps 36, respectively. The semiconductor device 34 has a structure having a cavity 34A, and the semiconductor element 32 is mounted in a state of being accommodated in the cavity 34A. As a result, the height of the stacked semiconductor device 30 is reduced.

  The semiconductor elements 31 and 32 are semiconductor elements having an arithmetic function such as ASIC and MPU, and semiconductor elements having a storage function such as a memory, and are mounted on semiconductor devices 33 and 34 each including a conventionally known multilayer wiring board. Is done. Here, in order to increase the transmission speed of the high-frequency signal input to and output from the semiconductor elements 31 and 32, the semiconductor devices 33 and 34 are manufactured by using a low-resistance conductor such as Ag or Cu as a conductor material and simultaneously firing them. It is desirable that the glass ceramic multilayer wiring board has a low dielectric loss in a high frequency band.

  The capacitor built-in relay substrate 35 functions as a bypass capacitor of the semiconductor element 31, and has the same configuration as the capacitor built-in multilayer wiring substrate 20 described above with reference to FIG. By using the capacitor built-in relay substrate 35 in the multilayer electronic device 30, it is not necessary to provide a space for mounting the chip capacitor in the semiconductor device 33, and the multilayer electronic device 30 can be reduced in size. Further, the wiring distance between the semiconductor element 31 and the bypass capacitor (capacitor built-in relay board 35) is up to the thickness of the semiconductor device 33 on which the semiconductor element 31 is mounted and the height of the solder bump 36, and the chip capacitor is mounted (mother). This can be shortened as compared with the case where the chip capacitor is mounted on the semiconductor device 33 or the like. As a result, a high-speed signal transmission delay associated with the wiring distance and a decrease in power supply voltage due to an inductance component of the wiring pattern can be suppressed, and the semiconductor element can be operated at high speed.

  Further, since the capacitor built-in relay board 35 is similar to the capacitor built-in multilayer wiring board 20 shown in FIG. 2, the multilayer electronic device 30 using the capacitor built-in relay board 35 has a high capacity and attenuates a high frequency signal. Therefore, it is possible not only to operate at high speed, but also to connect the terminals 37A formed on the front and back surfaces of the relay board 35 with built-in capacitor with a high degree of design freedom. Further, since the outermost layer of the built-in capacitor relay substrate 35 is made of a glass ceramic sintered body, the substrate strength of the built-in capacitor relay substrate 35 can be further increased, so that handling at the time of mounting is improved.

  As described above, the multilayer electronic device 30 includes the relay board 35 with a built-in capacitor having a bypass capacitor function that employs a structure that suppresses transmission delay and attenuation of high-frequency signals. Densification is possible.

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, in the stacked semiconductor device shown in FIG. 3, the relay board 35 with a built-in capacitor is placed between the semiconductor devices 33 and 34. However, the stacked electronic device according to the present invention has a semiconductor package and a semiconductor element 31 in the semiconductor device 33. The capacitor built-in relay board 35 may be placed between the two. The semiconductor devices 33 and 34 may be glass ceramic multilayer wiring boards or semiconductor devices made of an organic resin.

  Examples of the substrate with built-in capacitor according to the present invention will be described below.

In order to obtain a dielectric green sheet serving as a dielectric layer of a capacitor built-in relay substrate, SiO ₂ —BaO—TiO ₂ —Al ₂ O _{3 with} respect to 85 parts by mass of a perovskite compound filler mainly composed of a barium titanate filler. 15 parts by mass of a crystallized glass powder, 12 parts by mass of polyvinyl butyral resin as an organic binder, 6 parts by mass of a phthalic acid plasticizer and 30 parts by mass of toluene as a solvent are added to 100 parts by mass of this inorganic powder. The slurry was mixed by the method. Using this slurry, a dielectric green sheet having a thickness of 25 μm was formed by a doctor blade method. When this dielectric green sheet was fired at a firing temperature of 925 ° C., the dielectric constant of the dielectric sintered body was 1200.

In addition, in order to obtain a constrained green sheet that suppresses sintering shrinkage of the capacitor built-in substrate substantially in the planar direction, 100 parts by mass of Al ₂ O ₃ powder, 12 parts by mass of an acrylic resin as an organic binder, and 6 parts by mass of a phthalate plasticizer 30 parts by mass of toluene as a part and a solvent were added and mixed by a ball mill method to obtain a slurry. Using this slurry, a constrained green sheet having a thickness of 200 μm was formed by a doctor blade method.

  Next, the dielectric green sheet was punched by punching to form a through hole in a portion where an insulating portion is to be formed. The diameter of the through hole formed here corresponds to the size of the insulating portion, and in this embodiment, as shown in Tables 1 and 2, 0 mm (those for which through holes are to be formed), 0.15 mm, 0 The distance between adjacent through holes (distance between through conductors) was as shown in Table 1.

  Next, a glass ceramic paste was embedded in the through hole by a screen printing method to obtain a dielectric green sheet partially formed with a glass ceramic layer.

Here, the glass ceramic paste is 50 parts by mass of SiO ₂ —B ₂ O ₃ —BaO glass powder as glass and 50 parts by mass of Al ₂ O ₃ powder as ceramic filler. The organic binder used was 10 parts by mass of an acrylic resin, 6 parts by mass of a phthalic acid plasticizer, and the viscosity was adjusted by adding an appropriate amount of α-terpineol as a solvent.

A through-hole of 0.075 mm was formed in the dielectric green sheet at a predetermined position of the insulating portion using a CO ₂ laser device, and this through-hole was filled with a paste for a through conductor by a screen printing method. As a paste for penetrating conductor, 10 parts by mass of glass powder is added to 100 parts by mass of Ag powder (average particle size 3 μm), and a predetermined amount of acrylic resin and terpineol are added as an organic binder. Were mixed thoroughly.

  Next, an electrode layer paste to be an electrode layer was applied to the dielectric green sheet by a screen printing method and dried at 70 ° C. for 30 minutes to form an electrode layer. Here, the distance between the electrode layer and the through conductor was set to the distance shown in Table 2. The electrode layer paste was prepared by adding 12 parts by mass of an acrylic resin and 6 parts by mass of α-terpineol as an organic solvent to 100 parts by mass of Ag powder having an average particle size of 1.0 μm, and thoroughly mixing them with a stirring deaerator. Using.

  Next, the green sheet and the dielectric green sheet were subjected to vacuum thermocompression bonding at a pressure of 5 MPa and a temperature of 50 ° C. to produce a laminate. Furthermore, constrained green sheets were vacuum hot-pressed at a pressure of 5 MPa and a temperature of 50 ° C. above and below the laminate.

  Next, this laminate is fired in a firing process consisting of a binder combustion process at 500 ° C. for 3 hours and a termination process of 1 hour at a maximum temperature of 900 ° C., and is partially formed into a sintered body made of a dense perovskite compound. In particular, a capacitor built-in relay substrate in which an insulating portion made of a glass ceramic sintered body was formed was obtained.

Using the thus formed capacitor built-in relay substrate, first, the relationship between the size of the insulating portion and the size of the signal noise was evaluated. Table 1 shows the evaluation results when the conditions are the same except for the size of the insulating portion, and the distance between the through conductors is 0.3 mm. In Table 1, after measuring the stray capacitance using an impedance measuring instrument under the conditions of a measurement frequency of 1 GHz and a measurement temperature of 25 ° C., the influence of noise between through conductors, mutual capacitance between through conductors, C _m , and connection When the characteristic impedance of the device to be used is Z ₀ , the noise factor due to the stray capacitance is evaluated by simulation using the fact that it is proportional to C _m × Z ₀ . Here, the reference value is evaluated as a relative value when the interval between the through conductors is formed in the insulating portion is 1, and when the noise caused by the stray capacitance exceeds twice, x, Judged as.

  As can be seen from Table 1, when the insulating part is formed (Φ0.15, Φ0.2, Φ0.3), it is less susceptible to noise than when the insulating part is not formed (Φ0). When the diameter of the portion is 0.2 mm or more (Φ0.2), the influence of noise is remarkably reduced.

Next, to evaluate the relationship between the stray capacitance of the noise X ₂ and signals between the through conductor and electrode. Table 2 shows the evaluation results under the same conditions except that the distance between the through conductor and the electrode is 0.1 mm, 0.2 mm or 0.3 mm and the size of the insulating portion is 0 mm or 0.2 mm. Indicated. The stray capacitance was measured using an impedance measuring instrument under the conditions of a measurement frequency of 1 GHz and a measurement temperature of 25 ° C., as in the previous case. Here, the case where the stray capacitance exceeded 1 pF was judged as x, and the case where the stray capacitance did not exceed was judged as ○.

  As can be seen from Table 2, the stray capacitance is smaller when the 0.2 mm insulating portion is formed (Φ0.2) than when the insulating portion is not formed (Φ0). When the insulating portion is formed (Φ0.2), the size is hardly affected by the distance between the through conductor and the electrode.

It is sectional drawing which shows an example of the multilayer ceramic capacitor which concerns on this invention. It is sectional drawing which shows an example of the multilayer wiring board with a built-in capacitor concerning the present invention. It is sectional drawing which shows an example of the laminated electronic apparatus which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Multilayer ceramic capacitor 11b, 11c (Multilayer ceramic capacitor) Dielectric layer 12a, 12b, 12c (Multilayer ceramic capacitor) Electrode layer 14 (Multilayer ceramic capacitor) Signal wiring 17 (Multilayer ceramic capacitor) Insulation part 20 Built-in capacitor Multilayer wiring board 21a, 21b Insulation substrate 22 (of capacitor built-in multilayer wiring board) Capacitor portion 22a-22e (of capacitor multilayer wiring substrate) Electrode layer 22A-22D (of capacitor portion) Dielectric layer 26 (of capacitor portion) Signal wiring 27 (multi-layer wiring board with built-in capacitor) Insulation part 30 (multi-layer wiring board with built-in capacitor) 30 Multilayer electronic device 35 (for multilayer electronic device) Relay board with built-in capacitor (multilayer wiring board with built-in capacitor)

Claims (13)

A laminate in which a plurality of dielectric layers and a plurality of electrode layers are alternately laminated;
Signal wiring formed in the laminate;
An insulating portion formed to cover the signal wiring and having a dielectric constant smaller than the plurality of dielectric layers;
A multilayer ceramic capacitor comprising: The multilayer ceramic capacitor according to claim 1, wherein the insulating portion has a dielectric constant of 10 or less and a dielectric loss tangent of 5 × 10 ⁻³ or less.   The multilayer ceramic capacitor according to claim 2, wherein the insulating portion is formed as a glass ceramic sintered body. The signal wiring is formed as a through conductor extending in the thickness direction in the multilayer body,
The multilayer ceramic capacitor according to claim 1, wherein the insulating portion is formed in a cylindrical shape so as to surround the signal wiring. The electrode layer and the signal wiring are mainly composed of Ag, Cu or Au,
5. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer contains a perovskite compound having a dielectric constant of 1500 or more as a main component. The dielectric layer further includes SiO ₂ —BaO—TiO ₂ —Al ₂ O ₃ crystallized glass, and the ratio of the perovskite compound is 75 to 80% by volume, SiO ₂ —BaO—TiO ₂ —Al ₂ O. 6. The multilayer ceramic capacitor according to claim 5, wherein the proportion of the _three crystallized glass is 20 to 25% by volume. An insulating substrate;
A capacitor portion comprising a plurality of electrode layers and dielectric layers;
Signal wiring formed in the capacitor section;
An insulating part formed to cover the signal wiring and having a dielectric constant smaller than that of the dielectric layer;
A multilayer wiring board with a built-in capacitor, comprising: The multilayer wiring board with a built-in capacitor according to claim 7, wherein the insulating portion has a dielectric constant of 10 or less and a dielectric loss tangent of 5 × 10 ⁻³ or less.   The multilayer wiring board with a built-in capacitor according to claim 8, wherein the insulating part is formed as a glass ceramic sintered body. The signal wiring is formed as a through conductor that extends through the insulating base and the capacitor portion in the thickness direction,
The multilayer wiring board with a built-in capacitor according to claim 7, wherein the insulating portion is formed in a cylindrical shape so as to surround the signal wiring. The electrode layer and the signal wiring are mainly composed of Ag, Cu or Au,
The multilayer wiring board with a built-in capacitor according to claim 7, wherein the dielectric layer contains a perovskite compound having a dielectric constant of 1500 or more as a main component. The dielectric layer further includes SiO ₂ —BaO—TiO ₂ —Al ₂ O ₃ crystallized glass, and the ratio of the perovskite compound is 75 to 80% by volume, SiO ₂ —BaO—TiO ₂ —Al ₂ O. _The multilayer wiring board with a built-in capacitor according to claim 11, wherein the proportion of the _three crystallized glass is 20 to 25% by volume. A multilayer ceramic capacitor according to any one of claims 1 to 6, or a multilayer wiring board with a built-in capacitor according to any one of claims 7 to 12,
An electronic component laminated on the multilayer ceramic capacitor or the multilayer wiring board with a built-in capacitor;
A multilayer electronic device comprising:

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