JP2007135382A - Method for controlling charging of secondary battery - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for controlling charging of a secondary battery, by which the power consumption during standby is reduced to prevent an excessively large charging current from flowing at the beginning of charging. <P>SOLUTION: In the method for controlling charging of a secondary battery, an enable function is added to a charging circuit, to make the charging circuit operate instantaneously periodically so that when an inter-terminal output voltage during operation period is higher than a specified voltage, the operation is reset to reduce the standby power in the charging circuit; and conversely, when the inter-terminal output voltage is lower or a charging current is detected, the charging circuit is soft-started. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

Detailed Description of the Invention

  The present invention relates to a method for charging a rechargeable secondary battery, and more particularly, to a soft start for preventing an excessive charging current from flowing in the initial stage of charging and a method for reducing power consumption during standby.

  As seen in mobile phones, portable electronic devices using a rechargeable secondary battery represented by a lithium ion battery as a power source are increasing. An AC adapter or a solar battery charger is used to charge a secondary battery of such a portable electronic device.

  When an AC adapter or a solar battery charger (hereinafter simply referred to as a charger) is a constant voltage power source, an extremely large charging current flows at the beginning of charging when the secondary battery to be charged is nearly empty. In order to prevent this, the CC / CV method of charging at a constant current (CC) at the beginning of charging and charging at a constant voltage (CV: Constant Voltage) after charging proceeds is widely used for quick charging of secondary batteries. ing.

  FIG. 7 is a block diagram showing a general configuration of a conventional CC / CV charger. As shown in the figure, the conventional quick charger has a current control means for constant current charging and a voltage control means for constant voltage charging, while the secondary battery voltage is low at the beginning of charging. Constant current charging is performed, and when the voltage of the secondary battery reaches a specified voltage, switching to constant voltage charging is performed.

  A charger provided with a current control means and a voltage control means is extremely effective for rapid charging of a secondary battery, but has a complicated structure and a high cost.

  Another problem with chargers is standby power. The AC adapter is often placed in an AC outlet and, for convenience, does not have a power switch, so it always consumes power even if a portable electronic device to be charged is not connected. ing.

  The power generated by the solar panel is stored in the built-in secondary battery, and the solar battery charger that charges the secondary battery of the portable electronic device from the built-in secondary battery can be charged anytime by returning the connector. Always outputs voltage.

  In order to effectively use energy, it is desirable that the power consumption of the charger when the portable electronic device is not connected is as small as possible. As a method of reducing the standby power, a method of operating a charging circuit by detecting that a charging current has flowed (Patent Document 1) and a method of operating a charging circuit by detecting a voltage of a secondary battery as a load of a charger. A method (Patent Document 2) is proposed.

  JP-A-11-215728   JP 2002-315319 A

Detect charging current
This method is effective for reducing the standby power of the charging control circuit in the portable electronic device, but the charger must always output a voltage in order to pass the charging current. It does not lead to power reduction.

Detect the voltage of the secondary battery connected to the charger and activate the charger
This method is very obvious in principle and the circuit is simple. However, the portable electronic device has a built-in charge control circuit including at least a backflow prevention diode, and the secondary voltage in the portable electronic device does not appear at a terminal for charging the portable electronic device from the outside. For this reason, this method cannot be applied to a charger for charging an existing portable electronic device from the outside.

Problems to be solved by the invention

  The present invention has been made to solve the problems of the present portable electronic device charger described above, and an excessive charging current flows at the beginning of charging even when the secondary battery is nearly empty. It is an object of the present invention to provide a secondary battery charge control technology that can control the output voltage of the charger so that the standby power can be reduced.

Means to solve the problem

  FIG. 1 is a block diagram showing a charger configuration for explaining the invention according to claim 1 of the present application. In FIG. 1, 1 is a DC power source, 2 is a charging circuit, and 3 is a secondary battery to be charged. In the following drawings, the same reference numerals are used for easy understanding of correspondence.

In FIG. 1, resistors R _a , R _b , and R _c form a voltage dividing circuit, and a capacitor C _a is connected in parallel to the resistor R _a . The voltage control means 22 does not operate until the charging start means 21 is activated, and therefore the capacitor _Ca is in a discharged state. When the charging start unit 21 operates, the voltage control unit 22 controls the output voltage V _O so that the voltage dividing circuit output V _FB matches the voltage of the reference voltage source 24.

となる。ここで、Ｖ_ＲＥＦは基準電圧源２４の電圧である。式（１）から明らかなように、充電電圧Ｖ_Ｏは（１＋Ｒ_ｂ／Ｒ_ｃ）Ｖ_ＲＥＦから始まり、Ｃ_ａＲ_ａの時定数で徐々に高くなり、最終的に（１＋（Ｒ_ａ＋Ｒ_ｂ）／Ｒ_ｃ）Ｖ_ＲＥＦの電圧となる。Assuming that the charging start time is t = 0, the output voltage V _O after starting charging is

It becomes. Here, V _REF is the voltage of the reference voltage source 24. As apparent from the equation (1), the charging voltage V _O starts from (1 + R _b / R _c ) V _REF , gradually increases with the time constant of C _a R _a , and finally (1+ (R _a + R _b ) / R _c ) V _REF voltage.

Therefore, as an initial voltage V _O becomes voltage close to empty secondary battery, C _a if R _a constant 5 minutes to about 10 minutes can charge the soft start, the initial charging stage of the charging current Can be suppressed.

FIG. 2 shows a block configuration of a charger for explaining the invention according to claim 2 of the present application. The voltage control unit 22 has a current limiting function by the current limiting unit 25. At the beginning of charging or in a state where the voltage of the secondary battery 3 detected by the voltage detecting means 26 is equal to or lower than the threshold voltage, the current limiting means 25 is enabled and the voltage control means 22 is operated in the current limiting mode. After a certain time has elapsed from the start of charging, or when the voltage of the secondary battery 3 detected by the voltage detection means 26 becomes equal to or higher than the threshold voltage, the current limiting means 25 is invalidated, and the voltage control means 22 is independent of the output current. The output voltage V _O is controlled so that the output voltage V _FB of the voltage detection means 26 and the voltage of the reference voltage source 24 coincide.

FIG. 3 shows a block configuration of a charger for explaining the invention according to claim 3 of the present application. In this figure, the voltage control means 22 always stops operating. When the enable means 27 receives the trigger signal from the trigger means 28, the enable means 27 operates the voltage control means 22 instantaneously. During the instantaneous operation, the comparator 3 compares the output voltage V _FB of the voltage detection means 26 with the voltage V _REF of the reference voltage source 24. If V _FB <V _REF , the voltage control means is continuously operated to perform secondary operation. Charge the battery. On the contrary, if V _FB > V _REF , the comparator 23 stops the operation of the voltage control unit 22 and sets the voltage control unit 22 to the sleep mode again.

During charging, the voltage between the external charging terminals of the portable electronic device becomes a voltage V _B obtained by adding the voltage drop of the charging control circuit to the voltage of the built-in secondary battery. Therefore, if the voltage dividing ratio of the voltage detection means 26 and the voltage V _REF of the reference voltage source 24 are determined so that the output voltage V _O when the charger is unloaded in the configuration of FIG. 3 is V _O > V _B. The charging circuit can determine whether or not the charger is connected to the portable electronic device by detecting the output voltage when the voltage control means 22 is operated instantaneously.

  In the configuration of FIG. 3, the trigger means 28 and the enable means 27 for generating a trigger signal are operating during standby. Since these means can be easily configured with CMOS logic elements, the power consumption during standby can be extremely reduced.

  FIG. 4 shows a block configuration of a charger for explaining the invention according to claim 4 of the present application. The enable means 27 receives the trigger signal from the trigger means 28 and operates the instantaneous voltage control means 22. The resistor 4 is for current detection, and the comparator 23 continuously operates the voltage control means 22 to charge the secondary battery 3 if the voltage between the terminals of the resistor 4 is larger than the voltage of the reference voltage source 24. . When the secondary battery 3 is not connected, the voltage between the terminals of the resistor 4 is zero, and the output logic level of the comparator 23 is zero, and the operation of the voltage control means 22 is reset.

  Also in the configuration of FIG. 4, only the trigger means 28 and the enable means 27 are operating during standby, and if these means are constituted by CMOS logic elements, the power consumption during standby can be extremely reduced. it can.

FIG. 5 is a block diagram showing an embodiment of the invention according to claim 1 of the present application. The charging start means 21 uses a transistor 211 as a series switch, and turns on the switch 221 in accordance with a charge command. The voltage of the DC power source 1 is input to. The voltage control means 22 is a step-up DC-DC converter including an inductor 224, a transistor 223, a diode 225, and a capacitor 226. 211 is a pulse generator for turning on / off the transistor 223, and the gate 222 is a transistor that opens the gate when the output voltage V _FB of the voltage detection means is lower than the voltage V _REF of the reference voltage source 24. 223 is driven to operate the step-up DC-DC converter. Conversely, when V _FB > V _REF , the gate 222 is closed and the operation of the step-up DC-DC converter is stopped. By this intermittent control, the voltage control means 22 sets V _FB = V _REF .

As shown in equation (1), V _O is _a time constant C _a R _a from the voltage (1 + R _b / R _c ) V _REF immediately after the start of charging to the final voltage (1+ (R _a + R _b ) / R _c ) V _REF. Therefore, the charging circuit 2 is soft-started by this configuration.

FIG. 6 is a block diagram showing an embodiment of the invention described in claim 2 of the present application. As in the first embodiment, the charging start means 21 uses the transistor 211 as a series switch, and turns on the switch according to a charge command to input the voltage of the DC power source 1 to the voltage control means 22. Similarly to the first embodiment, the voltage control means 22 is a step-up DC-DC converter. However, in the first embodiment of FIG. 5, the output voltage is controlled by the intermittent operation of the switch 221, whereas in this embodiment the output voltage is controlled by pulse width modulation (PWM) by the triangular wave generator 221 and the comparator 227. Is controlling.

Resistors 251 and 252 are voltage dividing circuits. The transistor 253 functions as a switch. When the capacitance of the capacitor 254 is C _t and the value of the resistor 255 is R _t , T = C _t R _t ln (V _DD / V _TH )... From the moment when the charge command is input. (2)
Until this time, the switch 253 is turned on, and the voltage division by the resistors 251 and 252 is made effective. Here, in Expression (2), V _DD is the power supply voltage of the inverter 256, and V _TH is the threshold voltage of the transistor 253.

となる。ここで、Ｖ_ＤＤは差動増幅器２３の電源電圧である。これによってトランジスタ２２３を駆動するパルス幅が制限されるので、電圧制御手段２２の昇圧型ＤＣ−ＤＣコンバータの動作電流が制限されることになる。充電開始からＴ秒経過後はトランジスタ２５３はオフとなるので抵抗２５１と２５２による分圧は無効となり、電流制限は解除される。Therefore, in the period T, the upper limit V _max of the input voltage to the non-inverting input terminal of the comparator 227 is

It becomes. Here, V _DD is a power supply voltage of the differential amplifier 23. As a result, the pulse width for driving the transistor 223 is limited, so that the operating current of the step-up DC-DC converter of the voltage control means 22 is limited. Since the transistor 253 is turned off after the elapse of T seconds from the start of charging, the voltage division by the resistors 251 and 252 becomes invalid and the current limit is released.

  In the second embodiment of FIG. 6, the time for setting the current limiting mode is determined by a time constant given by the product of the capacitance of the capacitor 254 and the resistance value of the resistor 255. This time is a timer circuit using a counter. It can also be determined by

FIG. 7 is a block diagram showing an embodiment according to claim 3 of the present application. The voltage control means 22 is a step-up DC-DC converter as in the first and second embodiments. The voltage control means 22 basically drives the transistor 221 with the pulse from the pulse generator 29 when the voltage V _FB from the voltage detection means 26 is lower than the voltage V _REF of the reference voltage source 24, and conversely When V _FB > V _REF, the output voltage V _O is controlled by an intermittent operation in which the transistor 221 is turned off to stop the operation.

The set / reset flip-flop (SR-FF) 274 of the enable means 27 receives the trigger signal from the trigger means 28 and sets its output Q to the logic level “1”. This opens the gate 275 and activates the voltage control means 22. The comparator 271 compares the voltage V _FB detected by the voltage detection means 26 with the voltage V _SET of the voltage source 272, and closes the gate 273 when V _FB <V _SET . As a result, the SR-FF 274 continues to be set, so that the voltage control means 22 continues to operate. On the other hand, when V _FB > V _SET , the SR-FF 274 is reset at the moment when the trigger signal becomes the logic level “0”. As a result, the voltage control means 22 stops operating.

  In the embodiment of FIG. 7, the period of the trigger signal is 2 seconds and the duty ratio is 10%. Therefore, by providing the enable means 27, the power consumption during standby is about one-tenth that when the enable means 27 is not provided.

FIG. 8 is a block diagram showing an embodiment of the invention described in claim 4 of the present application. The basic operation is the same as that of the embodiment shown in FIG. In FIG. 7, whether or not the secondary battery 3 is connected to the charging circuit 2 is detected based on the output voltage of the voltage control means 22 when activated by the trigger signal. In this embodiment, whether or not the output current flows is detected. It is detected whether or not the secondary battery 3 is connected. The resistor 4 is for detecting the current. If a current flows during startup, the gate 273 is closed and the set state of the SR-FF 274 is continued, and if no current flows, the SR-FF 273 is reset to control the voltage. The operation of the means 22 is stopped. The same can be said for the power consumption during standby as in the third embodiment of FIG.

  In the third embodiment shown in FIG. 7 and the fourth embodiment shown in FIG. 8, the trigger means 28 is a relaxation oscillator composed of a CMOS logic gate.

  Further, it is obvious that the charging start means 21 is replaced with the enable means 22.

The invention's effect

  As described above, according to the present invention, a secondary battery charger having a soft start function for preventing an excessive charging current from flowing at the beginning of charging and having low power consumption during standby can be realized. . Therefore, the present invention is extremely effective for a charger for a portable electronic device using a secondary battery as a power source.

Block diagram of charging circuit with soft start function Block diagram of a charging circuit that is soft-started by current limiting means Block diagram of a charging circuit for starting charging by enabling means and load voltage detection Block diagram of a charging circuit that starts charging by detecting the enable means and the output current Example of a charging circuit that soft-starts in response to a charging command Example of charging circuit operating in current limiting mode at the beginning of charging Example of a charging circuit that operates by detecting a load voltage at the time of instantaneous startup Example of a charging circuit that operates by detecting a load current at the time of instantaneous startup Configuration of conventional secondary battery charging circuit

Explanation of symbols

1 DC power supply 2 Charging circuit 3 Secondary battery 4 Current detection resistor

Claims (4)

  A voltage dividing circuit using a resistor between the output voltage terminals, a voltage control means for controlling the output voltage so that the output voltage divided by the voltage dividing circuit matches a separately provided reference voltage, and a charging start means; A capacitor connected in parallel to a resistor connected to the positive side of the voltage dividing circuit, and charging the capacitor gradually when charging starts, so that the charging voltage is gradually increased. The secondary battery charge control method.   The charging circuit of the secondary battery has a current limiting mode and its release function, the charging circuit is operated in the current limiting mode at the beginning of charging of the secondary battery, and the voltage of the charged secondary battery is changed after a certain period of time or A method of charging a secondary battery, wherein the current limiting mode is canceled after reaching a certain voltage.   The charging circuit of the secondary battery has an enabling function and an output voltage detection function, and the charging circuit is periodically activated instantaneously by the enabling function, and when the output voltage of the charging circuit at that time is lower than a specified voltage, the charging circuit The secondary battery charging control method is characterized in that the operation of the charging circuit is reset when the voltage is higher than the specified voltage.   The charging circuit of the secondary battery is provided with an enabling function and a current detection function, and the charging circuit is operated instantaneously and instantaneously by the enabling function, and when the output current of the charging circuit at that time is larger than the specified current, the charging circuit is A secondary battery charge control method characterized by continuously operating, and conversely resetting the operation of the charging circuit when the current is below a specified current.

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