JP2007246289A - Method for manufacturing gallium nitride semiconductor substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method capable of manufacturing a high-quality gallium nitride semiconductor substrate while suppressing crystal degradation caused by the reaction of Ga and Si and suppressing occurrence of cracking caused by the difference in thermal expansion coefficients of GaN and Si in the process of forming a thick film gallium nitride semiconductor layer on a Si(111) face by using a vapor phase growth method. <P>SOLUTION: The gallium nitride semiconductor substrate is manufactured by preparing a substrate having a thin layer Si(111) formed via an oxide film on an upper face of a bulk substrate, partially removing the thin layer Si(111), and then forming a thick film gallium nitride semiconductor layer, for example, a thick film AlGaN layer on the substrate surface where the thin layer Si(111) is formed. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a gallium nitride based semiconductor substrate. In particular, the present invention relates to a method for manufacturing a gallium nitride based semiconductor substrate by forming a thick gallium nitride based semiconductor layer on a Si (111) surface by vapor phase growth.

  Group III nitride semiconductors typified by gallium nitride are capable of high-efficiency blue-violet light emission, and as materials for light-emitting diodes (LEDs) and laser diodes (laser diodes, LDs) in the blue-violet region, Has attracted attention. Among these, LDs in the blue-violet region are expected as light sources for large-capacity optical disk devices, and in recent years, development of high-power gallium nitride semiconductor LDs for writing light sources has been actively promoted. In addition, the development of a high-frequency transistor using a gallium nitride-based semiconductor as an operating layer is being promoted at the same time, taking advantage of the excellent electron conduction characteristics exhibited by a gallium nitride-based semiconductor.

  Conventionally, these gallium nitride based semiconductor devices are mainly manufactured by using a group III nitride semiconductor layer hetero-growth on sapphire or SiC as a base substrate. The reason is that it was difficult to obtain a good quality GaN single crystal substrate. Accordingly, a wurtzite GaN (0001) layer is grown on a sapphire substrate or SiC substrate using a two-step growth method, and the resulting GaN (0001) layer is used as a substrate to epitaxially grow a group III nitride semiconductor layer, thereby producing a device. A structure has been created. When these sapphire substrates and SiC substrates are used as the base substrate, the lattice constant of GaN is greatly different from that of the base substrate. Therefore, high-density dislocations are introduced into the hetero-grown GaN layer, which is an obstacle to obtaining good quality crystals. It was. In addition, since the thermal conductivity of the sapphire substrate is low, the heat dissipation characteristics of the device fabricated thereon are poor, and the orientation of the cleavage plane is different between the GaN layer and the sapphire substrate. It is essential to use a sapphire substrate because it is difficult to form a mirror end face using (hekikai), and furthermore, since sapphire itself is an insulator, it is impossible to fabricate a back electrode type element. It was a problem.

  On the other hand, in recent years, it has also been reported that a high-quality low-dislocation GaN substrate can be produced by a GaN thick film growth technique using HVPE (hydride vapor phase epitaxy) (see, for example, Patent Document 1). By using a GaN substrate having good heat conduction characteristics and electric conduction characteristics in place of the sapphire substrate, improvement of heat dissipation characteristics, realization of a back electrode type LD, and the like are expected. Therefore, in the future, it is considered that group III nitride semiconductor devices using GaN substrates produced by thick film growth technology will become mainstream.

  Currently, the mainstream GaN substrate fabrication technology is self-supporting by depositing a thick GaN layer of 300 μm or more on a single crystal substrate such as sapphire or GaAs as a base substrate by HVPE method and then removing the base substrate. A GaN substrate is obtained. In GaN substrate fabrication by HVPE, how to solve the two problems of (1) separation of single crystal substrate and thick GaN layer and (2) thermal and chemical stability of single crystal substrate during HVPE growth. Doing is the key. The sapphire substrate and the SiC substrate that are generally used as a base substrate for GaN growth are chemically stable and hard, so that the base substrate is formed from a GaN / sapphire or GaN / SiC structure by chemical etching or polishing. There was a problem that peeling of the substrate could not be easily achieved. In the case of a sapphire substrate, a peeling method using a laser has also been proposed, but it has been difficult to peel off a large area without cracking the thick GaN layer. In addition, when GaAs is used as a base substrate, peeling from the thick GaN layer can be easily performed. However, at the growth temperature (˜1000 ° C.) of GaN by a typical HVPE method, thermal decomposition of GaAs occurs, so it is necessary to protect the back surface and side end surfaces other than the growth surface. Further, since the GaAs material itself contains highly toxic As as a main component, it is not necessarily a preferable base substrate in terms of environmental resistance.

An example of using Si (111) as a base substrate for heterogrowth of a gallium nitride based semiconductor layer in an element manufacturing process has also been proposed (see Patent Document 2 and Patent Document 3). In that case, it is also exemplified that it is useful to use an AlN buffer layer as a means of overcoming the problem of crystal growth caused by the difference in lattice constant between the Si base substrate and GaN (see Patent Document 3). In addition, the Si substrate is thermally stable at the GaN growth temperature, and further, the acquisition cost is low, the toxicity of the material itself is low, and a large diameter wafer with good crystallinity is available. Has advantages. In addition, since Si can be easily selectively removed by polishing or chemical etching, it is promising as a base substrate material for producing a self-standing GaN substrate.
JP-A-10-287497 JP-A-8-56015 Japanese Patent Laid-Open No. 11-40850

  When a gallium nitride based semiconductor is grown, when Si is used as a substrate, crystal degradation due to a reaction due to Ga and Si and cracking due to a difference in thermal expansion coefficient between GaN and Si become problems. As a technique for solving these problems, a method of carbonizing the surface of the Si substrate and providing a buffer layer having a SiC composition for the purpose of suppressing the reaction caused by Ga and Si (JP-A-8-56015), cracking occurs. In order to avoid this, a method using an AlGaInN superlattice as a buffer layer (Japanese Patent Laid-Open No. 11-40850) has been proposed. However, both of these techniques have been proposed as techniques that can be effectively applied when the film thickness of the gallium nitride based semiconductor layer grown on the Si substrate is as thin as several μm. On the other hand, when a thick gallium nitride based semiconductor layer having a film thickness exceeding several hundred μm is deposited on a Si substrate, the following problems arise. For example, when the buffer layer having the SiC composition is formed, pinholes are likely to be generated in the buffer layer due to surface defects or foreign matters attached to the surface. When direct contact between Ga and the Si substrate surface occurs through the pinhole in the buffer layer, the reaction between Ga and Si occurs, but the film thickness of the gallium nitride based semiconductor layer to be grown is about several μm. In the case of a thin film, the reaction region that progresses during the growth is local in the vicinity of the pinhole and does not spread over the entire surface of the substrate. On the other hand, when depositing a thick GaN film, the surrounding substrate Si and the deposited GaN layer are further melted back by the Ga / Si melt generated by a local reaction in the vicinity of the pinhole. The expansion of the process proceeds at an accelerated rate. For this reason, the Ga / Si reaction accompanying the meltback affects the entire surface of the substrate, resulting in a larger problem as the film thickness to be grown increases. Since it is difficult to completely suppress pinhole generation in the buffer layer due to surface defects or foreign matter adhering to the surface, if pinhole generation occurs, The means for suppressing the expansion is an effective solution to the problem of crystal degradation.

  The present invention solves the above-described problems. The object of the present invention is to use a Si substrate as a base substrate and form a thick gallium nitride based semiconductor layer by vapor deposition on a Si (111) surface. An object of the present invention is to provide a method capable of effectively avoiding the expansion of the above-mentioned crystal deterioration and making it possible to produce a gallium nitride based semiconductor substrate exhibiting good crystallinity.

When forming a thick gallium nitride based semiconductor layer by vapor phase growth on the Si (111) surface, the present inventor replaced SiO ₂ on the carrier substrate instead of the conventionally used Si (111) bulk substrate. A dielectric layer such as a film and an SOI (silicon on insulator) substrate in which a Si (111) layer is laminated on the dielectric layer are used, and a buffer layer is provided on the surface of the Si (111) layer. The inventors have found that the formation of a thick gallium nitride based semiconductor layer can effectively avoid the expansion of crystal degradation caused by the Ga / Si meltback reaction and the generation of surface defects on the pits. The present invention has been completed based on this finding.

That is, the method for producing a gallium nitride based semiconductor substrate according to the first aspect of the present invention includes:
A method of manufacturing a gallium nitride based semiconductor substrate,
Using a substrate in which a first dielectric layer and a Si (111) layer are laminated on the first dielectric layer on a carrier substrate,
Depositing a buffer layer on the Si (111) layer on the substrate surface;
And after depositing the buffer layer, depositing a thick gallium nitride based semiconductor layer,
A method of manufacturing a gallium nitride based semiconductor substrate, comprising manufacturing a gallium nitride based semiconductor substrate using the thick gallium nitride based semiconductor layer.

In addition, a method for producing a gallium nitride based semiconductor substrate according to the second aspect of the present invention includes:
A method of manufacturing a gallium nitride based semiconductor substrate,
Using a substrate in which a first dielectric layer and a Si (111) layer are laminated on the first dielectric layer on a carrier substrate,
Depositing a buffer layer on the Si (111) layer on the substrate surface;
After depositing the buffer layer, forming a second dielectric layer partially covering the surface of the buffer layer;
Depositing a thick gallium nitride based semiconductor layer after partial coating with the second dielectric layer,
A method of manufacturing a gallium nitride based semiconductor substrate, comprising manufacturing a gallium nitride based semiconductor substrate using the thick gallium nitride based semiconductor layer.

Furthermore, the method for producing a gallium nitride based semiconductor substrate according to the third aspect of the present invention includes:
A method of manufacturing a gallium nitride based semiconductor substrate,
Using a substrate in which a first dielectric layer and a Si (111) layer are laminated on the first dielectric layer on a carrier substrate,
Depositing a buffer layer on the Si (111) layer on the substrate surface;
After the buffer layer is deposited, the stacked structure of the Si (111) layer and the buffer layer on the first dielectric layer is partially left, and in other regions, the Si (111) layer and the buffer layer are Removing the laminated structure and exposing the surface of the first dielectric layer;
And at least a step of depositing a thick gallium nitride based semiconductor layer after partial removal of the stacked structure of the Si (111) layer and the buffer layer,
A method of manufacturing a gallium nitride based semiconductor substrate, comprising manufacturing a gallium nitride based semiconductor substrate using the thick gallium nitride based semiconductor layer.

In the method for manufacturing a gallium nitride based semiconductor substrate of the present invention having the above three types,
The thickness of the Si (111) layer is preferably selected within a range of 1 μm or less. The buffer layer is preferably a gallium nitride based semiconductor layer containing at least Al. On the other hand, the dielectric material of the first dielectric layer is preferably selected from the group of dielectric materials represented by SiO _x N _y . Similarly, the dielectric material of the second dielectric layer is preferably selected from the group of dielectric materials represented by SiO _x N _y .

In the method for manufacturing a gallium nitride based semiconductor substrate of the present invention,
As the carrier substrate, a substrate having in-plane anisotropy having a thermal expansion coefficient different from that of the Si (111) substrate can be used. For example, a Si (100) substrate can be used as the carrier substrate.

  According to the present invention, it is possible to easily remove from a gallium nitride based semiconductor layer by polishing or chemical etching, and use a Si substrate that is available at low cost as a base substrate, and vapor phase growth on the Si (111) surface. Thus, when forming a thick gallium nitride based semiconductor layer, it is possible to suppress the influence of crystal deterioration caused by the reaction due to Ga and Si within a local range. As a result, by using the method for manufacturing a gallium nitride based semiconductor substrate according to the present invention, an inexpensive, large-area Si substrate is used as a base substrate, for example, a high-quality GaN free-standing substrate is simple and high in productivity. Can be produced.

  A method for manufacturing a gallium nitride based semiconductor substrate according to the present invention will be described in detail below.

The first feature of the manufacturing method according to the present invention is that, when a thick gallium nitride based semiconductor layer is formed on the Si (111) surface by vapor phase growth, it replaces the conventionally used Si (111) bulk substrate. An SOI substrate in which a first dielectric layer such as a SiO ₂ film and a thin Si (111) layer are laminated on the first dielectric layer is used on the carrier substrate. Further, a buffer layer is formed on the surface of the thin Si (111) layer, and then a thick gallium nitride based semiconductor layer is formed by vapor phase growth.

  In the case where a Si bulk substrate is used instead of the SOI substrate, Si is continuously supplied from the substrate side when a Ga / Si meltback reaction occurs through pinholes existing in the buffer layer. For this reason, the Ga / Si meltback reaction is accelerated.

On the other hand, in the SOI substrate, by providing a first dielectric layer such as a SiO ₂ film between the thin Si (111) layer and the lower carrier substrate, physical separation between the two is achieved, The amount of Si involved in the Ga / Si meltback reaction is limited. Therefore, when a thick gallium nitride based semiconductor layer is formed by vapor phase growth, the SOI substrate is also heated to its growth temperature. Even in this heated state, the first dielectric layer is It must function as a physical separation layer that prevents mass transfer between the two. Therefore, the film thickness of the first dielectric layer is such that, for example, when an Si (111) bulk substrate or Si (100) bulk substrate is used as the carrier substrate, an upper Si (111) layer is formed from the Si substrate. A film thickness range sufficient to prevent the supply of Si to the substrate is selected.

In addition, since the thin Si (111) layer is laminated on the carrier substrate via the first dielectric layer, the thin dielectric layer adheres to Si (111) as the first dielectric layer. It is preferable to use a dielectric material represented by SiO _x N _y , which is rich in SiO ₂ and the like. At that time, even if the thickness of the first dielectric layer is at least about 100 nm, the desired function as a physical separation layer is sufficiently exhibited.

  In addition, in the present invention, the thickness of the Si (111) layer itself, which is laminated on the first dielectric layer, is also reduced, thereby reducing the Si content involved in the Ga / Si meltback reaction. The total amount is limited. Therefore, it is desirable to select the film thickness of the thin Si (111) layer itself within a range of 1 μm or less, preferably within a range of 0.2 μm or less. When the film thickness of the Si (111) layer is reduced to 0.2 μm or less, for example, in the process of growing a thick film GaN of 300 μm or more, even if a pinhole exists in the buffer layer, It has been clarified by the inventor's examination that the amount of Si supplied from the Si (111) layer to the GaN layer is small and does not often cause a Ga / Si meltback reaction. As the film thickness of the Si (111) layer increases, the amount of Si supplied from the Si (111) layer to the GaN layer through this pinhole increases, and the effect of suppressing the Ga / Si meltback reaction gradually decreases. To do. At that time, if the thickness of the Si (111) layer is in the range of 1 μm or less, it has a significant suppression effect as compared with the case of using the Si (111) bulk substrate. On the other hand, when using an SOI substrate, it has been found that a thin Si (111) layer having a thickness of 0.1 μm is sufficient in order to function as a base substrate.

The manufacturing method of the SOI substrate itself is not particularly limited as long as a structure in which a thin Si (111) layer is laminated on the carrier substrate via the first dielectric layer is achieved. For example, after a Si (111) bulk substrate is bonded to a carrier substrate via a first dielectric layer by a bonding method, the upper Si (111) bulk substrate is polished to obtain a desired Si (111) ) Surface and at least a film thickness of 1 μm or less can be used. Alternatively, when a Si (111) bulk substrate is selected as the carrier substrate, oxygen ions are deeply implanted from the surface of the Si (111) bulk substrate, and then annealed to form SiO under the substrate surface. _{A structure in which a two-} layer region is formed and a thin Si (111) layer is left on the outermost surface can also be used.

  In particular, when using a technique in which a Si (111) bulk substrate is bonded to the carrier substrate via a first dielectric layer by a bonding method, various carrier substrates are used as long as the bonding can be performed. Is possible. For example, a Si (100) bulk substrate is used as a carrier substrate, and a Si (111) bulk substrate is bonded and bonded via a first dielectric layer, and then polished onto the Si (100) bulk substrate by polishing. It is also possible to use an SOI substrate having a structure in which a thin Si (111) layer is laminated via a dielectric layer. As described above, in the present invention, various substrates can be used as the carrier substrate used in manufacturing the SOI substrate, but the substrate is inexpensive, suitable for bonding and having a large area. However, it is desirable to use a Si bulk substrate that is easily available for the carrier substrate.

  Next, a buffer layer is formed using the thin Si (111) layer as a base substrate. This buffer layer introduces defects such as stress-fitting dislocations due to stress strain at the interface caused by the difference in lattice constant between the gallium nitride semiconductor grown on the buffer layer and Si (111) of the underlying substrate. Has a function to avoid. Therefore, a III-nitride semiconductor having a high lattice constant matching with the target gallium nitride semiconductor and having a higher shear stress than the target gallium nitride semiconductor is selected for the buffer layer. Further, the group III nitride semiconductor itself used as the buffer layer is melt-backed at the interface with Si (111) of the base substrate under the heating condition during the process of depositing the thick gallium nitride semiconductor layer. It must also be difficult to cause a reaction. Specifically, among Group III (Group 13) metals, Al and In have melting points significantly higher than Ga, and are less likely to cause a meltback reaction when in contact with Si at high temperatures. Therefore, among group III nitride semiconductors, the content ratio of Al and In is high, the content ratio of Ga is low, and the lattice constant thereof is in a range in which the lattice constant of the target gallium nitride semiconductor is high. It is preferable to select.

As the group III nitride semiconductor for the buffer layer satisfying the above requirements, AlN, Al _x Ga _y In _1-xy N mixed crystal partially containing Ga or In, instead of Al constituting this AlN, or A superlattice can be mentioned. At that time, the content ratios y and 1- _xy of Ga and In in the Al _x Ga _y In _1-xy N mixed crystal used as the buffer layer are set as the strain stress due to the lattice constant difference between Si and GaN. The range is selected so that the relaxation effect is not inferior to that of AlN. Alternatively, in the Al _x Ga _y In _{1 -xy} N superlattice, the average lattice constant is expressed by the lattice constant indicated by the Al _x Ga _y In _{1 -xy} N mixed crystal having a composition that can be suitably used as the buffer layer. Select to the same extent. In addition, the Ga content ratio y is set so that the Ga / Si meltback reaction does not proceed remarkably at the interface due to Ga contained in the Al _x Ga _y In _1-xy N mixed crystal in contact with the Si (111) layer. select.

  Furthermore, the buffer layer itself has a film thickness in the range of 0.02 μm to 2 μm, for example, about 0.2 μm, in order to exhibit the function of relieving stress strain at the interface caused by the difference in lattice constant. It is desirable to select a thin thickness. Since the buffer layer itself has a role of separating the gallium nitride semiconductor grown on the buffer layer and Si (111) of the base substrate, it is not desirable to select an excessively thin film thickness. It is preferable to select 0.02 μm or more.

  In the first embodiment of the present invention, a buffer layer is formed on a Si (111) layer using a substrate in which a thin Si (111) layer is laminated on a carrier substrate via a first dielectric layer. Thus, a step of depositing a thick gallium nitride based semiconductor layer is selected. Since the buffer layer is thin, the buffer layer may contain fine pinholes due to external factors such as deposits on the surface of the Si (111) layer. At that time, even when a Ga / Si meltback reaction occurs locally through a pinhole in the buffer layer during the deposition of the thick gallium nitride semiconductor layer, a thin Si (111) layer is adopted. By doing this, the effect of restricting the supply amount of Si and suppressing the reaction from accelerating can be obtained.

In the second embodiment of the present invention, when the thick gallium nitride based semiconductor layer is deposited on the thin Si (111) layer via the buffer layer, the surface of the buffer layer is partially covered. The dielectric layer is formed. In this case, the growth of the gallium nitride based semiconductor layer starts from the surface of the buffer layer not covered with the second dielectric layer, and is the same surface as the group III nitride semiconductor such as AlN used for the buffer layer. The crystal growth proceeds in the orientation. Therefore, as the second dielectric layer, a dielectric material that does not cause formation of a growth nucleus of a gallium nitride semiconductor on the surface thereof is used. In addition, the second dielectric layer is stable under HVPE growth conditions, exhibits a function of covering the surface of the buffer layer, and includes a first group III nitride semiconductor film used for the buffer layer and It is also necessary that no chemical reaction occurs between the two. As the dielectric material for the second dielectric layer satisfying these three requirements, for example, SiO ₂ , SiN _x , aluminum oxide (Al ₂ O ₃ ), SiO _x N _y , or those are used. The laminated film combined can be illustrated. In particular, it is preferable to use a dielectric material represented by SiO _x N _y including SiO ₂ for the second dielectric layer.

  In the growth of a thick gallium nitride-based semiconductor layer, deposition does not occur on the covering region by the second dielectric layer in the initial stage of growth, but crystal growth proceeds from the surface of the uncovered buffer layer, Thereafter, lateral growth occurs. By utilizing this lateral growth, the growth film thickness is increased, and the upper surface of the covering region by the second dielectric layer is also buried, and eventually the growth of the gallium nitride based semiconductor layer proceeds over the entire substrate surface. (For example, C. Sasaoka et al., Journal of Crystal Growth, 189/190, 1998, pages 61-66). As a result, a thick gallium nitride semiconductor layer having a flat surface over the entire substrate is obtained when a thick film having a certain thickness or more is grown.

  In order to effectively fill the upper surface of the covering region with the second dielectric layer using lateral growth, an opening provided in the second dielectric layer covering the buffer layer is formed on a dense surface. It is necessary to provide with density. That is, in the initial stage of growth, the group III element material and the nitrogen material that pour onto the surface of the second dielectric layer diffuse the surface of the second dielectric layer and grow the gallium nitride semiconductor on the buffer layer surface of the opening. Need to reach the face. Although it depends on the growth temperature, the average distance between the openings on the second dielectric layer surface is the same or higher than the average distance that allows surface diffusion of the group III element source and the nitrogen source. A short selection is preferred. In addition, it is more desirable that the openings provided in the second dielectric layer are regularly arranged over the entire substrate surface. At least in each partial region of the substrate surface, the apertures are dense so that the area ratio (average aperture ratio) of the apertures / (openings and covering regions) averaged within each small region is constant. It is necessary to provide with a high surface density. For example, it is possible to use a technique in which stripe-shaped second dielectric layers are arranged at a constant pitch across an opening having a desired width by pattern etching. At this time, the pitch interval is selected within a range of 10 μm or less, and the width of the stripe-shaped second dielectric layer is such that the area ratio (average opening ratio) of opening / (opening and covering region) is 1 / It is desirable to select so that it is in the range of 10 or more and 4/10 or less. In addition, since lateral growth in the gallium nitride based semiconductor exhibits crystal orientation anisotropy, when the growth plane orientation of the gallium nitride based semiconductor layer is (0001), the stripe direction (longitudinal direction) of the striped opening Direction) is preferably selected in the <11-20> or <1-100> axial direction.

  In addition, when the above lateral growth mechanism is used, the thickness of the second dielectric layer is relatively increased with respect to the width of the stripe-shaped opening, and the depth / width ratio of the groove structure is 1 Exceeding this makes lateral growth starting from a gallium nitride-based semiconductor grown facet-like from the buffer layer surface in the stripe-shaped opening becomes difficult in some cases. Accordingly, the ratio of the thickness of the second dielectric layer to the width of the stripe-shaped opening (depth / width ratio of the groove structure) is 1/1 or less, preferably in the range of 0.2 / 10 to 2/10. It is desirable to choose.

  In the second embodiment of the present invention, the surface of the buffer layer that is in direct contact with the gallium nitride based semiconductor layer that is grown thick is only the portion exposed to the opening. Therefore, when a fine pinhole or the like is included in the buffer layer, a Ga / Si meltback reaction occurs locally through the pinhole in the buffer layer while the thick gallium nitride semiconductor layer is deposited. Is limited to the surface of the opening. Therefore, the effect of reducing the total number of locations where the Ga / Si meltback reaction occurs locally as the area ratio (average opening ratio) of the opening / (opening and covering region) decreases is obtained. At the same time, by adopting a thin Si (111) layer, it is possible to limit the amount of Si supplied, and in combination with the effect of suppressing the reaction from proceeding at an accelerated rate, crystals caused by Ga / Si meltback A further reduction effect is obtained with respect to the deterioration and the resulting surface pit-like defects.

  In the second embodiment, the second dielectric layer is used to provide a partial coating, and the buffer layer surface that is in direct contact with the gallium nitride-based semiconductor layer grown thickly is exposed to the opening. Only limited. On the other hand, in the third embodiment according to the present invention, the stacked structure of the Si (111) layer and the buffer layer on the first dielectric layer is partially left, and in other regions, the Si (111) layer is left. The surface of the buffer layer that is in direct contact with the gallium nitride-based semiconductor layer grown in a thick film is limited by removing the laminated structure of the first and second dielectric layers and exposing the surface of the first dielectric layer.

At this time, the exposed first dielectric layer is made of a dielectric material that does not cause formation of a growth nucleus of a gallium nitride semiconductor on the surface thereof. In addition, the first dielectric layer must be stable under HVPE growth conditions and should not cause chemical reaction with the first group III nitride semiconductor film used for the buffer layer. is there. Examples of the dielectric material for the first dielectric layer satisfying these three requirements include, for example, SiO ₂ , SiN _x , aluminum oxide (Al ₂ O ₃ ), SiO _x N _y , or them. The laminated film combined can be illustrated. Among these, it is preferable to use a dielectric material represented by SiO _x N _y including SiO ₂ for the first dielectric layer.

  In the growth of a thick gallium nitride-based semiconductor layer, deposition does not occur on the exposed region of the first dielectric layer in the initial stage of growth, but from the surface of the buffer layer that remains partially. Crystal growth proceeds, and then lateral growth occurs. By utilizing this lateral growth, the growth film thickness is increased, the lateral growth layer covers the upper surface of the exposed area of the first dielectric layer, and finally the gallium nitride based semiconductor layer over the entire substrate surface. Progress. As a result, a thick gallium nitride semiconductor layer having a flat surface over the entire substrate is obtained when a thick film having a certain thickness or more is grown.

  In order to effectively fill the upper surface of the first dielectric layer exposed region using lateral growth, it is necessary to provide a partial small region where the buffer layer remains with a dense surface density. That is, in the initial stage of growth, the Group III element material and the nitrogen material that pour onto the surface of the first dielectric layer diffuse the surface of the first dielectric layer and grow the gallium nitride semiconductor on the buffer layer surface of the remaining portion. Need to reach the face. Although it depends on the growth temperature, compared with the average distance that the surface diffusion of the group III element material and the nitrogen material is possible on the surface of the first dielectric layer, it is between the small regions (residual parts) where the buffer layer remains. The average interval is preferably selected to be the same or shorter. In addition, it is more desirable to arrange the buffer layer residual portions regularly over the entire substrate surface. At least in each partial region of the substrate surface, the residual ratio of the buffer layer so that the area ratio (average residual ratio) of the residual portion / (residual portion and exposed region) averaged within each small region is constant. It is necessary to provide the portion with a dense surface density. For example, a method of leaving a laminated structure of a Si (111) layer etched in a stripe shape and a buffer layer at a constant pitch by sandwiching an exposed portion having a desired width by mask etching can be used. At this time, the pitch interval is selected within a range of 10 μm or less, and the width of the remaining portion of the stacked structure of the stripe-shaped Si (111) layer and the buffer layer is the ratio of the remaining portion / (residual portion and exposed region) area ratio ( The average residual ratio is preferably selected to be in the range of 1/10 or more and 4/10 or less. In addition, since lateral growth in the gallium nitride based semiconductor exhibits crystal orientation anisotropy, when the growth plane orientation of the gallium nitride based semiconductor layer is (0001), the stripe direction (longitudinal direction) of the striped residual portion Direction) is preferably selected in the <11-20> or <1-100> axial direction.

  When using the above lateral growth mechanism, the thickness of the stacked structure of the Si (111) layer and the buffer layer, particularly the thickness of the Si (111) layer, is larger than the width of the striped exposed region. When the depth / width ratio of the groove structure is relatively greater than 1, the supply of Si from the Si (111) layer exposed on the side surface of the groove becomes relatively significant. Therefore, in order to suppress this secondary influence, the ratio of the thickness of the stacked structure of the Si (111) layer and the buffer layer to the width of the stripe-shaped exposed region portion (depth / width ratio of the groove structure) is 1 / 1 or less, preferably 0.2 / 10 to 2/10. In other words, the thickness of the laminated structure of the thin Si (111) layer and the buffer layer, in particular, the thickness of the thin Si (111) layer is selected within a range of 1 μm or less, preferably 0.2 μm or less. The width of the stripe-shaped exposed region can be selected in the range of 1 μm to 10 μm.

  In addition, the buffer layer covers the surface of the lower Si (111) layer in the layered structure remaining portion of the Si (111) layer and the buffer layer. That is, when depositing a thick gallium nitride based semiconductor layer by vapor phase growth, the deposited gallium nitride based semiconductor does not directly contact the surface of the underlying Si (111) layer. At this time, the width of the exposed groove is also fine, and the Si (111) layer to be etched and the buffer layer are made of different materials, so that both of them can be simultaneously masked and etched away. The use of a chlorine-based dry etching method is suitable as a means having the selectivity that the layer is not etched.

  In the third embodiment of the present invention, the buffer layer surface that is in direct contact with the gallium nitride based semiconductor layer that is grown thick is limited to the remaining portion of the stacked structure of the etched Si (111) layer and the buffer layer. ing. The thin Si (111) layer involved in the Ga / Si meltback reaction is also limited to this remaining portion. That is, when a fine pinhole or the like is included in the buffer layer, a Ga / Si meltback reaction occurs locally through the pinhole in the buffer layer while the thick gallium nitride semiconductor layer is deposited. This is limited to the surface of the remaining portion. Therefore, the effect of reducing the total number of locations where the Ga / Si meltback reaction occurs locally is obtained as the area ratio (average residual ratio) of the residual part / (residual part and exposed region) decreases. At the same time, since a thin Si (111) layer is employed and the region of the remaining Si (111) layer itself is limited, the supply amount of Si is further limited, and the reaction proceeds at an accelerated rate. Combined with the effect of further suppressing this, a remarkable reduction effect can be obtained with respect to crystal deterioration due to Ga / Si meltback and the resulting surface pit-like defects.

  In the method for manufacturing a gallium nitride based semiconductor substrate according to the present invention, an SOI substrate is used, and after depositing a thick gallium nitride based semiconductor layer having a flat surface over the entire substrate surface, the SOI substrate and the thick film are usually formed. The gallium nitride based semiconductor layer is separated to form a gallium nitride based semiconductor free-standing substrate. At this time, the first dielectric layer and the thin Si (111) layer exist in the interface region between the thick gallium nitride semiconductor layer and the SOI substrate, and these can be selectively dissolved. Separation can be performed by etching using a liquid. An example of an etchant that can be used for the selective etching process is a hydrofluoric acid solution.

  In other words, if the carrier substrate constituting the SOI substrate is not dissolved by the selective etching process, the first dielectric layer constituting the interface region and the thin Si (111) layer can be dissolved and removed. It is possible to separate the thick gallium nitride based semiconductor layer.

  In the method for manufacturing a gallium nitride based semiconductor substrate according to the present invention, as described above, the carrier substrate constituting the SOI substrate to be used is a substrate made of a material different from the thin Si (111) layer, or Si ( A Si bulk substrate having a plane orientation different from that of the (111) layer can be used.

  Further, as the carrier substrate constituting the SOI substrate, a substrate having a different in-plane anisotropy of thermal expansion coefficient as compared with a thin Si (111) layer can be used. For example, in a Si bulk substrate having a different plane orientation from that of a thin Si (111) layer, for example, a Si (100) substrate, the crystal orientation contained in the plane is different and the thermal thermal expansion coefficient is in-plane anisotropic. The gender is different.

  When a thick gallium nitride based semiconductor layer is deposited on a thin Si (111) layer, there is a difference in thermal expansion coefficient between the Si (111) layer and the gallium nitride based semiconductor layer. Strain stress resulting from this difference in thermal expansion coefficient occurs. This strain stress is concentrated in the interface region between the Si (111) layer and the gallium nitride based semiconductor layer. In addition, when a Si (100) substrate is selected as the carrier substrate, the in-plane anisotropy of the thermal thermal expansion coefficient is different. As a result, during cooling, the Si (100) substrate and the thin Si (111) layer An in-plane strain stress is also generated between them. Therefore, the strain stress having these two factors is concentrated in the boundary region between the thick gallium nitride semiconductor layer and the SOI substrate.

  For example, in the third embodiment of the present invention, the stacked structure of the Si (111) layer and the buffer layer is etched, and occupies a part of the boundary region between the thick gallium nitride semiconductor layer and the SOI substrate. Only. In this case, due to the strain stress in the in-plane direction concentrated on the boundary region, the laminated structure portion of the etched Si (111) layer and the buffer layer, the interface between the Si (111) layer and the buffer layer, Alternatively, peeling at the interface between the first dielectric film and the thin Si (111) layer may be caused. That is, when the strain stress in the in-plane direction is concentrated on the boundary region, if the area ratio (average residual ratio) of the residual portion / (residual portion and exposed region) becomes a certain ratio or less due to the etching process, The shearing at the interface proceeds with priority.

  By utilizing this difference in thermal expansion coefficient between the Si (111) layer and the gallium nitride based semiconductor layer, and the difference in in-plane anisotropy between the thermal expansion coefficient of the thin Si (111) layer and the carrier substrate, After the gallium nitride based semiconductor layer is deposited, an effect of spontaneous separation can be obtained during cooling. This phenomenon becomes more prominent as the carrier substrate size increases, and after the growth, a gallium nitride based semiconductor substrate can be obtained without performing polishing or chemical etching treatment for removing the carrier substrate. This is a great advantage. Note that a part of the stacked structure of the Si (111) layer and the buffer layer may remain on the back surface of the thick gallium nitride semiconductor layer that spontaneously separates during cooling. Therefore, in general, for the purpose of removing such residue, backside polishing or chemical etching is performed to obtain a target gallium nitride based semiconductor free-standing substrate.

  In the first embodiment or the second embodiment of the present invention, even if there is a difference in in-plane anisotropy of the thermal expansion coefficient between the thin Si (111) layer and the carrier substrate, In many cases, spontaneous separation does not occur. In this case, however, strain stress is accumulated in the plane in the boundary region between the carrier substrate and the thick gallium nitride semiconductor layer. For example, the first dielectric film and the thin Si ( The strain stress is applied in the in-plane direction to the (111) layer. When selective etching is performed on the first dielectric film and the thin Si (111) layer, the effect of promoting the lateral etching of these layered portions due to the internal strain stress is exhibited. Sometimes.

  The method for producing a gallium nitride based semiconductor substrate according to the present invention will be specifically described below with reference to examples. In addition, although the Example described below is an example of the best embodiment according to the present invention, the present invention is not limited to the embodiment shown in these Examples.

Example 1
FIG. 1 shows a manufacturing process of Example 1 by the method for manufacturing a gallium nitride semiconductor substrate according to the first embodiment of the present invention, and FIG. 2 shows a manufacturing process of a gallium nitride semiconductor substrate using a conventional method. A process is shown.

In the manufacturing process of Example 1 shown in FIG. 1, a 2-inch Si (111) SOI substrate manufactured by a bonding method is used as the substrate. That is, the Si (111) SOI substrate is an SOI (silicon) in which a Si (111) layer 103 is bonded to a 300 μm thick 2 inch Si (111) bulk substrate 101 via a 100 nm thick SiO ₂ film 102. on insulator) structure. The Si (111) layer 103 on the surface side is laminated to a thickness of 0.1 μm after polishing, and its surface is made into an Si (111) surface by mirror polishing. On the other hand, in the manufacturing process by the conventional method shown in FIG. 2, a 2-inch Si (111) bulk substrate 201 is used as the substrate.

On the Si (111) layer 103 on the surface of the Si (111) SOI substrate, an AlN film 104 having a thickness of 0.2 μm is deposited by the following procedure and conditions, and a sample A is manufactured. After the RCA cleaning of the SOI substrate, the SOI substrate is introduced into an MOCVD growth apparatus and heated to 1050 ° C. in a mixed atmosphere of hydrogen and nitrogen. After the temperature rise, NH ₃ is introduced, and the Si (111) surface is annealed for 10 minutes. Thereafter, introduction of NH ₃ is continued, and while maintaining the substrate temperature at 1050 ° C., trimethylaluminum (TMA) is supplied to deposit an AlN film on the Si (111) surface. TMA is supplied for a deposition time to reach a desired film thickness of 0.2 μm, and deposition of the AlN film is continued. Next, in a state where the introduction of NH ₃ is continued, the supply of TMA is stopped, and the AlN film deposition is finished. Then, it cooled to room temperature and took out the sample A in which the AlN film | membrane for buffer layers was formed on the Si (111) surface from the MOCVD apparatus.

  In addition, an AlN film 202 having a thickness of 0.2 μm is deposited on the Si (111) surface of the Si (111) bulk substrate 201 in the same procedure and conditions, and the sample B is manufactured.

The sample A and B having a 0.2 μm thick AlN film formed as a buffer layer on the Si (111) surface were introduced into an HVPE apparatus, and the substrate temperature was measured by HVPE growth using GaCl and NH ₃ as source gases. 300 μm thick undoped GaN films 105 and 203 were deposited on the AlN films 104 and 202 at 1020 ° C., respectively. After the GaN thick film is deposited, it is cooled to room temperature and taken out from the HVPE apparatus. Thereafter, the substrate was immersed in a hydrofluoric acid solution to dissolve the substrate Si, and a 300 μm thick undoped GaN film was separated.

In the GaN thick film 203 produced on the sample B, the GaN film was polycrystallized by the meltback reaction of Ga and Si, and became fine fragments after the Si substrate was dissolved. On the other hand, the GaN thick film 105 produced on the sample A did not become fine fragments after the Si substrate was dissolved, and a free-standing GaN substrate was obtained. However, in the obtained self-standing GaN substrate, Ga and Si reactions were locally generated in 40 to 50 locations within a 2-inch plane, and were observed as pit-like defects on the surface. Comparing both results, even in sample A, Ga and Si reaction occurs in pinholes existing in the AlN film of the buffer layer, but the SiO ₂ film 102 of the SOI substrate causes the Ga and Si meltback reaction. Further progress has been stopped. As a result, crystal degradation due to the reaction due to Ga and Si is limited to a local region, and polycrystallization over the entire GaN film is avoided. From the above results, the first dielectric layer on the carrier substrate, in this example, the Si (111) thin layer formed through the silicon oxide film is used as the substrate. The effect is verified.

(Example 2)
FIG. 3 shows a manufacturing process of Example 2 by the method for manufacturing a gallium nitride based semiconductor substrate according to the second aspect of the present invention. Also in the manufacturing process of Example 2 shown in FIG. 3, a 2-inch Si (111) SOI substrate manufactured by a bonding method is used as the substrate. The SOI substrate used in the second embodiment is also an SOI substrate in which a Si (111) layer 303 is bonded to a 300 μm thick 2 inch Si (111) bulk substrate 301 via a 100 nm thick SiO ₂ film 302. (Silicon on insulator) structure. The surface side Si (111) layer 303 is laminated to a thickness of 0.1 μm by polishing, and its surface is made into an Si (111) surface by mirror polishing.

On the Si (111) layer 303 on the surface of the Si (111) SOI substrate, an AlN film 304 having a thickness of 0.2 μm is deposited as a buffer layer according to the procedure and conditions described in the first embodiment. Then, the AlN film 304 surface of the buffer layer, depositing a SiO ₂ film of 300nm thickness, and patterned by photolithography, the entire surface of the substrate, providing a width 2μm openings between the stripes, 10 [mu] m the SiO ₂ stripe 305 It was produced with a pitch.

A sample C in which a periodic SiO ₂ stripe mask pattern 305 is formed on the surface of the AlN film 304 for the buffer layer is introduced into the HVPE apparatus, and the same processes and conditions as the GaN thick film forming process described in the first embodiment are performed. Then, a 300 μm thick undoped GaN film 306 was deposited. Thereafter, the substrate was immersed in a hydrofluoric acid solution to dissolve the substrate Si, and a 300 μm thick undoped GaN film was separated to obtain a self-standing GaN substrate.

In the self-standing GaN substrate made of the GaN thick film 306 produced on the sample C, pit-like defects were observed on the surface at 3 locations within the 2-inch plane. In Example 2, a periodic SiO ₂ stripe mask pattern 305 is formed on the surface of the AlN film 304 for the buffer layer, and GaN is grown from the surface of the AlN film in the opening. Therefore, the surface area of the exposed AlN film is as small as 2/10 of the entire surface of the substrate, and the number of pinholes in the AlN film formed in that region also decreases by that ratio. As a result, the probability of the Ga and Si reaction occurring due to pinholes in the AlN film present in the opening is reduced, and correspondingly, the reduction in the number of pit-like defects is achieved. Is done.

(Example 3)
FIG. 4 shows a manufacturing process of Example 3 by the method for manufacturing a gallium nitride based semiconductor substrate according to the third aspect of the present invention. Also in the manufacturing process of Example 3 shown in FIG. 4, a 2-inch Si (111) SOI substrate manufactured by a bonding method is used as the substrate. This SOI substrate is manufactured by the manufacturing method described in Example 1, and is a 300 μm-thick 2 inch Si (111) bulk substrate 401 / 0.1 μm-thick SiO ₂ film 402 / 0.1 μm-thick Si (111) layer 403. It has a structure.

An AlN film 404 having a thickness of 0.2 μm is deposited on the Si (111) layer 403 on the surface of the Si (111) SOI substrate as a buffer layer according to the procedure and conditions described in the first embodiment. Next, a resist was applied to the surface of the AlN film 404 and patterned by photolithography, and resist stripes were formed at a pitch of 10 μm, with openings having a width of 8 μm between the stripes on the entire surface of the substrate. Subsequently, the resist stripe is used as an etching mask, chlorine-based dry etching is used, and the AlN film 404 / Si layer 403 in the opening is selectively removed until the SiO ₂ layer 402 in the SOI substrate is exposed. / Si (111) 405 was formed.

  After resist removal and surface cleaning, the sample on which the periodic AlN / Si (111) stripe pattern 405 is formed is introduced into an HVPE apparatus, and the same process and conditions as the GaN thick film formation process described in Example 1 are performed. Then, a 300 μm thick undoped GaN film 406 was deposited. Thereafter, the substrate was immersed in a hydrofluoric acid solution to dissolve the substrate Si, and a 300 μm thick undoped GaN film was separated to obtain a self-standing GaN substrate.

  In the self-standing GaN substrate formed of the GaN thick film 406 produced on the sample, no pit-like defects were observed on the surface within 2 inches. In the third embodiment, GaN growth starts from the AlN film 404 for the buffer layer that has been etched into a periodic stripe pattern shape. On the other hand, when the back surface of the obtained freestanding GaN substrate was observed in detail, reaction traces of Ga and Si were found at several locations corresponding to the periodic AlN / Si (111) stripe pattern 405.

  As a result of etching into a periodic stripe pattern shape, the remaining surface area of the AlN film is as small as 2/10 of the entire surface of the substrate, and the number of pinholes in the AlN film formed in that region is also the same. The ratio is decreasing. Similarly, the total amount of the Si layer 403 remaining on the surface is also reduced to 2/10. For this reason, the probability that a reaction between Ga and Si occurs due to pinholes in the AlN film present in the stripe pattern portion is reduced, and at the same time, the reaction between Ga and Si is self-stopped at an early stage. As a result, it is understood that although a local reaction between Ga and Si occurs in the early stage of the growth process of the GaN thick film 406, it self-stops at an early stage and does not cause pit-like defects on the surface.

Example 4
FIG. 5 shows a manufacturing process of Example 4 in which the method for manufacturing a gallium nitride based semiconductor substrate according to the third aspect of the present invention is applied. Also in the manufacturing process of Example 4 shown in FIG. 5, a 2-inch Si (111) SOI substrate manufactured by a bonding method is used as the substrate. The SOI substrate used in the fourth embodiment is also an SOI substrate in which a Si (111) layer 503 is bonded to a 300 μm thick 2 inch Si (100) bulk substrate 501 via a 100 nm thick SiO ₂ film 502. (Silicon on insulator) structure. After bonding, the surface-side Si (111) layer 503 is thinned to a thickness of 0.1 μm by polishing, and its surface is made into an Si (111) surface by mirror polishing.

On the Si (111) layer 503 on the Si (111) SOI substrate surface, an AlN film 504 having a thickness of 0.2 μm is deposited as a buffer layer according to the procedure and conditions described in the first embodiment. Next, in the same manner as in Example 3, a resist is applied to the surface of the AlN film 504 and patterned by photolithography to provide an opening of 8 μm width between the stripes on the entire surface of the substrate. A resist stripe is formed at a pitch of 10 μm. did. Subsequently, the resist stripe is used as an etching mask and chlorine-based dry etching is used to selectively remove the AlN film 504 / Si layer 503 in the opening until the SiO ₂ layer 502 in the SOI substrate is exposed. / Si (111) 505 was formed.

  Similar to the process of Example 3, after removing the resist and cleaning the surface, the sample on which the periodic AlN / Si (111) stripe pattern 505 was formed was introduced into the HVPE apparatus, and the GaN thickness described in Example 1 was obtained. A 300 μm thick undoped GaN film 506 was deposited in the same process and conditions as the film formation process. When the GaN thick film is deposited and cooled to room temperature and taken out from the HVPE apparatus, unlike the third embodiment, spontaneous peeling occurs between the GaN thick film 506 and the Si (100) bulk substrate 501 in the cooling process. It was happening. As a result, a self-standing GaN substrate was obtained without an operation of immersing in a hydrofluoric acid solution to dissolve the substrate Si.

  Similar to the self-standing GaN substrate manufactured in Example 3, the self-standing GaN substrate made of the GaN thick film 506 manufactured in Example 4 has a pit-like defect observed on the surface within 2 inches. There wasn't. Also in the fourth embodiment, the growth of GaN starts from the AlN film 504 for the buffer layer, which is etched into a periodic stripe pattern shape. Further, when the back surface of the obtained self-standing GaN substrate was observed in detail, reaction traces of Ga and Si were found at several locations corresponding to the periodic AlN / Si (111) stripe pattern 505.

  On the other hand, in Example 4, the separation between the GaN thick film 506 and the Si (100) bulk substrate 501 generated in the cooling process after the GaN thick film growth is caused by the difference in thermal expansion coefficient between GaN and Si. It is understood that this is caused by strain stress. The Si (111) bulk substrate used in Example 3 and the Si (100) bulk substrate used in Example 4 have different crystal orientations, but are formed on the surface of the Si (111) layer. The crystal orientation of the GaN thick film, which grows from the AlN film of the buffer layer, is the same in Example 3 and Example 4. That is, in Example 3 and Example 4, with the difference in crystal orientation of the Si bulk crystal used, there is a difference in strain stress due to the difference in thermal expansion coefficient between GaN and Si. Therefore, in Example 3, the strain stress caused by the difference in thermal expansion coefficient between GaN and Si is an AlN / Si (111) stripe pattern portion that is periodically etched to form a boundary region between the two. In Example 4, it is understood that the strain stress exceeds the threshold value causing the peeling in the AlN / Si (111) stripe pattern portion.

(Other embodiments)
In Examples 1 to 4, an AlN film is used as a buffer layer for the purpose of alleviating the problem of crystal growth caused by the difference in lattice constant between Si and GaN. The same applies to the case where an Al _x Ga _y In _1-xy N mixed crystal containing Ga or In or a superlattice is used for the buffer layer instead of Al as long as the effect as the buffer layer for this purpose is not impaired. The effect of the present invention is exhibited. At that time, the content ratios y and 1- _xy of Ga and In in the Al _x Ga _y In _1-xy N mixed crystal used as the buffer layer are set as the strain stress due to the lattice constant difference between Si and GaN. The range is selected so that the relaxation effect is not inferior to that of AlN. Alternatively, in the Al _x Ga _y In _{1 -xy} N superlattice, the average lattice constant is expressed by the lattice constant indicated by the Al _x Ga _y In _{1 -xy} N mixed crystal having a composition that can be suitably used as the buffer layer. Select to the same extent. In addition, the Ga content ratio y is set so that the Ga / Si meltback reaction does not proceed remarkably at the interface due to Ga contained in the Al _x Ga _y In _1-xy N mixed crystal in contact with the Si (111) layer. select.

In Examples 1 to 4 described above, the thick group III nitride semiconductor layer to be fabricated is GaN. The first of the problems to be solved in the present invention is suppression of Ga / Si meltback reaction, but Al and In have extremely low reactivity that causes meltback when in contact with Si, as compared with Ga. . On the other hand, when the thick group III nitride semiconductor layer is made of Al _x In _y Ga _1-xy N mixed crystal instead of GaN, the Ga content ratio is slightly reduced, but Ga / There is a problem of crystal degradation resulting from Si meltback and the resulting surface pit-like defects. Therefore, it is clear that the present invention is effective even when the thick group III nitride semiconductor layer to be produced is an Al _x In _y Ga _{1 -xy} N mixed crystal.

  Further, in Examples 1 to 4, an example is shown in which the thick group III nitride semiconductor layer to be fabricated is undoped GaN. For example, when manufacturing a conductive substrate used for manufacturing the above-described LED or LD, or a semi-insulating substrate used for manufacturing a high-frequency transistor, silicon, magnesium, Doping with impurities such as oxygen. Even when doping these impurities at a high concentration, Si and Ga derived from the Si (111) layer via pinholes in the buffer layer are also produced in the process of producing a thick group III nitride semiconductor layer. There is an effect of the Ga / Si meltback reaction. In general, impurities doped at a high concentration do not exhibit the effect / action of significantly reducing the frequency of the Ga / Si meltback reaction itself at the interface occurring at the initial stage of growth. Therefore, it is clear that the present invention is effective when doping impurities at a high concentration.

  In addition, for example, in the process of producing a thick group III nitride semiconductor layer when doping Si impurity at a high concentration, the Ga / Si meltback reaction does not occur, but via a pinhole or the like in the buffer layer In some cases, Si diffuses locally from the interface into the group III nitride semiconductor layer. At that time, the Si concentration locally becomes extremely high, and the clustered Si may form fine precipitates in the group III nitride semiconductor layer. The present invention has an effect of suppressing the formation of this kind of precipitate.

On the other hand, in the above-described Examples 1 to 3, an example in which an SOI substrate having a structure of Si (111) bulk substrate / SiO ₂ film / Si (111) layer manufactured by bonding is shown. For example, using an SOI substrate in which oxygen ions are implanted from the surface into a Si (111) substrate and then annealed to form a structure of Si (111) bulk substrate / SiO ₂ film / Si (111) layer, Similar effects can be obtained.

On the other hand, in Example 2 above, a SiO ₂ film is used as the first group III nitride semiconductor film used as the buffer layer, here, as the second dielectric layer partially covering the surface of the AlN film. An example is shown. This second dielectric layer is stable under HVPE growth conditions, exhibits a function of covering the surface of the buffer layer, and between the first group III nitride semiconductor film used for the buffer layer It is also necessary that no chemical reaction occurs. In addition to the SiO ₂ film, a dielectric material satisfying these two requirements, for example, SiN _x , aluminum oxide (Al ₂ O ₃ ), SiO _x N _y , or a laminated film combining them is used. The same effect can be obtained.

  In addition, when the growth of the thick group III nitride semiconductor layer is selectively started from the surface of the first group III nitride semiconductor film in the periodic stripe-shaped openings, the second group As the dielectric layer, it is more preferable to select a material that hardly causes crystal nucleation of a group III nitride semiconductor on the surface thereof.

  On the other hand, in Examples 3 and 4, the first group III nitride semiconductor film used as the buffer layer is etched into a periodic stripe pattern, and the first group III nitride semiconductor film in the stripe shape A mode in which the growth of a thick group III nitride semiconductor layer starts selectively is used. As described above, when the growth of the thick group III nitride semiconductor layer starts selectively from the first group III nitride semiconductor film in the stripe shape, the first layer exposed on the surface is formed. It is more preferable to select a material that hardly causes crystal nucleation of a group III nitride semiconductor on the surface of the dielectric layer.

  By the method for producing a gallium nitride semiconductor substrate according to the present invention, it is possible to produce a high-quality gallium nitride semiconductor free-standing substrate simply and with high productivity by using an inexpensive, large-area Si substrate as a base substrate. It becomes.

FIG. 3 is a cross-sectional view sequentially illustrating a series of steps regarding a method for depositing thick GaN by HVPE growth on an SOI substrate described in Example 1. FIG. 3 is a cross-sectional view sequentially illustrating a series of steps with respect to the method for depositing thick GaN by HVPE growth on a Si (111) bulk substrate described in Example 1. FIG. 6 is a cross-sectional view sequentially illustrating a series of steps with respect to a method for depositing thick GaN by HVPE growth on an SOI substrate described in Example 2. FIG. 6 is a cross-sectional view sequentially illustrating a series of steps regarding a method of depositing thick GaN by HVPE growth on an SOI substrate described in Example 3. FIG. 10 is a cross-sectional view sequentially illustrating a series of steps regarding a method for depositing thick GaN by HVPE growth on an SOI substrate described in Example 4;

Explanation of symbols

101 Si (111) bulk substrate 102 SiO ₂ film 103 Si (111) layer 104 AlN film 105 HVPE grown GaN thick film 201 Si (111) bulk substrate 202 AlN film 203 HVPE grown GaN thick film 301 Si (111) bulk substrate 302 SiO ₂ film 303 Si (111) layer 304 AlN film 305 SiO ₂ stripe mask pattern 306 HVPE grown GaN thick film 401 Si (111) bulk substrate 402 SiO ₂ film 403 Si (111) layer 404 AlN film 405 AlN / Si ( 111) Stripe pattern 406 HVPE grown GaN thick film 501 Si (100) bulk substrate 502 SiO ₂ film 503 Si (111) layer 503 AlN film 505 AlN / Si (111) stripe pattern 506 HVPE formation Long GaN thick film

Claims (9)

A method of manufacturing a gallium nitride based semiconductor substrate,
Using a substrate in which a first dielectric layer and a Si (111) layer are laminated on the first dielectric layer on a carrier substrate,
Depositing a buffer layer on the Si (111) layer on the substrate surface;
And after depositing the buffer layer, depositing a thick gallium nitride based semiconductor layer,
A method for manufacturing a gallium nitride based semiconductor substrate, wherein a gallium nitride based semiconductor substrate is manufactured using the thick gallium nitride based semiconductor layer. A method of manufacturing a gallium nitride based semiconductor substrate,
Using a substrate in which a first dielectric layer and a Si (111) layer are laminated on the first dielectric layer on a carrier substrate,
Depositing a buffer layer on the Si (111) layer on the substrate surface;
After depositing the buffer layer, forming a second dielectric layer partially covering the surface of the buffer layer;
Depositing a thick gallium nitride based semiconductor layer after partial coating with the second dielectric layer,
A method for manufacturing a gallium nitride based semiconductor substrate, wherein a gallium nitride based semiconductor substrate is manufactured using the thick gallium nitride based semiconductor layer. A method of manufacturing a gallium nitride based semiconductor substrate,
Using a substrate in which a first dielectric layer and a Si (111) layer are laminated on the first dielectric layer on a carrier substrate,
Depositing a buffer layer on the Si (111) layer on the substrate surface;
After the buffer layer is deposited, the stacked structure of the Si (111) layer and the buffer layer on the first dielectric layer is partially left, and in other regions, the Si (111) layer and the buffer layer are Removing the laminated structure and exposing the surface of the first dielectric layer;
And at least a step of depositing a thick gallium nitride based semiconductor layer after partial removal of the stacked structure of the Si (111) layer and the buffer layer,
A method for manufacturing a gallium nitride based semiconductor substrate, wherein a gallium nitride based semiconductor substrate is manufactured using the thick gallium nitride based semiconductor layer.   The method for manufacturing a gallium nitride based semiconductor substrate according to any one of claims 1 to 3, wherein a thickness of the Si (111) layer is selected within a range of 1 µm or less.   The method for manufacturing a gallium nitride based semiconductor substrate according to any one of claims 1 to 4, wherein the buffer layer is a gallium nitride based semiconductor layer containing at least Al. It said first dielectric layer dielectric material, gallium nitride according to any one of claims 1 to 5, characterized in that it is selected from the group of dielectric material represented by SiO _x N _y A method for manufacturing a semiconductor substrate. It said second dielectric layer dielectric material, a method for manufacturing a gallium nitride semiconductor substrate according to claim 2, characterized in that it is selected from the group of dielectric material represented by SiO _x N _y.   The gallium nitride based semiconductor substrate according to any one of claims 1 to 7, wherein a substrate having in-plane anisotropy having a thermal expansion coefficient different from that of the Si (111) substrate is used as the carrier substrate. Manufacturing method.   9. The method for manufacturing a gallium nitride based semiconductor substrate according to claim 8, wherein a Si (100) substrate is used as the carrier substrate.

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