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JP2007201262A - High frequency circuit device - Google Patents

High frequency circuit device Download PDF

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Publication number
JP2007201262A
JP2007201262A JP2006019314A JP2006019314A JP2007201262A JP 2007201262 A JP2007201262 A JP 2007201262A JP 2006019314 A JP2006019314 A JP 2006019314A JP 2006019314 A JP2006019314 A JP 2006019314A JP 2007201262 A JP2007201262 A JP 2007201262A
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Prior art keywords
circuit device
circuit board
frequency circuit
land portions
conductive pattern
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Withdrawn
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JP2006019314A
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Japanese (ja)
Inventor
Kazuhiko Ueda
和彦 植田
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Alps Alpine Co Ltd
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Alps Electric Co Ltd
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Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP2006019314A priority Critical patent/JP2007201262A/en
Publication of JP2007201262A publication Critical patent/JP2007201262A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a compact high frequency circuit device in which an electric performance is good. <P>SOLUTION: In the high frequency circuit device, a connection conductor 6 which connects first and second lands 4 and 5, and a grounding pattern 10 which counters the connection conductor 6, are formed, it will become in the state where a low pass filter existed in a radio frequency between the primary and secondary lands 4 and 5. The improvement of a return loss in a desired frequency can be aimed at, and a thing is obtained with good electric performance. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、種々の電気機器や電子回路ユニット等に使用して好適な高周波回路装置に関するものである。   The present invention relates to a high-frequency circuit device suitable for use in various electric devices, electronic circuit units, and the like.

図4は従来の高周波回路装置の要部の斜視図であり、次に、従来の高周波回路装置の構成を図4に基づいて説明すると、回路基板51の表面には、配線パターン52と、一部が配線パターン52に接続された一対のランドからなる第1,第2,第3のランド部53,54,55が設けられると共に、第1,第2のランド部53,54の一方のランド部は、互いに導電パターン56によって接続されている。   FIG. 4 is a perspective view of a main part of a conventional high-frequency circuit device. Next, the configuration of the conventional high-frequency circuit device will be described with reference to FIG. First, second, and third land portions 53, 54, and 55, each having a portion connected to the wiring pattern 52, are provided, and one land of the first and second land portions 53 and 54 is provided. The parts are connected to each other by a conductive pattern 56.

絶縁材のレジスト膜57は、第1,第2,第3のランド部53,54,55を露出した状態で、回路基板51上、配線パターン52上、及び導電パターン56上に設けられて、半田領域が形成されている。   A resist film 57 of an insulating material is provided on the circuit board 51, the wiring pattern 52, and the conductive pattern 56 with the first, second, and third land portions 53, 54, and 55 exposed. A solder region is formed.

そして、第1,第2,第3のランド部53,54,55のそれぞれの半田領域には、第1,第2,第3の電子部品58a、58b、58cが半田付けされると共に、ここでは図示しないが、回路基板51上に種々の回路部品が搭載されて、所望の高周波回路が形成されている(例えば、特許文献1参照)。
実開平8−599号公報
The first, second and third electronic parts 58a, 58b and 58c are soldered to the solder regions of the first, second and third land portions 53, 54 and 55, respectively. Although not shown, various circuit components are mounted on the circuit board 51 to form a desired high-frequency circuit (see, for example, Patent Document 1).
Japanese Utility Model Publication No. 8-599

しかし、従来の高周波回路装置にあっては、第1,第2のランド部53,54を繋ぐ導電パターン56に高周波信号が流れると、第1,第2のランド部53,54間にインダクタが存在した状態となって、リターンロスが劣化し、電気的な性能が悪くなると共に、第1,第2のランド部53,54間の導電パターン56上には、半田領域を形成するためのレジスト膜57が設けられるため、第1,第2のランド部53,54間には、レジスト膜57を形成するためのスペースを必要として、大型になるという問題がある。   However, in the conventional high-frequency circuit device, when a high-frequency signal flows through the conductive pattern 56 that connects the first and second land portions 53 and 54, an inductor is provided between the first and second land portions 53 and 54. A resist for forming a solder region on the conductive pattern 56 between the first and second land portions 53 and 54 is obtained while the return loss is deteriorated and the electrical performance is deteriorated. Since the film 57 is provided, there is a problem that a space for forming the resist film 57 is required between the first and second land portions 53 and 54 and the size is increased.

本発明は、このような従来技術の実情に鑑みてなされたもので、その目的は、電気的な性能が良く、小型の高周波回路装置を提供することにある。   The present invention has been made in view of such a situation of the prior art, and an object thereof is to provide a small high-frequency circuit device having good electrical performance.

上記の目的を達成するために、本発明は、複数枚の絶縁薄板が積層された回路基板と、この回路基板の表面に設けられた第1,第2のランド部と、この第1,第2のランド部間を接続する接続導体と、第1,第2のランド部のそれぞれ接続された電子部品とを備え、接続導体は、回路基板の積層間に設けられた導体パターンと、回路基板の孔内に設けられ、第1のランド部と導電パターンとを繋ぐ第1の導体と、回路基板の孔内に設けられ、第2のランド部と導電パターンとを繋ぐ第2の導体とで構成されると共に、回路基板には、導電パターンに対向する接地パターンを設けたことを特徴としている。   In order to achieve the above object, the present invention provides a circuit board in which a plurality of insulating thin plates are laminated, first and second land portions provided on the surface of the circuit board, and the first and first lands. A connection conductor for connecting the two land portions, and an electronic component connected to each of the first and second land portions. The connection conductor includes a conductor pattern provided between the stacked circuit boards, and a circuit board. A first conductor connecting the first land portion and the conductive pattern, and a second conductor connecting the second land portion and the conductive pattern provided in the hole of the circuit board. In addition, the circuit board is provided with a grounding pattern facing the conductive pattern.

このように構成した本発明は、接続導体と接地パターンとによって、第1,第2のランド部間には高周波的にローパスフィルタが存在した状態となって、所望の周波数でのリターンロスの改善が図れ、電気的な性能の良好なものが得られる。   According to the present invention configured as described above, a low-pass filter exists in a high frequency between the first and second land portions due to the connection conductor and the ground pattern, thereby improving return loss at a desired frequency. Therefore, a product with good electrical performance can be obtained.

また、本発明は、上記発明において、絶縁薄板がセラミック材で形成されたことを特徴としている。   Further, the present invention is characterized in that, in the above-mentioned invention, the insulating thin plate is formed of a ceramic material.

このように構成した本発明は、セラミック材によって、第1,第2のランド部間の絶縁性が良くなって、第1,第2のランド部間の間隔を狭くすることができて、小型化が図れる。   According to the present invention configured as described above, the ceramic material can improve the insulation between the first and second land portions, and can reduce the distance between the first and second land portions. Can be achieved.

また、本発明は、上記発明において、絶縁薄板が低温焼成セラミック材で形成されたことを特徴としている。   The present invention is also characterized in that, in the above invention, the insulating thin plate is formed of a low-temperature fired ceramic material.

このように構成した本発明は、低温焼成セラミック材によって、高周波特性の良好なものが得られる。   According to the present invention configured as described above, a low-temperature fired ceramic material can provide a high-frequency characteristic.

また、本発明は、上記発明において、導電パターンと接地パターンは、互いに隣り合う積層間に設けられたことを特徴としている。   Further, the present invention is characterized in that, in the above-mentioned invention, the conductive pattern and the ground pattern are provided between adjacent layers.

このように構成した本発明は、導電パターンと接地パターンが近接した状態で配置できて、小型化が図れると共に、ローパスフィルタのコンデンサを形成するための導電パターンと接地パターンを小さくできて、一層の小型化が図れる。   The present invention configured as described above can be arranged in a state in which the conductive pattern and the ground pattern are close to each other, and can be downsized, and the conductive pattern and the ground pattern for forming the capacitor of the low-pass filter can be made small. Miniaturization can be achieved.

また、本発明は、上記発明において、接続導体によって接続された第1,第2のランド部間に位置する回路基板の表面には、レジスト膜を無くしたことを特徴としている。   Further, the present invention is characterized in that in the above invention, the resist film is eliminated on the surface of the circuit board located between the first and second lands connected by the connecting conductor.

このように構成した本発明は、レジスト膜が不要となる上に、第1,第2のランド部間の間隔を一層狭めることができて、小型化を図ることができる。   According to the present invention configured as described above, a resist film is not required, and the distance between the first and second land portions can be further reduced, and the size can be reduced.

本発明は、接続導体と接地パターンとによって、第1,第2のランド部間には高周波的にローパスフィルタが存在した状態となって、所望の周波数でのリターンロスの改善が図れ、電気的な性能の良好なものが得られる。   According to the present invention, a low-pass filter exists between the first and second land portions at a high frequency due to the connection conductor and the ground pattern, so that return loss at a desired frequency can be improved, and electrical With good performance.

発明の実施の形態について図面を参照して説明すると、図1は本発明の高周波回路装置の要部の平面図、図2は本発明の高周波回路装置の要部断面図、図3は本発明の高周波回路装置に係る等価回路図である。   An embodiment of the invention will be described with reference to the drawings. FIG. 1 is a plan view of the main part of the high-frequency circuit device of the present invention, FIG. 2 is a cross-sectional view of the main part of the high-frequency circuit device of the present invention, and FIG. It is an equivalent circuit diagram related to the high-frequency circuit device.

次に、本発明の高周波回路装置に係る構成を図1〜図3に基づいて説明すると、回路基板1は、複数枚のセラミック材、或いは低温焼成セラミック材(LTCC)等の絶縁薄板2が積層されて形成されており、この回路基板1の表面には、配線パターン3と、一部が配線パターン3に接続された一対のランドからなる第1,第2のランド部4,5が設けられている。   Next, a configuration according to the high-frequency circuit device of the present invention will be described with reference to FIGS. 1 to 3. A circuit board 1 is a laminate of a plurality of insulating thin plates 2 such as a ceramic material or a low-temperature fired ceramic material (LTCC). On the surface of the circuit board 1, there are provided a wiring pattern 3 and first and second land portions 4, 5 made of a pair of lands partially connected to the wiring pattern 3. ing.

この第1,第2のランド部4,5の一方のランド部は、互いに接続導体6によって接続されており、この接続導体6は、回路基板1の積層間に設けられた導電パターン7と、回路基板1の孔1a内に設けられ、第1のランド部4と導電パターン7を繋ぐ第1の導体8と、回路基板1の孔1b内に設けられ、第2のランド部5と導電パターン7を繋ぐ第2の導体9とで構成されている。   One land portion of the first and second land portions 4 and 5 is connected to each other by a connection conductor 6, and the connection conductor 6 includes a conductive pattern 7 provided between the stacked circuit boards 1, and The first conductor 8 provided in the hole 1a of the circuit board 1 and connecting the first land portion 4 and the conductive pattern 7, and the second land portion 5 and the conductive pattern provided in the hole 1b of the circuit board 1. 7 and a second conductor 9 that connects 7 together.

そして、接続導体6によって接続された第1,第2のランド部4,5の一方のランド部間は、互いに近接(例えば、50ミクロン程度の間隔)した状態で配置されると共に、このランド部間に位置する回路基板1の表面には、絶縁材のレジスト膜を無くした状態となっている。   And between one land part of the 1st, 2nd land parts 4 and 5 connected by the connection conductor 6, it arrange | positions in the state which mutually adjoined (for example, space | interval of about 50 microns), and this land part The insulating film is removed from the surface of the circuit board 1 positioned between them.

なお、レジスト膜は、上記ランド部間の回路基板1の表面以外の適宜箇所に設けても良い。   Note that the resist film may be provided at an appropriate place other than the surface of the circuit board 1 between the land portions.

導電材からなる接地パターン10は、導電パターン7に対向した状態で、導電パターン7に隣接した積層間に設けられており、また、この接地パターン10は、導電パターン10から隣接しない積層間、或いは回路基板1の下面に設けても良い。   The ground pattern 10 made of a conductive material is provided between the stacked layers adjacent to the conductive pattern 7 in a state of facing the conductive pattern 7, and the ground pattern 10 is disposed between the stacked layers not adjacent to the conductive pattern 10, or You may provide in the lower surface of the circuit board 1. FIG.

そして、第1,第2のランド部4,5のそれぞれには、第1,第2の電子部品11a、11bが半田付けされると共に、ここでは図示しないが、回路基板1上に種々の回路部品が搭載されて、所望の高周波回路が形成されて、本発明の高周波回路装置が構成されている。   The first and second land parts 4 and 5 are soldered with the first and second electronic components 11a and 11b, respectively, and various circuits are mounted on the circuit board 1 although not shown here. Components are mounted to form a desired high-frequency circuit, and the high-frequency circuit device of the present invention is configured.

また、第1,第2の電子部品11a、11bは、双方がコンデンサや抵抗器等の同じ電子部品、或いは、一方がコンデンサや抵抗器で、他方がIC部品で形成されても良い。   The first and second electronic components 11a and 11b may be formed of the same electronic component such as a capacitor or a resistor, or one may be a capacitor or a resistor, and the other may be an IC component.

このような構成を有する本発明の高周波回路装置にあっては、第1,第2のランド部4,5を繋ぐ接続導体6に高周波信号が流れると、図3に示すように高周波的には、第1,第2の導体8,9がインダクタL、導電パターン7と接地パターン10との間がコンデンサCとなって、T形のローパスフィルタが存在した状態となる。   In the high-frequency circuit device of the present invention having such a configuration, when a high-frequency signal flows through the connection conductor 6 connecting the first and second land portions 4 and 5, as shown in FIG. The first and second conductors 8 and 9 are the inductor L, and the capacitor C is between the conductive pattern 7 and the ground pattern 10, so that a T-shaped low-pass filter exists.

その結果、接続導体6と接地パターン10とによって、第1,第2のランド部4,5間には高周波的にローパスフィルタが存在した状態となって、所望の周波数でのリターンロスの改善が図れ、電気的な性能の良好なものが得られる。   As a result, the connection conductor 6 and the ground pattern 10 cause a low-pass filter to exist between the first and second land portions 4 and 5 at a high frequency, thereby improving return loss at a desired frequency. As a result, a product with good electrical performance can be obtained.

本発明の高周波回路装置の要部の平面図である。It is a top view of the principal part of the high frequency circuit device of the present invention. 本発明の高周波回路装置の要部断面図である。It is principal part sectional drawing of the high frequency circuit apparatus of this invention. 本発明の高周波回路装置に係る等価回路図である。It is an equivalent circuit diagram concerning the high frequency circuit device of the present invention. 従来の高周波回路装置の要部の斜視図である。It is a perspective view of the principal part of the conventional high frequency circuit device.

符号の説明Explanation of symbols

1 回路基板
1a、1b 孔
2 絶縁薄板
3 配線パターン
4 第1のランド部
5 第2のランド部
6 接続導体
7 導電パターン
8 第1の導体
9 第2の導体
10 接地パターン
11a、11b 電子部品
L インダクタ
C コンデンサ
DESCRIPTION OF SYMBOLS 1 Circuit board 1a, 1b Hole 2 Insulating thin plate 3 Wiring pattern 4 1st land part 5 2nd land part 6 Connection conductor 7 Conductive pattern 8 1st conductor 9 2nd conductor 10 Ground pattern 11a, 11b Electronic component L Inductor C Capacitor

Claims (5)

複数枚の絶縁薄板が積層された回路基板と、この回路基板の表面に設けられた第1,第2のランド部と、この第1,第2のランド部間を接続する接続導体と、前記第1,第2のランド部のそれぞれ接続された電子部品とを備え、前記接続導体は、前記回路基板の積層間に設けられた導体パターンと、前記回路基板の孔内に設けられ、前記第1のランド部と前記導電パターンとを繋ぐ第1の導体と、前記回路基板の孔内に設けられ、前記第2のランド部と前記導電パターンとを繋ぐ第2の導体とで構成されると共に、前記回路基板には、前記導電パターンに対向する接地パターンを設けたことを特徴とする高周波回路装置。 A circuit board on which a plurality of insulating thin plates are laminated; first and second land portions provided on the surface of the circuit board; a connection conductor connecting the first and second land portions; Electronic components connected to each of the first and second land portions, wherein the connection conductor is provided in a conductor pattern provided between the stacks of the circuit boards, and in the holes of the circuit boards. A first conductor connecting the first land portion and the conductive pattern, and a second conductor provided in the hole of the circuit board and connecting the second land portion and the conductive pattern; The circuit board is provided with a grounding pattern opposite to the conductive pattern. 前記絶縁薄板がセラミック材で形成されたことを特徴とする請求項1記載の高周波回路装置。 2. The high frequency circuit device according to claim 1, wherein the insulating thin plate is made of a ceramic material. 前記絶縁薄板が低温焼成セラミック材で形成されたことを特徴とする請求項2記載の高周波回路装置。 3. The high frequency circuit device according to claim 2, wherein the insulating thin plate is made of a low-temperature fired ceramic material. 前記導電パターンと前記接地パターンは、互いに隣り合う積層間に設けられたことを特徴とする請求項1から3の何れか1項に記載の高周波回路装置。 The high-frequency circuit device according to claim 1, wherein the conductive pattern and the ground pattern are provided between adjacent layers. 前記接続導体によって接続された第1,第2のランド部間に位置する前記回路基板の表面には、レジスト膜を無くしたことを特徴とする請求項1から4の何れか1項に記載の高周波回路装置。 5. The resist film according to claim 1, wherein a resist film is eliminated on a surface of the circuit board located between the first and second land portions connected by the connection conductor. 6. High frequency circuit device.
JP2006019314A 2006-01-27 2006-01-27 High frequency circuit device Withdrawn JP2007201262A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11163534A (en) * 1997-11-27 1999-06-18 Kyocera Corp Low temperature firing multilayer substrate
JP2002093941A (en) * 2000-09-14 2002-03-29 Kyocera Corp Multilayer wiring board
WO2005067359A1 (en) * 2003-12-26 2005-07-21 Murata Manufacturing Co., Ltd. Ceramic multilayer substrate
JP2005235807A (en) * 2004-02-17 2005-09-02 Murata Mfg Co Ltd Stacked electronic component and its manufacturing method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11163534A (en) * 1997-11-27 1999-06-18 Kyocera Corp Low temperature firing multilayer substrate
JP2002093941A (en) * 2000-09-14 2002-03-29 Kyocera Corp Multilayer wiring board
WO2005067359A1 (en) * 2003-12-26 2005-07-21 Murata Manufacturing Co., Ltd. Ceramic multilayer substrate
JP2005235807A (en) * 2004-02-17 2005-09-02 Murata Mfg Co Ltd Stacked electronic component and its manufacturing method

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