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JP2008061252A - High voltage gate driver integrated circuit with multifunctional gate - Google Patents

High voltage gate driver integrated circuit with multifunctional gate Download PDF

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Publication number
JP2008061252A
JP2008061252A JP2007225666A JP2007225666A JP2008061252A JP 2008061252 A JP2008061252 A JP 2008061252A JP 2007225666 A JP2007225666 A JP 2007225666A JP 2007225666 A JP2007225666 A JP 2007225666A JP 2008061252 A JP2008061252 A JP 2008061252A
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output voltage
circuit
signal
gate
integrated circuit
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Dong Young Lee
ヤン リー ドン
Ming Hwang
ファン ミン
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Infineon Technologies Americas Corp
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International Rectifier Corp USA
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
    • G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/165—Modifications for eliminating interference voltages or currents in field-effect transistor switches by feedback from the output circuit to the control circuit
    • H03K17/166—Soft switching

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electronic Switches (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high voltage gate driver integrated circuit with a multifunctional gate, capable of saving the number of external components and external power switches that are required. <P>SOLUTION: The high voltage gate driver integrated circuit comprises a first driver circuit that can supply a first output voltage signal, a second driver circuit that can supply a second output voltage signal, an internal circuit that can process the second output voltage signal that has such characteristics as different from the first output voltage signal to supply a processed output voltage signal, and a selection circuit which can select, as a gate drive signal, either the first output voltage signal or the processed output voltage signal. It further comprises an external power switch which is connected to the selection circuit so that the gate drive signal is supplied to a gate of the external power switch to turn on/off the external power switch. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、多ゲート機能付き高電圧ゲートドライバ集積回路に関する。   The present invention relates to a high voltage gate driver integrated circuit having a multi-gate function.

本発明は、特に、外部電力スイッチおよび他の外部コンポーネント数を減少する一方で多ゲート機能を供給するプラズマディスプレイ（ＰＤＰ）に使用される、ドライバ回路に関する。   The present invention particularly relates to driver circuits used in plasma displays (PDPs) that provide multi-gate functionality while reducing the number of external power switches and other external components.

図１は、ＰＤＰに使用される、従来の高電圧ゲートドライバ集積回路１０を示している。プラズマディスプレイはセルのマトリックスを備え、各セルは、セルに電圧をかけることによりプラズマに変換されるガスを含有する。モノクロディスプレイでは、荷電粒子が、電離電圧をかけて使用される電極の一方に向かって流れるにつれて電離されるガス自体が光子を放出する。カラープラズマディスプレイでは、電離ガスによって放出される光子によって誘導されるとき、青色光を放出する表面の１つに蛍光体が被覆されている。図１の回路では、外部電力スイッチ１４ａ、１４ｂは、ＰＤＰへ供給される電圧を制御するために使用される。   FIG. 1 shows a conventional high voltage gate driver integrated circuit 10 used in a PDP. A plasma display comprises a matrix of cells, each cell containing a gas that is converted to a plasma by applying a voltage to the cells. In a monochrome display, the gas itself, which is ionized, emits photons as charged particles flow toward one of the electrodes used with an ionization voltage. In color plasma displays, a phosphor is coated on one of the surfaces that emits blue light when induced by photons emitted by an ionized gas. In the circuit of FIG. 1, the external power switches 14a, 14b are used to control the voltage supplied to the PDP.

特に、高電圧ゲートドライバ集積回路１０は、２つの独立したドライバ回路１２ａ、１２ｂとを備えている。これらのドライバ回路１２ａ、１２ｂは、スイッチＱ１ａ、Ｑ２ａおよびＱ１ｂ、Ｑ２ｂをそれぞれ制御するために使用され、電力スイッチ１４ａ、１４ｂのゲートを制御するために使用される出力電圧Ｖｏｕｔａ、Ｖｏｕｔｂを与える。各電力スイッチ１４ａ、１４ｂは、図１でＶscanとして示された電離電圧または走査電圧を供給するために使用される。外部回路１６は、付加機能を与えるために設けられるとよい。例えば、外部補助回路１６は、高電圧ゲートドライバ集積回路１０によりＰＤＰへ供給される電圧のｄｖ／ｄｔを制御するために使用されるとよい。従って、図１の高電圧ゲートドライバ集積回路は、多機能ゲートを供給するために、多チャンネルドライバ回路１２ａ、１２ｂ、外部補助回路１６および２つの外部電力スイッチ１４ａ、１４ｂを必要とする。結果として、このような従来のゲートドライバ集積回路は十分な空間を必要とし、高いコストがかかる。   In particular, the high voltage gate driver integrated circuit 10 includes two independent driver circuits 12a and 12b. These driver circuits 12a, 12b are used to control the switches Q1a, Q2a and Q1b, Q2b, respectively, and provide output voltages Vouta, Voutb used to control the gates of the power switches 14a, 14b. Each power switch 14a, 14b is used to provide an ionization voltage or scan voltage, shown as Vscan in FIG. The external circuit 16 may be provided to provide an additional function. For example, the external auxiliary circuit 16 may be used to control dv / dt of the voltage supplied to the PDP by the high voltage gate driver integrated circuit 10. Accordingly, the high voltage gate driver integrated circuit of FIG. 1 requires multi-channel driver circuits 12a, 12b, an external auxiliary circuit 16, and two external power switches 14a, 14b to provide a multi-function gate. As a result, such a conventional gate driver integrated circuit requires a sufficient space and is expensive.

従って、上述の問題点を回避する高電圧ゲートドライバ集積回路を提供することは有益である。   Therefore, it would be beneficial to provide a high voltage gate driver integrated circuit that avoids the above problems.

本発明の目的は、必要な外部コンポーネント数を減少させた多機能ゲート付き高電圧ドライバ回路を提供することにある。   It is an object of the present invention to provide a multi-function gated high voltage driver circuit with a reduced number of required external components.

本発明によれば、高電圧ゲートドライバ集積回路は、第１出力電圧信号を供給可能な第１ドライバ回路と、第２出力電圧信号を供給可能な第２ドライバ回路と、第１出力電圧信号とは異なる特性を備える、処理済出力電圧信号を供給するべく、第２出力電圧信号を処理可能な内部回路と、第１出力電圧信号と処理済出力電圧信号のうちのいずれか一つを、ゲートドライブ信号として選択可能な選択回路とを備える。高電圧ゲートドライバ集積回路は、外部電力スイッチをゲートドライブ信号を外部電力スイッチのゲートに供給して外部電力スイッチをオンオフするべく、選択回路に接続される外部電力スイッチを更に備える。   According to the present invention, a high voltage gate driver integrated circuit includes a first driver circuit capable of supplying a first output voltage signal, a second driver circuit capable of supplying a second output voltage signal, and a first output voltage signal. Have different characteristics and are capable of processing a second output voltage signal to provide a processed output voltage signal, and gate one of the first output voltage signal and the processed output voltage signal. And a selection circuit that can be selected as a drive signal. The high voltage gate driver integrated circuit further comprises an external power switch connected to the selection circuit to supply the external power switch with a gate drive signal to the gate of the external power switch to turn the external power switch on and off.

本発明の他の特徴および利益は、添付の図面に基づく以下の説明より明らかになる。   Other features and benefits of the present invention will become apparent from the following description based on the accompanying drawings.

本発明は、外部コンポーネント数を減少させる多機能ゲートを供給する高電圧ゲートドライバ集積回路に関する。結果として、高機能性を維持しつつ回路に必要とされる複雑性および空間の両者を減少させる。   The present invention relates to a high voltage gate driver integrated circuit that provides a multifunction gate that reduces the number of external components. As a result, both complexity and space required for the circuit are reduced while maintaining high functionality.

本発明の一つの実施例による高電圧ゲートドライバ集積回路が図２に詳細に示されている。高電圧ゲートドライバ集積回路２０は、それぞれ第１出力電圧信号Ｖｏｕｔ１および第２出力電圧信号Ｖｏｕｔ２を供給可能な第１ドライバ回路２２および第２ドライバ回路２４を備えている。第１および第２ドライバ回路２２、２４は異なるゲート特性を供給することが好ましい。第１ドライバ回路２２には、矩形パルス入力信号２３が供給される。第１制御信号を、直列接続されたスイッチＱ１、Ｑ２の制御電極または制御端子に供給する第１バッファ増幅器３２を備えているとよい。第１出力電圧信号Ｖｏｕｔ１は、スイッチＱ１とＱ２の間にある接点Ａから、この２つのスイッチのオンオフ状態に基づいて供給される。従って、スイッチＱ１、Ｑ２は第１制御信号によって制御され、所望の第１出力電圧信号Ｖｏｕｔ１を供給する。   A high voltage gate driver integrated circuit according to one embodiment of the present invention is shown in detail in FIG. The high voltage gate driver integrated circuit 20 includes a first driver circuit 22 and a second driver circuit 24 that can supply a first output voltage signal Vout1 and a second output voltage signal Vout2, respectively. The first and second driver circuits 22, 24 preferably provide different gate characteristics. A rectangular pulse input signal 23 is supplied to the first driver circuit 22. A first buffer amplifier 32 may be provided that supplies the first control signal to the control electrodes or control terminals of the switches Q1 and Q2 connected in series. The first output voltage signal Vout1 is supplied from the contact A between the switches Q1 and Q2 based on the on / off state of the two switches. Accordingly, the switches Q1 and Q2 are controlled by the first control signal and supply the desired first output voltage signal Vout1.

第２ドライバ回路２４は、入力信号２３1が供給される第２バッファ増幅器３４を備えている。第２バッファ増幅器３４は、第２制御信号を出力し、直列接続されたスイッチＱ３、Ｑ４を制御する。第２出力電圧信号Ｖｏｕｔ２は、スイッチＱ３とＱ４の間に位置する接点Ｂから供給され、この２つのオンオフ状態に基づいている。従って、スイッチＱ３、Ｑ４は、第２制御信号によって制御され、所望の第２出力電圧信号Ｖｏｕｔ２を供給する。あるいは、第２ドライバ回路２４は、入力信号２３を受信し、他方第１ドライバ回路２２は入力信号２３1を受信するか、または所望に応じてどちらのドライバ回路も入力として合成信号２３および２３1を受信するとよい。 The second driver circuit 24 includes a second buffer amplifier 34 to which an input signal 23 1 is supplied. The second buffer amplifier 34 outputs a second control signal and controls the switches Q3 and Q4 connected in series. The second output voltage signal Vout2 is supplied from the contact B located between the switches Q3 and Q4, and is based on these two on / off states. Accordingly, the switches Q3 and Q4 are controlled by the second control signal and supply a desired second output voltage signal Vout2. Alternatively, the second driver circuit 24 receives the input signal 23 while the first driver circuit 22 receives the input signal 23 1 , or both driver circuits receive the combined signals 23 and 23 1 as desired. Should be received.

第２ドライバ回路２４は、所望に応じて第２出力電圧信号Ｖｏｕｔ２の追加の処理のための内部回路３４を備えていてもよい。例えば、内部回路３４は、フィードバック制御を行うために使用されるとよい。結果として、外部電力スイッチ３６を介してＰＤＰに供給される電圧のｄｖ／ｄｔは、所望に応じてｄｖ／ｄｔを制限することによって制御されることが可能である。内部回路３４は、ｄｖ／ｄｔ制御用として使用され得るが、本発明は、本実施例に限定されず内部回路３４は他の付加機能を提供するために使用することも可能である。従って内部回路３４の出力は、第２ドライバ回路２４から最終的に出力され、処理済出力電圧信号Ｖｏｕｔ２1を供給する。従って内部回路３４は、処理済出力電圧信号Ｖｏｕｔ２1によって供給されるゲート特性が、第１出力電圧信号Ｖｏｕｔ１によって供給されるゲート特性とは異なることを確実にするために使用される。 The second driver circuit 24 may include an internal circuit 34 for additional processing of the second output voltage signal Vout2 as desired. For example, the internal circuit 34 may be used for performing feedback control. As a result, the dv / dt of the voltage supplied to the PDP via the external power switch 36 can be controlled by limiting dv / dt as desired. Although the internal circuit 34 can be used for dv / dt control, the present invention is not limited to this embodiment, and the internal circuit 34 can also be used to provide other additional functions. Accordingly, the output of the internal circuit 34 is finally output from the second driver circuit 24 and supplies the processed output voltage signal Vout2 1 . The internal circuit 34 is therefore used to ensure that the gate characteristic supplied by the processed output voltage signal Vout2 1 is different from the gate characteristic supplied by the first output voltage signal Vout1.

ドライバ回路２０は、選択回路３８を備え、この選択回路３８には、第１ドライバ回路２２から第１出力電圧信号Ｖｏｕｔ１および第２ドライバ回路２４の内部回路３４から、処理済出力電圧信号Ｖｏｕｔ２1の両方が供給される。選択回路３８は、１つの外部電力スイッチ３６のゲートへ供給されるゲートドライブ信号として、第１出力電圧信号Ｖｏｕｔ１および処理済出力電圧信号Ｖｏｕｔ２1のうちのいずれか1つを選択可能である。ゲートドライブ信号は外部電力スイッチ３６のオンオフ状態を制御するので、ＰＤＰへ供給される電離電圧または走査電圧をも制御する。 The driver circuit 20 includes a selection circuit 38, the select circuit 38, the first driver circuit 22 from the first output voltage signal Vout1 and the second internal circuit 34 of the driver circuit 24, the processed output voltage signal Vout2 1 Both are supplied. The selection circuit 38 can select any one of the first output voltage signal Vout1 and the processed output voltage signal Vout2 1 as a gate drive signal supplied to the gate of one external power switch 36. Since the gate drive signal controls the on / off state of the external power switch 36, it also controls the ionization voltage or scanning voltage supplied to the PDP.

従って本実施例の高電圧ゲートドライバ集積回路２０は、１つの外部電力スイッチ３６に多機能ゲートを供給する。結果として、他に外部電力スイッチを付加することを必要としない。図２に示されているように、好適実施例においては、第１および第２ドライバ回路２２、２４、内部回路３４、および選択回路３８は、１つの集積回路に内蔵されることが好ましい。従って、高電圧ゲートドライバ集積回路２０は、図１について上記に述べた、従来の高電圧ゲートドライバ集積回路１０において使用される外部補助回路１６を不要にする。更に、第１および第２ドライバ回路２２、２４は、１つのアース接続による１つのアース電圧を共有することが好ましい。更に、１つのゲートドライブ出力は、選択回路３８から外部電力スイッチ３６へ供給されるゲートドライブ信号用として供給することが可能である。   Therefore, the high voltage gate driver integrated circuit 20 of this embodiment supplies a multifunction gate to one external power switch 36. As a result, no additional external power switch is required. As shown in FIG. 2, in the preferred embodiment, the first and second driver circuits 22, 24, the internal circuit 34, and the selection circuit 38 are preferably contained in one integrated circuit. Accordingly, the high voltage gate driver integrated circuit 20 eliminates the need for the external auxiliary circuit 16 used in the conventional high voltage gate driver integrated circuit 10 described above with reference to FIG. Furthermore, the first and second driver circuits 22 and 24 preferably share one earth voltage by one earth connection. Further, one gate drive output can be provided for a gate drive signal supplied from the selection circuit 38 to the external power switch 36.

選択回路３８による選択は、第１および第２入力信号２３、２３1のうちの少なくとも１つの信号に基づくことが好ましい。あるいは、選択回路による選択は、好適な論理演算装置によって制御されてもよい。 Selection by the selection circuit 38 is preferably based on at least one signal of the first and second input signals 23 and 23 1. Alternatively, the selection by the selection circuit may be controlled by a suitable logical operation device.

従って本実施例の高電圧ゲートドライバ集積回路２０は、必要とする外部コンポーネント数を節約しつつ、異なるゲート特性を備える第１および第２ドライバ回路２２，２４を使用する多機能ゲートを供給する。結果として、本実施例の高電圧ゲートドライバ集積回路２０は、多機能ゲートを実施するのに必要な空間を減少させかつコンポーネント数を減少させるのでコストをも節約する。   Therefore, the high voltage gate driver integrated circuit 20 of the present embodiment provides a multifunction gate using the first and second driver circuits 22 and 24 having different gate characteristics while saving the number of required external components. As a result, the high voltage gate driver integrated circuit 20 of this embodiment also saves cost because it reduces the space required to implement the multifunction gate and the number of components.

本発明は、実施例に基づき説明してきたが、特許請求を逸脱しない限り、当該者により、他の変形例も可能である。本発明は、明細書における実施例に限定されるものではない。   Although the present invention has been described based on embodiments, other variations are possible by those skilled in the art without departing from the scope of the claims. The present invention is not limited to the examples in the specification.

多機能ゲートを供給する従来の高電圧ゲートドライバ集積回路の概略図である。1 is a schematic diagram of a conventional high voltage gate driver integrated circuit that provides a multifunction gate. FIG. 本発明による高電圧ゲートドライバ集積回路の１実施形態の概略図である。1 is a schematic diagram of one embodiment of a high voltage gate driver integrated circuit according to the present invention. FIG.

符号の説明Explanation of symbols

１０、２０：高電圧ゲートドライバ集積回路
１２ａ、１２ｂ、２２、２４：ドライバ回路
１４ａ、１４ｂ：電力スイッチ
１６：外部補助回路
２３、２３1：入力信号
３２、３４：バッファ増幅器
３４：内部回路
３６：外部電力スイッチ
３８：選択回路
Ａ、Ｂ：接点
Ｑ１、Ｑ２、Ｑ３、Ｑ４：スイッチ
Ｑ１ａ、Ｑ２ａ、Ｑ１ｂ、Ｑ２ｂ：スイッチ
Ｖｏｕｔ１、Ｖｏｕｔ２：出力電圧信号
Ｖｏｕｔ２1：処理済出力電圧信号
Ｖｏｕｔａ、Ｖｏｕｔｂ：出力電圧信号 10, 20: High-voltage gate driver integrated circuits 12a, 12b, 22, 24: Driver circuits 14a, 14b: Power switch 16: External auxiliary circuits 23, 23 1 : Input signals 32, 34: Buffer amplifier 34: Internal circuit 36: External power switch 38: selection circuit A, B: contacts Q1, Q2, Q3, Q4: switches Q1a, Q2a, Q1b, Q2b: switches Vout1, Vout2: output voltage signal Vout2 1 : processed output voltage signals Vouta, Voutb: output Voltage signal

Claims (10)

第１出力電圧信号を供給可能な第１ドライバ回路と、第２出力電圧信号を供給可能な第２ドライバ回路と、第１出力電圧信号とは異なる特性を備える、処理済出力電圧信号を供給するべく、第２出力電圧信号を処理可能な内部回路と、第１出力電圧信号と処理済出力電圧信号のうちのいずれか１つを、ゲートドライブ信号として選択可能な選択回路とを備える高電圧ゲートドライバ集積回路。   A first driver circuit capable of supplying a first output voltage signal, a second driver circuit capable of supplying a second output voltage signal, and a processed output voltage signal having characteristics different from those of the first output voltage signal Therefore, a high voltage gate comprising an internal circuit capable of processing the second output voltage signal, and a selection circuit capable of selecting any one of the first output voltage signal and the processed output voltage signal as a gate drive signal. Driver integrated circuit. ゲートドライブ信号を外部電力スイッチのゲートに供給して、外部電力スイッチをオンオフするべく、選択回路に接続される外部電力スイッチを更に備える請求項１記載の高電圧ゲートドライバ集積回路。   The high voltage gate driver integrated circuit of claim 1, further comprising an external power switch connected to the selection circuit for supplying a gate drive signal to a gate of the external power switch to turn the external power switch on and off. 第１ドライバ回路が、第１入力信号に基づき第１制御信号を供給可能な第１バッファ増幅器増幅器と、第１高圧側スイッチと、第１低圧側スイッチに直列に接続された、第1接点とを備え、前記第１高圧側スイッチと第１低圧側スイッチが、第１制御信号に基づいて制御され、第１高圧側スイッチと第１低圧側スイッチが第２出力電圧信号を供給する請求項２記載の高電圧ゲートドライバ集積回路。   A first driver amplifier capable of supplying a first control signal based on a first input signal; a first high-voltage switch; a first contact connected in series to the first low-voltage switch; The first high-voltage side switch and the first low-voltage side switch are controlled based on a first control signal, and the first high-voltage side switch and the first low-voltage side switch supply a second output voltage signal. A high voltage gate driver integrated circuit as described. 第２ドライバ回路が、第２入力信号に基づき第２制御信号を供給可能な第２バッファ増幅器増幅器と、第２高圧側スイッチと、第２低圧側スイッチに直列に接続された、第２接点とを備え、前記第２高圧側スイッチと第２低圧側スイッチが、第２制御信号に基づいて制御され、第２高圧側スイッチと第２低圧側スイッチが第２出力電圧信号を供給する請求項３記載の高電圧ゲートドライバ集積回路。   A second driver amplifier capable of supplying a second control signal based on a second input signal; a second high-voltage switch; a second contact connected in series to the second low-voltage switch; The second high-voltage side switch and the second low-voltage side switch are controlled based on a second control signal, and the second high-voltage side switch and the second low-voltage side switch supply a second output voltage signal. A high voltage gate driver integrated circuit as described. 選択回路が、第１入力信号と第２入力信号のうちの少なくとも一つに基づいてゲートドライブ信号としての第１出力電圧信号と処理済出力電圧信号のうちのいずれか１つを選択する、請求項４記載の高電圧ゲートドライバ集積回路。   The selection circuit selects one of the first output voltage signal and the processed output voltage signal as a gate drive signal based on at least one of the first input signal and the second input signal. Item 5. The high voltage gate driver integrated circuit according to Item 4. 内部回路が、第２出力電圧信号へフィードバック制御を導入し処理済出力電圧信号を供給する、請求項５記載の高電圧ゲートドライバ集積回路。   6. The high voltage gate driver integrated circuit of claim 5, wherein the internal circuit introduces feedback control to the second output voltage signal to provide a processed output voltage signal. 選択回路が、処理済出力電圧信号を選択可能で、電力スイッチのゲートへ処理済出力電圧信号を供給しドライバ回路のｄｖ／ｄｔを制御する、請求項６記載の高電圧ゲートドライバ集積回路。   7. The high voltage gate driver integrated circuit according to claim 6, wherein the selection circuit is capable of selecting a processed output voltage signal and supplies the processed output voltage signal to the gate of the power switch to control the dv / dt of the driver circuit. 内部電力スイッチが、オンオフを切り変える、プラズマディスプレイのための走査電圧を制御する、請求項７記載の高電圧ゲートドライバ集積回路。   8. The high voltage gate driver integrated circuit of claim 7, wherein the internal power switch controls a scan voltage for the plasma display that switches on and off. 第１ドライバ回路、第２ドライバ回路、内部回路、および選択回路が１つの集積回路に内蔵される、請求項８記載の高電圧ゲートドライバ集積回路。   9. The high voltage gate driver integrated circuit according to claim 8, wherein the first driver circuit, the second driver circuit, the internal circuit, and the selection circuit are incorporated in one integrated circuit. 第１ドライバ回路および第２ドライバ回路が、１つの集積回路内でアース接続ピンを共有する、請求項９記載の高電圧ゲートドライバ集積回路。   The high voltage gate driver integrated circuit of claim 9, wherein the first driver circuit and the second driver circuit share a ground connection pin within one integrated circuit.
JP2007225666A 2006-09-01 2007-08-31 High voltage gate driver integrated circuit with multifunctional gate Pending JP2008061252A (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06268505A (en) * 1993-03-12 1994-09-22 Toshiba Corp Semiconductor integrated circuit
JP2005122107A (en) * 2003-09-26 2005-05-12 Fujitsu Hitachi Plasma Display Ltd Load drive circuit and display device using the same

Family Cites Families (4)

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Publication number Priority date Publication date Assignee Title
JPH08204526A (en) * 1995-01-23 1996-08-09 Toshiba Corp Gate drive circuit for switching element
KR0166633B1 (en) * 1995-12-15 1999-04-15 윤덕용 Discharge lamp for electronic ballast of signal amplifier type self-gate driving circuit
JP3564893B2 (en) 1996-09-02 2004-09-15 株式会社明電舎 Gate drive circuit for voltage controlled switching element
JP2005051901A (en) 2003-07-31 2005-02-24 Fuji Electric Device Technology Co Ltd Power converter

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06268505A (en) * 1993-03-12 1994-09-22 Toshiba Corp Semiconductor integrated circuit
JP2005122107A (en) * 2003-09-26 2005-05-12 Fujitsu Hitachi Plasma Display Ltd Load drive circuit and display device using the same

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