JP2008064857A - Method for manufacturing reflective liquid crystal display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve luminance and to obtain a seamless image (less in clearance gap), by making reflection light rays from a light-shielding layer existing directly below a pixel separation region contribute to the improvement of reflectance. <P>SOLUTION: In the method of manufacturing an active matrix substrate comprising a plurality of switch elements 5 arranged on a semiconductor substrate; a plurality of reflection electrodes 113 arranged on the upper side of the plurality of switch elements 5; and light-shielding layers 110 arranged in between the plurality of switch elements 5 and the plurality of reflecting electrodes 113 and, according to the voids at least between the plurality of reflection electrodes 113, the light-shielding layers 110 are formed by Damascene method. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a reflective liquid crystal display panel, and more particularly to a method for manufacturing a reflective liquid crystal display panel for obtaining a high-quality display image.

  In recent years, a large screen has been developed in a home liquid crystal display.

  Large screen liquid crystal display can be roughly classified into a transmission type and a reflection type.

  The former is a method of projecting light transmitted through a liquid crystal panel in which pixels comprising thin film transistors and transparent electrodes are arranged in a matrix, and the latter is a method of projecting light reflected by the liquid crystal panel.

  In a projection type liquid crystal display device, displaying an image with high resolution is an important issue.

  In order to increase the resolution of an image, the number of pixels of the display panel is increased.

  When the number of pixels is increased without changing the size of the display panel, the ratio of the area occupied by the transistors and wirings that control the voltage of the reflective electrode in one pixel increases.

  The transmissive type has a drawback that the aperture ratio is reduced and the luminance of the image is lowered. On the other hand, the reflective type can arrange transistors and wirings below the reflective electrode layer.

  Therefore, the number of pixels can be increased without reducing the aperture ratio, and an image with high luminance and high resolution can be displayed.

  Therefore, a reflection type image display apparatus that is small in size and high in density is more suitable for an enlarged projection image display apparatus.

  FIG. 10 is a cross-sectional view showing the structure of a conventional reflective liquid crystal display panel described in Patent Document 1. In FIG.

  In a reflective liquid crystal display panel, generally, the amount of incident light per unit area increases as pixels become finer.

  For this reason, if light leaks from the gap between the pixels and light enters the depletion layer of the transistor, which is a switching element for driving the reflective electrode provided for each pixel, it causes a voltage shift, resulting in deterioration of image quality. The problem of being connected is likely to occur.

However, in this reflection type liquid crystal panel, the direct incident light reaches the substrate surface by providing the light shielding layer 204 at least directly below the gap 213 according to the gap 213 of the reflective electrode 208 serving as a pixel separation region. It is preventing.
JP 2004-133147 A

  However, the above prior art has the following difficulties.

  That is, with the miniaturization of pixels, the occupancy rate of the pixel separation region cannot be ignored, which is becoming an impediment to improving luminance and obtaining a seamless (small gap) image.

  Therefore, there is a method of improving the reflectance of the pixel by forming the surface of the light shielding layer with a highly reflective metal such as Al or Ag. In this case, unless the distance between the surface of the light shielding layer and the surface of the reflective electrode is precisely controlled, the reflected light from the reflective electrode and the reflected light from the light shielding layer cause interference, and conversely, the reflectance decreases.

  FIG. 2 shows the distance between the surface of the light-shielding layer and the surface of the reflective electrode and the incidence when the pixel pitch is 8 μm and the pixel separation region is 0.3 μm (aperture ratio 92.6%) when the reflectance of the light-shielding layer is 90%. It is a graph which shows the relationship of the reflectance in the wavelength of light 550nm.

  In the case where there is no reflection contribution from the light shielding layer, if the reflectance of the reflective electrode material is 90%, the reflectance of the entire pixel is 83%.

  From FIG. 2, even when a highly reflective film material having a light-shielding layer with a reflectance of 90% is used, the film thickness range in which the overall reflectance of the pixel is 83% or more is, for example, ± 5% (± 195)).

  In this range, a maximum improvement in reflectance of about 5% can be expected. On the other hand, outside this region, there are cases where it is lower than when there is no reflection contribution from the light shielding layer.

  That is, using a high reflectance material for the light shielding layer to improve the reflectance of the entire pixel can be achieved only with a limited structure.

  The factors that determine the distance between the light shielding layer surface and the reflective electrode surface are the film thickness of the interlayer insulating film and the film thickness of the reflective electrode existing between the light shielding layer and the reflective electrode.

  Conventionally, when an interlayer insulating film is formed on a light shielding layer, it is common to form an interlayer insulating film material and then planarize the interlayer insulating film by CMP (chemical mechanical polishing).

  However, the film thickness control by CMP has the following problems inherent to the CMP process.

That is, in planarizing the interlayer insulating film by CMP,
1) Since the pressure of the polishing cloth against the substrate on which the polishing rate is likely to vary depending on the polishing member is not uniform over the entire surface of the wafer, the in-plane uniformity of the polishing rate is likely to be impaired.

  2) There is a problem that the polishing rate changes due to the density of the pattern of the film to be polished, that is, the pattern density of the light shielding layer, causing uneven film thickness in the wafer surface. Therefore, it is difficult to control the film thickness of the interlayer insulating film that is uniform over the entire wafer surface, specifically, the level of ± 5% or less.

  On the other hand, there is a method in which an interlayer insulating film is formed by film formation without performing the above planarization.

  However, in this case, since the reflective electrode is formed with the step formed by the light shielding layer pattern remaining, the reflective electrode cannot be flattened.

  For this reason, a partial region of the reflective electrode has irregularities, and as a result, the reflectance is lowered.

  Therefore, it has been difficult in the prior art to form an interlayer insulating film on the light shielding layer with high precision film thickness control and to form the reflective electrode with high flatness.

  Accordingly, the present invention provides a reflective liquid crystal display panel that improves brightness and provides a seamless (small gap) image by contributing reflected light from a light-shielding layer located directly under a pixel separation region to improve the reflectance. It is in providing the manufacturing method of.

  As means for solving the above-mentioned problems, the present invention provides a plurality of switch elements disposed on a semiconductor substrate, a plurality of reflective electrodes disposed above the plurality of switch elements, the plurality of switch elements, A light shielding layer disposed between the plurality of reflective electrodes and at least according to a gap between the plurality of reflective electrodes, wherein the light shielding layer is formed by a damascene method. It is characterized by that.

  According to the present invention, since the metal wiring layer of the light shielding layer is formed by the damascene process, the distance between the light shielding layer surface and the reflective electrode surface can be controlled with high accuracy.

  As a result, the reflected light from the light-shielding layer located immediately below the pixel separation region contributes to the improvement of the reflectance, thereby improving the luminance and obtaining a seamless (small gap) image.

  In addition, since the insulating layer between the light shielding layer and the reflective electrode layer can be formed without using CMP planarization, the film thickness can be controlled to be thin.

  As a result, a large charge capacity can be secured between the light shielding layer and the reflective electrode layer, so that an excellent signal holding characteristic of the reflective electrode can be obtained.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS The best mode for carrying out the present invention will be described below with reference to the accompanying drawings.

  FIG. 1 is an enlarged cross-sectional view of a pixel portion of a liquid crystal display panel manufactured by a reflective liquid crystal display panel manufacturing method as one embodiment of the present invention.

  In the present embodiment, a MOS-FET 5 including a gate electrode 5g, a source electrode 5s, and a drain electrode 5d and a MOS capacitor portion 6 including an upper electrode 6a and a lower electrode 6b are formed on the Si substrate 101.

  The drain electrode 5 d of the MOS-FET 5 is connected to the MOS capacitor unit 6 via the first connection unit 105 and the signal line 106.

  The upper electrode 6 a of the MOS capacitor unit 6 is connected to the reflective electrode 113 through the first connection unit 105, the signal line 106, the second connection unit 108, and the third connection unit 112.

  The reflective electrode 113 reflects incident light from the counter substrate 118 side and selectively applies a driving voltage to the liquid crystal layer 116.

  The reflective electrode 113 has a high reflectance of 90% or more in the visible light region. As a material, an aluminum metal film (hereinafter abbreviated as AlSi) to which silicon used as an LSI metal wiring material is added by several weight% or less or an aluminum metal film (hereinafter abbreviated as AlCu) to which copper is added by several weight% or less is used. Is used.

  Further, a light shielding layer 110 is formed to prevent incident light entering from the inter-pixel region 113a of the reflective electrode 113 from reaching the MOS-FET 5.

  The distance between the surface of the light shielding layer 110 and the surface of the reflective electrode 113 is determined by the sum of the thickness of the insulator layer 114 between the light shielding layer 110 and the reflective electrode 113 and the thickness of the reflective film.

  In general, the insulating layer is formed by a plasma CVD method or an atmospheric pressure CVD method, but the film formation rate is determined by the raw material gas flow rate, pressure, time, etc., and a highly reproducible film thickness can be obtained.

  The reflective electrode is formed by sputtering, which is also determined by the RF output, pressure, time, etc., and a highly reproducible film thickness can be obtained. In any method, control at a level of ± 5% or less at the mass production level is a sufficiently possible technique including uniformity within a wafer surface and between wafers.

  For this reason, for example, for a wavelength of 550 nm, which is a green monochromatic light source, the sum of the thickness of the interlayer insulating film between the light shielding layer and the reflective electrode and the thickness of the reflective film is 5694 ± 285 mm in optical distance. Sometimes, the effect of improving the reflectance is obtained.

  Next, a manufacturing method of the reflective liquid crystal display panel shown in FIG. 1 will be described with reference to FIGS. 3 to 9, each component indicated by the same reference numeral as that used in FIG. 1 corresponds to the same element.

  As shown in FIG. 3, a gate electrode 5g is formed on an Si substrate 101 via an insulating film 103, and a source 5s and a drain 5d are formed on both sides of the gate electrode 5g by ion implantation or the like.

  At the same time, the upper electrode 6a and the lower electrode 6b of the MOS capacitor unit 6 are formed.

  Next, a first insulating film 104 made of a material such as NSG (Nondoped Silica Glass) or BPSG (Boron doped Phospho Silicate Glass) is formed by a low pressure CVD method or a normal pressure CVD method.

  Then, planarization is performed by a CMP (Chemical Mechanical Polishing) method or a resist etch back method.

  Further, a portion to be the first connection hole 105 is opened by photolithography and dry etching. Then, a barrier metal made of Ti (titanium), TiN (titanium nitride) or the like and W (tungsten) were formed, and a first connection hole 105 was formed by a W etchback or W-CMP process.

  Next, as shown in FIG. 4, the signal line 106 is formed by sputtering using AlSi or AlCu, and the first metal wiring 106 is formed by photolithography and dry etching.

  A second interlayer insulating film 107 is formed by a plasma CVD method or the like, and a portion to be the second connection hole 108 is opened by photolithography and dry etching. Then, a barrier metal made of Ti (titanium), TiN (titanium nitride) or the like and W (tungsten) were formed, and a first connection hole 108 was formed by a W etchback or W-CMP process.

  Next, the light shielding layer 110 is formed by a damascene method described later.

  Specifically, as shown in FIG. 5, after the third interlayer insulating film 109 is formed, a part thereof, that is, a region where the light shielding layer 110 is formed is removed by dry etching to form a light shielding layer forming region. An opening 109d is formed.

  Thereafter, as shown in FIG. 6, after depositing a barrier metal made of Ti (titanium), TiN (titanium nitride) or the like, AlSi or AlCu is formed by sputtering.

  Thereafter, as shown in FIG. 7, AlSi or AlCu other than the metal wiring region is removed by Al-CMP to form the light shielding layer 110.

  Then, as shown in FIG. 8, a fourth interlayer insulating film 111 is formed by a plasma CVD method or the like. Here, the thickness of the fourth interlayer insulating film 111 is set to be 1875 mm.

  Next, a portion to be the third connection hole 112 was opened by photolithography and dry etching.

  Subsequently, as shown in FIG. 9, a barrier metal made of Ti (titanium), TiN (titanium nitride) and the like and W (tungsten) are formed, and the third connection hole 112 is formed by W etch back or W-CMP. Formed.

  Thereafter, in order to form the reflective electrode 113, an AlSi or AlCu layer was formed by a sputtering method. At this time, the thickness of the reflective electrode was set to 2000 mm.

  Thereafter, the reflective electrode pattern 113 is formed by photolithography and dry etching.

  Furthermore, the insulator layer 114 is formed by a plasma CVD method and, if necessary, a CMP method or a resist etch back method.

  Next, as shown in FIG. 1, an alignment film 115 for imparting alignment to the liquid crystal layer 116 is formed.

  After that, a counter substrate 118 on which a counter electrode 117 made of a transparent conductive material such as ITO (indium tin oxide film) or the like separately formed is opposed through a sealant, and a liquid crystal is injected from a liquid crystal injection port to liquid crystal. Layer 2 is formed.

  Finally, a reflective liquid crystal display panel is manufactured by sealing the liquid crystal injection port.

  In the present embodiment, the distance between the surface of the light shielding layer and the surface of the reflective electrode that provides a high reflectance is set assuming a green monochromatic light source in a three-plate reflective liquid crystal display panel.

  Since the optimum distance between the surface of the light shielding layer and the surface of the reflective electrode is different for each of the blue and red monochromatic light sources, the thickness of the fourth interlayer insulating film and the thickness of the reflective electrode are separately set. Must be set. However, other methods are the same as in the above embodiment.

  Here, the damascene method will be described.

  The damascene method is a kind of metal film forming method. After forming a groove pattern in the underlying insulating film in advance, a conductive film is formed on the entire surface of the insulating film, and the surface of the formed conductive film is polished to form a wiring layer embedded in the groove portion. It refers to the technology to be formed.

  There are two types of damascene methods: single damascene method and dual damascene method.

  In the single damascene method, only the wiring layer embedded in the underlying insulating layer is formed by the damascene method.

  In the dual damascene method, a wiring layer embedded in a base insulating layer is formed, and at the same time, a metal layer of a contact hole or a through hole (or via hole) is formed by the damascene method. In the dual damascene method, first, a contact hole or a through hole and a groove pattern for a wiring layer are formed in advance in a base insulating layer. Thereafter, a conductive film made of metal or the like is formed on the entire surface, and the surface of the formed conductive film is polished to form a wiring layer buried in the groove, a contact hole, a through hole, or the like. .

  The present invention is applicable to a reflective liquid crystal display panel used for a projection display or the like.

It is an expanded sectional view of the pixel part of the liquid crystal display panel manufactured with the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. When the pixel pitch is 8 μm and the pixel separation region is 0.3 μm (aperture ratio 92.6%) when the reflectance of the light shielding layer is 90%, the distance between the surface of the light shielding layer and the surface of the reflective electrode and the wavelength of incident light are as follows. It is a graph which shows the relationship of the reflectance in 550 nm. It is an expanded sectional view which shows the process of the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. It is an expanded sectional view which shows the process of the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. It is an expanded sectional view which shows the process of the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. It is an expanded sectional view which shows the process of the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. It is an expanded sectional view which shows the process of the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. It is an expanded sectional view which shows the process of the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. It is an expanded sectional view which shows the process of the manufacturing method of the reflection type liquid crystal display panel as one Embodiment of this invention. It is sectional drawing which shows the structure of the conventional reflection type liquid crystal display panel.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Active element substrate 2 Liquid crystal layer 3 Transparent substrate 101 Si substrate (substrate)
5 MOS-FET (switching element)
5s source (input terminal)
5g Gate (control terminal)
5d drain (output terminal)
6 MOS capacitor part (charge storage capacitor part)
6a MOS capacitor upper electrode 6b MOS capacitor lower electrode 102 Separation insulating part 105 Contact hole 108, 112 Via hole 104, 107, 109, 111, 114 Insulator layer 106 Signal line 110 Light shielding layer 113 Reflective electrode layer 115 Alignment layer 116 Liquid crystal layer 117 Counter electrode 118 Counter substrate

Claims (2)

A plurality of switch elements disposed on a semiconductor substrate; a plurality of reflective electrodes disposed above the plurality of switch elements; and between the plurality of switch elements and the plurality of reflective electrodes, and at least the plurality of the plurality of switch elements. In a manufacturing method of an active matrix substrate, including a light shielding layer arranged according to a gap between the reflective electrodes,
The method of manufacturing an active matrix substrate, wherein the light shielding layer is formed by a damascene method. The method for manufacturing an active matrix substrate according to claim 1, further comprising an interlayer insulating film between the light shielding layer and the reflective electrode.

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