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JP2008072537A - Delay filter - Google Patents

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JP2008072537A
JP2008072537A JP2006250247A JP2006250247A JP2008072537A JP 2008072537 A JP2008072537 A JP 2008072537A JP 2006250247 A JP2006250247 A JP 2006250247A JP 2006250247 A JP2006250247 A JP 2006250247A JP 2008072537 A JP2008072537 A JP 2008072537A
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resonator
delay filter
resonators
input terminal
output terminal
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JP4757154B2 (en
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Jun Hayashi
潤 林
Naoki Miyazawa
直樹 宮澤
Hiroyuki Morikado
博行 森角
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Soshin Electric Co Ltd
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Soshin Electric Co Ltd
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Abstract

【課題】簡単な構成で、通過帯域内における群遅延時間特性の平坦性を改善できると共に、挿入損失の劣化を抑制して通過帯域を広げることができるようにし、しかも、小型化並びに歩留まりの向上を促進させる。
【解決手段】遅延フィルタ10は、入力端子12と、出力端子14と、これら入力端子12及び出力端子14間に電気的に接続された複数のλ/4共振器(第1共振器16A〜第4共振器16D)を有し、第1共振器16A〜第4共振器16D間が容量結合されたバンドパスフィルタ18を具備する。さらに、入力端子12に隣接する第1共振器16Aと出力端子14に隣接する第4共振器16Dとを容量結合する第5容量C5を具備した第1回路20と、第1共振器16A〜第4共振器16Dのうち、出力端子14に隣接する第4共振器16Dと入力端子12とを容量結合する第6容量C6を具備した第2回路22とを有する。
【選択図】図1
The flatness of the group delay time characteristic in the passband can be improved with a simple configuration, the passband can be widened by suppressing the deterioration of the insertion loss, and the size is reduced and the yield is improved. To promote.
A delay filter 10 includes an input terminal 12, an output terminal 14, and a plurality of λ / 4 resonators (first resonator 16A to first resonator 16) electrically connected between the input terminal 12 and the output terminal 14. And a band-pass filter 18 having a first resonator 16A to a fourth resonator 16D that are capacitively coupled to each other. Further, the first circuit 20 including the fifth capacitor C5 that capacitively couples the first resonator 16A adjacent to the input terminal 12 and the fourth resonator 16D adjacent to the output terminal 14; Among the four resonators 16D, the second circuit 22 includes a fourth resonator 16D adjacent to the output terminal 14 and a sixth capacitor C6 that capacitively couples the input terminal 12.
[Selection] Figure 1

Description

本発明は、入力端子と出力端子との間に複数の共振器を有し、前記複数の共振器間が容量結合されたバンドパスフィルタを具備した遅延フィルタに関する。   The present invention relates to a delay filter including a plurality of resonators between an input terminal and an output terminal, and a bandpass filter in which the plurality of resonators are capacitively coupled.

近時、例えば移動体通信システム等の基地局無線装置に使用される基地局の低歪化のための歪補償型増幅器においては、歪検出や歪抑圧を目的として遅延フィルタが用いられている。   Recently, in a distortion compensation amplifier for reducing distortion of a base station used in a base station radio apparatus such as a mobile communication system, a delay filter is used for the purpose of distortion detection and distortion suppression.

遅延フィルタ200は、例えば図13に示すように、入力端子202及び出力端子204と複数の共振器206A〜206Iを有するバンドパスフィルタ208を具備する。そして、入力端子202と初段の共振器206Aが容量C1で結合され、出力端子204と最終段の共振器206Iが容量C2で結合され、さらに、各共振器206A〜206Iがそれぞれ容量C3〜C10で結合されている。   As shown in FIG. 13, for example, the delay filter 200 includes a band pass filter 208 having an input terminal 202, an output terminal 204, and a plurality of resonators 206A to 206I. The input terminal 202 and the first-stage resonator 206A are coupled by a capacitor C1, the output terminal 204 and the last-stage resonator 206I are coupled by a capacitor C2, and the resonators 206A to 206I are respectively coupled by capacitors C3 to C10. Are combined.

また、従来では、図14に示すように、図13に示す遅延フィルタ200と同様の遅延フィルタ210において、隣接する共振器206A〜206G間の結合容量C3〜C8と並列に接続され、且つ、複数の結合容量C9〜C19を有する飛び越し回路212が接続された例(例えば特許文献1参照)等が知られている。   Further, conventionally, as shown in FIG. 14, in a delay filter 210 similar to the delay filter 200 shown in FIG. 13, a plurality of coupling capacitors C3 to C8 between adjacent resonators 206A to 206G are connected in parallel, and An example in which an interlace circuit 212 having a plurality of coupling capacitors C9 to C19 is connected (see, for example, Patent Document 1) is known.

図14の例では、共振器の段数を増加させることなく、バンドパスフィルタ208における通過帯域内の群遅延時間の平坦性を確保でき、群遅延時間偏差を小さくすることができるという効果を奏する。   In the example of FIG. 14, the flatness of the group delay time in the pass band in the bandpass filter 208 can be ensured without increasing the number of resonator stages, and the group delay time deviation can be reduced.

特開2001−257505号公報JP 2001-257505 A

ところで、図14に示す遅延フィルタ210は、共振器の段数を増加させることなく、通過帯域内の群遅延時間の平坦性を確保できると共に、群遅延時間偏差を小さくすることができるが、飛び越し回路212を構成する回路素子数が多くなることから、結果的にサイズの増大化、挿入損失の劣化及び歩留まりの低下を招くという問題がある。また、飛び越し回路212を設けない図13に示す遅延フィルタ200と比して遅延量がほとんど変わらず、また、通過帯域もほとんど変わらないという問題もある。   Incidentally, the delay filter 210 shown in FIG. 14 can ensure the flatness of the group delay time in the passband and increase the group delay time deviation without increasing the number of resonator stages. Since the number of circuit elements constituting 212 is increased, there is a problem that as a result, the size is increased, the insertion loss is degraded, and the yield is decreased. Further, there is a problem that the delay amount is hardly changed and the pass band is hardly changed as compared with the delay filter 200 shown in FIG. 13 in which the interlace circuit 212 is not provided.

本発明はこのような課題を考慮してなされたものであり、簡単な構成で、通過帯域内における群遅延時間特性の平坦性を改善できると共に、挿入損失の劣化を抑制して通過帯域を広げることができ、しかも、小型化並びに歩留まりの向上を促進させることができる遅延フィルタを提供することを目的とする。   The present invention has been made in consideration of such problems. With a simple configuration, the flatness of the group delay time characteristic in the passband can be improved, and the passband can be widened by suppressing deterioration of insertion loss. It is another object of the present invention to provide a delay filter that can reduce the size and improve the yield.

本発明に係る遅延フィルタは、入力端子と出力端子との間に複数の共振器を有し、前記複数の共振器間が容量結合されたバンドパスフィルタを具備した遅延フィルタにおいて、前記入力端子及び前記出力端子のうち、いずれか一方の端子と、前記複数の共振器のうち、少なくとも1つの共振器とを容量結合する回路を有することを特徴とする。   The delay filter according to the present invention includes a bandpass filter having a plurality of resonators between an input terminal and an output terminal, wherein the plurality of resonators are capacitively coupled. A circuit that capacitively couples any one of the output terminals and at least one of the plurality of resonators is provided.

これにより、簡単な構成で、通過帯域内における群遅延時間特性の平坦性を改善できると共に、挿入損失の劣化を抑制して通過帯域を広げることができ、しかも、小型化並びに歩留まりの向上を促進させることができる。   As a result, the flatness of the group delay time characteristics in the passband can be improved with a simple configuration, and the passband can be widened by suppressing the deterioration of the insertion loss, and further, the miniaturization and the improvement of the yield are promoted. Can be made.

ここで、通過帯域内における群遅延時間特性の平坦性とは、周波数−群遅延時間特性において、通過帯域中、所定の群遅延時間偏差(例えば0.5ns)内に収まる帯域を示す。また、通過帯域は、周波数−減衰量特性において、所定の挿入損失偏差(例えば0.2dB)内に収まる帯域を示す。   Here, the flatness of the group delay time characteristic in the pass band indicates a band that falls within a predetermined group delay time deviation (for example, 0.5 ns) in the pass band in the frequency-group delay time characteristic. The pass band indicates a band that falls within a predetermined insertion loss deviation (for example, 0.2 dB) in the frequency-attenuation characteristic.

そして、本発明において、前記複数の共振器のうち、少なくとも1つの共振器を跨るように2つの共振器間を容量結合する回路を有することが好ましい。この場合、通過帯域内における群遅延時間特性の平坦性をさらに改善させることができる。   And in this invention, it is preferable to have a circuit which carries out the capacitive coupling between two resonators so that at least 1 resonator may be straddled among the several resonators. In this case, the flatness of the group delay time characteristic in the passband can be further improved.

また、本発明において、前記複数の共振器のうち、少なくとも1つの共振器を跨るように2つの共振器間を容量結合する回路は、前記入力端子に隣接する共振器と、前記出力端子に隣接する共振器とを容量結合するようにしてもよい。   In the present invention, a circuit that capacitively couples two resonators so as to straddle at least one of the plurality of resonators is adjacent to the resonator adjacent to the input terminal and the output terminal. The resonator to be coupled may be capacitively coupled.

また、本発明において、前記入力端子及び前記出力端子のうち、いずれか一方の端子と、前記複数の共振器のうち、少なくとも1つの共振器とを容量結合する回路は、前記入力端子と、前記複数の共振器のうち、前記出力端子に隣接する共振器とを容量結合するようにしてもよいし、あるいは、前記出力端子と、前記複数の共振器のうち、前記入力端子に隣接する共振器とを容量結合するようにしてもよい。   In the present invention, a circuit that capacitively couples one of the input terminal and the output terminal and at least one of the plurality of resonators includes the input terminal, Among the plurality of resonators, the resonator adjacent to the output terminal may be capacitively coupled, or the output terminal and the resonator adjacent to the input terminal among the plurality of resonators. May be capacitively coupled.

なお、前記共振器は、λ/4共振器、λ/2共振器又はLC共振回路であってもよい。   The resonator may be a λ / 4 resonator, a λ / 2 resonator, or an LC resonance circuit.

以上説明したように、本発明に係る遅延フィルタによれば、簡単な構成で、通過帯域内における群遅延時間特性の平坦性を改善できると共に、挿入損失の劣化を抑制して通過帯域を広げることができ、しかも、小型化並びに歩留まりの向上を促進させることができる。   As described above, according to the delay filter of the present invention, the flatness of the group delay time characteristic in the passband can be improved with a simple configuration, and the passband can be widened by suppressing the deterioration of the insertion loss. In addition, downsizing and improvement in yield can be promoted.

以下、本発明に係る遅延フィルタの実施の形態例を図1〜図12を参照しながら説明する。   Hereinafter, embodiments of the delay filter according to the present invention will be described with reference to FIGS.

本実施の形態に係る遅延フィルタ10は、図1に示すように、入力端子12と、出力端子14と、これら入力端子12及び出力端子14間に電気的に接続された複数のλ/4共振器(第1共振器16A〜第4共振器16D)を有し、第1共振器16A〜第4共振器16D間が容量結合されたバンドパスフィルタ18を具備する。   As shown in FIG. 1, the delay filter 10 according to the present embodiment includes an input terminal 12, an output terminal 14, and a plurality of λ / 4 resonances electrically connected between the input terminal 12 and the output terminal 14. And a band-pass filter 18 having a first resonator 16A to a fourth resonator 16D and capacitively coupled between the first resonator 16A and the fourth resonator 16D.

具体的には、バンドパスフィルタ18は、入力端子12と該入力端子12に隣接する第1共振器16Aとが容量C0で結合され、第1共振器16Aと該第1共振器16Aに隣接する第2共振器16Bとが第1容量C1で結合され、第2共振器16Bと該第2共振器16Bに隣接する第3共振器16Cとが第2容量C2で結合され、第3共振器16Cと該第3共振器16Cに隣接する第4共振器16Dとが第3容量C3で結合され、第4共振器16Dと該第4共振器16Dに隣接する出力端子14とが第4容量C4で結合されて構成されている。   Specifically, in the band-pass filter 18, the input terminal 12 and the first resonator 16A adjacent to the input terminal 12 are coupled by a capacitor C0, and the first resonator 16A and the first resonator 16A are adjacent to each other. The second resonator 16B is coupled by the first capacitor C1, the second resonator 16B and the third resonator 16C adjacent to the second resonator 16B are coupled by the second capacitor C2, and the third resonator 16C. And the fourth resonator 16D adjacent to the third resonator 16C are coupled by the third capacitor C3, and the fourth resonator 16D and the output terminal 14 adjacent to the fourth resonator 16D are coupled by the fourth capacitor C4. Composed and configured.

さらに、この遅延フィルタ10は、入力端子12に隣接する第1共振器16Aと出力端子14に隣接する第4共振器16Dとを容量結合する第5容量C5を具備した第1回路20と、第1共振器16A〜第4共振器16Dのうち、出力端子14に隣接する第4共振器16Dと入力端子12とを容量結合する第6容量C6を具備した第2回路22とを有する。   Further, the delay filter 10 includes a first circuit 20 having a fifth capacitor C5 that capacitively couples the first resonator 16A adjacent to the input terminal 12 and the fourth resonator 16D adjacent to the output terminal 14, and Among the first resonator 16A to the fourth resonator 16D, the second resonator 22 includes a fourth resonator 16D adjacent to the output terminal 14 and a sixth capacitor C6 that capacitively couples the input terminal 12.

つまり、遅延フィルタ10は、図2に示すように、バンドパスフィルタ18に第1回路20が接続された第1遅延フィルタ100Aと、図3に示すように、バンドパスフィルタ18に第2回路22が接続された第2遅延フィルタ100Bとが複合化された回路構成を有する。   That is, the delay filter 10 includes a first delay filter 100A in which the first circuit 20 is connected to the bandpass filter 18 as shown in FIG. 2, and a second circuit 22 in the bandpass filter 18 as shown in FIG. And a second delay filter 100B connected to each other has a composite circuit configuration.

ここで、第1遅延フィルタ100Aと第2遅延フィルタ100Bの周波数−減衰量特性及び周波数−群遅延時間特性を説明してから、本実施の形態に係る遅延フィルタ10の周波数−減衰量特性及び周波数−群遅延時間特性を説明する。   Here, after describing the frequency-attenuation characteristic and the frequency-group delay time characteristic of the first delay filter 100A and the second delay filter 100B, the frequency-attenuation characteristic and frequency of the delay filter 10 according to the present embodiment. -Explain the group delay time characteristics.

先ず、図2に示す第1遅延フィルタ100Aの周波数−減衰量特性を図4に示し、周波数−群遅延時間特性を図5に示す。これらの図4及び図5において、破線Aは第5容量C5の値を0pFとした場合の特性を示し、二点鎖線Bは第5容量C5の値を0.1pFとした場合の特性を示し、一点鎖線Cは第5容量C5の値を0.2pFとした場合の特性を示し、実線Dは第5容量C5の値を0.3pFとした場合の特性を示す。   First, FIG. 4 shows frequency-attenuation characteristics of the first delay filter 100A shown in FIG. 2, and FIG. 5 shows frequency-group delay time characteristics. 4 and 5, the broken line A indicates the characteristic when the value of the fifth capacitor C5 is 0 pF, and the two-dot chain line B indicates the characteristic when the value of the fifth capacitor C5 is 0.1 pF. The alternate long and short dash line C indicates the characteristics when the value of the fifth capacitor C5 is 0.2 pF, and the solid line D indicates the characteristics when the value of the fifth capacitor C5 is 0.3 pF.

図4からわかるように、第5容量C5の値を増加するにつれて、通過帯域が拡大している。また、図5からわかるように、第5容量C5が0pFのとき、通過帯域のほぼ中心周波数において群遅延時間が極小値となる特性曲線(破線A参照)であったが、第5容量C5が増加するにつれて、ほぼ中心周波数に対応した群遅延時間が徐々に増加すると共に、中心周波数よりも低域側の特性が中心周波数に対応した群遅延時間よりも大きい値となるように増加している。   As can be seen from FIG. 4, as the value of the fifth capacitor C5 is increased, the passband is expanded. Further, as can be seen from FIG. 5, when the fifth capacitor C5 is 0 pF, the characteristic curve (see the broken line A) in which the group delay time becomes a minimum value at the substantially center frequency of the passband is shown. As it increases, the group delay time corresponding to the center frequency gradually increases, and the characteristics on the lower frequency side than the center frequency are increased so as to be larger than the group delay time corresponding to the center frequency. .

一方、中心周波数よりも高域側の特性は群遅延時間が徐々に短くなり、特に、中心周波数から約25MHzだけ高い周波数の群遅延時間は特定の値をとるようになる。つまり、第5容量C5の値が増加するにつれて、全体として右下がりの特性で、且つ、上方に盛り上がった特性になる。   On the other hand, the group delay time is gradually shortened in the characteristics on the higher frequency side than the center frequency. In particular, the group delay time at a frequency higher by about 25 MHz from the center frequency takes a specific value. That is, as the value of the fifth capacitor C5 increases, the characteristic decreases as a whole and rises upward.

なお、図2に示す第1遅延フィルタ100Aにおいて、第5容量C5を0pFとした場合は、図6に示すように、図13の従来例に係る回路とほぼ同様の構成を有する遅延フィルタ100Cになる。   In the first delay filter 100A shown in FIG. 2, when the fifth capacitor C5 is set to 0 pF, as shown in FIG. 6, the delay filter 100C having almost the same configuration as the circuit according to the conventional example of FIG. Become.

次に、図3に示す第2遅延フィルタ100Bの特性について説明する。第2遅延フィルタ100Bの周波数−減衰量特性を図7に示し、周波数−群遅延時間特性を図8に示す。これらの図7及び図8において、破線Eは第6容量C6の値を0pFとした場合の特性を示し、二点鎖線Fは第6容量C6の値を0.1pFとした場合の特性を示し、一点鎖線Gは第6容量C6の値を0.2pFとした場合の特性を示し、実線Hは第6容量C6の値を0.3pFとした場合の特性を示す。   Next, the characteristics of the second delay filter 100B shown in FIG. 3 will be described. FIG. 7 shows frequency-attenuation characteristics of the second delay filter 100B, and FIG. 8 shows frequency-group delay time characteristics. 7 and 8, the broken line E indicates the characteristic when the value of the sixth capacitor C6 is 0 pF, and the two-dot chain line F indicates the characteristic when the value of the sixth capacitor C6 is 0.1 pF. The alternate long and short dash line G indicates the characteristics when the value of the sixth capacitor C6 is 0.2 pF, and the solid line H indicates the characteristics when the value of the sixth capacitor C6 is 0.3 pF.

図7からわかるように、第6容量C6の値を増加するにつれて、通過帯域はそれほど変化はないが、特性の裾野の部分が拡大している。また、図8からわかるように、第6容量C6が0pFのとき、通過帯域のほぼ中心周波数において群遅延時間が極小値となる特性曲線(破線E参照)であったが、第6容量C6が増加するにつれて、ほぼ中心周波数に対応した群遅延時間が徐々に増加すると共に、中心周波数よりも高域側の特性が中心周波数に対応した群遅延時間よりも大きい値となるように増加している。   As can be seen from FIG. 7, as the value of the sixth capacitor C6 increases, the passband does not change much, but the base of the characteristic expands. Further, as can be seen from FIG. 8, when the sixth capacitor C6 is 0 pF, the characteristic curve (see the broken line E) at which the group delay time becomes a minimum value at almost the center frequency of the passband is shown. As it increases, the group delay time corresponding to the center frequency gradually increases, and the characteristics on the higher frequency side than the center frequency are increased so as to be larger than the group delay time corresponding to the center frequency. .

一方、中心周波数よりも低域側の増加率は、高域側の増加率よりも小さく、特に、中心周波数から約25MHzだけ低い周波数の群遅延時間は特定の値をとるようになる。つまり、第6容量C6の値が増加するにつれて、全体として右上がりの特性で、且つ、上方に盛り上がった特性になる。   On the other hand, the increase rate on the lower frequency side than the center frequency is smaller than the increase rate on the higher frequency side. In particular, the group delay time at a frequency lower by about 25 MHz from the center frequency takes a specific value. That is, as the value of the sixth capacitor C6 increases, the overall characteristic increases to the right and rises upward.

そして、本実施の形態に係る遅延フィルタ10は、上述した第1遅延フィルタ100Aの特性と第2遅延フィルタ100Bの特性を組み合わせた特性になる。すなわち、第1回路20の第5容量C5の値と、第2回路22の第6容量C6の値を適宜選定することによって、図9の実線Iに示すように、通過帯域を従来の場合(破線J参照)よりも大幅に広くすることができ、図10の実線Kに示すように、通過帯域内において、群遅延時間がほぼ一定の値をとる範囲(帯域)を、従来の場合(破線M参照)よりも大幅に拡張させることができる。   The delay filter 10 according to the present embodiment has a combination of the characteristics of the first delay filter 100A and the characteristics of the second delay filter 100B. That is, by appropriately selecting the value of the fifth capacitor C5 of the first circuit 20 and the value of the sixth capacitor C6 of the second circuit 22, as shown by the solid line I in FIG. As shown by the solid line K in FIG. 10, the range (band) in which the group delay time takes a substantially constant value within the pass band is shown in the conventional case (broken line). (See M)).

このように、本実施の形態に係る遅延フィルタ10においては、簡単な構成で、通過帯域内における群遅延時間特性の平坦性を改善できると共に、挿入損失の劣化を抑制して通過帯域を広げることができ、しかも、小型化並びに歩留まりの向上を促進させることができる。   As described above, the delay filter 10 according to the present embodiment can improve the flatness of the group delay time characteristic in the pass band with a simple configuration, and can suppress the deterioration of the insertion loss and widen the pass band. In addition, downsizing and improvement in yield can be promoted.

上述の例では、第2回路22の第6容量C6で、第1共振器16A〜第4共振器16Dのうち、出力端子14に隣接する第4共振器16Dと入力端子12とを容量結合するようにしたが、その他、図11の変形例に係る遅延フィルタ10aに示すように、第2回路22の第6容量C6で、第1共振器16A〜第4共振器16Dのうち、入力端子12に隣接する第1共振器16Aと出力端子14とを容量結合するようにしてもよい。   In the above example, the fourth resonator 16D adjacent to the output terminal 14 of the first resonator 16A to the fourth resonator 16D and the input terminal 12 are capacitively coupled by the sixth capacitor C6 of the second circuit 22. In addition, as shown in the delay filter 10a according to the modified example of FIG. 11, the input terminal 12 of the first resonator 16A to the fourth resonator 16D is the sixth capacitor C6 of the second circuit 22. The first resonator 16A adjacent to the output terminal 14 may be capacitively coupled.

また、上述の例では、第1共振器16A〜第4共振器16Dとして、λ/4共振器を用いた例を示したが、その他、λ/2共振器やLC共振回路を使用することもできる。   In the above example, the λ / 4 resonator is used as the first resonator 16A to the fourth resonator 16D. However, a λ / 2 resonator or an LC resonance circuit may be used. it can.

次に、図6に示す遅延フィルタ100C(比較例1)の特性(図4及び図5の破線A参照)と、図2に示す第1遅延フィルタ100Aにおいて第5容量C5を0.1pFとした場合(比較例2)の特性(図4及び図5の二点鎖線B参照)と、図1に示す本実施の形態に係る遅延フィルタ10(実施例)の特性(図9の実線I及び図10の実線K参照)とを比較した結果を図12に示す。ここでの特性は、通過帯域と、通過帯域内における遅延時間特性の平坦性を指す。   Next, the characteristics of the delay filter 100C (Comparative Example 1) shown in FIG. 6 (see the broken line A in FIGS. 4 and 5) and the fifth capacitor C5 in the first delay filter 100A shown in FIG. 2 are set to 0.1 pF. The characteristic of the case (Comparative Example 2) (see the two-dot chain line B in FIGS. 4 and 5) and the characteristic of the delay filter 10 (Example) according to the present embodiment shown in FIG. FIG. 12 shows the result of comparison with 10 (see the solid line K). The characteristic here refers to the flatness of the passband and the delay time characteristic within the passband.

この実施例において、通過帯域内における群遅延時間特性の平坦性とは、周波数−群遅延時間特性において、通過帯域中、群遅延時間偏差0.5ns内に収まる帯域を示す。また、通過帯域は、周波数−減衰量特性において、挿入損失偏差が0.2dB内に収まる帯域を示す。   In this embodiment, the flatness of the group delay time characteristic in the pass band indicates a band within the group delay time deviation of 0.5 ns in the pass band in the frequency-group delay time characteristic. The pass band indicates a band in which the insertion loss deviation falls within 0.2 dB in the frequency-attenuation characteristic.

図12からわかるように、実施例の通過帯域は100MHzであり、比較例1の通過帯域(80MHz)や比較例2の通過帯域(88MHz)よりも大幅に広くなっている。また、群遅延時間の平坦性も、実施例は96MHzであり、比較例1の群遅延時間の平坦性(44MHz)や比較例2の群遅延時間の平坦性(56MHz)よりも拡張されており、群遅延時間の平坦性が大幅に改善されている。   As can be seen from FIG. 12, the pass band of the example is 100 MHz, which is significantly wider than the pass band (80 MHz) of Comparative Example 1 and the pass band (88 MHz) of Comparative Example 2. Further, the flatness of the group delay time is 96 MHz in the example, which is extended from the flatness of the group delay time of Comparative Example 1 (44 MHz) and the flatness of the group delay time of Comparative Example 2 (56 MHz). The flatness of the group delay time has been greatly improved.

なお、本発明に係る遅延フィルタは、上述の実施の形態に限らず、本発明の要旨を逸脱することなく、種々の構成を採り得ることはもちろんである。   It should be noted that the delay filter according to the present invention is not limited to the above-described embodiment, and various configurations can be adopted without departing from the gist of the present invention.

本実施の形態に係る遅延フィルタを示す回路図である。It is a circuit diagram which shows the delay filter which concerns on this Embodiment. 第1遅延フィルタを示す回路図である。It is a circuit diagram which shows a 1st delay filter. 第2遅延フィルタを示す回路図である。It is a circuit diagram which shows a 2nd delay filter. 第1遅延フィルタの周波数−減衰量特性を示す特性図である。It is a characteristic view which shows the frequency-attenuation amount characteristic of a 1st delay filter. 第1遅延フィルタの周波数−群遅延時間特性を示す特性図である。It is a characteristic view which shows the frequency-group delay time characteristic of a 1st delay filter. 従来例と同様の回路構成を有する遅延フィルタを示す回路図である。It is a circuit diagram which shows the delay filter which has the same circuit structure as a prior art example. 第2遅延フィルタの周波数−減衰量特性を示す特性図である。It is a characteristic view which shows the frequency-attenuation amount characteristic of a 2nd delay filter. 第2遅延フィルタの周波数−群遅延時間特性を示す特性図である。It is a characteristic view which shows the frequency-group delay time characteristic of a 2nd delay filter. 本実施の形態に係る遅延フィルタの周波数−減衰量特性を示す特性図である。It is a characteristic view which shows the frequency-attenuation amount characteristic of the delay filter which concerns on this Embodiment. 本実施の形態に係る遅延フィルタの周波数−群遅延時間特性を示す特性図である。It is a characteristic view which shows the frequency-group delay time characteristic of the delay filter which concerns on this Embodiment. 本実施の形態に係る遅延フィルタの変形例を示す回路図である。It is a circuit diagram which shows the modification of the delay filter which concerns on this Embodiment. 比較例1、比較例2、実施例の通過帯域及び群遅延時間の平坦性の結果を示す表図である。It is a table | surface figure which shows the result of the flatness of the pass band and group delay time of the comparative example 1, the comparative example 2, and an Example. 従来例に係る遅延フィルタを示す回路図である。It is a circuit diagram which shows the delay filter which concerns on a prior art example. 他の従来例に係る遅延フィルタを示す回路図である。It is a circuit diagram which shows the delay filter concerning another prior art example.

符号の説明Explanation of symbols

10、10a…遅延フィルタ 12…入力端子
14…出力端子 16A〜16D…共振器
18…バンドパスフィルタ 20…第1回路
22…第2回路 C0〜C6…容量
DESCRIPTION OF SYMBOLS 10, 10a ... Delay filter 12 ... Input terminal 14 ... Output terminal 16A-16D ... Resonator 18 ... Band pass filter 20 ... 1st circuit 22 ... 2nd circuit C0-C6 ... Capacitance

Claims (6)

入力端子と出力端子との間に複数の共振器を有し、前記複数の共振器間が容量結合されたバンドパスフィルタを具備した遅延フィルタにおいて、
前記入力端子及び前記出力端子のうち、いずれか一方の端子と、前記複数の共振器のうち、少なくとも1つの共振器とを容量結合する回路を有することを特徴とする遅延フィルタ。
In the delay filter having a plurality of resonators between the input terminal and the output terminal, and including a bandpass filter in which the plurality of resonators are capacitively coupled,
A delay filter comprising a circuit that capacitively couples one of the input terminal and the output terminal and at least one of the plurality of resonators.
請求項1記載の遅延フィルタにおいて、
前記複数の共振器のうち、少なくとも1つの共振器を跨るように2つの共振器間を容量結合する回路を有することを特徴とする遅延フィルタ。
The delay filter of claim 1, wherein
A delay filter comprising a circuit that capacitively couples two resonators so as to straddle at least one of the plurality of resonators.
請求項2記載の遅延フィルタにおいて、
前記複数の共振器のうち、少なくとも1つの共振器を跨るように2つの共振器間を容量結合する回路は、
前記入力端子に隣接する共振器と、前記出力端子に隣接する共振器とを容量結合することを特徴とする遅延フィルタ。
The delay filter according to claim 2, wherein
A circuit that capacitively couples two resonators so as to straddle at least one of the plurality of resonators,
A delay filter, wherein a resonator adjacent to the input terminal and a resonator adjacent to the output terminal are capacitively coupled.
請求項1〜3のいずれか1項に記載の遅延フィルタにおいて、
前記入力端子及び前記出力端子のうち、いずれか一方の端子と、前記複数の共振器のうち、少なくとも1つの共振器とを容量結合させる回路は、
前記入力端子と、前記複数の共振器のうち、前記出力端子に隣接する共振器とを容量結合することを特徴とする遅延フィルタ。
The delay filter according to any one of claims 1 to 3,
A circuit that capacitively couples any one of the input terminal and the output terminal and at least one of the plurality of resonators,
A delay filter, wherein the input terminal and a resonator adjacent to the output terminal among the plurality of resonators are capacitively coupled.
請求項1〜3のいずれか1項に記載の遅延フィルタにおいて、
前記入力端子及び前記出力端子のうち、いずれか一方の端子と、前記複数の共振器のうち、少なくとも1つの共振器とを容量結合させる回路は、
前記出力端子と、前記複数の共振器のうち、前記入力端子に隣接する共振器とを容量結合することを特徴とする遅延フィルタ。
The delay filter according to any one of claims 1 to 3,
A circuit that capacitively couples any one of the input terminal and the output terminal and at least one of the plurality of resonators,
A delay filter, wherein the output terminal and a resonator adjacent to the input terminal among the plurality of resonators are capacitively coupled.
請求項1〜5のいずれか1項に記載の遅延フィルタにおいて、
前記共振器は、λ/4共振器、λ/2共振器又はLC共振回路であることを特徴とする遅延フィルタ。
The delay filter according to any one of claims 1 to 5,
The delay filter is a λ / 4 resonator, a λ / 2 resonator, or an LC resonance circuit.
JP2006250247A 2006-09-15 2006-09-15 Delay filter Expired - Fee Related JP4757154B2 (en)

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KR101055649B1 (en) 2008-08-07 2011-08-10 주식회사 에이스테크놀로지 Rf cavity delay filter for improved coupling
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