JP2008033072A - Display and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display which can suppress the stripes caused by the differences between transistor properties in the scanner, and to provide its manufacturing method. <P>SOLUTION: The scanning direction 300 of the excimer laser is made the same as the L length direction (current direction) of the transistor (TFT) 210 forming a buffer in a vertical scanner 200, in the ELA crystallizing process of an active matrix organic EL display 100. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a display device in which pixel circuits having electro-optic elements such as an organic EL (Electroluminescence) display are arranged in a matrix and a manufacturing method thereof.

In an image display device, such as a liquid crystal display, an image is displayed by arranging a large number of pixels in a matrix and controlling the light intensity for each pixel in accordance with image information to be displayed.
This is the same for an organic EL display or the like, but the organic EL display is a so-called self-luminous display having a light emitting element in each pixel circuit, and has a higher image visibility than a liquid crystal display. There are advantages such as unnecessary and high response speed.
The luminance of each light emitting element is greatly different from a liquid crystal display or the like in that a color gradation is obtained by controlling the luminance of the light emitting element according to the current value flowing therethrough, that is, the light emitting element is a current control type.

  In the organic EL display, as with the liquid crystal display, a simple matrix method and an active matrix method can be used. However, although the former has a simple structure, it is difficult to realize a large and high-definition display. Due to the problems, active matrix systems have been actively developed to control the current flowing through the light-emitting elements inside each pixel circuit by means of active elements provided inside the pixel circuit, generally TFTs (Thin Film Transistors). ing.

FIG. 1 is a block diagram showing a configuration of a general organic EL display device.
As shown in FIG. 1, the display device 1 includes a pixel array unit 2 in which pixel circuits (PXLC) 2 a are arranged in an m × n matrix, a horizontal selector (HSEL) 3, a light scanner (WSCN) 4, a horizontal Data lines DTL1 to DTLn selected by the selector 3 and supplied with data signals corresponding to luminance information, and scanning lines WSL1 to WSLm selectively driven by the write scanner 4 are provided.
The horizontal selector 3 and the light scanner 4 may be formed on the polycrystalline silicon or may be formed around the pixel by MOSIC or the like.

FIG. 2 is a circuit diagram showing a configuration example of the pixel circuit 2a of FIG. 1 (see, for example, Patent Documents 1 and 2).
The pixel circuit in FIG. 2 has the simplest circuit configuration among many proposed circuits, and is a so-called two-transistor driving circuit.

2 includes a p-channel thin film field effect transistor (hereinafter referred to as TFT) 11 and TFT 12, a capacitor C11, and an organic EL element (OLED) 13 which is a light emitting element. In FIG. 2, DTL indicates a data line, and WSL indicates a scanning line.
Since organic EL elements often have rectifying properties, they are sometimes referred to as OLEDs (Organic Light Emitting Diodes). In FIG. 2 and others, the symbol of a diode is used as a light-emitting element. It does not require rectification.
In FIG. 2, the source of the TFT 11 is connected to the power supply potential VCC, and the cathode (cathode) of the light emitting element 13 is connected to the ground potential GND. The operation of the pixel circuit 2a in FIG. 2 is as follows.

Step ST1 :
When the scanning line WSL is in a selected state (here, at a low level) and the write potential Vdata is applied to the data line DTL, the TFT 12 becomes conductive and the capacitor C11 is charged or discharged, and the gate potential of the TFT 11 becomes Vdata.

Step ST2 :
When the scanning line WSL is in a non-selected state (here, high level), the data line DTL and the TFT 11 are electrically disconnected, but the gate potential of the TFT 11 is stably held by the capacitor C11.

Step ST3 :
The current flowing through the TFT 11 and the light emitting element 13 has a value corresponding to the gate-source voltage Vgs of the TFT 11, and the light emitting element 13 continues to emit light with a luminance corresponding to the current value.
The operation of selecting the scanning line WSL and transmitting the luminance information given to the data line to the inside of the pixel as in step ST1 is hereinafter referred to as “writing”.
As described above, in the pixel circuit 2a of FIG. 2, once Vdata is written, the light emitting element 13 continues to emit light with a constant luminance until it is rewritten next time.

As described above, in the pixel circuit 2a, the value of the current flowing through the EL light emitting element 13 is controlled by changing the gate application voltage of the TFT 11 serving as the drive transistor.
At this time, the source of the p-channel drive transistor is connected to the power supply potential VCC, and the TFT 11 always operates in the saturation region. Therefore, the constant current source has a value represented by the following formula 1.

(Equation 1)
Ids = 1/2 · μ (W / L) Cox (Vgs− | Vth |) ² (1)

  Here, μ is the carrier mobility, Cox is the gate capacity per unit area, W is the gate width, L is the gate length, and Vgs is the gate source of the TFT 11. The inter-voltage and Vth indicate the threshold value of the TFT 11, respectively.

  In the simple matrix type image display device, each light emitting element emits light only at the selected moment, whereas in the active matrix, as described above, the light emitting element continues to emit light even after the writing is completed. In comparison, the peak luminance and peak current of the light emitting element can be lowered, and this is particularly advantageous in a large-sized and high-definition display.

  FIG. 3 is a diagram showing a change with time of current-voltage (IV) characteristics of the organic EL element. In FIG. 33, the curve indicated by the solid line indicates the characteristic in the initial state, and the curve indicated by the broken line indicates the characteristic after change with time.

In general, the IV characteristics of an organic EL element deteriorate as time passes, as shown in FIG.
However, since the two-transistor drive in FIG. 2 is driven at a constant current, a constant current continues to flow through the organic EL element as described above, and even if the IV characteristic of the organic EL element deteriorates, the emission luminance deteriorates with time. There is nothing.

  The pixel circuit 2a shown in FIG. 2 is composed of a p-channel TFT. However, if it can be composed of an n-channel TFT, a conventional amorphous silicon (a-Si) process can be used in TFT fabrication. It becomes like this. Thereby, the cost of the TFT substrate can be reduced.

  Next, a basic pixel circuit in which transistors are replaced with n-channel TFTs will be described.

  FIG. 4 is a circuit diagram showing a pixel circuit in which the p-channel TFT in the circuit of FIG. 2 is replaced with an n-channel TFT.

  The pixel circuit 2b in FIG. 4 includes n-channel TFTs 21 and 22, a capacitor C21, and an organic EL element (OLED) 23 that is a light emitting element. In FIG. 4, DTL indicates a data line, and WSL indicates a scanning line.

  In the pixel circuit 2b, the drain side of the TFT 21 as a drive transistor is connected to the power supply potential VCC, and the source is connected to the anode of the EL element 23, thereby forming a source follower circuit.

  FIG. 5 is a diagram showing operating points of the TFT 21 and the EL element 23 as drive transistors in the initial state. In FIG. 5, the horizontal axis represents the drain-source voltage Vds of the TFT 21, and the vertical axis represents the drain-source current Ids.

As shown in FIG. 5, the source voltage is determined by the operating point of the TFT 21 as the drive transistor and the EL element 23, and the voltage has a different value depending on the gate voltage.
Since the TFT 21 is driven in a saturation region, a current Ids having a current value of the equation shown in the above equation 1 is supplied with respect to Vgs with respect to the source voltage at the operating point.

USP 5,684,365 JP-A-8-234683

The pixel circuit described above is the simplest circuit, but actually, a drive transistor connected in series with the OLED, a TFT for mobility and threshold cancellation, and the like are provided.
These TFTs generate a gate pulse by a vertical scanner arranged on both sides or one side of an active matrix organic EL display panel, and this pulse signal is applied to a desired TFT gate of a pixel circuit arranged in a matrix through a wiring. Is done.

FIG. 6 is a block diagram illustrating a configuration example of the vertical scanner.
6 includes a shift register unit 31, a clock pulse buffer unit 32, an enable pulse buffer unit 33, a logic unit 34, and a buffer unit 35.
In the vertical scanner 30, a pulse signal is applied to the gate of the transistor (TFT) in the pixel circuit through the buffer unit 35 constituting the final output stage.
When there are two or more TFTs to which this pulse signal is applied, the timing for applying each pulse signal is important.

In an active matrix organic EL panel, p-Si • TFT is used and a low temperature process is used to integrate a drive circuit on a glass substrate.
The low-temperature poly-Si · TFT has the advantages of a-Si · TFT, high-temperature poly-Si · TFT, and single crystal Si · FET. In addition, a narrow frame, high definition, thinness, and light weight can be realized.
p-Si is formed by irradiating a high-power pulse of an excimer laser (wavelength 308 nm) to melt, cool, and solidify the a-Si film. This method is called excimer laser annealing (ELA), and high-quality p-Si is obtained at a low temperature over a large area.

In the ELA process, an excimer laser is scanned in one direction on the panel as shown in FIG.
However, since the output of the excimer laser varies in the scanning direction, there is a difference in the characteristics of the TFTs arranged in the scanning direction.

Here, as an example, attention is paid to the transistor TR (TFT) constituting the buffer arranged in each stage of the vertical scanner 30 in association with FIG.
When the channel length (L length: current flow direction) of each transistor TR is arranged in the left-right direction in FIG. 7 and the excimer laser is scanned from the top to the bottom in the figure, the excimer laser varies in output in the scanning direction. Therefore, as shown in FIG. 8, the threshold values of the drive transistors of the buffers 351-N, 351-N + 1, 351-N + 2 in the N stages, N + 1 stages, N + 2 stages, etc. of the buffer unit 35 of the vertical scanner 30 Characteristics such as mobility will be different.

  FIG. 9 is a diagram for explaining factors that cause characteristic variations in transistors.

As shown in FIG. 9, when the excimer laser is scanned from the top to the bottom in the drawing, the output of the excimer laser varies in the scanning direction. it can.
However, the distance in the direction of the channel width W of the transistors is short, and variations in particle diameter are not averaged. As a result, variations occur in each transistor, and the difference as a buffer increases.

  For this reason, as shown in FIG. 10, the phase and transient of the pulse input to the pixel vary, causing differences in the mobility correction period and threshold (Vth) cancellation period of each stage, which are visually recognized as streaks. There was a profit.

FIG. 10 is a diagram illustrating an image of a transient when the capacitance C is constant and the resistance R varies. In this case, it is assumed that the N-th stage resistor R1 and the (N + 1) -th stage resistor R2 have a relationship of R1 <R2.
Actually, the operating point is deviated due to the difference in the transient, so that the driving timing is deviated, resulting in uneven stripes.

  It is an object of the present invention to provide a display device capable of suppressing the generation of streaks due to the difference in characteristics of transistors in a vertical scanner and a method for manufacturing the same.

  A display device according to a first aspect of the present invention includes a pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled by receiving a drive signal to a control terminal are arranged in a matrix, and a transistor. And at least one scanner including a plurality of buffers corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that forms the pixel circuit. The transistor of the pixel circuit and the buffer The transistor is formed by irradiation with laser light having a predetermined wavelength scanned in a predetermined direction, and the transistor of the buffer is formed so that the channel length direction is the same as the scanning direction of the laser light.

  A display device according to a second aspect of the present invention includes a pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled in response to a drive signal to a control terminal are arranged in a matrix, and a transistor. And at least one scanner including a buffer group corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that forms the pixel circuit, and the transistor of the pixel circuit and the transistor of the buffer Is formed by irradiation with laser light having a predetermined wavelength scanned in a predetermined direction, and the scanner is formed so that the arrangement of the buffer groups is in a direction perpendicular to the scanning direction.

  According to a third aspect of the present invention, there is provided a display device manufacturing method including a pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled in response to a drive signal to a control terminal are arranged in a matrix. And at least one scanner including a plurality of buffers corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that is formed of a transistor and that forms the pixel circuit. The transistor of the buffer is formed so that the channel length direction thereof is the same as the scanning direction of laser light of a predetermined wavelength scanned in a predetermined direction, and the transistor of the pixel circuit and the transistor of the buffer are And solidified by irradiation with laser light having a predetermined wavelength scanned.

  According to a fourth aspect of the present invention, there is provided a display device manufacturing method including a pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled in response to a drive signal to a control terminal are arranged in a matrix. And a method of manufacturing a display device comprising: at least one scanner including a buffer group corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that is formed of a transistor and that forms the pixel circuit, An array of buffer groups of the scanner is formed so as to be orthogonal to a scanning direction of laser light of a predetermined wavelength scanned in a predetermined direction, and the transistor of the pixel circuit and the transistor of the buffer are scanned in a predetermined direction. It is formed by solidification by irradiation with laser light having a predetermined wavelength.

According to the present invention, for example, in a crystallization process using a laser having a predetermined wavelength in a display device, the vertical scan direction of the laser and the L length (channel length) direction of the transistor forming the buffer in the vertical scanner (current flow direction). In the same direction.
In this case, the generated crystal grain size varies due to variations in laser output, but the crystal grain size varies in the L length direction of the transistor, that is, in the direction of the current flow path. Transistor variations are averaged and the difference in characteristics is reduced.

  According to the present invention, it is possible to suppress the occurrence of streaks due to the difference in characteristics of transistors in a vertical scanner.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 11 is a diagram showing a configuration of an organic EL display device that employs a pixel circuit according to an embodiment of the present invention.
FIG. 12 is a diagram schematically showing an organic EL display device panel according to an embodiment of the present invention.
FIG. 13 is a circuit diagram showing a specific configuration of the pixel circuit according to the present embodiment.

  As shown in FIGS. 11 and 12, the display device 100 includes a pixel array unit 102 in which pixel circuits 101 are arranged in an m × n matrix, a horizontal selector (HSEL) 103, a write scanner (WSCN) 104, a drive A scanner (DSCN) 105, a first auto-zero circuit (AZRD1) 106, a second auto-zero circuit (AZRD2) 107, a data line DTL selected by the horizontal selector 103 and supplied with a data signal corresponding to luminance information, a write scanner 104 The scanning line WSL as the second drive wiring selectively driven by the drive, the drive line DSL as the first drive wiring selectively driven by the drive scanner 105, and the fourth drive selectively driven by the first auto-zero circuit 106 First auto zero line AZL1 as wiring and second auto zero A second auto-zero line AZL2 as the third drive wiring which is selectively driven by road 107.

  These components are formed in an active matrix organic EL display panel 100A as shown in FIG.

  As shown in FIG. 12, the pixel circuit 101 according to the present embodiment is formed by arranging red (RED), green (GREEN), and blue (BLUE) subpixels 101R, 101G, and 101B in a stripe shape. Has been.

11 and 13, the pixel circuit 101 according to this embodiment includes a p-channel TFT 111, n-channel TFTs 112 to 115, a capacitor C111, and a light-emitting element 116 including an organic EL element (OLED: electro-optical element). , A first node (point A) ND111, and a second node (point B) ND112.
A first switch transistor is formed by the TFT 111, a second switch transistor is formed by the TFT 113, a third switch transistor is formed by the TFT 115, and a fourth switch transistor is formed by the TFT 114.
The supply line (power supply potential) of the power supply voltage VCC corresponds to the first reference potential, and the ground potential GND corresponds to the second reference potential. VSS1 corresponds to the fourth reference potential, and VSS2 corresponds to the third reference potential.

In the pixel circuit 101, between the first reference potential (power supply potential VCC in this embodiment) and the second reference potential (ground potential GND in this embodiment), the TFT 111, the TFT 112 as a drive transistor, the first A node ND111 and a light emitting element (OLED) 116 are connected in series. Specifically, the cathode of the light emitting element 116 is connected to the ground potential GND, the anode is connected to the first node ND111, the source of the TFT 112 is connected to the first node ND111, and the drain of the TFT 111 is connected to the drain of the TFT 111. The source of the TFT 111 is connected to the power supply potential VCC.
The gate of the TFT 112 is connected to the second node ND112, and the gate of the TFT 111 is connected to the drive line DSL.
The drain of the TFT 113 is connected to the first node 111 and the first electrode of the capacitor C111, the source is connected to the fixed potential VSS2, and the gate of the TFT 113 is connected to the second auto zero line AZL2. The second electrode of the capacitor C111 is connected to the second node ND112.
The source / drain of the TFT 114 is connected between the data line DTL and the second node ND112. The gate of the TFT 114 is connected to the scanning line WSL.
Further, the source and drain of the TFT 115 are connected between the second node ND112 and the predetermined potential Vss1, respectively. The gate of the TFT 115 is connected to the first auto zero line AZL1.

As described above, in the pixel circuit 101 according to the present embodiment, the capacitor C111 as the pixel capacitance is connected between the gate and the source of the TFT 112 as the drive transistor, and the source potential of the TFT 112 is connected to the TFT 113 as the switch transistor during the non-light emission period. The threshold voltage Vth is corrected by connecting to a fixed potential through the TFT 112 and connecting between the gate and drain of the TFT 112.
For example, the threshold value Vth is corrected while the TFT 115 is on and the TFT 113 is off.
In addition, mobility correction is performed in a period in which the TFT 111 is turned on and the TFT 114 is turned on.
The drive is controlled by the phase difference between the two kinds of pulses such as mobility correction and threshold value Vth cancellation. Therefore, the timing of each pulse is important.

  FIG. 14 is a block diagram showing a configuration example of the write scanner 104 and the drive scanner 105 as vertical scanners according to the present embodiment.

The write scanner 104 in FIG. 14 includes a shift register unit 1041, a clock pulse buffer unit 1042, an enable pulse buffer unit 1043, a logic unit 1044, and a buffer unit 1045.
Similarly, the drive scanner 105 in FIG. 14 includes a shift register unit 1051, a clock pulse buffer unit 1052, an enable pulse buffer unit 1053, a logic unit 1054, and a buffer unit 1055.
In the write scanner 104 and the drive scanner 105, a pulse signal is applied to the gate of the transistor (TFT) in the pixel circuit through the buffer units 1045 and 1055 constituting the final output stage.
When there are two or more TFTs to which this pulse signal is applied, the timing for applying each pulse signal is important.

  Note that the enable pulse buffer units 143 and 1053 in the write scanner 104 and the drive scanner 105 correct the pulse phase deviation between the clock pulse buffer units 1042 and 1052 and the logic units 1044 and 1054 as shown in FIG.

In the active matrix type organic EL display device panel 100A, a drive circuit is integrated on a glass substrate by using p-Si · TFT and using a low temperature process.
The low-temperature poly-Si · TFT has the advantages of a-Si · TFT, high-temperature poly-Si · TFT, and single crystal Si · FET. In addition, a narrow frame, high definition, thinness, and light weight can be realized.
The p-Si is formed by adopting an ELA (Excimer Laser Annealing) method and irradiating a high output pulse of an excimer laser (wavelength 308 nm) to melt, cool and solidify the a-Si film. Thus, by adopting the ELA method, good quality p-Si can be obtained over a large area at a low temperature.

By the way, the output of the excimer laser varies in the scanning direction.
For this reason, in this embodiment, characteristics such as threshold values and mobility of the drive transistors of the buffers of the respective stages of the vertical scanners 104 to 107 are different, and streaks or coloring are prevented from being visually recognized. Therefore, basically, the following first or second method is employed to manufacture a panel by the ELA method.

First method: In the ELA crystallization process of the active matrix organic EL display device, the vertical scan direction of the excimer laser and the L length (channel length) direction (direction in which current flows) of the transistors forming the buffer in the vertical scanner are Try to be in the same direction.
Second method: In the ELA crystallization process of the active matrix organic EL display device, the scan direction of the excimer laser and the arrangement direction of the transistors (TFTs) of the buffer group in the vertical scanner are set to be vertical.
In the following description, the vertical scanner is described with reference numeral 200.

First, the first method will be described.
FIG. 16 is a diagram for explaining a first example of the first method applied to the ELA crystallization process of the active matrix organic EL display device.

  In the first example of the first method, as shown in FIG. 16, in the ELA crystallization process of the active matrix type organic EL display device 100, the excimer laser scanning direction 300 and the transistors that form buffers in the vertical scanner 200 ( This is a method in which the L length direction (the direction in which current flows) of the TFT 210 is the same direction.

In FIG. 16, the TFT 210 forming the buffer of the vertical scanner 200 is formed so that the L length direction is from the upper side to the lower side in FIG. 16.
In other words, the TFT 210 forming the buffer of the vertical scanner 200 is arranged such that the L length direction is the wiring direction of the data line DTL wired to the pixel array unit 102 (scanning line WSL, driving line DSL, auto zero line AZL1, It is formed so as to be in a direction different from the wiring direction of AZL2, for example, in a perpendicular direction.
The plurality of TFTs 210 forming the buffer of the vertical scan 200 are formed in a straight line so as to form a line in the L length direction of the TFT 210 (parallel to the scan direction). That is, the plurality of TFTs 210 are arranged in a matrix with the L length direction aligned with the scan direction.
The excimer laser scan is performed in the same direction as the L length direction of the TFT 200, that is, from the upper side to the lower side in the drawing.

  FIG. 17 is an image diagram of the crystal structure when the first example of the first method is adopted in the ELA crystallization process.

  In this case, the size of the generated crystal grain size varies due to variations in the output of the excimer laser, but the crystal grain size varies in the L length direction of the TFT (transistor) 210, that is, in the direction of the current flow path. Therefore, the variations of the individual drive transistors are averaged, and the difference in characteristics is reduced.

  In the above description, the example in which the L length direction of the TFT 210 is the same as the scanning direction in the entire buffer of the vertical scanner 200 has been described. However, for example, only the TFT 210 forming the final stage buffer of the vertical scanner 200 is The L length direction may be the same as the scan direction of the excimer laser.

  Further, when the enable pulse is used when accuracy is required for timing such as mobility correction and threshold value Vth cancellation, an enable pulse buffer unit (enable pulse buffer unit 1043 in FIGS. 14 and 15) that outputs an enable pulse is used. , 1053), the L length direction of only the TFT (transistor) 210 and the scan direction 300 of the excimer laser may be the same direction.

  FIG. 18 is a diagram for explaining a second example of the first method applied to the ELA crystallization process of the active matrix organic EL display device.

  In the second example of the first method, as shown in FIG. 17, the TFT 210 of the vertical scanner 200 is wired to the pixel array unit 102 in the L length direction and the long direction in the same manner as in the first example of FIG. The data line DTL is arranged in a wiring direction (different from the wiring direction of the scanning line WSL, drive line DSL, and auto-zero lines AZL1, AZL2, for example, perpendicular to the wiring direction. In the ELA crystallization process of the active matrix organic EL display device 100, the excimer laser scan direction 300A and the L length direction (current flow direction) of the transistor (TFT) 210 forming the buffer in the vertical scanner 200 are orthogonal to each other. This is how to do it.

  FIG. 19 is an image diagram of the crystal structure when the second example of the first method is adopted in the ELA crystallization process.

  In this case, the size of the crystal grain size to be generated varies due to variations in the output of the excimer laser. However, since each TFT (transistor) 210 is formed in a row, each TFT (transistor) 210 is also formed. Since the crystal grain size varies in the same region, the difference in characteristics of the entire buffer becomes small.

  According to the first method, streaks caused by the difference in the characteristics of the transistors in the vertical scanner due to the excimer laser scan in the ELA crystallization step in the active matrix organic EL display device can be improved.

Next, the second method will be described.
FIG. 20 is a diagram for explaining a second method applied to the ELA crystallization process of the active matrix organic EL display device.

  In the second method, as shown in FIG. 20, in the ELA crystallization process of the active matrix organic EL display device 100, the excimer laser scanning direction 300 and the transistor (TFT) 210 that forms a buffer group in the vertical scanner 200A. This is a method in which the L length direction (the direction in which the current flows) becomes the vertical direction.

In FIG. 20, the TFT 210 forming the buffer of the vertical scanner 200 </ b> A is formed so that the L length direction is directed to the left and right in FIG. 20.
In other words, the TFT 210 forming the buffer of the vertical scanner 200A has the L length direction orthogonal to the wiring direction of the data line DTL wired to the pixel array unit 102 (scanning line WSL, driving line DSL, auto zero line AZL1). , AZL2 is formed in the same direction as the wiring direction.
The plurality of TFTs 210 forming the buffer of the vertical scanner 200A are formed in a straight line so as to form a line in the L length direction of the TFT 210 (parallel to the scanning direction). That is, the plurality of TFTs 210 are arranged in a matrix with the L length direction aligned with the scan direction.
The excimer laser scan is performed in the same direction as the L length direction of the TFT 200, that is, from the left side to the right side in the drawing.

  FIG. 21 is an image diagram of the crystal structure when the second method is adopted in the ELA crystallization process.

  In this case, the size of the generated crystal grain size varies due to variations in the output of the excimer laser in the scan progression direction 300A, but the high-power pulse of the excimer laser is similarly irradiated to the buffer transistors at each stage. The difference in characteristics between transistors is small.

In the second method, the example in which the L length direction of the TFT 210 is the same as the scanning direction in the entire buffer of the vertical scanner 200A has been described. However, for example, only the TFT 210 forming the final stage buffer of the vertical scanner 200A. The L length direction may be the same as the excimer laser scanning direction.
In addition, the TFTs 210 of each stage (row) buffer corresponding to the pixel array are formed so as to form a column in a direction orthogonal to the L length direction.

Further, when the enable pulse is used when accuracy is required for timing such as mobility correction and threshold value Vth cancellation, an enable pulse buffer unit (enable pulse buffer unit 1043 in FIGS. 14 and 15) that outputs an enable pulse is used. , 1053), the L length direction of only the TFT (transistor) 210A and the scan direction 300 of the excimer laser may be the same direction.
In addition, the TFT 210A of each stage buffer corresponding to the pixel array of the enable pulse buffer section is formed to form a column in a direction orthogonal to the L length direction.

  According to the second method, streaks caused by the difference in the characteristics of the transistors in the vertical scanner due to the excimer laser scan in the ELA crystallization step in the active matrix organic EL display device can be improved.

Next, the operation of the above configuration will be described with reference to FIGS. 22A to 22F, focusing on the operation of the pixel circuit.
22A shows a drive signal applied to the drive DSL, FIG. 22B applied a drive signal WS applied to the scanning line WSL, and FIG. 22C applied to the first auto-zero line AZL1. 22D shows the driving signal auto-zero signal AZ2 applied to the second auto-zero line AZL2, FIG. 22E shows the potential of the second node ND112, and FIG. The potential of the first node ND111 is shown.

The drive signal DS of the drive line DSL by the drive scanner 105 is held at a high level, the drive signal WS to the scanning line WSL by the write scanner 104 is held at a low level, and the drive signal AZ1 to the auto zero line AZL1 by the auto zero circuit 106 is held at a low level. The driving signal AZ2 to the auto zero line AZL2 by the auto zero circuit 107 is held at a high level.
As a result, the TFT 113 is turned on. At this time, a current flows through the TFT 113, and the source potential Vs of the TFT 112 (the potential of the node ND111) drops to VSS2. Therefore, the voltage applied to the EL light emitting element 116 is also 0 V, and the EL light emitting element 116 does not emit light.
In this case, even if the TFT 114 is turned on, the voltage held in the capacitor C111, that is, the gate voltage of the TFT 112 does not change.

Next, in the non-emission period of the EL light emitting element 116, as shown in FIGS. 22C and 22D, the drive signal AZ2 to the auto zero line AZL2 is held at a high level, and the auto cell line AZL1 is applied. The drive signal AZ1 is set to a high level. As a result, the potential of the second node ND112 becomes VSS1.
Then, after the drive signal AZ2 to the auto zero line AZL2 is switched to the low level, the drive signal DS of the drive line DSL by the drive scanner 105 is switched to the low level only for a predetermined period.
Accordingly, the TFT 113 is turned off and the TFT 115 and the TFT 112 are turned on, whereby a current flows through the path of the TFT 112 and the TFT 111, and the potential of the first node rises.
Then, the drive signal DS of the drive line DSL by the drive scanner 105 is switched to the high level, and the drive signal AZ1 is switched to the low level.
As a result, the threshold Vth correction of the drive transistor TFT112 is performed, and the potential difference between the second node ND112 and the first node ND111 becomes Vth.
In this state, after the elapse of a predetermined period, the drive signal WS to the scanning line WSL by the write scanner 104 is held at a high level for a predetermined period, data is written from the data line to the node ND112, and the drive scanner 105 The drive signal DS of the drive line DSL is switched to the high level, and the drive signal WS is eventually switched to the low level.
At this time, the TFT 112 is turned on, the TFT 114 is turned off, and the mobility is corrected.
In this case, since the TFT 114 is off and the gate-source voltage of the TFT 112 is constant, the TFT 112 passes a constant current Ids to the EL light emitting element 116. Accordingly, the potential of the first node ND111 rises to a voltage Vx through which a current Ids flows through the EL light emitting element 116, and the EL light emitting element 116 emits light.
Here, in this circuit as well, the EL element changes its current-voltage (IV) characteristic when the light emission time becomes long. Therefore, the potential of the first node ND111 also changes. However, since the gate-source voltage Vgs of the TFT 112 is maintained at a constant value, the current flowing through the EL light emitting element 117 does not change. Therefore, even if the IV characteristics of the EL light emitting element 116 deteriorate, the constant current Ids always flows and the luminance of the EL light emitting element 116 does not change.

  In the display device driven in this manner, streaks caused by differences in the characteristics of transistors in the vertical scanner due to excimer laser scanning in an ELA crystallization process in an active matrix organic EL display device can be improved. A good image can be obtained.

It is a block diagram which shows the structure of a common organic electroluminescent display apparatus. FIG. 2 is a circuit diagram illustrating a configuration example of a pixel circuit in FIG. 1. It is a figure which shows the time-dependent change of the electric current-voltage (IV) characteristic of an organic EL element. FIG. 3 is a circuit diagram illustrating a pixel circuit in which a p-channel TFT in the circuit of FIG. 2 is replaced with an n-channel TFT. It is a figure which shows the operating point of TFT and EL element as a drive transistor in an initial state. It is a block diagram which shows the structural example of a vertical scanner. It is a figure for demonstrating the scanning direction of the excimer laser in an ELA process. It is a figure which shows simply the output part of the last stage buffer part of a vertical scanner. It is a figure for demonstrating the factor which a characteristic dispersion | variation produces in a transistor. It is a figure which shows the image of a transient when the capacity | capacitance C is constant and the resistance R varies. It is a figure which shows the structure of the organic electroluminescence display which employ | adopted the pixel circuit which concerns on embodiment of this invention. It is a figure which shows typically the organic electroluminescence display panel which concerns on embodiment of this invention. FIG. 6 is a circuit diagram illustrating a specific configuration of a pixel circuit according to the present embodiment. It is a block diagram which shows the structural example of the write scanner and drive scanner as a vertical scanner concerning this embodiment. It is a figure for demonstrating the function of the enable pulse buffer part in a write scanner and a drive scanner. It is a figure for demonstrating the 1st example of the 1st method applied to the ELA crystallization process of an active matrix type organic electroluminescence display. It is an image figure of the crystal structure at the time of employ | adopting the 1st example of the 1st method for an ELA crystallization process. It is a figure for demonstrating the 2nd example of the 1st method applied to the ELA crystallization process of an active matrix type organic electroluminescence display. It is an image figure of the crystal structure at the time of employ | adopting the 2nd example of the 1st method in an ELA crystallization process. It is a figure for demonstrating the 2nd method applied to the ELA crystallization process of an active matrix type organic electroluminescence display. It is an image figure of a crystal structure at the time of employ | adopting the 2nd method for an ELA crystallization process. It is a timing chart for demonstrating operation | movement of this embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Display apparatus, 101 ... Pixel circuit, 102 ... Pixel array part, 103 ... Horizontal selector (HSEL), 104 ... Write scanner (WSCN), 105 ... Drive scanner (DSCN), 106 ... 1st auto drive circuit (AZRD1) 107, second auto-zero circuit (AZRD2), DTL, data line, WSL, scanning line, DSL, drive line, AZL1, AZL2, auto-zero line, 111, p-channel TFT as a switch, 112, drive (drive) N-channel TFTs as transistors, 113 to 1152... N-channel TFTs N as switches, D111... First node, ND112... Second node, 200, 200A .. vertical scanner, 210 .. TFT (transistor), 300, 300A. Scan direction.

Claims (22)

A pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled in response to a drive signal to a control terminal are arranged in a matrix;
And at least one scanner including a plurality of buffers corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that is formed by a transistor and that forms the pixel circuit,
The transistor of the pixel circuit and the transistor of the buffer are formed by laser light irradiation of a predetermined wavelength scanned in a predetermined direction,
The buffer transistor is formed such that a channel length direction thereof is the same as a scanning direction of the laser light. The scan direction is a direction orthogonal to the wiring direction of the output line of the drive signal,
The display device according to claim 1, wherein transistors of each stage buffer corresponding to the pixel array of the scanner are formed to form a column in the channel length direction. 2. The display device according to claim 1, wherein the transistor of the buffer is formed so that the channel length direction is the same as the scanning direction of the laser beam only in the last stage of the buffer. The transistor of the buffer is formed only in the final stage of the buffer so that the channel length direction is the same as the scanning direction of the laser beam,
The display device according to claim 1, wherein transistors of each stage buffer corresponding to the pixel array of the scanner are formed to form a column in the channel length direction. 2. The scanner includes an enable pulse buffer that generates an enable pulse whose phase is corrected, and is formed so that the channel length direction of only the enable pulse buffer is the same as the scanning direction of the laser light. The display device described. The display device according to claim 5, wherein the transistors of each stage buffer corresponding to the pixel array of the enable pulse buffer are formed to form a column in the channel length direction. A pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled in response to a drive signal to a control terminal are arranged in a matrix;
And at least one scanner including a buffer group corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that is formed by a transistor and that forms the pixel circuit,
The transistor of the pixel circuit and the transistor of the buffer are formed by laser light irradiation of a predetermined wavelength scanned in a predetermined direction,
The scanner is configured so that the arrangement of buffer groups is in a direction orthogonal to the scan direction. The display device according to claim 7, wherein the transistors in the buffer group are formed so that a channel length direction thereof is the same as the scan direction. The scan direction is the same as the wiring direction of the output line of the drive signal,
The display device according to claim 8, wherein the transistors of each stage buffer corresponding to the pixel array of the scanner are formed to form a column in a direction orthogonal to the channel length direction. 9. The display device according to claim 8, wherein the transistor of the buffer is formed so that the channel length direction is the same as the scanning direction of the laser beam only in the final stage of the buffer. The transistor of the buffer is formed only in the final stage of the buffer so that the channel length direction is the same as the scanning direction of the laser beam,
The display device according to claim 8, wherein transistors of each stage buffer corresponding to the pixel array of the scanner are formed in a row in a direction orthogonal to the channel length direction. 9. The scanner includes an enable pulse buffer that generates an enable pulse whose phase is corrected, and is formed so that the channel length direction of only the enable pulse buffer is the same as the scanning direction of the laser light. The display device described. The display device according to claim 12, wherein the transistors of each stage buffer corresponding to the pixel array of the enable pulse buffer are formed to form a column in a direction orthogonal to the channel length direction. A pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled in response to a drive signal to a control terminal are arranged in a matrix;
A method of manufacturing a display device, comprising: at least one scanner including a plurality of buffers corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that is formed by a transistor and that forms the pixel circuit,
The transistor of the buffer is formed so that the channel length direction thereof is the same direction as the scanning direction of laser light of a predetermined wavelength scanned in a predetermined direction,
A method for manufacturing a display device, wherein the transistor of the pixel circuit and the transistor of the buffer are solidified by irradiation with laser light having a predetermined wavelength scanned in a predetermined direction. The scan direction is a direction orthogonal to the wiring direction of the output line of the drive signal,
The method of manufacturing a display device according to claim 14, wherein the transistors of each stage buffer corresponding to the pixel array of the scanner are formed in a row in the channel length direction. The method for manufacturing a display device according to claim 14, wherein the transistor of the buffer is formed only in the final stage of the buffer so that the channel length direction is the same as the scanning direction of the laser beam. The transistor of the buffer is formed so that only the final stage of the buffer has the channel length direction the same as the scanning direction of the laser beam,
The method of manufacturing a display device according to claim 14, wherein the transistors of each stage buffer corresponding to the pixel array of the scanner are formed in a row in the channel length direction. A pixel array unit in which a plurality of pixel circuits including at least one transistor whose conduction state is controlled in response to a drive signal to a control terminal are arranged in a matrix;
A display device having at least one scanner including a buffer group corresponding to the pixel array that outputs a drive signal to a control terminal of a transistor that is formed of a transistor and that forms the pixel circuit,
An array of buffer groups of the scanner is formed so as to be in a direction orthogonal to a scanning direction of laser light having a predetermined wavelength scanned in a predetermined direction,
A method for manufacturing a display device, wherein the transistor of the pixel circuit and the transistor of the buffer are solidified by irradiation with laser light having a predetermined wavelength scanned in a predetermined direction. The method for manufacturing a display device according to claim 18, wherein the transistors in the buffer group are formed so that a channel length direction thereof is the same as the scan direction. The scan direction is the same as the wiring direction of the output line of the drive signal,
20. The method of manufacturing a display device according to claim 19, wherein the transistors of each stage buffer corresponding to the pixel arrangement of the scanner are formed in a row in a direction orthogonal to the channel length direction. The display device manufacturing method according to claim 19, wherein the transistor of the buffer is formed only in the final stage of the buffer so that the channel length direction is the same as the scanning direction of the laser beam. The transistor of the buffer is formed so that only the final stage of the buffer has the channel length direction the same as the scanning direction of the laser beam,
20. The method of manufacturing a display device according to claim 19, wherein the transistors of each stage buffer corresponding to the pixel array of the scanner are formed in a row in a direction orthogonal to the channel length direction.

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