JP2008153455A - Ultra-compact power converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an ultracompact power conversion device which can suppress mounting failures due to voids, when a magnetic induction element filled with resin in a through hole for an electrode is mounted. <P>SOLUTION: A mounting failure caused by voids generated in a solder reflow step can be suppressed by forming a slit-shaped gap 11 in each of electrodes 12, which are formed in the outer periphery of a ferrite substrate 16 and are formed on a second main surface of the ferrite substrate 16 as a soldering target surface to be soldered to a mounting board. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a micro power converter such as a DC-DC converter formed of a semiconductor integrated circuit (hereinafter referred to as IC) formed on a semiconductor substrate and passive components such as a coil, a capacitor, and a resistor.

  In recent years, electronic information devices, in particular, various portable electronic information devices have been widely used. Many of these electronic information devices use a battery as a power source, and incorporate a power conversion device such as a DC-DC converter. Normally, the power conversion device is composed of active elements such as switching elements, rectifier elements, and control ICs, and individual components of passive elements such as magnetic components, capacitors, and resistors on a printed circuit board such as a ceramic substrate or plastic. By mounting, it is configured as a hybrid power supply module.

  Along with the demands for reducing the size, thickness, and weight of various electronic information devices including the above-mentioned portable devices, there is a strong demand for reducing the size, thickness, and weight of built-in power conversion devices. Miniaturization of the hybrid power supply module has been advanced by technologies such as MCM (multi-chip module) technology and multilayer ceramic components. However, since individual components are mounted side by side on the same substrate, reduction of the mounting area of the power supply module is limited. In particular, magnetic parts such as inductors and transformers have a very large volume compared to an integrated circuit, which is the biggest restriction in reducing the size and thickness of electronic devices.

There are two possible future directions for miniaturization and thinning of these magnetic components: a chip component that is extremely small and thin, surface-mounted, and a thin film formed on a silicon substrate. In recent years, there has been reported an example in which a thin micromagnetic element (coil, transformer) is mounted on a semiconductor substrate by application of semiconductor technology.
In particular, a planar magnetic component (thin inductor) is a thin magnetic coil sandwiched between a magnetic substrate and a ferrite substrate on the surface of a semiconductor substrate on which semiconductor components such as switching elements and control circuits are built. ) Is formed by thin film technology (for example, Patent Document 1).
As a result, the magnetic element can be made thinner and its mounting area can be reduced. However, the manufacturing cost is increased in the vacuum process. In addition, when used in a place with a large current, a large number of lamination steps relating to the magnetic film and the insulating film are required, and there is a problem that the cost becomes very high.

A planar magnetic element is disclosed in which a gap between spiral coil conductors is filled with a resin mixed with magnetic fine particles, and an upper surface and a lower surface are sandwiched between ferrite substrates (for example, disclosed) Patent Document 2).
In this method, since the inductance of the coil conductor is substantially proportional to the number of spirals (turns), it is necessary to increase the number of turns in order to obtain a large inductance. If the number of turns is increased without increasing the mounting area, it is necessary to reduce the cross-sectional area of the coil conductor. That is, in order to obtain a large inductance, the coil conductor must have a small cross-sectional area and a long conductor wire length. However, when the coil cross-sectional area is reduced and the conductor wire length is increased, the DC resistance of the coil conductor is increased, resulting in an increase in power loss.

In order to solve the problem, a magnetic insulating substrate, a first conductor formed on the first main surface of the magnetic insulating substrate, a second conductor formed on the second main surface of the magnetic insulating substrate, and the magnetic insulation. There has been disclosed a thin magnetic element comprising solenoidal coil conductors connected to connecting conductors formed in through holes penetrating a substrate (for example, Patent Document 3).
In the structure described in Patent Document 3, when a through hole is formed in a magnetic insulating substrate and a coil conductor is formed, a mounting terminal for connecting to a semiconductor element, a mounting substrate and the like is formed at the same time, thereby forming a coil. By simply mounting an IC on a magnetic insulating substrate, a new mounting substrate is unnecessary, and an ultra-compact and thin power converter is realized.

  The feature of the micro power conversion element described in Patent Document 3 is that a through hole is formed in a magnetic insulating substrate, and a coil conductor electrically connected through the through hole is formed on the first main surface and the second main surface. In addition, similarly, an electrode (junction single terminal) for electrical connection with a semiconductor element on the first main surface, and an electrical connection with a printed board when actually used on the second main surface For this purpose (mounting electrode). By applying this structure, it is possible to obtain an ultra-compact power conversion device that minimizes the number of parts constituting the device and achieves a reduction in thickness.

  10 and 11 are configuration diagrams of a conventional ultra-small power converter. FIG. 10A is a cross-sectional view of a main part on which an IC chip is mounted, and is cut along a YY line in FIG. FIG. 10B is a main part sectional view of the second main surface (back surface) of the magnetic induction element, FIG. 11 is a main part sectional view of FIG. 10B, and FIG. 10 (b) is an enlarged cross-sectional view of the main part cut along line X1-X1, and FIG. 11 (b) is an enlarged cross-sectional view of the main part cut along line X2-X2 in FIG. 10 (b).

  A solenoidal coil is formed at the center of the ferrite substrate 86, and electrodes 82 and 88 are formed at the periphery. The solenoid coil is made of a coil conductor 84 formed on the first main surface and the second main surface of the ferrite substrate 86 and the side wall of the through hole 85. The electrode 88 is formed on the first main surface, and the electrode 82 is formed on the second main surface, and is connected to each other by a connection conductor 83 a formed on the side wall of the through hole 83.

The electrode 88 formed on the first main surface and the IC chip 80 are fixed via a stud bump 81, and an underfill 89 is filled between the IC chip 80 and the ferrite substrate 86. The coil conductor 84 formed on the second main surface is covered with a protective film 87.
JP 2001-196542 A JP 2002-233140 A (FIG. 1) JP 2004-274004 A

  The detailed cross section of the electrode structure in FIG. 10B is shown in FIGS. 11A and 11B, with the electrodes 88 and 82 of the first main surface and the second main surface on the side wall of the through hole 83. The connection conductor 83a is electrically connected, and the hollow portion of the through hole 83 is filled with a filling resin 83b. The filling resin 83b is filled in the hollow portion of the through hole 83 when the protective film 87 which is a resin layer is formed.

  The manufacturing process includes (1) forming through holes 83 and 85 in the ferrite substrate 86, (2) forming a plating seed layer necessary for electrolytic plating, and (3) forming a resist pattern as a mold at the time of electrolytic plating. (4) Electrolytic plating simultaneously forms coil conductor 84, electrodes 82 and 88 as mounting terminals, and connection conductor 83a. (5) Removes unnecessary resist and seed layer. (6) Resin layer as protective film 87. This is the procedure of formation. When forming the conductive layer to be the coil conductor 84, the electrodes 82 and 88, and the connection conductor 83a by electrolytic plating, the inside of the through holes 83 and 85 is not completely filled, and a hollow portion is generated. Filled when the resin layer is formed as the protective film 87.

After patterning the protective film 87 which is the resin layer, as shown in FIG. 11A, the exposed surface of the filling resin 83b which is the resin layer (protective film 87) filling the inside of the through hole 83 is developed during patterning. Thus, the surface height of the electrodes 82 and 88 is lower. As will be described later, voids are formed in the exposed portions of the lower filling resin 83b during soldering.
This manufacturing method can form the electrical connection and the coil conductor 84, the electrodes 82 and 88, and the connection conductor 83a with a minimum number of steps, and thus can be formed at a low cost. However, the through hole 83 is formed at the center of the electrodes 82 and 88. Is formed and filled with the filling resin 83b. Therefore, as shown in FIG. 12, when the solder resin 91 is used to mount the filling resin on the board electrode 96 formed on the board 95 such as a printed board. A void 92 is formed at the bottom of 83b. Further, the void 92 has a small void volume V3 in the first reflow after mounting the solder 91 (FIG. 12A), but after the first mounting, the second reflow is performed in order to mount another component again. When the process is carried out, the moisture taken into the filling resin 83b by the moisture absorption of the filling resin 83b is released into the void 92 and expands due to heat, so that the volume V4 of the void 92 increases (FIG. 12 ( b)). For this reason, a substantial mounting area (a contact area between the solder 91 and the mounting electrode 96) is reduced, and the mounting strength is reduced, thereby causing a mounting failure.

  In order to solve this problem, a method of eliminating the filling resin 83b in the hollow portion and filling it with a metal material that does not absorb moisture is required. There is also a method in which the hollow portion is not filled with a metal material and the hollow portion is not filled with the resin 83b so that the hollow portion is opened. However, for example, if a semiconductor element such as an IC chip is fixed to the first main surface and then molded with resin or the like, the through hole 83 is filled with resin and the open state cannot be maintained. In order to make it an open state, a resin mold for protecting the entire device cannot be used and it cannot be adopted.

  In the method of filling the through hole 83 with a metal, the thickness of the plating is increased so that the central portion of the through hole 83 is closed, or the conductive paste or the solder paste is embedded by a screen printing method or the like. Such a method is conceivable. However, the method of binding the through-hole 83 with the plating thickness is not applicable when there is a thickness limitation because the plating is performed simultaneously with the coil conductor 84 and the electrodes 82 and 88. Even if the thickness restriction is eliminated, the plating time must be extended, resulting in an increase in cost. As a separate process, in the case of embedding the inside of the electrode, the photolithography process, the plating process, the resist stripping process, and the like must be performed again, and the cost increases significantly. Also, when embedding by plating, if the control of the plating thickness inside the through-hole 83 is poor, voids are generated in the plated metal, and residual liquid such as plating solution is left in it. Sexual problems occur.

The process of embedding the electrodes 82 and 88 with a conductive paste and a solder paste by screen printing not only leads to an increase in cost due to an increase in the number of processes, but these must be performed before the formation of the protective film 87. This limits the heat treatment step in the subsequent step such as heat curing.
An object of the present invention is to solve the above-described problems and provide an ultra-compact power conversion device that can suppress mounting defects due to voids when mounting a magnetic induction element in which resin is filled in a through hole of an electrode portion. It is.

  In order to achieve the above object, the semiconductor integrated circuit ga has a semiconductor substrate, a thin film magnetic induction element, and a capacitor, and the thin film magnetic induction element is formed at the center of the magnetic insulating substrate and the magnetic insulating substrate. In the micro power converter having an electrode electrically connected through a through hole at the outer periphery of the first main surface and the second main surface of the coil and the magnetic insulating substrate, the first main surface and the second main surface The electrode on at least one main surface of the surface has a slit-like gap, and the slit-like gap is connected to the through hole and extends to the end of the electrode.

The slit-shaped gap may penetrate the electrode.
The width of the slit-like gap of the electrode may be equal to or greater than the thickness of the electrode.
The slit-like gap may be a recess groove formed in the electrode.
The magnetic insulating substrate may be a ferrite substrate.

  According to the present invention, by forming a slit-like gap in the electrode soldered to the mounting substrate, an increase in the void volume in the second reflow process is suppressed, and the micro power can be reduced without increasing the cost. Mounting defects caused by reflow during solder mounting of the conversion device can be prevented.

  Embodiments will be described in the following examples.

FIG. 1 is a configuration diagram of a main part of a micro power conversion device according to a first embodiment of the present invention. FIG. 1 (a) is a plan view seen through a second main surface (back surface) of a thin magnetic component. FIG. 1B is a cross-sectional view of main parts cut along line X1-X1 in FIG. 1A, FIG. 1C is a cross-sectional view of main parts cut along line X2-X2 in FIG. FIG. 3B is a plan view of the electrode on the first main surface (front surface) side of the portion C in FIG.
2 is an enlarged view of FIG. 1, FIG. 2 (a) is an enlarged view of portion A of FIG. 1 (b), and FIG. 2 (b) is an enlarged view of portion B of FIG. 1 (c).

As the ultra-small power converter, there are other components such as an IC chip as shown in FIG. 10A. However, in FIG. 1, only those magnetic induction elements are shown.
A solenoidal coil is formed at the center of the ferrite substrate 16, and electrodes 12 and 18 are formed at the periphery. The solenoid coil is formed on the side walls of the coil conductors 14a and 14b formed on the first main surface and the second main surface of the ferrite substrate 16 and the through holes 15a that electrically connect the coil conductors 14a and 14b. It is composed of a conductor 15c. The electrodes 18 and 12 are formed on the first main surface and the second main surface, respectively, and are connected to each other by a connection conductor 13c formed on the side wall of the through hole 13a. The electrode 12 formed on the second main surface is formed with a slit-like gap 11 in contact with the through hole 13a. The slit-like gap 11 extends to the end of the electrode 12, and the bottom is a ferrite substrate. 16 is exposed. In the figure, reference numerals 13b and 15b are filled resins, and 17 is a protective film which is a resin layer.

  As shown in FIG. 1, by forming the slit-shaped gap 11 in the electrode 12, a void is generated on the filling resin 13 b at the time of solder mounting, but in the second reflow, from the slit-shaped gap 11. Since moisture absorbed is released, it is possible to prevent the void from becoming large. Since the bottom of the slit-shaped gap 11 is the ferrite substrate 16, solder is not fixed, and a hollow passage 34 is formed along the gap 11 (see FIG. 5B). Moisture is released to the outside, and the void does not grow with the second reflow.

Moreover, since the present invention can be executed only by changing the pattern of the photomask when forming the pattern of the gap 11 of the slit of the electrode 12, it does not add a new process and causes an increase in cost. There is nothing.
3 and 4 are process diagrams showing a method of manufacturing the magnetic induction element of FIG. 1, and (a) to (f) of both drawings are cross-sectional views of main part manufacturing processes shown in the order of processes. In each step, FIG. 3 is a cross-sectional view of the main part corresponding to the cross-sectional view taken along line YY of FIG. 1A, and FIG. 4 is a cross-sectional view taken along line X2-X2 of FIG. It is a principal part sectional drawing corresponding. 3 and 4 show only one chip portion (magnetic induction element portion) in an enlarged manner, but in actuality, it was manufactured as a substrate on which a large number of such chips were formed.

  A Ni—Zn ferrite substrate 16 having a thickness of 525 μm was used as the insulating magnetic substrate. The thickness of the ferrite substrate 16 is determined from necessary inductance, coil current value, and characteristics of the magnetic substrate, and is not limited to the thickness in the present embodiment. Although the ferrite substrate 16 is used as the insulating substrate, any material may be used as long as it is an insulating magnetic substrate. This time, the ferrite substrate 16 was used as a material that can be easily molded into a substrate.

  First, the through holes 13 a and 15 a are formed in the ferrite substrate 16. A through hole for connecting the electrode 18 used for bonding with the IC chip and the electrode 12 used for bonding with the substrate electrode formed on the printed circuit board or the like is 13a, and a through hole for connecting the coil conductors 14a and 14b is 15a. As the processing method, any method such as laser processing, sand blast processing, electric discharge processing, ultrasonic processing, and machining can be applied, and it is necessary to determine the processing method based on processing costs, processing dimensions, and the like. In this example, the sandblasting method was used because the minimum processing dimension width was as small as 0.13 mm and there were many processing points (steps in FIGS. 3A and 4A).

Next, the connection conductors 13b and 15b of the through holes 13a and 15a, the coil conductors 14a and 14b on the first main surface and the second main surface, and the electrodes 18 and 12 are formed. A slit-like gap 11 is formed in the electrode 12 so as to be in contact with the through hole 13 a and extending to the end of the electrode 12. The ferrite substrate 16 is exposed at the bottom of the gap 11, and the gap 11 passes through the electrode 12.
First, in order to impart conductivity to the entire surface of the ferrite substrate 16, Cr / Cu is formed by sputtering to form a plating seed layer 41 (steps of FIGS. 3B and 4B). At this time, conductivity is imparted to the through holes 13a and 15a, but electroless plating or the like may be performed if necessary. Further, not limited to the sputtering method, a vacuum deposition method, a CVD (chemical vapor deposition) method, or the like may be used. A method of forming only by electroless plating may be used. However, a method capable of obtaining sufficient adhesion with the ferrite substrate 16 is desirable. Note that the conductive material may be anything as long as it has conductivity. Although Cr was used as an adhesion layer for obtaining adhesion, Ti, W, Nb, Ta, or the like can also be used. Further, Cu serves as a seed layer in which plating is generated in a subsequent electrolytic plating process, and Ni, Au, or the like can also be used. This time, considering the ease of processing in the subsequent process, a Cr / Cu film configuration was adopted.

  Next, the patterns of the coil conductors 14a and 14b and the electrodes 18 and 12 to be formed on the first main surface and the second main surface are formed using a photoresist (FIGS. 3C and 4C). Process). In this example, these patterns were formed using a negative film type resist. A pattern of the slit-like gap 11 of the electrode 12 (slit photoresist pattern 43) is formed in this pattern. Reference numeral 42 denotes a slit photoresist pattern, which is a photoresist pattern other than 43.

  Next, Cu is formed as the conductive layer 33 by electrolytic plating in the openings of the resist pattern (steps of FIGS. 3D and 4D). At this time, the through holes 13a and 15a are also plated with Cu, and the connection conductors 13c and 15c are formed at the same time, and the coil conductors 14a and 14b on the first main surface and the second main surface are connected to form a solenoid coil. Is done. Also, the electrode patterns 18 and 12 are formed at the same time. After the electrolytic plating, unnecessary photoresist and seed layers are removed to form desired coil conductors 14a and 14b and electrodes 18 and 12. At this time, a slit-like gap 11 is formed in the electrode 12. The width of the slit-shaped gap 11 is set to be equal to or greater than the thickness of the electrode 11 as will be described later (steps shown in FIGS. 3E and 4E).

  Next, the protective film 17 is formed on the coil conductor 14b (steps of FIG. 3 (f) and FIG. 4 (f)). In this embodiment, a film type insulating material is used. The protective film 17 functions as a protective film and also has a function of filling the through holes 13a and 15a. If it is unnecessary, it is not necessary to form it. However, when a semiconductor element such as an IC chip is mounted and sealed with resin in a later process, the resin flows out, so it is necessary to fill it. Further, it is desirable to form in consideration of long-term reliability. The insulating film forming method is not limited to a film type material, and a liquid insulating material may be patterned by screen printing and thermally cured.

  In addition, Ni, Au plating etc. are given to the surface of the conductive layer 44 used as the coil conductors 14a and 14b and the electrodes 18 and 12 as needed, and a surface treatment layer is formed. In this example, Ni and Au were formed by electrolytic plating continuously after electrolytic plating of Cu in the steps of FIGS. 3 (d) and 4 (d). In addition, after completion | finish of the process of FIG.3 (f) and FIG.4 (f), you may form these by electroless plating. Alternatively, electroless plating may be similarly performed after the steps of FIGS. 3 (e) and 4 (e). These metal protective conductors are for obtaining a stable connection state in a connection process with a semiconductor element such as an IC chip in a later process.

  Through the process described above, a thin magnetic induction element in which the slit-shaped gap 11 is formed in the electrode 12 on the mounting side (second main surface side) is formed. In order to adopt a configuration as a power converter, an IC chip 80 for power supply is connected to the electrode 18 formed on the magnetic induction element shown in FIG. 1 as shown in FIG. As an example of the configuration, as shown in FIG. 10A, the stud bump 81 is used to join by ultrasonic connection, and the IC chip 80 and the magnetic induction element are fixed by the underfill 89. FIG. 10 shows an example. In this embodiment, stud bumps and ultrasonic bonding are used as bonding methods. However, this structure is not limited to this, and there is a problem even if solder bonding, conductive adhesive, or the like is used. Absent. In addition, the underfill 89 is used to fix the IC chip 80 and the magnetic induction element, but this may be performed by selecting a material as necessary, and may be a sealing material such as an epoxy resin.

The micro power converter using this example was solder mounted on a mounting board, and the occurrence of voids was investigated.
5 and 6 are views showing the state of the void, FIG. 5 is a view showing the state of the void of the solder formed by the first reflow, and FIG. 6 is the state of the void after the second reflow. FIG. 5A and 6 are cross-sectional views corresponding to FIG. 2A, and FIG. 5B is a cross-sectional view corresponding to FIG. is there. The volume V1 of the void 33a of the solder 32 formed by the first reflow from FIGS. 5 and 6 does not grow even by the second reflow, and the volume V2 of the void 33b hardly increases, and the substantial solder mounting. There was no reduction in area. This is because moisture or air accumulated in the void 33a passes through the passage 34 formed in the slit-shaped gap 11 shown in FIG.

The growth state was tested from the solder voids 33a and 33b by changing the width M of the slit-shaped gap 11 and the thickness N of the electrode 12. In this experiment, the thickness N of the electrode 12 was 40 μm and 60 μm, and the width M of the slit-shaped gap 11 was 10 μm from 30 μm to 80 μm. The results will be described next.
FIG. 8 shows the correlation between the void volume ratio (V2 / V1) after the second reflow process and the void width M after the first reflow process and the slit width M. FIG. FIG. 8A shows the case where the thickness N of the electrode 12 is 40 μm, and FIG. 8B shows the case where the thickness N of the electrode 12 is 60 μm. FIG. 8 shows how many times the void volume V2 in the second reflow process has increased to the void volume V1 in the first reflow process. Since the two reflow steps are performed as described in the prior art, the description is omitted here.

  The data shown in FIG. 8 is obtained by applying a reflow process based on the reliability test standard for the reflow process. That is, the reflow process is composed of two processes, a pre-process for confirming the heat resistance of the solder and a post-process for reflowing after heat treatment at a high temperature. The conditions for the pre-process are pre-treatment conditions for performing a moisture absorption treatment. The pre-treatment conditions are a temperature of 85 ° C., a humidity of 85%, and a time of 192 hours. The post-process conditions are the actual reflow conditions, the temperature is 260 ° C., and the time is 2 minutes. It is usually determined whether the void 33b that has sucked the moisture in the solder in the subsequent process is repelled (popcorn phenomenon) or the like is not defective.

  However, here, as described above, it was investigated how the void volume V1 generated in the first reflow process was increased in the second reflow process. The first reflow process and the second reflow process are the same conditions as described above. The pretreatment conditions are conditions for guaranteeing the reflow heat resistance of the solder when humidity is applied, and conform to a class standard referred to as level 1 in the reflow test standard.

In the investigation of the void volumes V1 and V2, the voids 33a and 33b cannot be directly measured from the outside because they are formed at the boundary between the solder 32 and the filling resin 13b. Therefore, the cross section in the vicinity of the joint between the filling resin 13b and the solder 33 (near the cross section cut along the line X1-X1 in FIG. 1) is polished to obtain the cross sectional shapes of the voids 33a and 33b. W2 and maximum heights H1 and H2 are measured. As shown in FIG. 7, assuming that the shapes of the voids 33a and 33b are cylindrical, the diameter (D = 2r) of the bottom surface of the cylinder is the maximum width W1 and W2 of the voids 33a and 33b. The length (h) was calculated as cylindrical volumes (πr ² × h) as the maximum heights H1 and H2 of the voids 33a and 33b, and the void volumes V1 and V2 were obtained.

  As shown in FIG. 8A, when the thickness N of the electrode 12 is 40 μm, if the width M (interval) of the slit-shaped gap 11 is less than 40 μm, increase in voids is confirmed in some elements. It was done. This is because the width M of the slit-like gap 11 is too narrow, and the solder 33 causes bridging at the slit gap 11 and the path 34 that should be formed along the slit-like gap 11 is narrowed. This is because it is difficult to release moisture and gas inside.

  Further, as shown in FIG. 8B, when the thickness N of the electrode 12 is 60 μm, when the width M of the slit-like gap 11 is less than 60 μm, as in the case of 40 μm, some elements Increased voids. This is because the width M of the slit-like gap 11 is too narrow, and the solder 33 causes bridging at the slit gap 11 and the path 34 that should be formed along the slit-like gap 11 is narrowed. This is because it is difficult to release moisture and gas inside.

  Therefore, by making the width M (interval) of the slit-shaped gap 11 larger than the thickness N of the electrode 12, the void volume ratio can be made a small value near 1.0, and the second reflow can be performed. It is possible to reduce the number of defects and improve the yield rate by two solder reflows.

FIG. 9 is a cross-sectional view of an essential part of the micro power converter according to the second embodiment of the present invention. This cross-sectional view is a cross-sectional view corresponding to the cross-sectional view of FIG. 1C, and the through holes 13a, the connection conductors 13c, and the filling resin 13b are indicated by dotted lines for reference.
The difference from FIG. 1 is that the slit-like gap 11 is a groove of the recess 11a, and the ferrite substrate 16 is not exposed at the bottom of the groove of the recess 11a. In the second embodiment, when the recess 11a, which is a slit-like gap, is formed in the electrode 12a, the etching is stopped before the ferrite substrate 16 at the bottom of the slit-like gap is exposed, and the recess, which is the slit-like gap, is formed. The thickness of the bottom of 11a is about 1 μm. This includes the case where the etching for forming the slit-shaped gap is not sufficiently performed and the residue of the electrode 12a remains at the bottom. In particular, when the electrode 12a is thick and the side wall of the recess 11a is as high as several tens of μm, the solder is not filled in the bottom of the recess 11a, and a hollow passage is formed along the recess 11a. An increase in void volume is suppressed in the process.

Further, when the residue of the protective film 17 is coated on the bottom of the recess 11a, the solder is less likely to adhere to the bottom of the recess 11a, and a passage is further easily formed, and the increase in void volume is further suppressed.
In the first and second embodiments, the solenoid coil is used as an example. However, in the present invention, the coil formation is not related, and a coil having a different shape such as a spiral coil or a toroidal coil is used. Of course, it is applicable.

BRIEF DESCRIPTION OF THE DRAWINGS It is a principal part block diagram of the micro power converter of 1st Example of this invention, (a) is the top view seen through from the 2nd main surface (back surface) of a thin magnetic component, (b) is (a). Sectional view taken along line X1-X1, principal part sectional view taken along line X2-X2 in (a), (d) showing first main surface (surface) of part C in (a). Planar shape of side electrode FIG. 2 is an enlarged view of FIG. 1, (a) is an enlarged view of part A of FIG. 1 (b), and (b) is an enlarged view of part B of FIG. 1 (c). It is process drawing which shows the manufacturing method of the magnetic induction element of FIG. 1, (a)-(f) is principal part manufacturing process sectional drawing shown to process order It is process drawing which shows the manufacturing method of the magnetic induction element of FIG. 1, (a)-(f) is principal part manufacturing process sectional drawing shown to process order The figure which shows the state of the void of the solder formed by the first reflow The figure which shows the state of the void after the second reflow Cylindrical figure assuming void shape It is a correlation diagram showing the relationship between the void volume ratio (V2 / V1) after performing the second reflow process to the void volume after performing the first reflow process and the width M of the slit-shaped gap, (A) is a figure in case the thickness N of the electrode 12 is 40 micrometers, (b) is a figure in case the thickness N of the electrode 12 is 60 micrometers. Sectional drawing of the principal part of the micro power converter of 2nd Example of this invention It is a block diagram of the conventional micro power converter, (a) is principal part sectional drawing which mounted IC chip, (b) is a principal part top view of the 2nd main surface (back surface) of a magnetic induction element. It is a block diagram of the conventional micro power converter, (a) is a principal part expanded sectional view cut | disconnected by the X1-X1 line | wire of (b) of FIG. 10, (b) is X2-X2 of FIG.10 (b). Main section enlarged cross-sectional view cut by wire It is a figure which shows the state of the void at the time of mounting of the conventional micro power converter, (a) is the figure of the void after the first reflow, (b) is the figure of the void after the second reflow.

Explanation of symbols

11 slit-like gap 11a recess 12, 12a electrode (second main surface)
13a Through hole (electrode part)
13b Filling resin (electrode part)
13c Connecting conductor (electrode part)
14a Coil conductor (first main surface)
14b Coil conductor (second main surface)
15a Through hole (coil conductor part)
15b Filling resin (coil conductor part)
15c Connecting conductor (coil conductor)
16 Ferrite substrate 17 Protective film (resin layer)
18 electrodes (first main surface)
31 Mounting electrode 32 Solder 33a Void (after the first reflow)
33b Void (after the second reflow)
34 Passage 41 Plating seed layer 42 Photoresist pattern 43 Photoresist pattern for slit 44 Conductive layer

Claims (5)

A semiconductor substrate on which a semiconductor integrated circuit is formed, a thin film magnetic induction element, and a capacitor, wherein the thin film magnetic induction element is a magnetic insulating substrate, a coil formed at a central portion of the magnetic insulating substrate, and a first of the magnetic insulating substrate. In the micro power conversion device having electrodes electrically connected to each other through the through holes at the outer peripheral portions of the main surface and the second main surface, the main surface of at least one of the first main surface and the second main surface An electrode having a slit-like gap, and the slit-like gap is connected to the through hole and extends to an end of the electrode. The ultra-small power converter according to claim 1, wherein the slit-shaped gap penetrates the electrode. The ultra-small power converter according to claim 2, wherein the width of the slit-like gap of the electrode is equal to or greater than the thickness of the electrode. 2. The microminiature power converter according to claim 1, wherein the slit-shaped gap is a groove of a recess formed in the electrode. The micro power converter according to claim 1, wherein the magnetic insulating substrate is a ferrite substrate.

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