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JP2009194342A - Integrated circuit mounting substrate and integrated circuit mounting package manufacturing method - Google Patents

Integrated circuit mounting substrate and integrated circuit mounting package manufacturing method Download PDF

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Publication number
JP2009194342A
JP2009194342A JP2008036592A JP2008036592A JP2009194342A JP 2009194342 A JP2009194342 A JP 2009194342A JP 2008036592 A JP2008036592 A JP 2008036592A JP 2008036592 A JP2008036592 A JP 2008036592A JP 2009194342 A JP2009194342 A JP 2009194342A
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Prior art keywords
integrated circuit
identification symbol
circuit mounting
symbol description
mounting package
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Japanese (ja)
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Toshio Watabe
利男 渡部
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Sharp Corp
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Sharp Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

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  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide means for easily discriminating each of integrated circuits having the same shape and different functions only at a glance after the integrated circuits are mounted on film substrates having the same shape. <P>SOLUTION: An integrated circuit mounting package 140 having a SOF structure includes an identification mark describing part 1, and accordingly, the model name can be written after an integrated circuit 101 is mounted. Consequently, when integrated circuits 101A having the same shape and different functions are mounted on film substrates, corresponding model names can be written after they are mounted. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

本発明は、テープキャリアパッケージ等のフィルム基材を用いた集積回路実装基板に係り、より詳しくは、集積回路の機種名等の識別マークの記載を可能にした集積回路実装基板に関するものである。   The present invention relates to an integrated circuit mounting board using a film base material such as a tape carrier package, and more particularly to an integrated circuit mounting board that enables description of an identification mark such as a model name of the integrated circuit.

液晶ドライバ等の実装用パッケージは、液晶パネルのガラス辺に実装を行う必要があると共にパネル額縁を小さくする必要があることから、TCP(Tape Carrier Package)やSOF(System On Film:COF(Chip On Film)とも呼ばれる)、が使用されている。   A mounting package such as a liquid crystal driver needs to be mounted on the glass side of the liquid crystal panel and the panel frame needs to be small. Therefore, TCP (Tape Carrier Package) or SOF (System On Film: COF (Chip On) Also called Film)).

図11及び図12に、TCP構造の集積回路実装パッケージ120の構成を示す。図11は、集積回路実装パッケージ120の上面図であり、封止樹脂109を透視した状態を示した部分透視図である。また、図12は、図11に示した集積回路実装パッケージ120を切断線B−B’において切断した状態を示した矢視断面図である。   11 and 12 show the configuration of an integrated circuit mounting package 120 having a TCP structure. FIG. 11 is a top view of the integrated circuit mounting package 120 and is a partial perspective view showing a state in which the sealing resin 109 is seen through. FIG. 12 is a cross-sectional view of the integrated circuit mounting package 120 shown in FIG. 11 taken along the cutting line B-B ′.

図11及び図12に示す集積回路実装パッケージ120では、スリット114と、デバイスホール115と呼ばれる穴部分がフィルム基材113に設けられている。さらに、フィルム基材113に銅配線111・112が形成され、配線111・112上にソルダーレジスト116が形成されている。集積回路(集積回路チップ)101は、デバイスホール115内に設けられており、集積回路101表面のバンプ110と、配線111・112とが接続した構造となっている。また、図12に示されているように、集積回路101等を外部環境から保護するために封止樹脂109がデバイスホール115周辺を覆っている。   In the integrated circuit mounting package 120 shown in FIGS. 11 and 12, a slit 114 and a hole portion called a device hole 115 are provided in the film base 113. Further, copper wirings 111 and 112 are formed on the film base 113, and a solder resist 116 is formed on the wirings 111 and 112. The integrated circuit (integrated circuit chip) 101 is provided in the device hole 115 and has a structure in which bumps 110 on the surface of the integrated circuit 101 and wirings 111 and 112 are connected. As shown in FIG. 12, a sealing resin 109 covers the periphery of the device hole 115 in order to protect the integrated circuit 101 and the like from the external environment.

図13及び図14に、SOF構造の集積回路実装パッケージ130の構成を示す。図13は、集積回路実装パッケージ130の上面図であり、図14は、図13に示した集積回路実装パッケージ130を切断線B−B’において切断した状態を示した矢視断面図である。   13 and 14 show the configuration of an integrated circuit mounting package 130 having an SOF structure. FIG. 13 is a top view of the integrated circuit mounting package 130, and FIG. 14 is a cross-sectional view taken along the line B-B ′ of the integrated circuit mounting package 130 shown in FIG.

上記集積回路実装パッケージ130は、フィルム基材113に銅配線111・112が形成されており、銅配線111・112の上にソルダーレジスト116が形成されている。銅配線111・112と、集積回路101とは、当該集積回路101のバンプ110によって接続されている。また、図14に示されているように、集積回路101等を外部環境から保護するためにアンダーフィル材117が充填されている。   In the integrated circuit mounting package 130, copper wirings 111 and 112 are formed on a film base 113, and a solder resist 116 is formed on the copper wirings 111 and 112. The copper wirings 111 and 112 and the integrated circuit 101 are connected by the bumps 110 of the integrated circuit 101. Further, as shown in FIG. 14, an underfill material 117 is filled to protect the integrated circuit 101 and the like from the external environment.

TCPやSOFは、樹脂テープ(ポリイミドフィルム等)の基材上に銅箔パターンにて集積回路と、パッケージのリード端子までの配線を形成すると共に、社名、機種名等を形成している。   TCP and SOF form an integrated circuit and wiring to a lead terminal of a package with a copper foil pattern on a base material of a resin tape (polyimide film or the like), and a company name, model name, and the like.

TCPやSOFは、主に液晶パネルの駆動用集積回路のパッケージとして使用されており、TCPやSOFが実装される液晶パネルのガラス基板上の配線、TCPやSOFの接続部の形状、実装される集積回路の端子配置等により、TCPやSOFの外形、配線パターンが異なる。液晶パネルの駆動用集積回路においては、TCPやSOFの形状と、駆動用集積回路が1対1で対応しており、このため、使用される駆動用集積回路とTCPやSOFの形状との組み合わせで、機種名を設定し、TCPやSOF上に配線パターンで機種名を記載している(例えば、特許文献1参照)。   TCP and SOF are mainly used as a package of an integrated circuit for driving a liquid crystal panel. The wiring on the glass substrate of the liquid crystal panel on which the TCP or SOF is mounted, the shape of the connection part of the TCP or SOF, and the like are mounted. The external shape and wiring pattern of TCP and SOF differ depending on the terminal arrangement of the integrated circuit. In the liquid crystal panel driving integrated circuit, the shape of the TCP or SOF corresponds to the driving integrated circuit on a one-to-one basis. Therefore, the combination of the driving integrated circuit used and the shape of the TCP or SOF is used. Thus, the model name is set, and the model name is described in a wiring pattern on the TCP or SOF (see, for example, Patent Document 1).

TCPやSOFに機種名等のマークを表記することは、上記の様に銅箔パターンで形成する以外に、特許文献2に記載されているように、チップの表面保護樹脂上にゴム印等により文字を印字する方法が記載されている。また、特許文献2には、テープキャリアの場合に、チップの裏面やテープ枠に印字することが記載されている。テープ枠の印字は、集積回路の実装の前にリード線パターンを焼き付ける工程で、テープ枠に焼き付けることにより行われる。
特開平5−3227号公報(1993年1月8日公開) 特開昭63−263748号公報(1988年10月31日公開)
Indicating a mark such as a model name on TCP or SOF is not limited to the formation of a copper foil pattern as described above. The method of printing is described. Patent Document 2 describes that in the case of a tape carrier, printing is performed on the back surface of a chip or a tape frame. The printing of the tape frame is performed by printing on the tape frame in the process of printing the lead wire pattern before mounting the integrated circuit.
Japanese Patent Laid-Open No. 5-3227 (published January 8, 1993) JP 63-263748 A (released October 31, 1988)

しかしながら、上記従来の構成では、以下の様な問題点がある。   However, the above conventional configuration has the following problems.

近年、液晶表示装置の普及は目覚しく、様々な分野、製品にて使用されている。このため、大量に生産している表示パネルの一部機能を変更した製品を開発するために、TCPやSOFの形状が全く同一で駆動用集積回路の機能が一部異なる製品が要望される場合が発生する。このような製品開発の場合、開発期間が短くまた開発費も少ない場合が多い。このため駆動用集積回路の機能変更を行っても、TCPやSOFのキャリアテープは変更前と同一のものを使用することになる。専用のキャリアテープを作製する場合、金型やマスクから作製する必要があるため、開発期間がかかると共に、開発費用が必要になるが、変更前と同一のキャリアテープを使用すれば、開発期間、開発費が掛からないという利点があるからである。   In recent years, the spread of liquid crystal display devices has been remarkable and used in various fields and products. For this reason, in order to develop a product in which a part of the functions of a display panel produced in large quantities is changed, a product having a completely different TCP or SOF shape and a partly different function of a driving integrated circuit is required. Occurs. In such product development, the development period is short and the development cost is often low. For this reason, even if the function of the driving integrated circuit is changed, the same carrier tape of TCP or SOF is used as before the change. When producing a dedicated carrier tape, it is necessary to make it from a mold or mask, so it takes a development period and development costs are required, but if you use the same carrier tape as before the change, the development period, This is because there is an advantage that development costs are not required.

しかしながら、同一のキャリアテープを使用した場合、機能が異なる2種類の駆動用集積回路を実装したTCPやSOFを外見で判別することができなくなるという問題が発生する。これは、同一のキャリアテープに2種類の駆動用集積回路のいずれかを実装するため、引用文献2に記載されているようにキャリアテープに予め駆動用集積回路の機種名等を印字すると、駆動用集積回路の実装後に記載された機種名によって両者を判別することができなくなるからである。また引用文献2には駆動用集積回路の裏面に識別マークを記載する方法が示されているが、駆動用集積回路の小型化のため製造時の情報(デートコード)を記載するスペースしかなく、機種名を記載することができない。   However, when the same carrier tape is used, there arises a problem that it becomes impossible to distinguish TCP or SOF mounted with two types of driving integrated circuits having different functions. This is because one of the two types of integrated circuits for driving is mounted on the same carrier tape, so that if the model name of the integrated circuit for driving is printed on the carrier tape in advance as described in the cited document 2, the driving This is because it is impossible to discriminate between the two according to the model name described after the integrated circuit is mounted. Reference 2 shows a method of writing an identification mark on the back surface of the driving integrated circuit, but there is only a space for writing information (date code) at the time of manufacturing for downsizing of the driving integrated circuit, The model name cannot be entered.

このため、駆動用集積回路を実装したTCPやSOFの出荷には、出荷ラベルでの管理等を慎重に行い、間違いがないようにする必要がある。   For this reason, when shipping TCP or SOF mounted with a driving integrated circuit, it is necessary to carefully manage the shipping label and make sure there is no mistake.

また、上記のように外見で判断できないため、不良で返品された場合、駆動用集積回路がどの機能のものであるかを調べるためには、返品先からの情報を元にどの機能の集積回路が使われたかを推測するか、TCPやSOFから集積回路を剥離し、さらに集積回路の樹脂を剥離し、集積回路の回路面に記載されたマーク等を確認したり、回路を確認する必要がある。   In addition, since it cannot be judged by appearance as described above, in order to find out what function the driving integrated circuit has when it is returned due to a defect, the integrated circuit of which function is based on information from the return destination. It is necessary to estimate whether the IC has been used, or to peel off the integrated circuit from the TCP or SOF, to peel off the resin of the integrated circuit, and to check the mark etc. written on the circuit surface of the integrated circuit, or to check the circuit is there.

本発明は、上記の問題点に鑑みてなされたものであり、その目的は、形状が同じフィルム基材上に、形状が同じで機能の異なる集積回路を実装した後に、それぞれを外見のみで容易に判別する手段を提供することにある。   The present invention has been made in view of the above-described problems, and its purpose is to easily mount each integrated circuit having the same shape and different functions on the same film base material, and then each of them can be easily seen only by appearance. It is intended to provide a means for discriminating.

本発明に係る集積回路実装基板は、上記課題を解決するために、機能の異なる同一形状の集積回路をフレキシブルな基材に実装する集積回路実装基板において、前記集積回路を識別するための識別記号を記載する識別記号記載部を備えていることを特徴としている。   In order to solve the above problems, an integrated circuit mounting substrate according to the present invention is an identification symbol for identifying the integrated circuit in an integrated circuit mounting substrate in which integrated circuits having the same shape and different functions are mounted on a flexible base material. It is characterized by having an identification symbol description part for describing.

また、本発明に係る集積回路実装パッケージの製造方法は、前記集積回路実装基板に前記集積回路を実装することにより集積回路実装パッケージを製造する集積回路実装パッケージの製造方法であって、集積回路を前記集積回路実装基板に実装した後に、前記識別記号記載部に識別記号を記載することを特徴としている。   An integrated circuit mounting package manufacturing method according to the present invention is an integrated circuit mounting package manufacturing method for manufacturing an integrated circuit mounting package by mounting the integrated circuit on the integrated circuit mounting substrate. After mounting on the integrated circuit mounting board, an identification symbol is described in the identification symbol description part.

上記の構成によれば、識別記号記載部を備えているので、テープ枠等に印字する従来の構成と異なり、スタンプによる印字やレーザによる刻印のように、基材にリード線のパターンを形成する工程と独立して識別記号記載部に識別記号を記載するように識別記号記載部を構成することができる。これにより、集積回路実装基板に集積回路を実装した後に、実装された集積回路の識別記号を識別記号記載部に記載することができる。   According to the above configuration, since the identification symbol description portion is provided, unlike the conventional configuration for printing on a tape frame or the like, a lead wire pattern is formed on the base material like stamp printing or laser marking. The identification symbol description part can be configured such that the identification symbol is described in the identification symbol description part independently of the process. Thereby, after mounting an integrated circuit on an integrated circuit mounting board, the identification symbol of the mounted integrated circuit can be described in an identification symbol description part.

前記集積回路実装基板は、前記識別記号記載部が前記識別記号の書き換えを可能にする材料によって形成されていることが好ましい。具体的には、所定の第1温度で加熱することにより加熱部分の色を変化させ、前記第1温度と異なる所定の第2温度で加熱することにより前記第1温度にて加熱された部分の色を元に戻す熱可逆性物質を前記材料として用いることができる。   The integrated circuit mounting board is preferably formed of a material that enables the identification symbol description part to rewrite the identification symbol. Specifically, the color of the heated portion is changed by heating at a predetermined first temperature, and the portion heated at the first temperature is heated at a predetermined second temperature different from the first temperature. A thermoreversible substance that restores the color can be used as the material.

また、本発明に係る他の集積回路実装パッケージの製造方法は、前記集積回路実装基板に前記集積回路を実装することにより集積回路実装パッケージを製造する集積回路実装パッケージの製造方法であって、前記集積回路を実装する前に、前記識別記号記載部に実装予定の集積回路の識別記号を記載しておき、予定以外の集積回路が実装された場合、実装された集積回路の前記識別記号に応じて、前記識別記号の全て、もしくは一部を書き換えることを特徴としている。   Further, another integrated circuit mounting package manufacturing method according to the present invention is an integrated circuit mounting package manufacturing method for manufacturing an integrated circuit mounting package by mounting the integrated circuit on the integrated circuit mounting substrate. Before mounting the integrated circuit, the identification symbol of the integrated circuit to be mounted is described in the identification symbol description section, and when an integrated circuit other than the planned one is mounted, the identification symbol of the mounted integrated circuit depends on the identification symbol. Thus, all or a part of the identification symbol is rewritten.

上記の構成によれば、前記集積回路実装基板に前記集積回路を実装する前に、前記識別記号記載部に実装予定の集積回路の識別記号を記載しておき、予定以外の集積回路が実装された場合、実装された集積回路の識別記号に応じて、前記識別記号の全て、もしくは一部を書き換えることができる。   According to the above configuration, before mounting the integrated circuit on the integrated circuit mounting substrate, the identification symbol of the integrated circuit to be mounted is described in the identification symbol description section, and an integrated circuit other than the target is mounted. In this case, all or a part of the identification symbol can be rewritten according to the identification symbol of the mounted integrated circuit.

これにより、予定通りの集積回路を実装した集積回路実装パッケージでは実装後に識別記号を記載する時間を短縮でき、予定以外の、機能の異なる同一形状の集積回路を実装した集積回路実装パッケージを判別することが容易となる。   As a result, the integrated circuit mounting package in which the integrated circuit is mounted as planned can reduce the time for the identification symbol to be described after mounting, and the integrated circuit mounting package in which the integrated circuit of the same shape with different functions other than the planned is mounted is discriminated. It becomes easy.

以上のように、本発明の集積回路実装基板は、実装する集積回路を識別するための識別記号を記載する識別記号記載部を備えていることにより、機能が異なる同一形状の集積回路を実装する場合、実装後に識別記号を記載できるため、実装した後の状態にて、判別が容易となるという効果を奏する。   As described above, the integrated circuit mounting substrate according to the present invention includes the identification symbol description portion that describes the identification symbol for identifying the integrated circuit to be mounted, so that the integrated circuits having the same shape and different functions are mounted. In this case, since the identification symbol can be described after mounting, there is an effect that discrimination is easy in the state after mounting.

本発明の実施形態について図1ないし図10に基づいて説明すると以下の通りである。   An embodiment of the present invention will be described with reference to FIGS. 1 to 10 as follows.

〔実施形態1〕
図1はSOF構造の集積回路実装パッケージ140に識別記号記載部1を設けた図である。
Embodiment 1
FIG. 1 is a diagram in which an identification symbol description unit 1 is provided in an integrated circuit mounting package 140 having an SOF structure.

尚、本実施形態において、図11及び図12に示す集積回路実装パッケージ130と同等の機能を有する構成要素については同一の符号を付記する。   In the present embodiment, components having functions equivalent to those of the integrated circuit mounting package 130 shown in FIGS. 11 and 12 are denoted by the same reference numerals.

図1に示す集積回路実装パッケージ140では、集積回路実装パッケージ130と同様、フィルム基材113に銅配線111・112が形成されており、銅配線111・112の上にソルダーレジスト116が形成されている。銅配線111・112と、集積回路101とは、当該集積回路101のバンプ(図示せず)によって接続された構造となっている。ただし、集積回路実装パッケージ140は、集積回路実装パッケージ130と異なり、識別記号記載部1を備えている。   In the integrated circuit mounting package 140 shown in FIG. 1, the copper wirings 111 and 112 are formed on the film base 113, and the solder resist 116 is formed on the copper wirings 111 and 112, as in the integrated circuit mounting package 130. Yes. The copper wirings 111 and 112 and the integrated circuit 101 are connected by bumps (not shown) of the integrated circuit 101. However, unlike the integrated circuit mounting package 130, the integrated circuit mounting package 140 includes the identification symbol description unit 1.

上記識別記号記載部1は、集積回路実装パッケージ140に機種名等の識別記号が記載可能なスペースとして設けられており、下側に銅配線等が通過しないようにしてある為、平坦な構造となる。   The identification symbol description section 1 is provided as a space where an identification symbol such as a model name can be described in the integrated circuit mounting package 140, and copper wiring or the like is prevented from passing therethrough. Become.

図2から図4の図を参照して、集積回路実装パッケージ140に機種名を記載する方法を以下に説明する。   A method for describing the model name in the integrated circuit mounting package 140 will be described below with reference to FIGS.

図2は複数の集積回路実装パッケージ140を作製するための集積回路実装前のフィルムの状態を示している。この状態では、識別記号記載部1には何も記載されていない。   FIG. 2 shows the state of the film before the integrated circuit mounting for producing a plurality of integrated circuit mounting packages 140. In this state, nothing is described in the identification symbol description unit 1.

図3は図2のフィルムに集積回路101を実装後のフィルムの状態を示しているが、この状態では、まだ識別記号記載部1には何も記載されていない。   FIG. 3 shows the state of the film after the integrated circuit 101 is mounted on the film of FIG. 2. In this state, nothing is described in the identification symbol description part 1 yet.

図4は図3の集積回路実装後のフィルムに機種名A123401を記載した状態を示している。識別記号記載部1における機種名の記載はスタンプによる印字や、レーザによる刻印により行うことが出来る。   FIG. 4 shows a state in which the model name A123401 is written on the film after the integrated circuit is mounted in FIG. The model name in the identification symbol description section 1 can be written by stamping or laser marking.

図5は図2のフィルムに、集積回路101とチップ外形(チップサイズ、バンプ位置等)は同じであるが、別回路を含む集積回路101Aを実装した状態を示している。この状態では、識別記号記載部1に機種名A123402と記載することにより、図4のフィルムと図5のフィルムは違った集積回路(101、101A)が実装されていることが一目で確認できる。   FIG. 5 shows a state in which an integrated circuit 101A including another circuit is mounted on the film of FIG. In this state, by describing the model name A123402 in the identification symbol description section 1, it can be confirmed at a glance that different integrated circuits (101, 101A) are mounted on the film of FIG. 4 and the film of FIG.

〔実施形態2〕
図6はSOF構造の集積回路実装パッケージ150に識別記号記載部2を設けた図である。
[Embodiment 2]
FIG. 6 is a diagram in which an identification symbol description unit 2 is provided in an integrated circuit mounting package 150 having an SOF structure.

なお、本実施形態において、図1に示す集積回路実装パッケージ140と同等の機能を有する構成要素については同一の符号を付記して、その説明を省略する。   In the present embodiment, components having functions equivalent to those of the integrated circuit mounting package 140 shown in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

図6に示す集積回路実装パッケージ150は、図1に示す集積回路実装パッケージ140と同様に構成されているが、識別記号記載部1の代わりに識別記号記載部2を備えている。   An integrated circuit mounting package 150 illustrated in FIG. 6 is configured in the same manner as the integrated circuit mounting package 140 illustrated in FIG. 1, but includes an identification symbol description unit 2 instead of the identification symbol description unit 1.

上記識別記号記載部2には、光を反射する光反射シートと、熱により白濁、透明が可逆的に変化する熱可逆性物質からなる熱可逆性のシートとが、光反射シート上に熱可逆性シートを重ねるように設置されており、所定の書込温度(第1温度)の熱により白濁させた場合、光沢のある銀色の地に白色の表示となり、書込温度とは異なる所定の消去温度(第2温度)の熱により透明にした場合、表示がなくなる。   The identification symbol description unit 2 includes a light reflecting sheet that reflects light and a thermoreversible sheet made of a thermoreversible material that reversibly changes in white turbidity and transparency due to heat, and is thermally reversible on the light reflecting sheet. When the sheet is made cloudy by heat at a predetermined writing temperature (first temperature), a white display is displayed on a glossy silver ground, and a predetermined erasure that is different from the writing temperature. When it is made transparent by the heat of the temperature (second temperature), the display disappears.

図7から図9の図を参照して、集積回路実装パッケージ150に機種名を記載する方法を以下に説明する。   A method for describing the model name on the integrated circuit mounting package 150 will be described below with reference to FIGS.

図7は複数の集積回路実装パッケージ150を作製するための集積回路実装前のフィルムの状態を示している。この状態では、識別記号記載部2に機種名A123401と記載されている。機種名の記載はサーマルヘッドやレーザにて熱を加えることにより、識別記号記載部2の可逆性材料を白濁させることにより行う。   FIG. 7 shows the state of the film before the integrated circuit mounting for producing a plurality of integrated circuit mounting packages 150. In this state, the model name A123401 is described in the identification symbol description part 2. The model name is described by making the reversible material of the identification symbol description part 2 cloudy by applying heat with a thermal head or a laser.

図8は図7の状態のフィルムに機種名A123401用の集積回路101を実装した状態を示している。機種名の変更がない場合、この状態で完成である。   FIG. 8 shows a state where the integrated circuit 101 for the model name A123401 is mounted on the film in the state of FIG. If there is no change in the model name, it is completed in this state.

図9は図7の状態のフィルムに機種名A123402用の集積回路101Aを実装した状態を示している。識別記号記載部2には機種名A123401が記載されており、機種名の変更が必要である。機種名の変更のため識別記号記載部2に機種名を書き込む時とは別の消去温度の熱を与え白濁している熱可逆性シートを透明にして記載された機種名を消去する。その後、書込温度の熱を識別記号記載部2に与えて機種名を書き込むことにより図10に示すように、機種名A123402となる。   FIG. 9 shows a state where the integrated circuit 101A for the model name A123402 is mounted on the film in the state of FIG. A model name A123401 is described in the identification symbol description part 2, and it is necessary to change the model name. In order to change the model name, heat is applied at an erasing temperature different from that when the model name is written in the identification symbol description part 2, and the cloudy thermoreversible sheet is made transparent to erase the model name. Then, the model name A123402 is obtained as shown in FIG. 10 by applying heat of the writing temperature to the identification symbol description unit 2 and writing the model name.

上記のように、機種名A123402と記載することにより、図8のフィルムと図10のフィルムは違った集積回路が実装されていることが一目で確認できる。また、識別記号記載部2が熱可逆性材料によって形成されているので、識別記号記載部2にすでに機種名が記載されている状態で、集積回路の機種名を変更する場合に、容易に機種名を書き換えることができる。   As described above, by describing the model name A123402, it can be confirmed at a glance that different integrated circuits are mounted on the film of FIG. 8 and the film of FIG. Further, since the identification symbol description part 2 is formed of a thermoreversible material, the model name can be easily changed when the model name of the integrated circuit is changed in a state where the model name is already described in the identification symbol description part 2. You can change the name.

尚、上記手順では、熱可逆性シートを透明化することにより、記載された機種名A123401全てを消去した後、再度機種名を書き込む手順を説明したが、これに限定されない。変更する文字が予め分かっている場合、例えば下2桁のみ変更するとき、その文字の記載範囲に対して熱を与え熱可逆性シートを透明化し、その部分のみ書き換えることも可能である。   In the above procedure, the procedure of writing the model name again after erasing all the model name A123401 described by making the thermoreversible sheet transparent is described, but the present invention is not limited to this. When the character to be changed is known in advance, for example, when only the last two digits are changed, heat can be applied to the description range of the character to make the thermoreversible sheet transparent, and only that portion can be rewritten.

なお、上述の説明では、SOF構造の集積回路実装パッケージについて説明したが、これに限るものではない。TCP構造の集積回路実装パッケージであってもよい。フィルム基材を用いた集積回路実装パッケージであれば、本実施形態と同様の効果が得られる。また、識別記号記載部2において機種名を書き換え可能にする構成として、光反射シートと熱可逆性シートとを用いたが、これに限るものではない。   In the above description, the integrated circuit mounting package having the SOF structure has been described. However, the present invention is not limited to this. An integrated circuit mounting package having a TCP structure may be used. If it is an integrated circuit mounting package using a film substrate, the same effect as this embodiment can be obtained. Moreover, although the light reflection sheet and the thermoreversible sheet are used as the configuration in which the model name can be rewritten in the identification symbol description unit 2, the present invention is not limited to this.

一例として、上記識別記号記載部2を構成する材料として、ロイコ染料を用いることができる。ロイコ染料を用いた識別記号記載部2は、サーマルヘッドやレーザにて印字に必要な温度(約170℃以上)に加熱され急冷されると発色する。機種名の消去は消色に必要な温度(約120℃〜140℃)を一定時間かけることで行う。   As an example, a leuco dye can be used as the material constituting the identification symbol description part 2. The identification symbol description part 2 using a leuco dye is colored when heated to a temperature (about 170 ° C. or higher) necessary for printing with a thermal head or laser and rapidly cooled. The model name is erased by applying a temperature necessary for erasing (about 120 ° C. to 140 ° C.) for a predetermined time.

本発明は上述した各実施形態に限定されるものではなく、請求項に示した範囲で種々の変更が可能であり、異なる実施形態にそれぞれ開示された技術的手段を適宜組み合わせて得られる実施形態についても本発明の技術的範囲に含まれる。   The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

キャリアテープが共通で、機能が異なる集積回路のパッケージにおいて、パッケージの部品管理に利用できる。   In an integrated circuit package having a common carrier tape and different functions, it can be used for package component management.

本発明の実施形態1によるSOF構造の集積回路実装パッケージの構成を示す上面図である。It is a top view which shows the structure of the integrated circuit mounting package of the SOF structure by Embodiment 1 of this invention. 本発明の実施形態1による集積回路実装前のフィルムの状態を示す図である。It is a figure which shows the state of the film before integrated circuit mounting by Embodiment 1 of this invention. 図2に示すフィルムに集積回路実装後のフィルムの状態を示す図である。It is a figure which shows the state of the film after integrated circuit mounting in the film shown in FIG. 図3の集積回路実装後のフィルムに機種名を記載した状態を示す図である。It is a figure which shows the state which described the model name on the film after the integrated circuit mounting of FIG. 図2のフィルムに他機種の集積回路を実装し機種名を記載した状態を示す図である。It is a figure which shows the state which mounted the integrated circuit of another model on the film of FIG. 2, and described the model name. 本発明の実施形態2によるSOFの集積回路実装パッケージの構成を示す上面図である。It is a top view which shows the structure of the integrated circuit mounting package of SOF by Embodiment 2 of this invention. 本発明の実施形態2による集積回路実装前のフィルムの状態を示す図である。It is a figure which shows the state of the film before integrated circuit mounting by Embodiment 2 of this invention. 図7に示すフィルムに集積回路実装後のフィルムの状態を示す図である。It is a figure which shows the state of the film after integrated circuit mounting in the film shown in FIG. 図7に示すフィルムに他機種の集積回路実装後のフィルムの状態を示す図である。It is a figure which shows the state of the film after the integrated circuit of another model was mounted in the film shown in FIG. 図9に示すフィルムに記載した機種名を書き換えた状態を示す図である。It is a figure which shows the state which rewritten the model name described in the film shown in FIG. 従来の一般的なTCP構造の集積回路実装パッケージの構成を示す上面図である。It is a top view which shows the structure of the integrated circuit mounting package of the conventional general TCP structure. 図11の切断線B−B’において切断した状態を示す矢視断面図である。It is arrow sectional drawing which shows the state cut | disconnected in the cutting line B-B 'of FIG. 従来の一般的なSOF構造の集積回路実装パッケージの構成を示す上面図である。It is a top view which shows the structure of the integrated circuit mounting package of the conventional general SOF structure. 図13の切断線B−B’において切断した状態を示す矢視断面図である。It is arrow sectional drawing which shows the state cut | disconnected in the cutting line B-B 'of FIG.

符号の説明Explanation of symbols

1 識別記号記載部
2 識別記号記載部
101 集積回路
101A 集積回路
113 フィルム基材(基材)
DESCRIPTION OF SYMBOLS 1 Identification symbol description part 2 Identification symbol description part 101 Integrated circuit 101A Integrated circuit 113 Film base material (base material)

Claims (5)

機能の異なる同一形状の集積回路をフレキシブルな基材に実装する集積回路実装基板において、
前記集積回路を識別するための識別記号を記載する識別記号記載部を備えていることを特徴とする集積回路実装基板。
In an integrated circuit mounting board that mounts integrated circuits of the same shape with different functions on a flexible substrate,
An integrated circuit mounting board, comprising: an identification symbol description portion that describes an identification symbol for identifying the integrated circuit.
請求項1に記載の集積回路実装基板に前記集積回路を実装することにより集積回路実装パッケージを製造する集積回路実装パッケージの製造方法であって、
集積回路を前記集積回路実装基板に実装した後に、前記識別記号記載部に識別記号を記載することを特徴とする集積回路実装パッケージの製造方法。
An integrated circuit mounting package manufacturing method for manufacturing an integrated circuit mounting package by mounting the integrated circuit on the integrated circuit mounting substrate according to claim 1,
An integrated circuit mounting package manufacturing method, wherein after an integrated circuit is mounted on the integrated circuit mounting substrate, an identification symbol is described in the identification symbol description section.
前記識別記号記載部が前記識別記号の書き換えを可能にする材料によって形成されていることを特徴とする請求項1に記載の集積回路実装基板。   The integrated circuit mounting substrate according to claim 1, wherein the identification symbol description part is made of a material that enables the identification symbol to be rewritten. 所定の第1温度で加熱することにより加熱部分の色を変化させ、前記第1温度と異なる所定の第2温度で加熱することにより前記第1温度にて加熱された部分の色を元に戻す熱可逆性物質を前記材料として用いたことを特徴とする請求項3に記載の集積回路実装基板。   The color of the heated portion is changed by heating at a predetermined first temperature, and the color of the portion heated at the first temperature is restored by heating at a predetermined second temperature different from the first temperature. The integrated circuit mounting substrate according to claim 3, wherein a thermoreversible substance is used as the material. 請求項3または4に記載の集積回路実装基板に前記集積回路を実装することにより集積回路実装パッケージを製造する集積回路実装パッケージの製造方法であって、
前記集積回路を実装する前に、前記識別記号記載部に実装予定の集積回路の識別記号を記載しておき、
予定以外の集積回路が実装された場合、実装された集積回路の前記識別記号に応じて、前記識別記号の全て、もしくは一部を書き換えることを特徴とする集積回路実装パッケージの製造方法。
An integrated circuit mounting package manufacturing method for manufacturing an integrated circuit mounting package by mounting the integrated circuit on the integrated circuit mounting substrate according to claim 3,
Before mounting the integrated circuit, the identification symbol of the integrated circuit to be mounted in the identification symbol description section,
A method of manufacturing an integrated circuit mounting package, wherein when an integrated circuit other than the scheduled one is mounted, all or a part of the identification symbol is rewritten in accordance with the identification symbol of the mounted integrated circuit.
JP2008036592A 2008-02-18 2008-02-18 Integrated circuit mounting substrate and integrated circuit mounting package manufacturing method Pending JP2009194342A (en)

Priority Applications (1)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008036592A JP2009194342A (en) 2008-02-18 2008-02-18 Integrated circuit mounting substrate and integrated circuit mounting package manufacturing method

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Publication Number Publication Date
JP2009194342A true JP2009194342A (en) 2009-08-27

Family

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Country Link
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