JP2009239046A - Manufacturing method of electroluminescence panel, and the electroluminescence panel - Google Patents

Abstract

A pixel transistor is prevented from being deteriorated by light emitted from an organic electroluminescence element.
A pixel electrode 21a and pixel transistors 21 and 22 formed on the same surface of the same substrate 2, a protective insulating film 32 formed so as to cover the pixel electrode 21a and the pixel transistors 21 and 22, and a protection An exposed hole 33 that is formed in the insulating film 32 to expose the pixel electrode 21a, an organic compound layer 20b that is formed in the exposed hole 33, and an upper portion of the organic compound layer 20b that is not the upper portion of the partition wall 6 are formed. A counter electrode 20d;
An electroluminescence display panel 10 including a partition wall 6 and a sealing layer 7 formed on the counter electrode 20d.
[Selection] Figure 3

Description

  The present invention relates to a method for manufacturing an electroluminescence panel and an electroluminescence panel.

  An organic electroluminescent element has a laminated structure in which an organic compound layer is interposed between an anode and a cathode. When a forward bias voltage is applied between the anode and the cathode, electrons and holes are formed in the organic compound layer. Cause recombination and the organic compound layer emits light. An electroluminescence display panel that displays images by arranging a plurality of organic electroluminescence elements that emit red, green, and blue as subpixels in a matrix on a substrate has been realized.

In the case of active driving, after a pixel transistor is formed on a substrate, a protective insulating film that covers the pixel transistor is formed, a pixel electrode is formed on the protective insulating film, and then an organic compound layer is formed on the pixel electrode. It is known (see, for example, Patent Document 1).
JP 2007-234391 A

  Incidentally, as shown in FIG. 18, in order to simplify the manufacturing process, the pixel transistor 121 and the pixel electrode 120a are formed on the substrate, and the pixel electrode 120a is formed on the protective insulating film 132 that covers the pixel transistor 121 and the pixel electrode 120a. A structure in which an exposure hole 133 that exposes the organic compound layer 120b is formed and an organic compound layer 120b is formed on the pixel electrode 120a has been studied.

  However, since the protective insulating film 132 transmits light, in this structure, as shown in FIG. 18, light emitted from the organic compound layer 120b to the side or reflected by the insulating substrate 102 is applied to the protective insulating film 132. It is conceivable that the incident light passes through the partition wall 106 and is reflected by the counter electrode 120d to reach the pixel transistor 121. In such a case, inconveniences such as causing light degradation in the pixel transistor 121 can be considered.

  An object of the present invention is to prevent a pixel transistor from being deteriorated by light emitted from an organic electroluminescence element.

To solve the above issues,
The invention according to claim 1 is an electroluminescence panel, wherein a pixel transistor connected to a pixel electrode formed on an upper surface of a substrate, a protective insulating film formed so as to cover the pixel transistor, An organic compound layer formed on the pixel electrode; a counter electrode formed on a portion of the organic compound layer that is not above the pixel transistor; and formed on the protective insulating film and the counter electrode. And a sealing layer.

  The invention described in claim 2 is an electroluminescence panel, further comprising a partition wall formed at a position above the pixel transistor and overlapping with the upper portion of the protective insulating film.

  The invention according to claim 3 is an electroluminescence panel, a pixel transistor connected to a pixel electrode formed on an upper surface of a substrate, a protective insulating film formed so as to cover the pixel transistor, An organic compound layer formed on the pixel electrode; a counter electrode made of a transparent conductive film formed on the organic compound layer; and a sealing layer formed on the counter electrode. Features.

  The invention described in claim 4 is an electroluminescence panel, further comprising a partition wall formed on the protective insulating film.

  The invention according to claim 5 is the electroluminescence panel according to claim 1 or 2, further comprising an antireflection layer formed on an upper surface of the sealing layer.

  According to a sixth aspect of the present invention, a pixel electrode, a pixel transistor connected to the pixel electrode, a protective insulating film covering the pixel transistor, and a portion of the protective insulating film not corresponding to the pixel electrode are provided. And an organic luminescence layer provided in the protective insulating film, wherein an organic compound layer is formed in an exposed hole exposing the pixel electrode, and the organic compound layer A counter electrode is formed on a portion which is an upper portion but not on the partition, and a sealing layer for sealing the partition and the counter electrode is formed.

  According to a seventh aspect of the present invention, a pixel electrode, a pixel transistor connected to the pixel electrode, a protective insulating film that covers the pixel transistor, and a portion of the protective insulating film that does not correspond to the pixel electrode are provided. And a partition wall, and a method of manufacturing an electroluminescence panel, wherein an organic compound layer is formed in an exposed hole provided in the protective insulating film and exposing the pixel electrode, and the organic compound layer and A counter electrode made of a transparent conductive film is formed on the partition wall, and a sealing layer for sealing the counter electrode is formed.

  The invention according to claim 8 is the method for manufacturing the electroluminescence panel according to claim 6 or 7, wherein an antireflection layer is formed on an upper surface of the sealing layer.

  According to the present invention, it is possible to prevent the characteristics of the pixel transistor from being changed by light emitted from the organic electroluminescence element.

  The best mode for carrying out the present invention will be described below with reference to the drawings. However, although various technically preferable limitations for implementing the present invention are given to the embodiments described below, the scope of the invention is not limited to the following embodiments and illustrated examples. Further, in the following description, the term electroluminescence is abbreviated as EL.

  1 is a circuit diagram of one subpixel in an EL display panel 10 according to an embodiment of the present invention, FIG. 2 is a plan view of one subpixel, and FIG. 3 is a view taken along arrows III-III in FIG. It is sectional drawing. In the EL display panel 10, red, blue and green sub-pixels constitute one dot pixel, and such pixels are arranged in a matrix. When attention is paid to the horizontal arrangement, red subpixels, blue subpixels, and green subpixels are repeatedly arranged in this order. When attention is paid to the vertical arrangement, the same colors are arranged in a line.

  In the EL display panel 10, a plurality of scanning lines 25, signal lines 24, and supply lines 26 are provided in order to output various signals to subpixels. The scanning lines 25 and the supply lines 26 and the signal lines 24 extend in a direction perpendicular to each other.

  The subpixel includes two n-channel transistors 21 and 22, a capacitor 27, and an organic EL element 20. The two n-channel transistors 21 and 22 and the capacitor 27 apply a voltage to the organic EL element 20 in accordance with input signals of the scanning line 25, the signal line 24, and the supply line 26.

  As shown in FIGS. 2 and 3, gate electrodes 21G and 22G of transistors 21 and 22 are provided on a transparent insulating substrate 2, and one electrode 27a of a capacitor 27 and a signal line 24 are provided. A common gate insulating film 31 is covered. As shown in FIG. 2, the electrode 27a and the gate electrode 21 are integrally formed.

  On the gate insulating film 31, as shown in FIG. 3, the semiconductor films 21a and 22a of the transistors 21 and 22, the channel protective films 21b and 22b, the impurity semiconductor films 21c, 21d, 22c and 22d, and the source electrodes 21S and 22S. The drain electrodes 21D and 22D, the other electrode 27b of the capacitor 27, the scanning line 25, and the supply line 26 are provided. As shown in FIG. 2, the source electrode 21S and the electrode 27b are integrally formed, the drain electrode 21D is formed integrally with the supply line 26, and the source electrode 22S is gate electrode 21G by a contact hole 28a. The signal line 24 is electrically connected to the drain electrode 22D through the contact hole 28b, and the scanning line 25 is electrically connected to the gate electrode 22 through the contact hole 28c.

Further, on the gate insulating film 31, subpixel electrodes 20a (pixel electrodes) are arranged in a matrix. These subpixel electrodes 20a are conductive films (for example, tin-doped indium oxide (ITO), zinc-doped indium oxide, indium oxide (In ₂ O ₃ ), tin oxide (SnO)) formed by vapor deposition. ₂ ), which is formed by patterning zinc oxide (ZnO) or cadmium-tin oxide (CTO) using a photolithography method and an etching method. The subpixel electrode 20a is formed so as to overlap with a part of the source electrode 21S of the transistor 21, and is electrically connected to the source electrode 21S.

The source electrodes 21S and 22S and drain electrodes 21D and 22D of the transistors 21 and 22, the other electrode 27b of the capacitor 27, the scanning line 25 and the supply line 26, and the subpixel electrode 20a are covered with a common protective insulating film 32. An exposure hole 33 for exposing the subpixel electrode 20a is formed in the portion of the protective insulating film 32 corresponding to the subpixel electrode 20a. By forming the exposure hole 33, the protective insulating film 32 is formed in a mesh shape so as to sew between the subpixel electrodes 20a, and overlaps with a part of the outer edge of the subpixel electrode 20a to surround the subpixel electrode 20a. ing. An organic EL layer 20 b described later is formed in the exposure hole 33.
The stacked structure from the insulating substrate 2 to the partition 6 is the transistor array panel 50.

  On the protective insulating film 32, the partition walls 6 are formed in a mesh shape. The partition wall 6 is made of, for example, a resin such as polyimide, and is sufficiently thicker than the electrodes of the transistors 21 and 22, the scanning line 25, the signal line 24, and the supply line 26.

  On the subpixel electrode 20a, a hole injection layer 20e and a light emitting layer 20f are sequentially laminated to form an organic EL layer 20b (organic compound layer). The hole injection layer 20e is made of PEDOT as a conductive polymer and PSS as a dopant, and the light emitting layer 20f is made of a conjugated polymer such as a polyphenylene vinylene light emitting material or a polyfluorene light emitting material. The organic EL layer 20b may further have an electron transport layer on the light emitting layer. The organic EL layer 20b may have a two-layer structure including a light emitting layer and an electron transport layer formed on the subpixel electrode 20a, and a combination of the carrier transport layer and the light emitting layer can be arbitrarily set. Further, in these layer structures, a laminated structure in which an interlayer that restricts carrier transport between appropriate layers may be interposed, or another laminated structure may be used.

  The hole injection layer 20e and the light emitting layer 20f are formed by a wet coating method (for example, an ink jet method). In this case, an organic compound-containing liquid containing PEDOT and PSS that becomes the hole injection layer 20e is applied to the subpixel electrode 20a to form a film, and then contains an organic compound containing a conjugated polymer light-emitting material that becomes the light-emitting layer 20f. The liquid is applied to form a film, but since the thick partition walls 6 are provided, it is possible to prevent the organic compound-containing liquid applied to the adjacent subpixel electrodes 20a from being mixed beyond the partition walls 6. it can.

  The light emitting layer 20f emits red light when the subpixel is red, the light emitting layer 20f emits green when the subpixel is green, and the light emitting layer 20f turns blue when the subpixel is blue. Each material is set to emit light.

  On the light emitting layer 20f, the electron injection layer 20c which comprises the cathode of the organic EL element 20 is formed. The electron injection layer 20c is a common electrode formed in common for all subpixels. The electron injection layer 20c is formed of a material having a work function lower than that of the subpixel electrode 20a. For example, the electron injection layer 20c is formed of a simple substance or an alloy containing at least one of indium, magnesium, calcium, lithium, barium, and a rare earth metal. . Alternatively, the electron injection layer 20c may have a laminated structure in which layers of the above various materials are laminated.

On the electron injection layer 20c, for example, a counter electrode 20d is formed by depositing a conductive material such as aluminum, chromium, silver, or a palladium silver-based alloy to a thickness of 100 nm or more by a vapor deposition method. In addition, as a method of not forming the electron injection layer 20c and the counter electrode 20d only on the upper part of the partition wall 6, a method of mask vapor deposition or a method of removing the electron injection layer 20c and the counter electrode 20d on the partition wall 6 by polishing after the deposition is performed. There is.
The organic EL element 20 is formed by laminating the subpixel electrode 20a, the organic EL layer 20b, the electron injection layer 20c, and the counter electrode 20d in this order.

  A sealing layer 7 that transmits light emitted from the organic EL element 20 is deposited on the partition wall 6 and the counter electrode 20d. The sealing layer 7 is formed so as to cover the entire display unit 3. Yes. That is, the sealing layer 7 is formed so as to cover the entire plurality of organic EL elements 10. The sealing layer 7 has insulating properties, and is made of, for example, a thermosetting resin such as an epoxy resin or an acrylic resin, a thermoplastic resin, a photocurable resin, or the like, and a silica filler added to these resins. But you can. The sealing layer 7 plays a role of preventing the organic EL element 20 from being exposed to the outside air. By allowing the sealing layer 7 to transmit the light emitted from the organic EL element 20, it is possible to suppress the light incident on the sealing layer 7 from the partition wall 6 from being reflected at the interface.

  In addition, although the partition 6 was formed in the EL display panel 10 of this embodiment, the same effect can be acquired also in the EL display panel in which the partition is not formed as shown in FIG.

  Next, a manufacturing process for manufacturing the EL display panel 10 will be described. First, a method for manufacturing the transistor array panel 50 will be described with reference to FIGS. 5-14, (a) is a figure of the same cross section as FIG. 3, (b) is sectional drawing in the contact hole 28a.

  First, as shown in FIG. 5, the gate metal 35 is formed on the entire surface of the insulating substrate 2 and patterned to form the gates 21G and 22G, the electrodes 27a, and the signal lines 24. Next, as shown in FIG. 6, a gate insulating film 31 covering them, a semiconductor layer 36 made of amorphous silicon or polysilicon to be the semiconductor films 21a and 22a, and silicon nitride or silicon oxide on the semiconductor layer 36 The layer 37 is formed on the entire surface. Next, as shown in FIG. 7, channel protective films 21b and 22b are formed by patterning a layer 37 of silicon nitride or silicon oxide.

Next, as shown in FIG. 8, a layer (n ⁺ silicon layer 38) made of amorphous silicon containing n-type impurity ions to be the impurity semiconductor films 21c, 21d, 22c, and 22d is formed on the entire surface.
Next, as shown in FIG. 9, holes are formed so that the gate metal is exposed in the gate insulating film 31, the semiconductor layer, and the n ⁺ silicon layer at the positions where the contact holes 28a, 28b, and 28c are to be formed.
Next, as shown in FIG. 10, the source / drain metal 39 is made to be a flat surface. At this time, the gate metal 35 and the source / drain metal 39 are joined and conducted at the hole portions formed in the gate insulating film 31, the semiconductor layer 36, and the n ⁺ silicon layer 38, and the contact holes 28a, 28b, and 28c are formed. It is formed.

Next, as shown in FIG. 11, the source / drain metal 39 is patterned to form the source electrodes 21S and 22S, the drain electrodes 21D and 22D, the other electrode 27b of the capacitor 27, the scanning line 25, and the supply line 26. .
Next, as shown in FIG. 12, a conductive film is formed by vapor deposition and patterned to form a subpixel electrode 20a.

  Next, as shown in FIG. 13, the source electrodes 21S and 22S and the drain electrodes 21D and 22D of the transistors 21 and 22, the other electrode 27b of the capacitor 27, the scanning line 25 and the supply line 26, and the subpixel electrode 20a are covered. A protective insulating film 32 is formed on the entire surface, and an exposure hole 33 is formed in the subpixel electrode 20a. Thereafter, as shown in FIG. 14, a resin such as polyimide is applied to the entire surface, and is patterned so as to remain on the upper portion of the protective insulating film 32, thereby forming the barrier rib 6 in a mesh shape.

Next, a manufacturing process for forming the organic EL element 20 on the transistor array panel 50 and manufacturing the EL display panel 10 will be described.
First, the transistor array panel 50 is cleaned. Next, the surface of the subpixel electrode 20a is made lyophilic with respect to the organic compound-containing liquid used for forming the organic EL layer 20b. For example, when a hydrophilic solvent is used for the organic compound-containing liquid, it is hydrophilized by performing oxygen plasma treatment, UV ozone treatment, or the like.
Next, a hole injection material that is soluble in a hydrophilic solvent and hardly soluble or insoluble in a hydrophobic solvent (for example, PEDOT as a conductive polymer and PSS as a dopant) in water. The dissolved organic compound-containing liquid is applied to the subpixel electrode 20a. As an application method, an inkjet method (droplet discharge method) or other printing methods may be used, or a coating method such as a dip coating method or a spin coating method may be used. In order to form the hole injection layer 20e independently for each subpixel electrode 20a, a printing method such as an inkjet method is preferable.

  When the hole injection layer 20e is formed by the wet coating method as described above, since the thick partition wall 6 is provided, the organic compound-containing liquid applied to the adjacent subpixel electrode 20a is mixed beyond the partition wall 6. Do not fit. Therefore, the hole injection layer 20e can be formed independently for each subpixel electrode 20a.

  After forming the hole injection layer 20e, the transistor array panel 50 is dried at a temperature of 160 to 200 ° C. using a hot plate in a state where the hole injection layer 20e is exposed to the atmosphere, and the residual solvent is removed.

  Next, red, green, and blue conjugated polymer light-emitting materials are dissolved in hydrophobic organic solvents (eg, tetralin, tetramethylbenzene, and mesitylene) to prepare red, green, and blue organic compound-containing liquids. To do. A red organic compound-containing liquid is applied on the hole injection layer 20e of the red subpixel, and a green organic compound-containing liquid is applied on the hole injection layer 20e of the green subpixel. A blue organic compound-containing liquid is applied on the hole injection layer 20e of the subpixel. Thereby, the light emitting layer 20f is formed on the hole injection layer 20e. As an application method, an ink-jet method (droplet discharge method) or other printing method is used, and coating is performed for each color.

  When the hole injection layer 20e and the light emitting layer 20f are formed by the wet coating method as described above, the thick partition walls 6 are provided, so that the organic compound-containing liquid applied to the adjacent subpixels exceeds the partition walls 6. And do not mix. Therefore, the light emitting layer 20f can be formed independently for each subpixel.

  Next, the transistor array panel 50 is dried by a hot plate under an inert gas atmosphere (for example, a nitrogen gas atmosphere), and the residual solvent is removed. In addition, you may dry with a sheathed heater in a vacuum.

Next, the electron injection layer 20c is formed by vapor deposition. Specifically, a thin film of Ca or Ba is formed by vacuum deposition. Next, the counter electrode 20d is formed on the electron injection layer 20c by vapor deposition. Thereafter, the electron injection layer 20c and the counter electrode 20d above the partition wall 6 are removed.
Thus, the organic EL element 20 is formed on the transistor array panel 50.

Next, for example, a thermosetting resin such as an epoxy resin or an acrylic resin, a thermoplastic resin, a photocurable resin, or the like is applied to the upper portion of the partition wall 6 and the counter electrode 20d and cured to form the sealing layer 7.
Thus, the EL display panel 10 is completed.

According to the present embodiment, since the counter electrode 20d is not provided on the upper side of the partition wall 6, the light incident on the protective insulating film 32 from the organic EL element 20 is reflected at the interface between the partition wall 6 and the counter electrode 20d. It is possible to prevent the transistors 21 and 22 from being reached.
Can do.

  The present invention is not limited to the above embodiment, and various improvements and design changes may be made without departing from the spirit of the present invention.

  For example, the present invention can also be applied to a printer head exposure apparatus.

<Modification 1>
For example, as shown in FIG. 15, a transparent conductive material (for example, tin-doped indium oxide (ITO), zinc-doped indium oxide, indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ )) is formed on the partition wall 6. ), Zinc oxide (ZnO) or cadmium-tin oxide (CTO)) may be formed by vapor phase epitaxy to form the counter electrode 20d.

  Also in the case of FIG. 15, the counter electrode 20d above the partition wall 6 is made of a transparent conductive material, and light incident on the protective insulating film 32 from the organic EL element 20 is transmitted from the partition wall 6 to the counter electrode 20d. 6 and the counter electrode 20d can be prevented from reaching the transistors 21 and 22 by reflection.

  In addition, although the partition 6 was formed in the EL display panel 10 of this embodiment, the same effect can be acquired also in the EL display panel in which the partition is not formed as shown in FIG.

<Modification 2>
Alternatively, as shown in FIG. 17, an antireflection layer 8 may be formed on the sealing layer 7. Also in the case of FIG. 17, the light incident on the protective insulating film 32 from the organic EL element 20 is absorbed by the antireflection layer 8 or transmitted through the antireflection layer 8, and therefore at the interface between the partition wall 6 and the antireflection layer 8. It is possible to prevent reflection and to reach the transistors 21 and 22.
Note that the counter electrode 20 d may be formed on the partition wall 6 with a transparent conductive film, and the antireflection layer 8 may be formed on the sealing layer 7.

As the antireflection layer 8, for example, a light absorbing material that absorbs light emitted from the organic EL element 20 can be used. An example of the light absorbing material is a resin BM that is widely used as a black matrix (BM) in TFT-LCDs. Many of the general-purpose resins BM are obtained by dispersing a black pigment such as carbon black or titanium black in a negative photosensitive resin.
Alternatively, as the antireflection layer 8, an antireflection film that transmits and does not reflect light emitted from the organic EL element 20 may be used. As the antireflection film, for example, a dielectric multilayer film can be used.

1 is a circuit diagram of one subpixel in an EL display panel 10 according to an embodiment of the present invention. FIG. 4 is a plan view of one subpixel of the EL display panel 10; FIG. 3 is a cross-sectional view taken along the line III-III in FIG. 2. It is sectional drawing of the EL display panel 10 in which the partition 6 which concerns on embodiment of this invention is not formed. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. (A) is the same cross section as FIG. 3, (b) is sectional drawing for demonstrating the manufacturing process which manufactures the EL display panel 10 in the contact hole 28a. It is sectional drawing which shows EL display panel 10 which concerns on the 1st modification of this invention. It is sectional drawing of EL display panel 10 in which the partition 6 which concerns on the 1st modification of this invention is not formed. It is sectional drawing which shows EL display panel 10 which concerns on the 2nd modification of this invention. It is sectional drawing which shows the conventional EL display panel 110.

Explanation of symbols

2 Substrate 6 Partition 7 Sealing layer 8 Antireflection layer 10 EL display panel 20 Electroluminescence elements 21 and 22 Pixel transistor 21a Pixel electrode 32 Protective insulating film 33 Exposed hole 20b Organic compound layer 20d Counter electrode

Claims (8)

A pixel transistor connected to a pixel electrode formed on the top surface of the substrate;
A protective insulating film formed to cover the pixel transistor;
An organic compound layer formed on the pixel electrode;
A counter electrode formed on a portion of the organic compound layer and not on the pixel transistor;
An electroluminescence panel comprising: the protective insulating film and a sealing layer formed on the counter electrode.   The electroluminescence panel according to claim 1, further comprising a partition wall formed at a position above the pixel transistor and overlapping with the upper portion of the protective insulating film. A pixel transistor connected to a pixel electrode formed on the top surface of the substrate;
A protective insulating film formed to cover the pixel transistor;
An organic compound layer formed on the pixel electrode;
A counter electrode made of a transparent conductive film formed on the organic compound layer;
An electroluminescence panel comprising: a sealing layer formed on the counter electrode.   The electroluminescence panel according to claim 3, further comprising a partition wall formed on the protective insulating film.   The electroluminescence panel according to claim 1, further comprising an antireflection layer formed on an upper surface of the sealing layer. A substrate having a pixel electrode, a pixel transistor connected to the pixel electrode, a protective insulating film covering the pixel transistor, and a partition wall provided in a portion not corresponding to the pixel electrode of the protective insulating film A method for manufacturing an electroluminescent panel comprising:
An organic compound layer is formed in the exposed hole that is provided in the protective insulating film and exposes the pixel electrode,
Forming a counter electrode on the organic compound layer and not on the partition;
A method for manufacturing an electroluminescence panel, comprising forming a sealing layer for sealing the partition and the counter electrode. A substrate having a pixel electrode, a pixel transistor connected to the pixel electrode, a protective insulating film covering the pixel transistor, and a partition wall provided in a portion not corresponding to the pixel electrode of the protective insulating film A method for manufacturing an electroluminescent panel comprising:
An organic compound layer is formed in the exposed hole that is provided in the protective insulating film and exposes the pixel electrode,
Forming a counter electrode made of a transparent conductive film on the organic compound layer and the partition;
A method for manufacturing an electroluminescence panel, comprising forming a sealing layer for sealing the counter electrode.   The method for manufacturing an electroluminescence panel according to claim 6, wherein an antireflection layer is formed on an upper surface of the sealing layer.

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