JP2009303023A - Electric power amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electric power amplifier which generates no noise or EMI (electromagnetic interference) due to ringing and does not arise switching loss. <P>SOLUTION: The electric power amplifier includes a signal processing portion which converts an input analogue signal to a pulse signal, an analogue amplifier which amplifies the pulse signal from the signal processing portion in an analog form approximately to a potential difference between high/low electric source voltages, and a low pass filter which passes a low frequency component of the pulse signal output from the analogue amplifier and obtains an output analogue signal reproducing the waveform of the input analogue signal. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a power amplifier. For example, the present invention intends to provide a power amplifier that amplifies an analog signal using a pulse signal in the same manner as a digital power amplifier (so-called switching amplifier).

As a digital power amplifier (so-called switching amplifier), one or more series circuits in which two switching elements are connected in series are used, a low-pass filter is connected to the connection point between the switching elements of the series circuit, and the input signal is pulsed. After conversion to a signal (PWM signal or PDM signal), each switching element is turned on / off according to this pulse signal, and the low-pass filter integrates the current supplied by the above-mentioned on / off to obtain an output signal obtained by amplifying the input signal. To supply the load (for example, see Patent Document 1).
JP 2003-8366 A

  However, in the conventional digital power amplifier, it is unavoidable that noise and EMI (electromagnetic interference) occur due to the switching operation of the switching element.

  The main cause of this noise and EMI was ringing of the output waveform generated with the switching operation (see FIG. 5A described later). Ringing occurs due to the inductance of the output capacitance of the switching element (capacitance Cds between the drain and source if the switching element is an FET), the wiring pattern, the bonding line inside the element, and the like. FIG. 8 illustrates the ringing occurrence mechanism.

  A switching element (for example, FET) and a wiring pattern as shown in FIG. 8A are equivalently expressed as a series circuit of a coil L and a capacitor C, and a switching element SW connected in parallel to the capacitor C. Can be represented. Considering each impedance in the open state and the closed state of the switching element SW in terms of DC analysis, in the open state shown in FIG. 8B, the capacitor C is located in series, so that the impedance looks like ∞. In the closed state shown in FIG. 8C, only the coil L is visible because the capacitor C is bypassed by the switching element SW, and the impedance appears zero. Therefore, in a switching amplifier that repeats the switching operation, impedances ∞ and 0 are repeated, and a large current flows alternately between the coil L and the capacitor C, and ringing occurs due to the transient phenomenon.

  That is, ringing is unavoidable in the switching umbe caused by the on / off operation of the switching element.

  On the other hand, the implementation purpose of the digital power amplifier is not the switching operation itself, but it converts the input analog signal into a pulse signal and then efficiently expands the voltage amplitude of the pulse signal waveform to supply power to the low-pass filter and load. To obtain the desired output. As a method for efficiently expanding the voltage amplitude, a conventional switching amplifier supplies a positive or negative power supply voltage or a GND voltage by switching a switching element.

  However, in this method, ringing (and noise and EMI resulting from the ringing) generated in the output cannot be avoided due to the reason described above.

  In addition, it does not necessarily operate ideally because a delay occurs due to the parasitic capacitance of the switching element. The switching operation of the switching element causes a large short-circuit current to flow between the upper and lower switching elements constituting the series circuit, and power called switching loss. Loss occurs.

  Therefore, there is a demand for a power amplifier that can amplify power without using the switching operation of the switching element and solve the problems caused by applying the switching element.

  In order to solve such a problem, a power amplifier according to the present invention includes (1) a signal processing unit that converts an input analog signal into a pulse signal, and (2) a pulse signal output from the signal processing unit that has a high and low power supply voltage. An analog amplifying unit that amplifies the signal so that the potential difference between the analog amplifying unit and the analog signal is enlarged; And a low-pass filter for obtaining.

  According to the present invention, the signal is converted into a pulse signal and amplified. However, since the switching operation of the switching element is not used, noise and EMI due to ringing are not generated, and a switching loss can be eliminated.

(A) First Embodiment Hereinafter, a first embodiment of a power amplifier according to the present invention will be described in detail with reference to the drawings. The power amplifier according to the first embodiment analog-amplifies the pulse signal converted from the input signal, amplifies the amplitude of the pulse signal up to the interval between the high and low power supply voltages, and supplies power to the low-pass filter unit and the load. To obtain a desired output.

(A-1) Configuration of First Embodiment FIG. 1 is a block diagram showing an overall configuration of a power amplifier 100 according to the first embodiment.

  In FIG. 1, a power amplifier 100 according to the first embodiment includes a signal processing unit 101, an analog amplification unit 102, a low-pass filter unit (LPF unit) 103, a load 104, and a power supply unit 105. If the power amplifier 100 according to the first embodiment is applied as an audio amplifier, for example, the input analog signal is an audio signal and the load 104 is a speaker.

  The power supply unit 105 may use a battery or may be formed from an AC power supply such as a commercial power supply. However, the high power supply voltage Vcc, which is higher than the ground (GND) potential by a predetermined potential, may be used. The low power source Vdd, which is lower than the ground (GND) potential by the predetermined potential, is formed and supplied to each part.

  The signal processing unit 101 has an analog amplification function of an input analog signal and a function of converting the input analog signal into a pulse signal.

  The signal processing unit 101 includes an operational amplifier 141 that is a central configuration of a positive-phase analog amplifier. The input analog signal input to the ground (GND) base input terminal is input to the non-inverting input terminal of the operational amplifier 141 that is grounded via the resistor 142. An inverting input terminal of the operational amplifier 141 is grounded via a resistor 143. As a result, a positive phase amplified signal obtained by analog amplification of the input analog signal is obtained at the output terminal of the operational amplifier 141 and input to the comparison target input terminal (+) of the comparator 144. The voltage at the input terminal of the low-pass filter unit 103 is fed back to the inverting input terminal of the operational amplifier 141 via a feedback circuit (overall feedback circuit; for example, resistor) 152 so as to improve the overall performance of the power amplifier 100. Has been made.

  The triangular wave generation circuit 145 generates a triangular wave signal whose fundamental frequency is sufficiently higher than the band of the input analog signal, and the generated triangular wave signal is input to the reference input terminal (−) of the comparator 144.

  Each of the comparators 144 takes a logic “H” when the input signal (amplified input analog signal) to the comparison target input terminal is larger than the input signal (triangular wave signal) to the reference input terminal, and outputs to the comparison target input terminal. A pulse signal having a logic “L” is formed when the input signal is equal to or lower than the input signal to the reference input terminal, but the analog amplification unit 102 outputs the pulse signal Vpwm from the inverting output terminal. That is, in the power amplifier 100 of FIG. 1, a pulse signal obtained by converting the input analog signal by the PWM method is formed.

  The conversion method from the input analog signal to the pulse signal is not limited to the PWM method, and may be another method (for example, PDM method). Further, the pulse signal from the non-inverting output terminal of the comparator 144 may be output to the analog amplifying unit 102, or the complementary pulse signal from the comparator 144 may be output to the analog amplifying unit 102. .

  The analog amplifying unit 102 analog-amplifies the pulse signal Vpwm output from the signal processing unit 101 so that the amplitude of the pulse signal Vpwm increases to near the potential difference between the high and low power supply voltages Vcc and Vdd, and the amplified pulse signal V3 is obtained. This is supplied to the low-pass filter unit 103. Since the analog amplification unit 102 amplifies a pulse signal, which is a broadband signal (high-speed signal) from a DC component, centered on a high frequency comparable to that of a triangular wave signal, the analog amplification unit 102 is compatible with such a high-speed signal. It is. The analog amplifying unit 102 includes three amplification stages 201, 202, and 203 and a feedback circuit 151 that are connected in cascade, and performs analog amplification. Detailed configuration examples of the amplification stages 201, 202, and 203 will be described later.

  Here, the voltage at the output terminal of the analog amplifying unit 102 is fed back to the input terminal of the analog amplifying unit 102 via a feedback circuit (for example, resistor) 151, and the feedback rate β of the feedback circuit 151. As will be described later, the amplification factor G of the analog amplification unit 102 is defined.

  As will be described later, the output pulse signal from the analog amplifying unit 102 is obtained by inverting and amplifying the input pulse signal to the analog amplifying unit 102, so that the output pulse signal from the analog amplifying unit 102 is output by the feedback circuit 151. Is returned to the non-inverting input terminal of the first amplification stage (input circuit section) 201 of the analog amplification section 102 is a negative feedback.

  The low-pass filter unit 103 is a series circuit of a coil 121 and a capacitor 122, and a load 104 is connected to the capacitor 122 in parallel. In the low-pass filter unit 103, the capacitor 122 integrates the charging or discharging current flowing according to the output pulse signal of the analog amplification unit 102, thereby obtaining a voltage signal obtained by amplifying the input analog signal at both ends of the capacitor 122 and 104 is applied. In other words, the low-pass filter unit 103 reproduces a waveform having the same shape as the input analog signal by removing the high-frequency component of the pulse signal output from the analog amplification unit 102.

  If the load 104 has a low-pass filter function, the low-pass filter unit 103 can be omitted.

  FIG. 2 is a circuit diagram showing a detailed configuration example of the analog amplifying unit 102, in which the same and corresponding parts as those in FIG. The analog amplifying unit 102 expands the pulse signal Vpwm, which is a wideband signal from a DC component, centered on a high frequency comparable to that of the triangular wave signal, to near the potential difference between the power supply voltages Vcc and Vdd whose amplitude is high and low. Any specific configuration can be used as long as analog amplification is possible, and the configuration shown in FIG. 2 is an example.

  The first amplification stage 201 of the analog amplification section 102 is an input circuit section, the second amplification stage 202 is a driver section, and the third amplification stage 203 is an analog buffer section. The input circuit unit 201 inputs the input pulse signal Vpwm and the signal from the feedback circuit 151 and amplifies the voltage. The driver unit 202 differentially inputs the differential output signal of the input circuit unit 201, amplifies the voltage, unifies it into a ground reference signal, and outputs a unified single signal. The analog buffer unit 203 amplifies the output voltage waveform of the driver unit 202 so that a large current can flow at a voltage amplification factor of about 1 time.

  The input circuit unit 201 has a differential amplification configuration including a pair of NPN transistors Q1 and Q2. The common emitters of the transistors Q1 and Q2 are connected to the line of the low power supply voltage Vdd via the constant current source I1. The collector of the transistor Q1 is connected to the line of the high power supply voltage Vcc via the resistor R1, and the pulse signal Vpwm output from the signal processing unit 101 and having the ground potential as the center of the dynamic range is connected to the base of the transistor Q1. It is supposed to be entered. The collector of the transistor Q2 is connected to the line of the high power supply voltage Vcc via the resistor R2, and the base of the transistor Q2 is grounded.

  As is generally well known, when the output of the differential amplifier (input circuit unit 201) is regarded as a differential output of Vout1-Vout2, a DC voltage amplification factor (so-called differential gain) with respect to the differential inputs Vin1-Vin2 Av1 is expressed by equation (1). Here, hfe is the DC current amplification factor (when the emitter is grounded) of the transistors Q1 and Q2, Rc is the resistance value of the resistors R1 and R2, and Rb is the resistance value of the internal base resistors of the transistors Q1 and Q2.

Av1 = (Vout1-Vout2) / (Vin1-Vin2)
=-(Hfe × Rc) / Rb
= Negative constant (1)
In the input circuit unit 201 of FIG. 2, since one side is grounded, the input pulse signal Vpwm is amplified with a constant amplification factor on the basis of the ground, and a signal whose sign is inverted is differentially output.

  The transistors Q1 and Q2 may be replaced with field effect transistors (FETs) in order to suppress a DC offset from appearing in the output.

  The driver unit 202 has a differential amplification configuration in which a differential amplification configuration including a pair of PNP transistors Q3 and Q4 and a current mirror configuration including a pair of NPN transistors Q5 and Q6 are combined.

  The common emitters of the transistors Q3 and Q4 are connected to the line of the high power supply voltage Vcc via the resistor R3. The collector of the transistor Q3 is connected to the collector of the transistor Q5, and the base of the transistor Q3 is connected to the collector of the transistor Q1. The collector of the transistor Q4 is connected to the collector of the transistor Q6, and the base of the transistor Q4 is connected to the collector of the transistor Q2.

  The bases of the transistors Q5 and Q6 are connected to each other. The base and collector of the transistor Q5 are connected, and the emitter of the transistor Q5 is connected to the line of the low power supply voltage Vdd via the resistor R7. The emitter of the transistor Q6 is connected to the line of the low power supply voltage Vdd via the resistor R8.

  A collector current corresponding to a complementary differential signal of the input circuit unit 201 flows through each of the transistors Q3 and Q4. On the other hand, the collector currents of transistors Q5 and Q6 are equal, and the collector current of transistor Q5 is also equal to the collector current of transistor Q3. As a result, a voltage signal (pulse signal) corresponding to the difference between the complementary collector currents of the transistors Q3 and Q4 is generated at the connection point between the collector of the transistor Q4 and the collector of the transistor Q6.

  As shown in FIG. 1, when the differential input to the driver unit 202 is Vout1 and Vout2, and the single output is V2, the voltage amplification factor Av2 when assuming that the load resistor RL for the driver unit 202 is connected is , (2). Here, hfe is the DC current gain of the transistors Q3 and Q4, hie is the input impedance, and RL is the resistance value of the load resistor RL.

Av2 = V2 / (Vout1-Vout2)
= (Hfe × RL) / hie
= Positive constant (2)
The driver unit 202 obtains an output amplified with a constant amplification factor Av2 with respect to the output of the input circuit unit 201. Since the output of the input circuit unit 201 is obtained by inverting the sign of the input pulse signal, the output is obtained by multiplying the input pulse signal by a constant amplification factor Av2 while inverting the sign.

  The analog buffer unit 203 is a power amplification stage provided to suppress a change in output potential with respect to a current change on the low-pass filter unit 103 side and to be able to output a voltage in both positive and negative directions. A circuit composed of complementary single-ended push-pull circuits is shown. The N-channel MOS field effect transistor (FET) Q7 and the P-channel MOS field effect transistor Q8 are provided as amplifying elements, and their sources are connected. The drain of the transistor Q7 is connected to the line of the high power supply voltage Vcc, and the gate of the transistor Q7 is connected to the output terminal of the driver unit 202 via the first bias circuit Vb1 (the connection between the collector of the transistor Q4 and the collector of the transistor Q6). Connected to the dot). The first bias circuit Vb1 determines the operating point of the transistor Q7. The output signal from the driver unit 202 is raised by a predetermined voltage (about the gate threshold voltage of the transistor Q7) and applied to the gate of the transistor Q7. This enables linear amplification. The drain of the transistor Q8 is connected to the line of the low power supply voltage Vdd, and the gate of the transistor Q8 is connected to the output terminal of the driver unit 202 via the second bias circuit Vb2. The second bias circuit Vb2 determines the operating point of the transistor Q8, and reduces the output signal from the driver unit 202 by a predetermined voltage (about the gate threshold voltage of the transistor Q8) and applies it to the gate of the transistor Q8. The linear amplification can be performed. A connection point between the sources of the transistors Q7 and Q8 is connected to an input terminal of the low-pass filter unit 103.

  Since it is a push-pull circuit, the transistor Q7 amplifies the positive amplitude portion of the input pulse signal, the transistor Q8 amplifies the negative amplitude portion of the input pulse signal, and amplifies them by adding these outputs. The amplification factor Av3 of the complementary single-end push-pull circuit (that is, the analog buffer unit 203) is about 1 time (precisely, Av3 <1).

  Note that bipolar transistors may be used as the transistors Q7 and Q8 to exhibit the same function.

(A-2) Operation of the First Embodiment Next, the amplification operation of the power amplifier 100 according to the first embodiment will be described with reference to FIGS. 3 and 4 in addition to FIGS. To do.

  The input analog signal is positive-phase amplified by an analog amplifier configured around the operational amplifier 141, and the amplified input analog signal Vs shown in FIG. 3A is input to the comparison target input terminal of the comparator 144. The triangular wave signal Vc shown in FIG. 3A generated by the triangular wave generation circuit 145 is input to the reference input terminal of the comparator 144.

  As a result, a pulse signal Vpwm as shown in FIG. 3B is output from the inverting output terminal of the comparator 144 and is supplied to the analog amplifier 102. In the analog amplifying unit 102, the pulse signal Vpwm is amplified through three amplification stages 201, 202, and 203 (see FIGS. 3C to 3E). The pulse signal V3 amplified by the analog amplifying unit 102 is supplied to the low-pass filter unit 103, integrated, converted into an output analog signal Vout obtained by amplifying the input analog signal Vs, and supplied to the load 104. Note that the output pulse signals of each amplification stage shown in FIGS. 3C to 3E are conceptual diagrams for explanation showing operation waveforms when the amplification stage is used with a bare gain to which feedback is not applied. It has become.

  As shown in FIG. 4, the naked gains of the cascaded amplification stages 201, 202, and 203 of the analog amplification unit 102 having the feedback circuit 151 are Av1 to Av3 as described above (as described above). (See Equations (1) and (2)), the naked gain Av of the cascade connection portion that does not consider the feedback circuit 151 is Av1, Av2, and Av3. Assuming that the feedback rate of the feedback circuit 151 is β, the output pulse signal Pout from the analog amplification unit 102 is fed back to the input side of the analog amplification unit 102 by an amount corresponding to the feedback rate β. Assuming that the input pulse signal to the analog amplifier 102 output from the inverting output terminal of the comparator 144 is Pin, the gain G of the entire analog amplifier 102 with the feedback circuit 151 can be expressed by Equation (3). If Av · β in Equation (3) is sufficiently larger than 1, Equation (3) can be approximated by Equation (4).

G = Pout / Pin = Av / (1 + Av · β) (3)
G≈1 / β (4)
From the equation (4), it can be seen that the gain G of the entire analog amplification unit 102 including the feedback circuit 151 is determined only by the feedback rate β. One condition that can be used without saturating (that is, switching operation) the transistors Q7 and Q8, which are output elements of the analog buffer unit 203, is that the output is less than the power supply voltage. Therefore, an important design condition is that the output of the analog amplification unit 102 should be less than the power supply voltage even when the amplitude of the input pulse signal takes the maximum value. Since the setting of the amplification factor of the analog amplification unit 102 is uniquely determined by the feedback rate β as shown in the equation (4), the feedback rate β is set so as to satisfy the important design conditions described above. That is, the feedback rate β is set so as to satisfy the relationship of the expression (5) with respect to the absolute values | Vcc | and | Vdd | (= | Vcc |) of the operating power supplies Vcc and Vdd to the analog amplifier 102. In addition, if the amplitude of the output pulse signal of the analog amplifying unit 102 is too low with respect to the power supply voltage, the efficiency is poor.

| Pout | = | Pin | / β << | Vcc | (5)
(A-3) Effect of First Embodiment According to the power amplifier of the first embodiment, a beautiful pulse without ringing as shown in FIG. 5B is used as an output pulse signal from the analog amplifier 102. A waveform is obtained, and as a result, neither noise nor EMI due to ringing occurs in the output supplied to the low-pass filter unit 103 and the load 104.

  Therefore, in the apparatus and system to which the power amplifier 100 of the first embodiment is applied, measures against noise and EMI can be eliminated or reduced. For example, in a load such as a speaker or motor having its own low-pass filter characteristics, the output low-pass filter unit 103 may be omitted. In that case, significant cost reduction and downsizing can be achieved. Can do. Further, for example, since noise associated with linking is eliminated, when applied to a speaker, audio performance such as S / N and distortion is improved. Further, for example, since the environment is sensitive to noise, it can be used in automobiles, ships, aircrafts, and the like, which have conventionally had few application examples of switching amplifiers.

  Further, according to the power amplifier 100 of the first embodiment, since the output element of the analog buffer unit 203 in the analog amplifying unit 102 is used without switching as a push-pull circuit, no through current is generated, and switching loss is prevented. Does not occur. Since there is no switching loss, the efficiency especially when there is no input signal or when the amplitude is small can be greatly improved. When the power amplifier of the first embodiment is applied to an application example in which the load power is rarely taken out, for example, an emergency broadcast facility or a motor driver of a mobile device having a very long stop time, the standby power can be greatly reduced. Can be reduced.

  Since the driver for driving the switching element, which is essential for the configuration of the conventional digital power amplifier, is unnecessary, the mounting is simplified and the size is reduced.

  Further, in the conventional digital power amplifier, the ringing size changes due to the inductance of the wiring pattern, so that the pattern design directly affects the performance of the amplifier. In the first embodiment, the performance by the pattern mounting is used. The design is simple because the impact on the product is extremely small. In addition, conventional digital power amplifiers require a large mounting area, such as by loading a snapper circuit, as a countermeasure against linking. However, since such a countermeasure circuit is not required, the mounting area can be reduced and the cost can be reduced. Reduction is desired.

  Compared to the case where the input analog signal is analog amplified without being converted to a pulse signal and supplied to the load, the pulse signal from the analog amplifier 102 has a longer period of voltage close to the power supply voltage and can be amplified efficiently. .

(B) Second Embodiment Next, a second embodiment of the power amplifier according to the present invention will be described in detail with reference to the drawings.

  FIG. 6 is a block diagram showing the overall configuration of the power amplifier 100A according to the second embodiment. The same and corresponding parts as those in FIG. 1 according to the first embodiment described above are assigned the same and corresponding reference numerals. It shows.

  The power amplifier 100A according to the second embodiment also includes a signal processing unit 101, an analog amplification unit 102A, a low-pass filter unit 103, a load 104, and a power supply unit 105, but only the internal configuration of the analog amplification unit 102A is the first implementation. The form is different.

  The analog amplifying unit 102A of the second embodiment also includes an input circuit unit 201, a driver unit 202A analog buffer unit 203A, and a feedback circuit 151. The input circuit unit 201 and the feedback circuit 151 are the same as those in the first embodiment.

  The driver unit 202A of the second embodiment is configured to output differentially, unlike the one that outputs a single signal of the first embodiment.

  The analog buffer unit 203A of the second embodiment is a single-end push-pull circuit using the same element that accepts a differential input. That is, the complementary single-end push-pull circuit is not applied in the second embodiment.

  In the analog buffer unit 203A, the drain and source of the N-channel MOS field effect transistor Q9 and the drain and source of the N-channel MOS field effect transistor Q10 are connected in series in this order between the lines of the high and low power supply voltages Vcc and Vdd. It is connected. A bias bias1 is applied to the gate of the transistor Q9 from the potential at the connection point between the source of the transistor Q9 and the drain of the transistor Q10, and a positive-phase pulse signal from the driver unit 202A is applied to the gate. ing. A bias bias2 is applied from the low power supply voltage Vdd to the gate of the transistor Q10, and a reverse-phase pulse signal from the driver unit 202A is applied to the gate.

  The specific circuit of the analog buffer unit 203A is different from that of the first embodiment, but the function of the analog buffer unit 203A is the same as that of the first embodiment, and the output voltage waveform of the driver unit 202A is approximately one time the voltage. Amplification is performed so that a large current can flow at the amplification factor, and the amplified signal is supplied to the low-pass filter unit 103.

  The power amplifier according to the second embodiment can achieve the same effects as those of the first embodiment.

(C) Third Embodiment Next, a power amplifier according to a third embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 7 is a block diagram showing the overall configuration of the power amplifier 100B according to the third embodiment. The same and corresponding parts as those in FIG. 1 according to the first embodiment described above are assigned the same and corresponding reference numerals. It shows.

  The power amplifier 100B according to the third embodiment includes a signal amplitude limiter 106, a power supply ripple amplitude lower limit detection circuit 107, and a power supply ripple amplitude upper limit detection circuit 108 in addition to the configuration of the power amplifier 100 according to the first embodiment. Is. The power supply unit 105 may be the same as that of the first embodiment. However, since the ripple component is a problem in the third embodiment, the generation source of the ripple component is also illustrated in FIG. Depending on the configuration of the power supply unit 105, it may be unavoidable to generate a ripple component.

  The analog amplifying unit 102 amplifies the input signal, which is a pulse signal having a constant amplitude, to near the interval of the power supply voltage. When the power supply voltage fluctuates greatly due to the influence of ripples or the like, the amplification factor determined by the feedback factor β In some cases, the output may be interrupted below the amplitude of the amplified output. Since the state in which the output pulse signal reaches the power supply voltage is equivalent to the output element being in a saturated state (switching operation), large ringing appears in the output.

In the third embodiment, in order to solve this problem, as shown in FIG. 7, a signal amplitude limiting unit 106 is inserted between the signal processing unit 101 and the analog amplifying unit 102, and the high power supply voltage Vcc line is inserted. A power supply ripple amplitude lower limit detection circuit 107 for detecting a ripple lower limit value of the upper power supply voltage;
From the power supply ripple amplitude upper limit detection circuit 108 that detects the ripple upper limit value of the power supply voltage on the low power supply voltage Vdd line, the amplitude control amount is given to the signal amplitude limiter 106 to limit the amplitude of the input pulse signal Vpwm, The output pulse signal Vpwm ′ to the analog amplifier 102 is output. That is, even if ripples are mixed in the power supply voltage, in order to use without saturating the output element of the analog amplifying unit 102, it is only necessary to keep the output amplitude of the analog amplifying unit 102 lower than the power supply voltage. The components added in the third embodiment function for this purpose.

  When the power supply voltage is the predetermined voltage Vcc, Vdd, the pulse signal output having an amplitude close to the optimum power supply voltage interval is set so that the high power supply voltage falls below the predetermined voltage Vcc, and low When the power supply voltage exceeds the predetermined voltage Vdd, the amplitude of the input signal may be corrected so that a voltage equal to the difference appears in the output. The analog amplifying unit 102 is an amplifier having a constant gain of 1 / β, and it is desired to apply output correction corresponding to the ripple Vripple to the output. Therefore, it is only necessary to limit the amplitude by β · Vripple. The amplitude of the input pulse signal can be kept at an output that does not saturate the analog amplifier 102 by adding an amplitude limit correction proportional to the ripple of the power supply voltage.

  However, if the amplitude of the pulse signal is simply limited, the energy supplied to the load 104 is reduced, and the corresponding amount appears as distortion. This distortion is negatively fed back by the overall feedback circuit 152, and a correction amount in the time direction of the pulse signal is added, so that this distortion can be reduced and solved.

  According to the third embodiment, in addition to the same effects as those of the first embodiment, even if ripples are mixed in the power supply voltage, it is possible to achieve the effect that the effects can be effectively exhibited.

(D) Other Embodiments The use of the power amplifier of the present invention is not limited. For example, it can be applied to an audio amplifier. In addition, the present invention is suitable for application to power amplifiers for electrical equipment that does not like the effects of switching noise, such as computer equipment and broadcasting equipment. In addition, since power consumption during no signal is minimized, it can be used as a power amplifier for power equipment with a long standby time while the power is on, such as motor drivers and emergency broadcasting equipment for mobile devices with very long downtime. It is suitable to apply.

  In the third embodiment, the configuration for removing the adverse effect due to the ripple is added to the configuration of the first embodiment. However, the configuration for removing the adverse effect due to the ripple is added to the configuration of the second embodiment. Anyway. From other viewpoints, the technical ideas of the embodiments may be appropriately combined.

  In each of the above embodiments, the single pulse signal is output from the signal processing unit 101. However, the differential pulse signal is output from the signal processing unit 101, and the input circuit unit 201 of the analog amplification unit 102 is output. A device capable of handling differential input may be applied. Further, when a differential output pulse signal is output from the signal processing unit 101, the input circuit unit 201 may be omitted.

  The term “low-pass filter” in the claims corresponds not only to the low-pass filter part of each embodiment, but also to the case where the low-pass filter part is omitted and the processing is left to the function of the low-pass filter of the load. Is.

1 is a block diagram showing an overall configuration of a power amplifier according to a first embodiment. It is a circuit diagram which shows the detailed structural example of the analog amplification part in 1st Embodiment. It is each part signal waveform diagram of the power amplifier concerning a 1st embodiment. It is explanatory drawing of the amplification operation | movement of the analog amplification part in 1st Embodiment. It is explanatory drawing which shows the waveform of the output pulse signal of the analog amplification part in 1st Embodiment with the waveform of the input pulse signal to the low-pass filter in the conventional digital power amplifier. It is a block diagram which shows the whole structure of the power amplifier which concerns on 2nd Embodiment. It is a block diagram which shows the whole structure of the power amplifier which concerns on 3rd Embodiment. It is explanatory drawing of the mechanism in which ringing generate | occur | produces in the conventional digital power amplifier.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100, 100A, 100B ... Power amplifier, 101 ... Signal processing part, 102, 102A ... Analog amplification part, 103 ... Low pass filter part (LPF part), 104 ... Load, 105 ... Power supply part, 106 ... Signal amplitude limiting part, 107 Power supply ripple amplitude lower limit detection circuit 108 Power supply ripple amplitude upper limit detection circuit 201 Input circuit unit 202, 202A Driver unit 203 203A Analog buffer unit

Claims (6)

A signal processing unit for converting an input analog signal into a pulse signal;
An analog amplifying unit for amplifying the pulse signal output from the signal processing unit so as to expand to near the potential difference between the high and low power supply voltages;
A power amplifier comprising: a low-pass filter that passes through a low-frequency component of the pulse signal output from the analog amplifier and obtains an output analog signal that reproduces the waveform of the input analog signal.   The power amplifier according to claim 1, wherein the analog amplifying unit includes a complementary single end push-pull circuit in an output stage.   2. The power amplifier according to claim 1, wherein the analog amplifying unit includes a single-end push-pull circuit using the same element at an output stage.   4. The power amplifier according to claim 1, wherein the pulse signal output from the signal processing unit is a PWM signal or a PDM signal.   5. The power amplifier according to claim 1, wherein an amplification factor of the analog amplifier is selected so that a voltage amplitude of an output from the analog amplifier is less than an amplitude of a power supply voltage. . A power supply voltage fluctuation detecting section for detecting fluctuations in the power supply voltage to the analog amplification section;
A signal amplitude limiting unit that controls the amplitude of the pulse signal output from the signal processing unit according to the variation in the power supply voltage detected by the power supply voltage variation detection unit and inputs the pulse signal to the analog amplification unit. The power amplifier according to any one of claims 1 to 5.

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