JP2010060823A - Display device and drive method of display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device having improved display quality, and a drive method of display device. <P>SOLUTION: The display device comprises a display part DYP composed of a plurality of display pixels PX disposed in a matrix form, drive means GD and SD for driving the plurality of the display pixels PX, a timing controller 52 for outputting a control signal for controlling the operation of the drive means GD and SD, a buffer means 54 where the control signal output from the timing controller 52 is input, and a power source SS for starting the timing controller 52. The buffer means 54 has a monitoring means 54B for monitoring an output signal from the power source SS, and a determination means 54A that determines whether the output signal is the value that can normally operate the timing controller 52 by the monitoring means 54B, and supplies the control signal output from the timing controller 52 to the drive means GD and SD when it is determined that the output signal is the value that can normally operate the timing controller 52. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a display device and a driving method of the display device, and more particularly to an active matrix display device and a driving method thereof.

  In recent years, research on flat display devices such as liquid crystal display devices and organic EL display devices has been advanced as display devices. The liquid crystal display device includes an array substrate, a counter substrate disposed opposite to the array substrate, a liquid crystal layer sandwiched between the array substrate and the counter substrate, and a display unit including display pixels arranged in a matrix And a liquid crystal display panel.

  In the display unit, scanning lines arranged along rows where display pixels are arranged and signal lines arranged along columns where display pixels are arranged are arranged. The scanning line and the signal line are connected to a driver provided around the display unit. The driver includes a scanning line driving circuit that sequentially drives the scanning lines and a signal line driving circuit that drives the signal lines.

  The operations of the scanning line driving circuit and the signal line driving circuit are controlled by a timing controller. The timing controller is supplied with a synchronization signal and a power signal from an external signal source.

Conventionally, there has been proposed a liquid crystal display device in which a protection circuit is provided on the output side of the timing controller so that the start pulse for starting the operation of the scanning line driving circuit is normalized even when the timing controller operates abnormally (patent) Reference 1).
JP 2004-133124 A

  For example, an unexpected control signal (hereinafter referred to as a logic uncertain signal) from the timing controller during a period until the power supply signal becomes a value that causes the timing controller to operate normally (hereinafter referred to as a logic uncertain period) upon startup of the liquid crystal display device. The driver is operated by this control signal, and an unexpected image may be displayed on the display unit and visually recognized as noise.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a display device and a display device driving method that prevent an unexpected image from being displayed and improve display quality.

  The liquid crystal display device according to the first aspect of the present invention includes a display unit including a plurality of display pixels arranged in a matrix, a driving unit that drives the plurality of display pixels, and a control signal that controls the operation of the driving unit. A timing controller that outputs the control signal, a buffer unit that receives a control signal output from the timing controller, and a power source that activates the timing controller. The buffer unit monitors an output signal from the power source. By the monitoring means and the monitoring means, it is determined whether or not the output signal is a value that causes the timing controller to operate normally, and the output signal is determined to be a value that causes the timing controller to operate normally. A determination to supply a control signal output from the timing controller to the driving means. It includes a stage, a.

  A driving method of a liquid crystal display device according to a second aspect of the present invention includes a display unit including a plurality of display pixels arranged in a matrix, a driving unit that drives the plurality of display pixels, and an operation of the driving unit. A display device driving method comprising: a timing controller that outputs a control signal to be output; buffer means to which a control signal output from the timing controller is input; and a power source that activates the timing controller. In the monitoring step of monitoring the output signal from, the determination step of determining whether or not the output signal acquired in the monitoring step is a value that causes the timing controller to operate normally, and the output in the determination step When it is determined that the signal is a value that causes the timing controller to operate normally, A control signal output from the serial timing controller and a step of supplying to said driving means.

  According to the present invention, it is possible to provide a display device and a display device driving method that prevent an unexpected image from being displayed and improve display quality.

  Hereinafter, a liquid crystal display device according to an embodiment of the present invention will be described with reference to the drawings. As shown in FIG. 1, the liquid crystal display device according to the present embodiment includes a liquid crystal display panel DP, a backlight BL that illuminates the liquid crystal display panel DP, and a controller CNT that controls the liquid crystal display panel DP and the backlight BL. ing.

  The liquid crystal display panel DP has a pair of substrates, that is, the array substrate 1 and the counter substrate 2, and the liquid crystal layer 3 sandwiched between the array substrate 1 and the counter substrate 2. The liquid crystal layer 3 includes, as a liquid crystal material, an OCB mode liquid crystal that is previously transitioned from a splay alignment to a bend alignment, for example, for a normally white display operation.

  In addition, the liquid crystal display panel DP includes a display unit DYP including display pixels PX arranged in a substantially matrix shape. The array substrate 1 has a transparent insulating substrate (not shown) such as glass. On the transparent insulating substrate, as shown in FIG. 2, a plurality of pixel electrodes PE corresponding to each display pixel PX are arranged.

  The counter substrate 2 is, for example, a color filter (not shown) composed of red, green, and blue colored layers disposed on a transparent insulating substrate such as glass, and a color filter facing a plurality of pixel electrodes PE. The counter electrode CE and the like are disposed.

  Each pixel electrode PE and counter electrode CE are made of a transparent electrode material such as ITO, for example, and covered with an alignment film (not shown) that is rubbed in a direction parallel to each other. Each pixel electrode PE and counter electrode CE constitute a display pixel PX together with a pixel region which is a part of the liquid crystal layer 3 controlled by the liquid crystal molecular arrangement corresponding to the electric field from the pixel electrode PE and counter electrode CE.

  Further, as shown in FIG. 2, in the display unit DYP, the array substrate 1 includes a plurality of scanning lines G (G1, G2, G3,...) Arranged along a row in which a plurality of pixel electrodes PE are arranged, and a plurality of scanning lines G. A plurality of signal lines S (S1, S2, S3,...) Arranged along a column in which the pixel electrodes PE are arranged, and a plurality of pixels arranged in the vicinity of the intersection positions of the scanning lines G and the signal lines S A switch SW is provided.

  Each pixel switch SW is composed of, for example, a thin film transistor (TFT). The gate of the pixel switch SW is connected to the scanning line G, and the source-drain path is connected between the signal line S and the pixel electrode PE. Each pixel switch SW is electrically connected between the corresponding signal line S and the corresponding pixel electrode PE when driven through the corresponding scanning line G.

  Each of the plurality of display pixels PX has a liquid crystal capacitance constituted by the liquid crystal layer 3 held between the pixel electrode PE and the counter electrode CE. The liquid crystal capacitance is determined by the relative dielectric constant of the liquid crystal material, the pixel electrode area, and the liquid crystal cell gap.

  The control circuit 5 controls a gate driver GD connected to the scanning line G, a source driver SD connected to the signal line S, and a backlight driver (inverter) LD that drives the backlight BL.

  In addition, the control circuit 5 performs an initialization process for changing the liquid crystal molecules from the splay alignment to the bend alignment by changing the counter potential Vcom and applying a relatively large driving voltage to the liquid crystal layer 3 when the power is turned on. It is configured.

  The control circuit 5 is supplied with a power signal and an external control signal from the external signal source SS. The control circuit 5 outputs a control signal CTG generated based on the external control signal input from the external signal source SS to the gate driver GD, and is generated based on the external control signal input from the external signal source SS. The control signal CTS and the video signal Vs input from the external signal source SS are output to the source driver SD. Further, the control circuit 5 outputs a counter potential Vcom applied to the counter electrode CE to the counter electrode CE of the counter substrate 2.

  Based on the control signal CTS, the source driver SD outputs a video signal or a non-video signal to the plurality of signal lines S1 to Sn in a period in which the pixel switches SW of each row are turned on by driving the corresponding scanning line G.

  The non-video signal or video signal applied to the signal lines S1 to Sn by the source driver SD is applied to the pixel electrode PE of the display pixel PX in the selected row via the corresponding pixel switch SW. A potential difference between the voltage signal applied to the pixel electrode PE and the counter potential Vcom applied to the counter electrode CE is held as a liquid crystal capacitance.

  In the liquid crystal display device according to the present embodiment, the control circuit 5 includes a timing controller 52 and a buffer circuit 54 as shown in FIG. The timing controller 52 is supplied with an external control signal from the external signal source SS and a power signal. The timing controller 52 outputs control signals for the source driver SD and the gate driver GD based on the supplied external control signal.

  The control signal output from the timing controller 52 and the power signal output from the external signal source SS are supplied to the buffer circuit 54. The buffer circuit 54 acquires and monitors the value of the power supply signal supplied from the external signal source SS, and whether the value acquired by the monitoring unit 54B is a value that causes the timing controller 52 to operate normally. And a determination unit 54A for determining.

  When the determination unit 54A determines that the value of the power supply signal acquired by the monitoring unit 54B is a value that causes the timing controller 52 to operate normally, the determination unit 54A uses the control signal supplied from the timing controller 52 as the source driver SD and the gate driver. Output to GD.

  When the determination unit 54A determines that the value of the power supply signal acquired by the monitoring unit 54B is not a value that causes the timing controller 52 to operate normally, the determination unit 54A uses the control signal supplied from the timing controller 52 as the source driver SD and the gate driver GD. Is not output.

  The determination unit 54A includes, for example, a switching element (not shown) provided between an input terminal to which a control signal is supplied from the timing controller 52 and an output terminal connected to the source driver SD and the gate driver GD. The switching element may be switched on / off depending on whether the value of the power supply signal is a value that causes the timing controller 52 to operate normally.

  Next, a driving method of the liquid crystal display device according to the present embodiment will be described. When the power of the liquid crystal display device is turned on, a power signal is supplied from the external signal source SS to the timing controller 52 and the buffer circuit 54, and an external control signal is supplied to the timing controller 52.

  The monitoring unit 54B of the buffer circuit 54 acquires the value of the supplied power signal and starts monitoring (step ST1). The timing controller 52 generates control signals CTS and CTG for the source driver SD and the gate driver GD in accordance with the supplied external control signal, and outputs them to the buffer circuit 54.

  The determination unit 54A of the buffer circuit 54 determines whether or not the value of the power supply signal acquired by the monitoring unit 54B is a value that causes the timing controller 52 to operate normally (step ST2). In the liquid crystal display device according to the present embodiment, the determination unit 54A of the buffer circuit 54 determines whether or not the value acquired by the monitoring unit 54B is within the standard voltage range of the timing controller 52. In the case shown in FIG. 2, when the value of the power supply signal becomes equal to or higher than the voltage SP, it is determined that it is within the standard voltage range of the timing controller 52.

  When the value acquired by the monitoring unit 54B is a value that causes the timing controller 52 to operate normally, the determination unit 54A of the buffer circuit 54 uses the control signals CTS and CTG supplied from the timing controller 52 as the source driver SD and the gate. Output to the driver GD (step ST3).

  When the control signals CTS and CTG are supplied to the source driver SD and the gate driver GD, the source driver SD and the gate driver GD supply drive signals to the display unit DYP according to the supplied control signals CTS and CTG.

  Here, as shown in FIG. 3, the value of the power signal rises gradually after the power is turned on and converges to a predetermined value. When the value of the power supply signal supplied to the timing controller 52 does not reach a value that causes the timing controller 52 to operate normally during the rising period of the power supply signal immediately after the power is turned on, the logic of the timing controller 52 is uncertain. A signal may be output.

  However, according to the liquid crystal display device and the driving method of the liquid crystal display device according to the present embodiment, when the value of the power signal output from the external signal source SS is not a value that causes the timing controller 52 to operate normally, The logic uncertain signal output from the timing controller 52 is not supplied from the buffer circuit 54 first.

  That is, the logic uncertain signal output from the timing controller 52 is not supplied to the source driver SD and the gate driver GD. Therefore, an unexpected image is not displayed on the display unit DYP by the drive signals output from the source driver SD and the gate driver GD according to the logic indefinite signal.

  Therefore, according to the liquid crystal display device and the driving method of the liquid crystal display device according to the present embodiment, it is possible to provide a display device and a display device driving method that prevent an unexpected image from being displayed and improve display quality. Can do.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. For example, in the display device according to the above-described embodiment, the buffer circuit 54 is provided in the control circuit 5, but the driver may integrally include the buffer circuit 54.

  In the above-described embodiment, the operation during the period when the power supply signal rises when the power supply of the liquid crystal display device is turned on has been described. However, the buffer circuit 54 always monitors the power supply signal regardless of this period. Alternatively, the power signal may be monitored during a predetermined period such as a certain period after the power is turned on.

  In addition, the display device according to the above embodiment is a liquid crystal display device, but the present invention may be applied to other display devices such as an organic EL display device, even in the case of the above embodiment. Similar effects can be obtained.

  Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine the component covering different embodiment suitably.

1 is a diagram schematically illustrating a configuration example of a liquid crystal display device according to an embodiment of the present invention. The figure for demonstrating one structural example of the control part of the liquid crystal display device shown in FIG. The figure for demonstrating an example of the timing which a control signal is output from a buffer circuit. 4 is a flowchart for explaining a driving method of a liquid crystal display device according to an embodiment of the present invention.

Explanation of symbols

  PX ... display pixel, DYP ... display unit, GD ... gate driver, SD ... source driver, SS ... external signal source (power supply), 5 ... control circuit, 52 ... timing controller, 54 ... buffer circuit, 54B ... monitoring unit, 54C ... Judgment part

Claims (3)

A display unit composed of a plurality of display pixels arranged in a matrix;
Driving means for driving the plurality of display pixels;
A timing controller that outputs a control signal for controlling the operation of the driving means;
Buffer means for receiving a control signal output from the timing controller;
A power source for starting the timing controller,
The buffer means determines whether or not the output signal is a value that causes the timing controller to normally operate by the monitoring means that monitors the output signal from the power source, and the monitoring means. And a determining unit that supplies a control signal output from the timing controller to the driving unit when it is determined that the value is a value that causes the timing controller to operate normally.   The display device according to claim 1, wherein the driving unit integrally includes the buffer unit. A display unit composed of a plurality of display pixels arranged in a matrix;
Driving means for driving the plurality of display pixels;
A timing controller that outputs a control signal for controlling the operation of the driving means;
Buffer means for receiving a control signal output from the timing controller;
A power source for starting the timing controller, and a driving method of a display device comprising:
A monitoring step of monitoring an output signal from the power source;
A determination step of determining whether or not the output signal acquired in the monitoring step is a value that causes the timing controller to operate normally;
A step of supplying a control signal output from the timing controller to the driving means when it is determined in the determining step that the output signal is a value for operating the timing controller normally. Driving method.

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