JP2010129695A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve a semiconductor device for suppressing the generation of wastes in dicing due to the peeling of a process mark. <P>SOLUTION: In a semiconductor device 12, a scribe line region 14 is formed in the circumference of a semiconductor element region 20 where a ring-like equipotential ring 22 is formed. A process mark 24 is formed in the semiconductor element region 20 outside the equipotential ring 22. The process mark that has been conventionally formed in the scribe line region is formed in the semiconductor region. The process mark 24 is not cut in dicing, so it does not peel off. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device capable of reducing generation of dust during dicing due to process mark peeling.

  In the manufacturing process of a semiconductor device, process marks are formed on a wafer for alignment of a substrate and a mask. Also, a process mark is formed on the wafer in order to confirm the shape of the mask. In the wafer, a plurality of semiconductor element regions are partitioned by scribe line regions. Each semiconductor element region becomes a semiconductor device. The scribe line region is a cutting allowance for separating the semiconductor regions one by one. Normally, process marks are formed for the convenience of the manufacturing process and are not necessary for a semiconductor device as a product. Therefore, process marks are conventionally formed in a scribe line region (for example, patents). Reference 1).

JP 2006-41449 A

When a process mark is formed in the scribe line region, the process mark is cut during dicing. When cutting, the process mark may be peeled off from the wafer. If the process mark peeled from the wafer adheres to the semiconductor region, the semiconductor device may not function normally. That is, the process mark peeling deteriorates the yield of semiconductor device manufacturing, and therefore a technique for reducing the occurrence of peeling is desired.
The present invention has been created in view of the above problems. An object of this invention is to suppress generation | occurrence | production of the waste at the time of dicing by peeling of a process mark.

As described above, the process mark is formed for the convenience of the manufacturing process and is unnecessary for a semiconductor device as a product. Therefore, the process mark is conventionally formed in the scribe line region. The inventor obtained the idea of breaking the conventional practice and forming a process mark in the semiconductor region.
Some semiconductor devices are equipped with equipotential rings in order to increase pressure resistance. In particular, most high voltage semiconductor devices called power IGBTs have equipotential rings. The equipotential ring is formed in a ring shape when the semiconductor device is viewed in plan. Since the inside of the equipotential ring has a structure that defines the performance of the semiconductor device, there is no room for arranging the process mark. On the other hand, the equipotential ring is formed in a generally rectangular shape in accordance with the rectangular shape of the semiconductor device. However, in order to avoid the concentration of the electric field, the corner portion is formed not in an acute angle but in a gentle curve. . That is, a space that does not affect the performance of the semiconductor device is left outside the equipotential ring at the rectangular corner of the surface of the semiconductor device. The equipotential ring is sometimes called a guard ring.
The present invention uses this space for the process mark. That is, the semiconductor device of the present invention is characterized in that a process mark is formed not in the scribe line region but in the semiconductor element region outside the equipotential ring. Hereinafter, for simplicity of explanation, the semiconductor element region outside the equipotential ring may be referred to as “ring outer region”.

In the present invention, it is not necessary to place all the process marks in the outer ring area. By disposing one of the process marks in the outer region of the ring, the number of process marks conventionally formed in the scribe line region can be reduced.
The present invention reduces the generation of debris during dicing by forming process marks in the outer region of the ring.

  In order to use the semiconductor wafer efficiently, it is preferable not to create a useless semiconductor region. That is, the ring outer region is preferably narrow in the semiconductor region. Therefore, it is not preferable to enlarge the outer ring region in order to form the process mark in the outer ring region. Therefore, the process mark is preferably formed inside the smallest rectangle surrounding the outer periphery of the equipotential ring. The “minimum rectangle surrounding the outer periphery of the equipotential ring” corresponds to a semiconductor element formation region in which the ring outer region is not wasted. Therefore, by forming the process mark in the minimum rectangle described above, the process mark can be arranged in the outer region of the ring without unnecessarily expanding the semiconductor element formation region.

  According to the technology of the present invention, it is possible to suppress the generation of debris during dicing due to process mark peeling.

  A semiconductor device of an embodiment will be described with reference to the drawings. FIG. 1A shows a wafer 10 in which a plurality of semiconductor devices 12 are formed. FIG. 1B shows an enlarged view of one semiconductor device 12 and its periphery. In FIG. 1B, the semiconductor device 12 and eight semiconductor devices around it are partially shown. FIG. 2 shows a diced semiconductor device 12.

  Reference numerals 14a to 14d in FIG. 1 denote scribe line regions. A one-dot chain line drawn at the center of each scribe line region indicates a path through which the dicing blade passes. That is, a rectangular region surrounded by a one-dot chain line indicates one semiconductor device 12. 2 denotes a scribe line region remaining around the semiconductor device 12.

  Several accessory patterns 16 are formed in the scribe line region 14b. These accessory patterns are called TEG (Test Element Group). The accessory pattern 16 is cut at the time of dicing. Reference numeral 17 in FIG. 2 indicates a cut piece of the accessory pattern remaining on the scribe line region 14.

  The semiconductor device 12 includes a semiconductor element region 16 and a dicing region 14 (14a to 14d surrounding the semiconductor element region 16. The semiconductor element region 16 includes an equipotential ring 22 that forms a ring shape when seen in a plan view. The equipotential ring 22 is provided in order to improve the withstand voltage, and the equipotential ring 22 is well known and will not be described in detail. Various semiconductor elements characterizing the function of the semiconductor device 12 are formed inside the ring 22. Since the structure of each element depends on the type of the semiconductor device 12, a detailed description thereof is omitted.

  Hereinafter, the shape of the semiconductor device 12 when viewed in plan as shown in FIG. 1B or FIG. 2 will be described. The equipotential ring 22 is substantially rectangular along the periphery of a rectangular region that defines the semiconductor formation region 20. However, if the shape of the equipotential ring 22 is bent at an acute angle, the electric field is concentrated and the breakdown voltage is lowered, so that the corner portion is gently curved. Therefore, a slight space of the semiconductor element region 20 exists outside the equipotential ring 22 at the corner. In the semiconductor device 12, process marks 24a to 24d are arranged in this space. A broken line 26 in FIGS. 1B and 2 indicates a minimum rectangle surrounding the outer periphery of the equipotential ring 22. The process marks 24 a to 24 d are arranged inside a minimum rectangle 26 that surrounds the outer periphery of the equipotential ring 22. The process marks 24a to 24d are used for mask alignment and mask performance confirmation when the semiconductor device 12 is manufactured. Here, the performance confirmation of the mask is, for example, confirming whether or not the distance between the mask and the semiconductor substrate is appropriate based on whether or not the periphery of the process mark is sharply formed.

The characteristics of the semiconductor device 12 are listed below.
(1) The semiconductor device 12 of the example is a semiconductor device in which a scribe line region 14 is formed around a semiconductor element region 20 in which a ring-shaped equipotential ring 22 is formed. Process marks 24 a to 24 d are formed in the semiconductor element region 20 outside the equipotential ring 22. The process marks 24 a to 24 d are formed inside the smallest rectangle 26 that surrounds the outer periphery of the equipotential ring 22.
(2) The process mark may be formed of a material such as a metal that is easily peeled off from the oxide film on the surface of the semiconductor substrate. If such a process mark exists in the scribe line region, the process mark may be peeled off during dicing. The process mark peeling may cause defects due to foreign matter adhering to the semiconductor device. By forming the process mark in the semiconductor element region so as not to be cut at the time of dicing, peeling of the process mark can be prevented and a semiconductor device with a low defect rate can be realized.
(3) The process mark is formed outside the equipotential ring. Since the outside of the equipotential ring does not affect the characteristics of the semiconductor device, the process mark of this embodiment does not affect the characteristics of the semiconductor device.
(4) Since the process mark of this embodiment is formed in an empty space of the semiconductor device, the wafer can be used efficiently. When the width of the process mark is larger than the width of the accessory pattern, the width of the scribe line can be reduced by moving the process mark to the outer region of the ring.
(5) In recent years, laser dicing may be employed instead of a physical blade. Some materials cannot be cut by laser dicing. Since the process mark of the present embodiment is located at a place where it is not cut during dicing, the process mark can be formed of such a material.
(6) It is not necessary to arrange all the process marks in the outer area of the ring. If even one of the process marks is arranged in the ring outer region, the number of process marks in the scribe line region can be reduced, and peeling of the process mark during dicing can be reduced.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

FIG. 1A is a plan view of a wafer on which a plurality of semiconductor devices are formed. FIG. 1B is a partially enlarged view of the wafer. FIG. 2 is a plan view of the semiconductor device.

Explanation of symbols

10: Semiconductor wafer 12: Semiconductor device 14: Scribe line region 16: Accessory pattern 20: Semiconductor element region 22: Equipotential ring 24: Process mark 26: Minimum rectangle surrounding the outer edge of the equipotential ring

Claims (2)

A semiconductor device in which a scribe line region is formed around a semiconductor element region in which a ring-shaped equipotential ring is formed,
A semiconductor device, wherein a process mark is formed in a semiconductor element region outside the equipotential ring.   2. The semiconductor device according to claim 1, wherein the process mark is formed inside a minimum rectangle surrounding the outer periphery of the equipotential ring.

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