JP2011054645A - Non-volatile switch element, method of operating the non-volatile switch element, and circuit with the non-volatile switch element - Google Patents

Abstract

A high-breakdown-voltage non-volatile switch element is provided.
In order to solve the above problems, a switching element according to the present invention is formed on a source / drain formed in a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and the gate insulating film. A charge storage layer formed thereon, an ion conductive layer formed on the charge storage layer and in contact with the recess, and a charge injection formed on the ion conductive layer and in contact with the recess in the ion conductive layer And a path control terminal formed on both sides of the ion conductive layer.
[Selection] Figure 2

Description

  The present invention relates to a nonvolatile switch element, and more particularly to a switch element used in combination with a logic circuit.

  In recent years, programmable logic such as Field Programmable Gate Array (FPGA) has attracted attention. In FPGA, the switch element that combines SRAM and pass transistor realizes programmability. However, because SRAM is a volatile memory, the program information is lost when the power is turned off. Currently, one nonvolatile memory chip is prepared separately from the FPGA, and circuit data is written to the FPGA each time the power is turned on. However, there are problems that the substrate area increases due to the increase in the number of chips and that it takes a long time to complete the program after the power is turned on. In order to solve the problem, a nonvolatile switch element used in combination with a logic circuit is necessary.

  As a conventional nonvolatile switch element used in combination with a logic circuit, a nonvolatile switch element disclosed in Patent Document 1 is known. The nonvolatile switch element disclosed in Patent Document 1 uses an ion conduction memory. An ion conduction memory is a memory composed of two electrode metals and an ion conduction layer sandwiched between them. When a voltage in a certain direction is applied between the electrodes, ions are deposited from the cathode, which is connected to the anode, resulting in a low resistance state. When a reverse bias is applied, the deposited metal dissolves and enters a high resistance state. When the low resistance state is turned on and the high resistance state is turned off, it can be used as a nonvolatile switch element.

  Patent Document 1 discloses a three-terminal ion conduction switch element in addition to a switch element using a two-terminal ion conduction memory. The three-terminal ion conduction switch element includes a control terminal 1 terminal and an ion deposition terminal 2 terminal. When a voltage in a certain direction is applied to the control terminal, metal is deposited from the ion deposition terminal 2 terminal. When the diameter of the deposited metal becomes sufficiently large, the ion deposition terminals are bonded together by the deposited metal, and the resistance between the ion deposition terminals is reduced. Further, when a reverse bias is applied, the metal dissolves and the resistance between the ion precipitation terminals increases. When the low resistance state is turned on and the high resistance state is turned off, it can be used as a nonvolatile switch element.

JP 2009-10403 A

  It is known that ion conduction memory generally has a low programming voltage, specifically, 1 V or less. Therefore, when the switch element disclosed in Patent Document 1 is used in combination with a logic circuit, if a voltage exceeding 1 V, which is a driving voltage of the logic circuit, is input, the program state of the ion conduction memory may be rewritten. There is. That is, in order to use it as a non-volatile switch element in programmable logic, it must have a sufficiently high breakdown voltage with respect to the voltage for driving the logic circuit.

  In order to solve the above problems, a switching element according to the present invention includes a source / drain formed in a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a charge formed on the gate insulating film. A storage layer; an ion conductive layer formed on the charge storage layer and in contact with the recess; and a charge formed on the ion conductive layer and in contact with the recess of the ion conductive layer. An injection layer, a path control terminal that is in contact with the ion conductive layer and insulated from the charge storage layer and the charge injection layer, and is in contact with the ion conductive layer at a position facing the path control terminal; And an ion supply terminal insulated from the charge injection layer.

  According to the present invention, it is possible to obtain a nonvolatile switch element having a sufficiently high breakdown voltage compared to a voltage for driving a logic circuit.

The figure explaining an ion conduction memory. Sectional drawing of the 1st Embodiment of this invention. The top view of the 1st Embodiment of this invention. 6A and 6B illustrate an operation of a memory portion of the present invention. The figure explaining the method of using this invention as a switch element. The figure explaining the program method of this invention. The figure explaining the program method of this invention. The figure explaining the method of using this invention as a switch element. Second embodiment of the present invention Third embodiment of the present invention FIG. 6 illustrates a circuit in which the present invention is integrated. The figure explaining the method of programming this invention. FIG. 6 illustrates a circuit in which the present invention is integrated. The figure explaining the current-voltage characteristic of a Zener diode. The figure explaining the method of programming this invention. The figure for demonstrating the range of a Zener voltage. The figure for demonstrating the range of a Zener voltage. The figure for demonstrating the range of a Zener voltage. FIG. 6 illustrates a circuit in which the present invention is integrated. The figure explaining the method of programming this invention. The figure for demonstrating the range of a Zener voltage.

  Before describing the embodiments of the present invention, an ion conduction memory as a basis of the present invention will be described. FIG. 1A is a cross-sectional view showing a schematic structure of an ion conduction memory. In the figure, 10 indicates an upper electrode, 11 indicates an ion conductive medium, and 12 indicates a lower electrode.

In the element structure as shown in FIG. 1A, when a voltage is applied using the upper electrode 10 as an anode and the lower electrode 12 as a cathode, metal ions are ion-conducted from the upper electrode to the lower electrode, and metal is deposited from the cathode, A conduction path is formed as shown in FIG. When the upper electrode is a cathode and the lower electrode is an anode, metal ions are reversely ion-conducted, and the deposited metal is dissolved, returning to the state shown in FIG. In the case of FIG. 1B, the two electrodes are coupled by metal, so that the resistance state is low. In the case of FIG. 1A, the ion conductive layer 11 as an insulating film exists between the two electrodes. Therefore, it becomes a high resistance state. The absolute value of the voltage required for forming the conduction path is V _SET , and the absolute value of the voltage required for eliminating the conduction path is V _RESET .

  The best mode for carrying out the present invention will be described below with reference to the drawings.

FIG. 2 shows a cross-sectional view of the first embodiment of the present invention. FIG. 3 shows a view of the first embodiment as viewed from above. The present invention includes a transistor portion 1 and a memory portion 2. The transistor unit 1 includes a source / drain 100 _n formed in a semiconductor substrate 102, a gate insulating film 101 formed on the semiconductor substrate, and a charge storage layer 103 formed on the gate insulating film. Has been. The memory unit 2 includes the charge storage layer, the ion conductive layer 104 formed on the charge storage layer and in contact with the recess, and the ion conductive layer formed on the ion conductive layer. A charge injection layer 105 in contact with the recess of the layer, a path control terminal 106 formed on the side of the ion conductive layer, and an ion supply terminal 109 formed on the side of the ion conductive layer and on the opposite side of the path control terminal. It is composed of Each terminal is insulated by an interlayer insulating film 107 _n and a spacer insulating film 108 _n .

  The gate insulating film 101 is an insulating material such as a single layer film such as a silicon oxide film or a silicon nitride film, a high dielectric constant oxide containing hafnium or aluminum (so-called high-k insulating film), or a composite film obtained by stacking them. It is desirable to be constituted by. The charge storage layer 103 is preferably made of metal or polysilicon. The ion conductive layer 104 is made of an electrolyte material, a chalcogenide material, or the like. The path control terminal 106 is made of a metal having a lower ionization tendency than the ion supply terminal. In addition, since it is desirable that the charge storage layer 103 and the charge injection layer 105 are insulated, the absolute value of the work function of the charge storage layer is greater than the absolute value of the energy difference between the lower end of the conduction band of the ion conductive layer and the vacuum level. It is desirable to be large. A combination of highly doped polysilicon and silicon dioxide is known as a combination of a charge storage layer and an ion conductive layer that satisfy such conditions.

Next, the operation of the memory unit of the present invention will be described. FIG. 4A shows a state when V _SET is applied to the ion supply terminal and 0 V is applied to the path control terminal. At this time, the metal 110 is deposited between the ion supply terminal and the path control terminal. Here, since the charge storage layer and the charge injection layer have a shape that bites into the ion conductive layer, the deposited metal short-circuits the charge storage layer and the charge injection layer. The film thickness of the ion conductive layer between the charge storage layer and the charge injection layer needs to be thin enough to be short-circuited by the deposited metal 110, and specifically, is preferably about several tens of nanometers.

FIG. 4B shows a state when 0 V is applied to the ion supply terminal and V _RESET is applied to the path control terminal. At this time, the deposited metal is dissolved, and the charge storage layer and the charge injection layer are in an insulating state.

As shown in FIGS. 4A and 4B, the voltage applied to the high ion terminal and the path control terminal is controlled to switch between the charge storage layer and the charge injection layer between a short circuit state and an insulation state. be able to.

  Next, a method of using the present invention as a switch element will be described. In the present invention, the conductivity between the source and the drain can be controlled by the charge stored in the charge storage layer. Here, the transistor portion is assumed to be an nMOSFET type. As shown in FIG. 5A, when a sufficient amount of holes 111 are stored in the charge storage layer, the semiconductor substrate is in an inverted state, and the source and drain of the transistor portion are turned on. On the other hand, when the charge is removed from the charge storage layer or the electrons are stored as shown in FIG. 5B, the semiconductor substrate is in a depletion state or an accumulation state, so that the source and drain are turned off. As described above, according to the present invention, on / off can be controlled according to the state of charge stored in the charge storage layer.

  In the case where the transistor portion is a pMOSFET type, when electrons are stored in the charge storage layer, the source and drain are turned on, and when charge is removed or holes are stored, the source and drain are turned off.

Next, a method for programming ON / OFF of the nonvolatile switch element of the present invention will be described. FIG. 6 is a diagram for explaining the procedure for programming the ON state when the transistor portion of the nonvolatile switch element of the present invention is an nMOSFET. First, as shown in FIG. _6A , V _SET is applied to the ion supply terminal and 0 V is applied to the path control terminal. By doing so, metal is deposited between the ion supply terminal and the path control terminal, and the charge storage layer and the charge injection layer are short-circuited. Next, as shown in FIG. 6B, the ion supply terminal and the path control terminal are in an insulated state, and a programming voltage Von (> 0) is applied to the charge injection layer. By doing so, holes are injected from the charge injection layer to the charge storage layer. Finally, as shown in FIG. 6C, by applying Von to the ion supply terminal, Von to the charge injection layer, and V _RESET + Von to the path control terminal, the deposited metal is retained while retaining the holes in the charge storage layer. By dissolving, the charge storage layer and the charge injection layer can be insulated.

FIG. 7 is a diagram for explaining a procedure for programming an OFF state when the transistor portion of the nonvolatile switch element of the present invention is an nMOSFET. First, as shown in FIG. 7A, V _SET is applied to the ion supply terminal and 0 V is applied to the path control terminal. By doing so, metal is deposited between the ion supply terminal and the path control terminal, and the charge storage layer and the charge injection layer are short-circuited. Next, as shown in FIG. 7B, the ion supply terminal and the path control terminal are in an insulated state, and a programming voltage Voff (≦ 0) is applied to the charge injection layer. By doing so, holes are injected from the charge injection layer to the charge storage layer. Finally, as shown in FIG. 7C, Voff-V _RESET is applied to the ion supply terminal, Voff is applied to the charge injection layer, and Voff is applied to the path control terminal. By doing so, the deposited metal can be dissolved in a state where charges are removed from the charge storage layer or in a state where electrons are stored, and the charge storage layer and the charge injection layer can be insulated.

Next, a second method using the present invention as a switching element will be described. Shows a diagram of applying the V _G in the charge injection layer in a state in which a metal is deposited between ion supply terminals and path control terminal in Figure 8 (a). At this time, the effective gate insulating film thickness of the transistor portion is the thickness of the gate insulating film 101. The FIG. 8 (b), the shows a diagram of applying the V _G in the charge injection layer in a state of dissolved metal between ion supply terminal and path control terminal. At this time, the charge injection layer and the charge storage layer are insulated. Therefore, the effective gate insulating film thickness of the transistor portion is the sum of the thickness of the gate insulating film 101 and the thickness of the ion conductive layer. The threshold voltage of the transistor is higher as the effective gate insulating film thickness is larger. That is, the state of FIG. 8A is a low threshold voltage, and the state of FIG. 8B is a high threshold voltage. When the low threshold voltage is Vth_low and the high threshold voltage is Vth_high, the nonvolatile switch operation can be realized by designing V _G and the film thickness of the ion conductive layer so as to satisfy Vth_low <V _G <Vth_high.

  In the nonvolatile switch element of the present invention, signal propagation is performed between the source and drain of the transistor portion. That is, a high voltage for driving the logic circuit is not applied to the memory unit. Therefore, even when the present invention is used in a logic circuit, a problem that a value written in a memory portion is rewritten during circuit operation hardly occurs.

  FIG. 9 is a diagram for explaining a second embodiment of the present invention. In the second embodiment, the contact between the memory portion and the transistor portion is in the charge storage layer 200 on the field oxide film. By taking such a form, the gate length of the transistor portion can be made shorter than the minimum processing dimension of the charge storage layer, and the drive current of the transistor portion can be made as large as possible.

  FIG. 10 is a diagram for explaining a third embodiment of the present invention. In the first embodiment, the memory section is placed on the transistor section. In the second embodiment, the memory section is placed beside the transistor section. The memory portion may be arranged in the wiring layer above the transistor portion as shown in the first embodiment, or may be arranged beside the transistor portion as in the second embodiment.

Next, a circuit configuration when the present invention is integrated on a chip will be described. FIG. 11 shows a specific example of the connection between the present invention and the program circuit arranged in an array. The circuit for programming includes a row decoder 402, a row driver 403, a column decoder 404, a column driver 405, and a charge injection layer 406 driver. In the nonvolatile switch of the present invention, the ion supply terminal or the path control terminal is the lower row address line 409 _n , the path control terminal or the ion supply terminal is the source of the program transistor 401, and the charge injection layer is the charge injection line 410 _n. It is connected to the. The gate of the programming transistor 401 is connected to the column address line 407 _n and the drain is connected to the upper row address line 408 _n . In FIG. 11, the charge injection layer driver 406 is not connected to the column decoder 404, but may actually be connected to the column decoder 404.

  FIG. 12 is a diagram for explaining the program operation of the circuit of FIG. The column decoder selects one column address line, and the column driver applies a programming voltage to the selected column address line. The row decoder selects a pair of upper and lower row address lines, and applies a programming voltage between the source of the programming transistor and the path control terminal or ion supply terminal of the nonvolatile switch. The charge injection layer driver applies a programming voltage to the charge injection line. In this way, one nonvolatile switch can be selectively programmed. The charge injection layer driver may apply a voltage to all the charge injection lines, or may apply a voltage only to the charge injection line corresponding to the column address line designated by the column driver.

  The circuit configuration of FIG. 11 is characterized in that the voltage required for programming the nonvolatile switch element is low. That is, this circuit configuration is effective when it is difficult to use a high-voltage power supply.

Next, a second circuit configuration when the present invention is integrated on a chip will be described. FIG. 13 shows a second specific example of the connection between the present invention and the program circuit arranged in an array. The program circuit includes a row decoder, a row driver, a column decoder, a column driver, and a charge injection layer driver. Further, non-volatile switch of the present invention, the path control terminal to the row address line 501 _n, the cathode of the Zener diode 500 the ion supply terminals are connected to a charge injection layer in the charge injection line. The anode of the Zener diode is connected to the column address line. In FIG. 13, the charge injection layer driver is not connected to the column decoder, but may actually be connected to the column decoder.

FIG. 14 shows current-voltage characteristics when a Zener diode cathode is grounded and a voltage is applied to the anode. If a positive voltage is applied, current is to flow rapidly in the ON voltage V _F. Also, when a negative voltage is applied, current is to flow rapidly in the Zener voltage -V _Z. The voltage between -V _Z and V _F, a current hardly flows.

FIG. 15 illustrates the program operation of the circuit of FIG. First, a method for selectively forming a metal path in one nonvolatile switch will be described. As shown in FIG. 15A, the column decoder selects one column address line, and the column driver applies a voltage of 0 V to the selected column address line. The row decoder selects one row address line, the row driver applies a voltage of V _SET + V _{F to} the selected row address line, and the charge injection layer driver applies a programming voltage to the charge injection line. To do. By doing so, the metal path of one nonvolatile switch can be selectively dissolved and deposited. The charge injection layer driver may apply a voltage to all the charge injection lines, or may apply a voltage only to the charge injection line corresponding to the column address line designated by the column driver.

Next, a method for selectively dissolving the metal path of the programmed element will be described. The column decoder selects one column address line, and the column driver applies a voltage for path melting to the selected column address line. The row decoder selects one row address line, and the row driver applies a path melting voltage to the selected row address line. The charge injection layer driver applies a programming path melting voltage to the charge injection line. Apply. The voltage for path melting differs depending on whether the switch element is turned on or off. The voltage values for programming are summarized in Table 1. By applying the voltage shown in Table 1, the metal path of one nonvolatile switch can be selectively deposited. The charge injection layer driver may apply a voltage to all the charge injection lines, or may apply a voltage only to the charge injection line corresponding to the column address line designated by the column driver.

  The Zener diode can be formed not only on the semiconductor substrate but also in the wiring layer. Therefore, it is easy to reduce the chip area. This circuit configuration is effective when it is desired to reduce the chip area.

Next, the value range of the Zener voltage will be described. FIG. 16 shows a diagram in which voltages are applied to the column address line and the row address line in order to dissolve the metal path of the selection element. Here, it can be seen from Table 1 that the potential difference between the column address line and the row address line is V _RESET + V _Z regardless of the value written to the selected element. Therefore, even if it is assumed that V _RESET + V _Z is applied to the column address line and 0 V is applied to the row address line, the generality of the discussion is maintained. Here, it can be seen that the voltage drop from the column address line to the row address line is not only the path through the selection element. For example, a voltage drop occurs via the voltage drop path 600 as indicated by a dotted line in the figure. Here, the elements sharing the column address line with the selected elements exist in an equivalent state except for the selected elements. Similarly, elements sharing the selection line and the row address line are equivalent to each other except the selection element. Further, elements that do not share both the selection element and the row address line / column address line are equivalent to each other. From the above, it can be seen that the row address lines to which no voltage is applied are all at the same potential, and that the column address lines to which no voltage is applied are all at the same potential.

Here, when the cathode of the Zener diode and the ion supply terminal of the nonvolatile switch are connected, an equivalent resistance between the anode of the Zener diode and the path control terminal of the nonvolatile switch is applied, and a positive voltage is applied to the anode of the Zener diode. R _L when the path control terminal is set to the ground potential (FIG. 17A), when a positive voltage is applied to the path control terminal of the nonvolatile switch and a negative voltage is applied to the anode of the Zener diode (FIG. 17). (B)) _RH . Then, the equivalent circuit of FIG. 16 is as shown in FIG. Here, the potential of the row address line in which no voltage is applied to the V _R, the potential of the column address lines in which no voltage is applied to the V _C. Then, the difference between V _R and V _C is as shown in Equation (1).

Here, when the cathode of the Zener diode and the ion supply terminal of the nonvolatile switch are connected, when the positive voltage is applied to the anode of the Zener diode and the path control terminal of the nonvolatile switch is set to the ground potential, the applied voltage is V _F + If V _SET is exceeded, a metal path will be deposited between the ion supply terminal and path control terminal of the non-selected non-volatile switch. The condition for preventing such an operation from occurring can be written as shown in Equation (2).

From the above, the condition of the Zener potential is as shown in Equation (3). It is desirable to design the Zener potential V _Z so as to satisfy Equation 3.

  Next, a third circuit configuration when the present invention is integrated on a chip will be described. FIG. 19 shows a second specific example of the connection between the present invention and the program circuit arranged in an array. The program circuit includes a row decoder, a row driver, a column decoder, a column driver, and a charge injection layer driver. In the nonvolatile switch of the present invention, the path control terminal is connected to the cathode of the Zener diode, the ion supply terminal is connected to the row address line, and the charge injection layer is connected to the charge injection line. The anode of the Zener diode is connected to the column address line. In FIG. 19, the charge injection layer driver is not connected to the column decoder, but may actually be connected to the column decoder.

Next, a programming method in the third circuit configuration will be described. FIG. 20 is a diagram illustrating a voltage for depositing a metal path of the nonvolatile switch element. By applying V _SET + V _{Z to} the row address line and 0 V to the column address line, a metal path can be deposited on the ion conductive layer of the nonvolatile switch.

Next, a method for selectively dissolving the metal path of the programmed element will be described. The column decoder selects one column address line, and the column driver applies a voltage for path melting to the selected column address line. The row decoder selects one row address line, and the row driver applies a path melting voltage to the selected row address line. The charge injection layer driver applies a programming path melting voltage to the charge injection line. Apply. The voltage for path melting differs depending on whether the switch element is turned on or off. The voltage values for programming are summarized in Table 1. By applying the voltage shown in Table 2, the metal path of one nonvolatile switch can be selectively deposited. The charge injection layer driver may apply a voltage to all the charge injection lines, or may apply a voltage only to the charge injection line corresponding to the column address line designated by the column driver.

Next, the value range of the Zener voltage will be described. In the case of the third circuit configuration, when the metal path is deposited, a voltage drop through a voltage drop path similar to that in FIG. 16 can be considered. An equivalent circuit is shown in FIG. Here, the potential of the row address line in which no voltage is applied to the V _R, the potential of the column address lines in which no voltage is applied to the V _C. Then, the difference between V _R and V _C is expressed by Equation (4).

Here, when the cathode of the Zener diode and the ion supply terminal of the nonvolatile switch are connected, when the positive voltage is applied to the anode of the Zener diode and the path control terminal of the nonvolatile switch is set to the ground potential, the applied voltage is V _F + If V _RESET is exceeded, the metal path will melt between the ion supply terminal and path control terminal of the non-selected non-volatile switch. The condition for preventing such an operation from occurring can be written as in equation (5).

From the above, the condition of the Zener potential is as shown in Equation (6). It is desirable to design the Zener potential V _Z so as to satisfy Equation 6.

1 transistor unit 2 memory unit ₁₀₀ 1 to 100 _n source, drain 101 a gate insulating film 102 semiconductor substrate 103 charge storage layer 104 ion conduction layer 105 the charge injection layer 106 pass control terminal ₁₀₇ 1 to 107 _n interlayer insulating film ₁₀₈ 1 -108 _n Spacer insulating film 109 Ion supply terminal 110 Deposited metal 111 Hole 200 Charge storage layer 400 on field oxide film Non-volatile switch element 401 Program transistor 402 Row decoder 403 Row driver 404 Column decoder 405 Column driver 406 Charge injection layer drivers 407 _{1 to} 407 _n column address lines ₄₀₈ 1 _{~408 n} top row address lines ₄₀₉ 1 _{~409 n} lower row address lines ₄₁₀ 1 - 410 _n charge injection line 500 zener diode ₅₀₁ 1 _{~501 n} row address lines 600 conductive Drop path 700 equivalent resistance 701 equivalent resistance

Claims (10)

A non-volatile switch element composed of a transistor part and a memory part,
The memory unit has an ion conduction medium through which metal ions are conducted and the ion conduction medium has two dents at opposite positions.
A metal in contact with the recess of the ion conducting medium;
A first electrode that contacts the other recess of the ion conductive medium; a second electrode that contacts the ion conductive medium and does not contact the metal and the first electrode;
A third electrode arranged in contact with the ion conductive medium, not in contact with the metal and the first electrode, and opposed to the second electrode;
The transistor portion includes the metal,
An insulating film in contact with the metal;
A semiconductor substrate in contact with the insulating film and not in contact with the metal;
A nonvolatile switching element comprising a source region and a drain region formed in the semiconductor substrate.   The nonvolatile switch element according to claim 1, wherein the second electrode has a higher ionization rate than the third electrode.   2. The nonvolatile switch element according to claim 1, wherein the memory portion is formed in a wiring layer above the transistor portion.   The nonvolatile switch element according to claim 1, wherein the memory unit is formed on a semiconductor substrate next to the transistor unit. Using SiO ₂ as the ion conduction medium,
2. The nonvolatile switch element according to claim 1, wherein a heavily doped polysilicon is used as the metal. A non-volatile switch element composed of a transistor part and a memory part,
The memory unit has an ion conduction medium through which metal ions are conducted and the ion conduction medium has two dents at opposite positions.
A metal in contact with the recess of the ion conducting medium;
A first electrode that contacts the other recess of the ion conductive medium; a second electrode that contacts the ion conductive medium and does not contact the metal and the first electrode;
A third electrode arranged in contact with the ion conductive medium, not in contact with the metal and the first electrode, and opposed to the second electrode;
The transistor portion includes the metal,
An insulating film in contact with the metal;
A semiconductor substrate in contact with the insulating film and not in contact with the metal;
Using a nonvolatile switching element composed of a source region and a drain region made in the semiconductor substrate,
An operation method of a non-volatile switch that controls conductivity between a source and a drain of a transistor portion by storing electric charge in the metal. A non-volatile switch element composed of a transistor part and a memory part,
The memory unit has an ion conduction medium through which metal ions are conducted and the ion conduction medium has two dents at opposite positions.
A metal in contact with the recess of the ion conducting medium;
A first electrode that contacts the other recess of the ion conductive medium; a second electrode that contacts the ion conductive medium and does not contact the metal and the first electrode;
A third electrode arranged in contact with the ion conductive medium, not in contact with the metal and the first electrode, and opposed to the second electrode;
The transistor portion includes the metal,
An insulating film in contact with the metal;
A semiconductor substrate in contact with the insulating film and not in contact with the metal;
Using a nonvolatile switching element composed of a source region and a drain region made in the semiconductor substrate,
A first state in which the metal and the first electrode are insulated by an ion conducting medium;
In a second state where the metal and the first electrode are short-circuited by the deposited metal,
The threshold voltage of the transistor part is different,
An operation method of a nonvolatile switch for controlling conductivity between a source and a drain of a transistor portion. A non-volatile switch element composed of a transistor part and a memory part,
The memory unit has an ion conduction medium through which metal ions are conducted and the ion conduction medium has two dents at opposite positions.
A metal in contact with the recess of the ion conducting medium;
A first electrode that contacts the other recess of the ion conductive medium; a second electrode that contacts the ion conductive medium and does not contact the metal and the first electrode;
A third electrode arranged in contact with the ion conductive medium, not in contact with the metal and the first electrode, and opposed to the second electrode;
The transistor portion includes the metal,
An insulating film in contact with the metal;
A semiconductor substrate in contact with the insulating film and not in contact with the metal;
A non-volatile switch element comprising a source region and a drain region made in the semiconductor substrate,
Connecting the second to third electrodes of the nonvolatile switch element with the source of the transistor;
Connecting the drain of the transistor to a first word line;
Connecting the gate of the transistor to a bit line;
Connecting the third or second metal of the nonvolatile switch element to a second word line paired with the first word line;
The first electrode of the nonvolatile switch element is connected to a voltage application circuit,
A circuit having one or more pairs of a nonvolatile switch element and a transistor. A non-volatile switch element composed of a transistor part and a memory part,
The memory unit has an ion conduction medium through which metal ions are conducted and the ion conduction medium has two dents at opposite positions.
A metal in contact with the recess of the ion conducting medium;
A first electrode that contacts the other recess of the ion conductive medium; a second electrode that contacts the ion conductive medium and does not contact the metal and the first electrode;
A third electrode arranged in contact with the ion conductive medium, not in contact with the metal and the first electrode, and opposed to the second electrode;
The transistor portion includes the metal,
An insulating film in contact with the metal;
A semiconductor substrate in contact with the insulating film and not in contact with the metal;
A non-volatile switch element comprising a source region and a drain region made in the semiconductor substrate,
Connecting the second to third electrodes of the nonvolatile switch element with the cathode of a Zener diode;
Connecting the third to second electrodes to a bit line;
Connecting the first electrode to a voltage application circuit;
A circuit having at least one set of a nonvolatile switch element and a transistor that exceeds the connection of the anode of the Zener diode to a word line.   10. The circuit according to claim 8, wherein the circuit is a field programmable gate array circuit.

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