JP2011147212A - Snubber circuit for power converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce loss by suppressing the unbalance of a turn-off loss in each semiconductor device even when current unbalance occurs depending upon the length of wiring, concerning a power converter which uses each semiconductor device connected in series as a switching element. <P>SOLUTION: Current unbalance occurs because inductance varies with the length of wiring in such a power converter that expresses wiring inductance 5 by an equivalent circuit as shown in the figure as to only an upper arm in which two semiconductor devices 11 and 12 are connected in parallel. To cope with this, the capacity of a snubber capacitor on the side of shorter wiring length is made larger than that of a snubber capacitor (C<SB>s2</SB>in the figure) on the side of longer wiring length. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a snubber circuit provided for the purpose of suppressing a surge voltage at the time of turn-off of semiconductor elements connected in parallel by a power converter and reducing loss.

2. Description of the Related Art Resonant inverters that connect a capacitor in series or in parallel with an inductive load and supply power using LC resonance are often used in induction heating devices represented by electromagnetic cookers.
FIG. 3 shows a general example of a resonant inverter having a full bridge configuration. Hereinafter, the case where the inverter of FIG. 3 is applied to an electromagnetic cooker will be described.
In general, an electromagnetic cooker is a cooker in which a pan is arranged on the upper surface of a heating coil wound on a flat plate and the pan is heated by the principle of induction heating. Since the heating coil and pan of this cooker can be regarded as a transformer with a poor coupling coefficient, it becomes an inductive load 4 of an LR series circuit as shown.

  In order to supply power to the inductive load 4 as described above, a resonant capacitor 6 is connected in series with the inductive load 4 and the inverter is operated near the resonant frequency of the inductive load 4 and the resonant capacitor 6. Increase the load power factor to supply power. Further, by setting the operating frequency of the resonant inverter higher than the resonant frequency of the load, soft switching can be realized and switching loss can be greatly reduced.

FIG. 4 shows an operation waveform diagram of FIG.
i ₀ is a load current, and i ₁₀ and i ₂₀ are currents flowing through the semiconductor elements 10 and 20, respectively. Since the resonant inverter is operated in the vicinity of the resonant frequency, the load current i ₀ has a roughly sinusoidal waveform as shown in FIG. At this time, the switching period of the resonant inverter is shorter than the LC resonance period, and the semiconductor element current immediately after turning on flows in the diode, so that no turn-on loss occurs (zero current switching). Further, by connecting the snubber capacitors 31, 32, 310, and 320 in parallel with the semiconductor elements 1, 2, 10, and 20, it is possible to suppress a voltage increase at the time of turn-off and to significantly reduce the turn-off loss.

The loss reduction effect when the snubber capacitor is connected will be described in detail below.
FIG. 5 shows a peripheral circuit of the switching arm in the case where a snubber circuit is used in a resonance type inverter using an inductive load as a load. This is because semiconductor elements 1 and 2 comprising a switching element and a diode connected in reverse parallel to this are connected in series between PNs having a DC potential difference, and snubber capacitors 31 and 32 are connected in parallel with these elements. It is composed.

FIG. 6 shows voltage and current waveforms at the moment when the semiconductor element 1 is turned off in the circuit shown in FIG.
In the figure, _ic represents the collector current of the semiconductor element 1, and v _ce represents the collector-emitter voltage of the semiconductor element 1. If there is no snubber capacitors 31 and 32, v _ce moment that the semiconductor device 1 is turned off in order to increase the instantaneous voltage, current waveform is as shown in FIG. 6 (a). On the other hand, when the snubber capacitors 31 and 32 are connected, the energy stored in the inductive load 4 or the wiring inductance at the moment when the semiconductor element 1 is turned off charges the snubber capacitor 31 and discharges the snubber capacitor 32. . As a result, as the snubber capacitors 31 and 32 are charged / discharged, the voltage dV / dt applied to the semiconductor element 1 becomes smaller as shown in FIG. 6B, so that the turn-off loss is reduced.

  By the way, along with the increase in capacity of power electronics devices, there are cases where semiconductor elements are configured in parallel connection as shown in FIG. In this case, as shown in the figure, the snubber capacitor is generally connected in parallel with capacitors of the same size for each element, or one capacitor is connected to the entire semiconductor elements connected in parallel to suppress loss. . However, when semiconductor elements are connected in parallel, the current flowing through each semiconductor element is unbalanced due to the difference in wiring length to each semiconductor element. Due to this current imbalance, turn-off loss is also imbalanced. This loss imbalance generation principle will be described below with reference to an example in which two semiconductor elements are connected in parallel.

  FIG. 8 is an enlarged view of only the upper arm of FIG. 7, and the wiring inductance 5 is represented by an equivalent circuit. If the performances of the two semiconductor elements 11 and 12 are substantially equal, the semiconductor element 12 has a longer wiring than the semiconductor element 11, and therefore the inductance is increased. For this reason, the current flowing through each semiconductor element at the time of turning on does not flow through each semiconductor element by half of the load current, but a larger current flows through the semiconductor element 11 having a small inductance and hence a smaller impedance. If the snubber capacitor 311 connected in parallel to the semiconductor element 11 and the snubber capacitor 312 connected in parallel to the semiconductor element 12 have the same capacity, the voltage dV / dt at turn-off is the same for both elements as shown in FIG. Therefore, the loss of the semiconductor element 11 having a large current shown in FIG. Therefore, the element temperature varies and the cooling reliability is impaired.

As a method for reducing the loss imbalance as described above, in Patent Document 1, as shown in FIG. 10, two semiconductor elements 11 and 12, 13 and 14, for example, are connected in parallel and further connected to each other. Are connected in parallel to make the wiring length to each element the same, thereby suppressing current imbalance.
In Patent Document 2, a conductor that connects the gate electrodes of each semiconductor element and a conductor that connects the source electrodes are arranged close to each other to suppress variations in the gate-source voltage, so that a current can be specified. A method of preventing concentration on the element and suppressing current imbalance has been proposed.

Japanese Patent No. 3648954 Japanese Patent No. 3896940

However, the method of Patent Document 1 has a problem that the number of semiconductor devices connected in parallel is limited to 2 ⁿ . Moreover, when actually mounting a semiconductor element on a board | substrate, there exists a possibility that wiring like patent documents 1 and 2 cannot be performed by the positional relationship of the wiring of other components. Further, when using a component in which a plurality of semiconductor elements are modularized, wiring as described above may be difficult due to terminal arrangement, or current imbalance may occur due to the influence of wiring inside the module.

  Accordingly, an object of the present invention is to reduce a loss while suppressing an unbalance of a turn-off loss of each semiconductor element even when a current imbalance occurs due to the length of wiring for each semiconductor element connected in parallel. .

In order to solve such a problem, in the invention of claim 1, a plurality of semiconductor elements each composed of a switching element and a diode connected in antiparallel thereto are connected in parallel, and in parallel with each of the semiconductor elements. A capacitor is connected to form a switching arm, a series circuit in which the switching arm is connected in series is connected between two points having a DC potential difference, and one end of the load is connected to an intermediate connection point of the series circuit to generate power. In the power converter to be supplied,
Same wiring than the capacitance of the capacitor connected in parallel with the semiconductor element with the longer wiring length of the line from one end of the load through the semiconductor element to one of the two points having the DC potential difference A measure to increase the capacitance of the capacitor connected in parallel with the semiconductor element having a short length is applied to at least one switching arm connected to the high potential side or the low potential side of the two points having a DC potential difference. It is characterized by that.
According to the first aspect of the present invention, the capacitance ratio of the capacitors can be determined according to the ratio of the current values flowing through the semiconductor elements connected in parallel (the second aspect of the invention).

  According to the present invention, when a plurality of semiconductor elements are connected in parallel, even when current imbalance occurs due to the length of wiring to each element, turn-off loss can be reduced while suppressing imbalance of each element. Thereby, the dispersion | variation in each element temperature can be suppressed and the reliability of cooling can be improved. Further, since the effect can be exhibited regardless of the wiring pattern, there is an advantage that it can be applied even when it is difficult to change the wiring, such as a module type part.

The circuit diagram which shows embodiment of this invention. FIG. 2 is a voltage / current waveform diagram at the time of turn-off in FIG. 1. The circuit diagram which shows the general example of a resonance type inverter. FIG. 4 is an operation waveform diagram of FIG. 3. The circuit diagram which shows the prior art example of the inverter provided with the snubber circuit. FIG. 6 is a voltage / current waveform diagram at the time of turn-off in FIG. 5. FIG. 6 is a circuit diagram showing a case where semiconductor elements are connected in parallel in FIG. 5. The elements on larger scale of FIG. FIG. 8 is a voltage / current waveform diagram in FIG. 7. The circuit diagram for the current imbalance reduction disclosed by patent document 1. FIG.

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention. This can be said to be the same as FIG. 8 in which only the upper arm of FIG. 7 in which two semiconductor elements are connected in parallel is enlarged and the wiring inductance 5 is represented by an equivalent circuit. The circuit configuration is the same, but the following points are different.
If the current flowing when the semiconductor element 11 is on is i _c1 and the current flowing when the semiconductor element 12 is on is i _c2 , if the performance of the two semiconductor elements is substantially the same, the wiring inductance 5 Due to the influence, i _c1 > i _c2 .

Therefore, the values of the snubber capacitors 311 and 312 connected in parallel to the respective semiconductor elements are determined according to the current value when the semiconductor elements are turned on. That is, the capacity C _s1 of the snubber capacitor 311 of the semiconductor element 11 with a large flowing current is changed to a larger one than the capacity C _s2 of the snubber capacitor 312 of the semiconductor element 12 with a small flowing current.
FIG. 2 shows voltage and current waveforms when the present invention is applied. At the moment of turn-off, the current (see the broken line) flowing in the semiconductor elements 11 and 12 flows to the capacitors 311 and 312 connected in parallel to charge them. On the other hand, the current flowing through the semiconductor elements 11 and 12 rapidly approaches 0 over a certain turn-off time.

In general, the voltage v applied to the capacitor is expressed as follows.
v = ∫idt / C (1)
It is represented by Therefore, the voltage change rate dv / dt of the snubber capacitors 311 and 312 in FIG. 1 is proportional to 1 / C (inversely proportional to C). That is, the larger the capacitor capacity, the smaller the dv / dt.

  Since the voltage applied to the semiconductor elements 11 and 12 is equal to the voltage of the snubber capacitors 311 and 312, the dv / dt of the voltage of the semiconductor elements 11 and 12 decreases as the capacity of the snubber capacitors 311 and 312 increases. Further, since the loss is represented by the product of voltage and current, the turn-off loss of the semiconductor elements 11 and 12 can be reduced by reducing the voltage dv / dt applied to the semiconductor element 11 having a large current as shown in FIG. Can be made equivalent.

Next, a specific method for determining the snubber capacitor capacity will be described.
The current flowing in the semiconductor elements 11 and 12 is commutated to the snubber capacitors 311 and 312 connected in parallel with the turn-off, and charging is started. In this case the current flowing through the snubber capacitor 311, 312, respectively _{i cs1, i cs2,} the voltage applied to the snubber capacitor 311, 312, i.e., the collector of the semiconductor elements 11 and 12 - emitter voltage _{v ce1, v ce2} is It is calculated as the following equation (2).
_{v ce1 = ∫i cs1 dt / C} s1,
v _ce2 = ∫i _cs2 dt / C _s2 (2)

Accordingly, turn-off loss _{P off1, P off2} of the semiconductor elements 11 and 12,
P _off1 = i _c1 × ∫i _cs1 dt / C _s1 ,
_{P off2 = i c2 × ∫i cs2} dt / C s2 ... (3)
It can be expressed as here,
i _c1 = k · (k: real number) i _c2 (4)
Since the current flowing through the snubber capacitors 311 and 312 depends on the current flowing through the semiconductor elements 11 and 12 immediately before the turn-off,
i _cs1 = k · i _cs2 (5)
It becomes the relationship.

To suppress the unbalance of the turn-off _loss, it is considered that it Arere at P off1 _{= P off2,} from equation (3),
i _c1 × ∫i _cs1 dt / C _s1 = i _c2 × ∫i _cs2 dt / C _s2 (6)
Is established. Considering the relationship of the currents in the above equations (4) and (5) to this equation (6),
k · i _c2 × ∫k · i _cs2 dt / C _s1 = i _c2 × ∫ i _cs2 dt / C _s2 (7)
It becomes. Than this,
C _s1 = k ² · C _s2 (8)
The following relationship is derived.

That is, when the on-current of the semiconductor element 11 is k times the on current of the semiconductor element 12, by the capacitance of the snubber capacitor 311 to the k ² times the capacitance of the snubber capacitor 312, be substantially equal to the turn-off loss Can do.
In fact, since the previously determined capacity of the capacitor that provides the manufacturer to choose a capacitor of capacitance ^twice k it is not always easy. However, by the nearest value capacitor ^doubled k, it is possible to suppress imbalance of turn-off loss to a minimum.

  In the above description, the high potential side of the inverter has been described. However, the low potential side can be configured in the same manner, and the high potential side and the low potential side can be configured in the same manner. Moreover, although the case where two semiconductor elements are arranged in parallel has been described, the present invention is not limited to this, and a plurality of semiconductor elements can be generally used.

  1,2,10,11,12,13,14,20,21,22 ... semiconductor element, 31,32,310,311,312,320,321,322 ... snubber capacitor, 4 ... inductive load, 5 ... Wiring inductance, 6 ... resonance capacitor.

Claims (2)

A plurality of semiconductor elements each composed of a switching element and a diode connected in antiparallel to the switching element are connected in parallel, and a capacitor is connected in parallel with each of the semiconductor elements to form a switching arm. The switching arm is connected in series. In the power converter for connecting the connected series circuit between two points having a direct current potential difference and connecting one end of the load to the intermediate connection point of the series circuit to supply power,
Same wiring than the capacitance of the capacitor connected in parallel with the semiconductor element with the longer wiring length of the line from one end of the load through the semiconductor element to one of the two points having the DC potential difference A measure to increase the capacitance of the capacitor connected in parallel with the semiconductor element having a short length is applied to at least one switching arm connected to the high potential side or the low potential side of the two points having a DC potential difference. The snubber circuit of the power converter device characterized by the above-mentioned.   2. The snubber circuit for a power converter according to claim 1, wherein a capacitance ratio of the capacitors is determined in accordance with a ratio of current values flowing through the semiconductor elements connected in parallel.

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