JP2012169390A - Plasma processing method - Google Patents

Abstract

An object of the present invention is to provide a plasma processing method capable of reducing density microloading in a pattern having a dense space width of 20 nm or less.
The present invention relates to a plasma processing method for plasma etching a sample silicon having a mask having a pattern with a dense space width of 20 nm or less on a silicon substrate, using a mixed gas of Cl ₂ gas and N ₂ gas. Etching silicon while applying time-modulated intermittent high frequency power with a duty ratio of 5% to 50% to the sample at a pressure of 0.1 Pa or less.
[Selection] Figure 4

Description

  The present invention relates to a plasma processing method for plasma processing a semiconductor element or the like.

  In recent years, in the field of manufacturing semiconductor devices, shallow trench isolation (hereinafter abbreviated as STI) technology has been widely used as an element isolation technology. In the STI technology, for example, a trench (etching groove) is formed in a silicon substrate by anisotropic etching. Is forming.

As an example of anisotropic etching, Patent Document 1 discloses that a silicon substrate is disposed on one of a pair of counter electrodes provided in an etching chamber, high-frequency power is supplied to both of the counter electrodes, and Cl is placed in the etching chamber. A method of dry etching a silicon substrate by supplying a gas containing ₂ or HBr is disclosed.

  Further, in Patent Document 2, as an example of etching under a low gas pressure condition of 0.1 Pa or less, an optical interference real-time film thickness monitor is used to prevent damage to the oxide film that occurs at the time of detecting the end point of polysilicon. A method for detecting a silicon residual film and switching to a high selective etching condition immediately before the end point is disclosed.

JP 2003-007679 A JP 1999-260799 A

  Along with the high integration and high performance of semiconductor devices fabricated on a silicon substrate, the semiconductor elements constituting the devices are miniaturized with a scaling rule of about 0.7 times. The design rules (design standards) of 32 nm and 22 nm applied to the current semiconductor products are 20 nm or less in the next-generation developed products, and the STI space width is further reduced.

  In the STI plasma etching, the reaction product of silicon (e.g., SiCl, SiBr, etc.) re-adhered during the plasma etching process occurs, but this is a serious problem in the conventional design rule with a wide space. It never happened.

  However, in the STI plasma etching in which the space width of the dense part is 20 nm or less, as shown in FIG. 3, a trace amount of reaction products is deposited on the mask side wall, so that the space width is narrowed or the space is blocked. There was a problem that the progress of etching became difficult.

  The amount of the reaction product deposited is strongly affected by the gas pressure. That is, it is known that the amount of deposition on the mask sidewall becomes very large because collision scattering frequently occurs and the amount of re-incident reaction products increases as the gas pressure increases.

  In the conventional dry etching technique, since a high etching rate is taken into consideration, silicon plasma processing is generally performed in STI in a pressure region of a processing chamber of 0.5 Pa to 2.0 Pa. However, in the pattern where the space width of the dense portion is about 20 nm, as described above, the reaction product is deposited on the mask side wall, and the space width is narrowed or the space is closed. As a result, the etching does not proceed in the dense pattern, and the density of micro-loading, which is the difference between the depth of the trench having the smallest etching amount in the dense pattern and the depth of the trench having the largest etching quantity in the dense pattern, is reduced. growing.

  In view of the above problems, the present invention provides a plasma processing method capable of reducing dense microloading in a pattern having a dense space width of 20 nm or less.

The present invention relates to a plasma processing method for plasma etching a sample silicon having a mask having a pattern with a dense space width of 20 nm or less on a silicon substrate, using a mixed gas of Cl ₂ gas and N ₂ gas and having a pressure of 0.1 Pa or less. The plasma processing method is characterized in that silicon is etched while applying intermittent high-frequency power modulated with time at a duty ratio of 5% to 50% to the sample under pressure.

The present invention also provides a plasma processing method for plasma etching a sample silicon having a mask having a pattern with a dense space width of 20 nm or less on a silicon substrate, using a mixed gas of Cl ₂ gas and O ₂ gas, and 0.1 Pa. The plasma processing method is characterized by etching silicon while applying time-modulated intermittent high frequency power having a duty ratio of 5% to 50% to the sample at the following pressure.

  According to the present invention, dense microloading can be reduced in a pattern having a dense space width of 20 nm or less.

1 is a schematic cross-sectional view of a plasma etching apparatus according to the present invention. It is sectional drawing explaining the structure of the semiconductor element concerning a present Example. It is sectional drawing after the plasma etching at the time of using the conditions of a prior art. It is sectional drawing after the plasma etching at the time of using the conditions of this invention.

  Hereinafter, embodiments for carrying out the present invention will be described with reference to the accompanying drawings. FIG. 1 shows a plasma etching apparatus used in this embodiment. A shower plate 104 (for example, made of quartz) and a dielectric window 105 (for example, made of quartz) for introducing a processing gas into the vacuum container 101 are installed and sealed on the upper part of the vacuum vessel 101 whose upper part is opened. A processing chamber 106 is formed. A gas supply device 107 for flowing a processing gas is connected to the shower plate 104. Further, a vacuum exhaust device (not shown) is connected to the vacuum container 101 via a vacuum exhaust port 108.

  In order to transmit power for generating plasma to the processing chamber 106, a waveguide 109 for transmitting electromagnetic waves is provided above the dielectric window 105. The electromagnetic wave (plasma generating high frequency) transmitted to the waveguide 109 is oscillated from the electromagnetic wave generating power source 103. The frequency of the electromagnetic wave is not particularly limited, but in this embodiment, a 2.45 GHz microwave (high frequency for plasma generation) is used. A magnetic field generating coil 110 that forms a magnetic field is provided on the outer periphery of the processing chamber 106, and the electric power oscillated from the electromagnetic wave generating power source 103 is generated in the processing chamber 106 by interaction with the formed magnetic field. High density plasma is generated.

A wafer mounting electrode 102 is provided below the vacuum vessel 101 so as to face the shower plate 104. The wafer mounting electrode 102 is coated with a sprayed film (not shown) on the electrode surface, and a DC power supply 115 is connected through a high frequency filter 114. Further, a high frequency power source 113 which is a bias high frequency power source is connected to the wafer mounting power source 102 via a matching circuit 112. A temperature controller (not shown) is also connected to the wafer mounting electrode 102.
The wafer 111 which is a sample transported into the processing chamber 106 is adsorbed and temperature-adjusted on the wafer mounting electrode 102 by the electrostatic force of the DC voltage applied from the DC power source 115, and a desired processing is performed by the gas supply device 107. After supplying the gas, the inside of the vacuum chamber 101 is set to a predetermined pressure, and plasma is generated in the processing chamber 106. By applying high frequency power from a high frequency power supply 113 connected to the wafer mounting electrode 102, ions are attracted from the plasma to the wafer, and the wafer 111 is plasma processed. Further, since the high frequency power supply 113 includes a pulse oscillator, it is possible to apply time-modulated intermittent high frequency power or continuous high frequency power to the wafer mounting electrode.

  Hereinafter, the plasma processing method of the present invention using the plasma etching apparatus will be described.

  The wafer 111 is transferred to the vacuum container 101 by a transfer means (not shown) and mounted on the wafer mounting electrode 102. As shown in FIG. 2, the wafer mounted on the wafer mounting electrode 102 is formed with a photoresist mask (not shown) or a hard mask 202 patterned in a predetermined shape on the silicon substrate 201. It is filmed. Further, the space width of the dense portion of the pattern of the hard mask 202 patterned into a predetermined shape is about 10 nm which is extremely narrower than that of the conventional semiconductor device.

After the wafer 111 is mounted on the wafer mounting electrode 102, as shown in Table 1, CF ₄ gas and N ₂ gas are supplied from the gas supply device 107 into the vacuum vessel 101 and processed through the vacuum exhaust device. The pressure in the chamber 106 is controlled to 0.4 Pa, high frequency power of 800 W is supplied from the electromagnetic wave generating power source into the processing chamber 106 to generate plasma, and 80 W is continuously applied from the high frequency power source 113 to the wafer mounting electrode 102. The silicon substrate 201 is etched along the pattern of the hard mask 202 by the plasma generated in the processing chamber 106 while applying a high frequency power. During the etching, the temperature of the wafer mounting electrode 102 is adjusted to 30 ° C. This etching step is a first step for performing a breakthrough in etching the silicon substrate 201.

Next, as shown in Table 1, Cl ₂ gas and N ₂ gas are supplied from the gas supply device 107 into the vacuum vessel 101, and the pressure in the processing chamber 106 is controlled to 0.08 Pa through the vacuum exhaust device. Then, 400 W high frequency power is supplied from the electromagnetic wave generating power source into the processing chamber 106 to generate plasma, and the high frequency power source 113 supplies the wafer mounting electrode 102 with a 300 W duty ratio of 30% time-modulated intermittent high frequency. While applying power, the silicon substrate 201 is etched by the plasma generated in the processing chamber 106. During the etching, the temperature of the wafer mounting electrode 102 is adjusted to 30 ° C. This etching step is a second step for performing main etching of the silicon substrate. It should be noted that the duty ratio is the time-modulated intermittent high-frequency power on time T _on and off time T _off .
Duty ratio = T _on / (T _on + T _off )
It becomes.

  Next, after the etching of the second step is completed, the wafer 111 is unloaded from the vacuum vessel 101 by a transfer means (not shown), and the plasma processing of the present invention is completed.

  As a result of performing the etching process on the wafer 111 in the above-described two steps, the silicon substrate 201 is etched without depositing the reaction product 203 such as SiCl or SiBr on the sidewall of the hard mask 202 as shown in FIG. Thus, a desired etching shape with reduced density microloading could be obtained. This effect is considered as follows.

  By performing plasma etching in a pressure region where the pressure in the processing chamber 106 is 0.1 Pa or less, deposition of the reaction product 203 on the sidewall of the hard mask 202 can be suppressed, and the space width of the hard mask 202 is maintained. It became possible. Further, by applying time-modulated intermittent high frequency power to the wafer mounting electrode 102, the on-time high frequency power is increased even if the average value of the high frequency power applied to the wafer mounting electrode 102 is the same. Further, by promoting the exhaust of the reaction product 203 during the off time, plasma etching can be performed even in a narrow space width.

In the second step of the present embodiment, a mixed gas of Cl ₂ gas and N ₂ gas is used. However, the same effect as in the present embodiment can be obtained even if a mixed gas of Cl ₂ gas and O ₂ gas is used. be able to. In the second step of the present embodiment, the pressure in the processing chamber 106 is set to 0.08 Pa. However, the same effect as in the present embodiment can be obtained at 0.01 Pa to 0.1 Pa. In addition, the duty ratio in the second step of the present embodiment is set to 30%, but the same effect as that of the present embodiment can be obtained even at 5% to 50%.

In this embodiment, a Cl ₂ gas having a low saturated vapor pressure of the reaction product 203 is used as the plasma etching gas, and a mixed gas containing N ₂ gas is used. However, the plasma etching gas is HBr gas or HBr. When a mixed gas obtained by adding N ₂ or O ₂ to a mixed gas of gas and Cl ₂ gas (a mixed gas of HBr and N _2, a mixed gas of HBr and O _2, a mixed gas of Cl ₂ , HBr, and N ₂ ) , Cl ₂ , HBr, and O ₂ mixed gas) can improve the density microloading as in this embodiment.

DESCRIPTION OF SYMBOLS 101 Vacuum container 102 Wafer mounting electrode 103 Electromagnetic wave generation power supply 104 Shower plate 105 Dielectric window 106 Processing chamber 107 Gas supply device 108 Vacuum exhaust port 109 Waveguide 110 Magnetic field generation coil 111 Wafer 112 Matching circuit 113 High frequency power supply 114 High frequency filter 115 DC power supply 201 Silicon substrate 202 Hard mask 203 Reaction product

Claims (2)

In a plasma processing method for plasma etching silicon of a sample having a mask having a pattern with a dense space width of 20 nm or less on a silicon substrate,
Etching of silicon is performed using a mixed gas of Cl ₂ gas and N ₂ gas and applying intermittent high frequency power modulated at a duty ratio of 5% to 50% to the sample at a pressure of 0.1 Pa or less. A plasma processing method characterized by performing. In a plasma processing method for plasma etching silicon of a sample having a mask having a pattern with a dense space width of 20 nm or less on a silicon substrate,
Etching silicon using a mixed gas of Cl ₂ gas and O ₂ gas while applying intermittent high frequency power with a duty ratio of 5% to 50% to the sample at a pressure of 0.1 Pa or less. A plasma processing method characterized by performing.

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