JP2013247359A - Cavity-type semiconductor package and method of packaging the same - Google Patents

Abstract

A method (30) for forming a semiconductor package (20) is provided.
An adhesive (64) is applied to a portion (66) of a joint peripheral edge (50) of a base (22). There is no adhesive (64) in part (68) of the peripheral edge (50). The lid (24) is disposed on the base (22) such that the joint peripheral edge (62) of the lid (24) contacts the joint peripheral edge (50) of the base (22). The lid (24) includes a cavity (25) in which a die (38) mounted on a base (22) is located. A gap (70) without an adhesive (64) is formed in a portion (68) between the base (22) and the lid (24). As the air inside the cavity (25) expands during thermosetting (72), this structure blows out of the gap (70). Following thermosetting (72), another adhesive (80) is dispensed into portion (68) to close gap (70) and seal cavity (25).
[Selection] Figure 2

Description

  The present invention relates generally to semiconductor packaging. More specifically, the present invention relates to lid mounting techniques for cavity microelectromechanical system (MEMS) device packages.

  Microelectronics and microelectromechanical system (MEMS) technology provides a way to create very small electronic and mechanical structures and integrate these structures on a single substrate using conventional batch semiconductor processing techniques Therefore, it has become widespread in recent years. Patent Document 1 describes a metal package that can be connected by an edge. Although such microelectronics and MEMS devices are becoming mainstream technologies, the challenge remains to cost-effectively package them in semiconductor packages for manufacturing and easy use.

  A semiconductor package generally provides a set of related elements. These elements are, for example, for providing one or more semiconductor devices to be packaged, interconnection from the devices to the package, both mechanical support and electrical, chemical, and environmental protection. Includes an enclosing or containing structure, as well as a joining structure for attaching the package to a substrate or system. The problems facing developers of semiconductor packaging processes are, for example, that semiconductor devices (eg, microelectronics and microstructures) are sensitive to high temperature processes, require proper shielding, and in some cases For example, a hermetic seal or near-hermetic seal is required to protect against contaminants.

  In fact, protection is an important factor in packaging many semiconductor devices, because corrosion, moisture, and dust prevent device operation. That is, if packaging protection is compromised, the semiconductor device may fail and no output will be generated for a given input, or an invalid or inaccurate output for a given input. Is generated. As the dimensions of integrated circuit (IC) devices continue to shrink, the use of microelectromechanical system (MEMS) devices continues to increase, and the fabrication of semiconductor packages that accommodate multiple semiconductor devices continues to evolve. There is an increasing demand for low-cost, reliable, high-density packaging solutions.

  Some types of semiconductor devices require cavity-type packaging in which one or more devices mounted on the base are housed in a cavity of a lid structure that is bonded to the base. The cavity-type lid structure functions in part to provide environmental protection for the device being packaged. Some lid mounting materials for cavity-type semiconductor packaging are distributed between a base that includes one or more semiconductor devices and a lid that has a cavity in which the semiconductor devices will reside. Requires thermosetting to harden the lid mounting material. During heat curing, an opening, also referred to as a blow hole, can be formed in the bonding material due to the pressure from the expanding air inside the cavity when the structure is heated from room temperature to the curing temperature. The blowhole can be formed in the lid mounting material so that the expanded gas can escape from the cavity. These blowholes can provide an entrance to external media such as water, soda, acid, brake fluid, salt spray, and any other contaminants that can damage the device located in the cavity. is there. External media inside the cavity-type semiconductor package can result in the formation of undesirable conductive paths within the cavity, breakage of desirable conductive paths (eg, bonding wires), and / or expansion or delamination of material within the cavity.

  Therefore, room temperature curable materials have been proposed to avoid the problems associated with blowhole formation. However, some room temperature curable materials may not be suitable for designs that require electromagnetic shielding. In order to provide electromagnetic shielding, the lid is formed from a conductive material such as metal. A conductive lid may not be effective for electromagnetic shielding unless attached to ground in a semiconductor package. In such a configuration, the lid mounting material needs to be conductive to provide a path to ground. Prior art conductive lid mounting materials adapted to cure at room temperature have a short functional time. The short functional time, also referred to as pot life, is the length of time that the material is effective after its original package is opened or a catalyst or other curing agent is added. The short pot life of room temperature curable conductive lid mounting materials is an undesirable property in a manufacturing environment. For example, some prior art lid mounting materials that are adapted to cure at room temperature using ultraviolet radiation can have a longer pot life. However, such UV curable lid mounting materials are generally not available in conductive form.

  Another technique that can be implemented to avoid problems with blowhole formation is ultrasonic welding. In ultrasonic welding, high frequency ultrasonic acoustic vibrations are applied locally to a workpiece to create a solid state bond. In ultrasonic welding, soldering materials, adhesives, fasteners, etc. are not required to bond the materials together. Therefore, a blow hole cannot be formed. However, ultrasonic welding is not suitable for use with, for example, a semiconductor package that houses a MEMS device because high frequency ultrasonic acoustic vibrations can break the fragile movable microstructure of the MEMS device located within the cavity. there is a possibility.

US Pat. No. 6,300,673

  An object of the present invention is to provide a cavity type semiconductor package and a packaging method therefor that solve the above-mentioned problems.

  Embodiments involve a cavity-type semiconductor packaging method and a semiconductor device structure packaged according to the packaging method. The cavity-type semiconductor packaging method provides a secure lid attachment that allows for the release of gas that has expanded during thermal curing while providing a hermetic or near-hermetic seal. The method is particularly suitable for device packages that include electromagnetic devices that require electromagnetic shielding and / or ultrasonic welding, thermal curing, or room temperature curing processes may not be appropriate.

1 is a perspective view of an exemplary cavity semiconductor package according to one embodiment. FIG. 4 is a flowchart of a packaging process for packaging the cavity-type semiconductor package of FIG. 1 according to another embodiment. The top view of the device in the initial stage of packaging. FIG. 4 is a side cross-sectional view of the device taken along line 4-4 in FIG. FIG. 6 is a top view of a device in a subsequent stage of packaging. FIG. 6 is a side cross-sectional view of the device taken along line 6-6 in FIG. FIG. 6 is a top view of a device in a subsequent stage of packaging. FIG. 8 is a side cross-sectional view of the device taken along line 8-8 in FIG. FIG. 6 is a side view of a device according to another embodiment.

  FIG. 1 shows a perspective view of an exemplary cavity-type semiconductor package 20 according to one embodiment. In general, the semiconductor package 20 includes a base 22 having a lid 24 joined thereto. In FIG. 1, a portion of the lid 24 is cut out to expose a cavity 25 formed in the lid 24 for the cavity type semiconductor package 20. A lead 26 may be formed on the surface 28 of the base 22 and is exposed from the lid 24. The lead 26 is a conductive feature that allows an electrical connection between an element external to the semiconductor package 20 and a component (not visible) mounted on the base 22 and encapsulated in the cavity 25.

  In one embodiment, the semiconductor package 20 may include semiconductor devices such as microelectronics and / or microelectromechanical system (MEMS) devices (eg, gyroscopes, accelerometers, sensors, or other microstructures). In this specification, a cavity type semiconductor package configuration is shown as an example. However, the semiconductor package 20 may take a wide variety of forms, sizes, shapes, and functions according to specific design criteria.

  FIG. 2 shows a flowchart of a packaging process 30 for packaging a semiconductor package 20 (FIG. 1), according to another embodiment. The packaging process 30 then provides a hermetic or near-hermetic seal to substantially limit damage from external contaminants such as moisture, particles, etc. to components within the semiconductor package 20, while the lid is A lid mounting technique is described that allows pressure to be released from a cavity in the lid when it is attached to the base using a thermoset lid mounting material. The process 30 will be described in connection with the packaging of the cavity-type semiconductor package 20 containing the MEMS device. However, it is appreciated that the following method can be adapted to packaging methods for a variety of semiconductor designs in which a cavity-type lid will be attached to provide a hermetic or near-hermetic seal.

  In the following, the packaging process 30 will be described in the context of a single semiconductor package for the sake of brevity. However, those skilled in the art will appreciate that the following process allows multiple semiconductor packages to be packaged simultaneously. For example, a plurality of semiconductor packages can undergo simultaneous packaging to the base 22, where the base 22 can be a leadframe piece or panel. Subsequently, a cap wafer having a plurality of lids 24 formed therein can be attached to a lead frame piece or panel by the following method for forming a plurality of semiconductor packages 20. The resulting structure consisting of a plurality of semiconductor packages 20 can then be isolated, for example, by conventional dicing or stamping, providing individual semiconductor packages 20 that can be bonded onto a printed circuit board in the final application. Is done.

  The packaging process 30 begins with an activity 32. In activity 32, a base 22 is provided on which one or more semiconductor dies are mounted.

  Referring to FIGS. 3 and 4 in connection with activity 32, FIG. 3 shows a top view of semiconductor device 34 at an initial stage 36 of packaging, and FIG. 4 is taken along section line 4-4 in FIG. A side view of the semiconductor device 34 along is shown. FIGS. 3-9 below are shown using various shading and / or hatching to distinguish different elements of the semiconductor device 34 and semiconductor package 20 (FIG. 1), as described below. ing. These various elements can be generated utilizing current and near future micromachining techniques.

  The semiconductor device 34 includes a base 22 and one or more semiconductor dies 38 that are coupled to the base 22 and / or bonded together in a stacked configuration. More specifically, the base 22 may be a lead frame that includes a die pad 40 to which one or more semiconductor dies 38 are attached. A bond pad 42 may be disposed around the die pad 40. The semiconductor die 38 may be interconnected via one or more electrical connections, referred to herein as bonding wires 44, and / or the semiconductor die 38 may be attached to the die pad 40 via bonding wires 44. It can be connected to bond pads 42 arranged around. Some or all of the bond pads 42 may be electrically coupled to the leads 26. Alternatively or additionally, some or all of the bond pads 42 may extend through the base 22 to lead contact regions (not shown) on the lower surface of the base 22.

  At least one design configuration of the semiconductor die 38 requires cavity packaging in order to provide adequate environmental protection. Further, in one example, one of the semiconductor dies 38 of the semiconductor device 34 can be a MEMS device such as a gyroscope, accelerometer, sensor, and the like. This particular form of semiconductor die 38 is referred to herein as a MEMS device 48. The MEMS device 48 can be sealed in its own cavity package to protect its fragile moving parts. However, the MEMS device 48 and other semiconductor dies 38, electrical connections, and materials within the cavity 25 can be damaged by the penetration of various fluids and / or particles into the cavity 25. Thus, the bond peripheral edge 50 delineates or defines the region 52 of the die pad 40. A semiconductor die 38 that includes a MEMS device 48 is mounted on the surface 28 of the base 22 in a region 52 that is delineated by the bond perimeter 50. The joint perimeter 50 is a location where the corresponding joint perimeter of the lid, eg, the lid 24 (FIG. 1) will be attached to the base 22, as will be described in detail below.

  The semiconductor device 34 with its attached semiconductor die 38 and bonding wires 44 can be provided by the device manufacturer and packaged in a separate packaging facility. Alternatively, the semiconductor device 34 may be fabricated and packaged within the same manufacturing facility.

  Referring back to the packaging process 30 (FIG. 2), following activity 32, activity 54 is performed. In activity 54, a lid is provided in which a cavity is formed. For example, a lid 24 (FIG. 1) having a cavity 25 (FIG. 1) may be provided from a separate or the same manufacturing facility from which the semiconductor device 34 is packaged.

  Packaging process 30 continues with activity 56. In activity 56, a thermoset adhesive material (adhesive) is applied to a portion of the joining peripheral edge of either the base 22 or the lid 24 or both. Next, in activity 58, the lid 24 is placed on the base 22.

  Referring to FIGS. 5 and 6 in connection with activities 56 and 58 of the packaging process 30, FIG. 5 shows a top view of the semiconductor device 34 in a subsequent stage 58 of packaging, and FIG. 5 shows a side view of the semiconductor device 34 taken along section line 6-6 in FIG. As shown in FIGS. 5 and 6, the lid 24 includes a flange 60. The flange 60 defines a joining peripheral edge 62 towards the lid 24. More specifically, the bottom surface of the flange 60 forms a joint peripheral edge 62 toward the lid 24. The joining peripheral edge 62 of the lid 24 is sized and shaped so as to contact the joining peripheral edge 50 on the base 22.

  According to one embodiment, the adhesive 64 is applied to the portion 66 of the joining peripheral edge 50 on the base 22. However, the adhesive 64 is not applied to the remaining portion 68 of the joining peripheral edge 50. As shown in FIG. 5, the remaining portion 68 is below the flange 60 of the lid 24 and is bounded by a dotted line. Accordingly, the portion 66 of the bonding peripheral edge 50 to which the adhesive 64 is applied constitutes the remaining portion of the bonding peripheral edge 50 except the portion 68. In one embodiment, the portion 66 to which the adhesive 64 is applied constitutes the majority of the joining periphery 50, and the portion 68 is significantly smaller than the portion 66. For example, the portion 66 may be generally “horse-shoe-shaped”, with only a small area along one side of the joint periphery being reserved for the portion 68 to which no adhesive 64 has been applied.

  In alternative embodiments, the adhesive 64 can be applied in various patterns. One exemplary pattern includes one in which an adhesive 64 is applied to the joint periphery 50 in spaced-apart spots. In such a configuration, the remaining portion 68 is spaced around the periphery of the joint periphery 50 and is separated by a portion 66 of the joint periphery 50 to which the adhesive 64 is applied, to which the adhesive 64 is not applied. Part (not shown). The adhesive 64 may alternatively be applied to a portion of the joint peripheral edge 62 of the lid 24 instead of or in addition to the joint peripheral edge 50, eg, the remaining portion of the joint peripheral edge 62 in the portion 68. Does not have an adhesive 64. Thus, one or more portions 68 of both joining perimeters 50 and 62 are free of adhesive 64.

  After the adhesive 64 is applied to the joint peripheral edge 50 and / or the joint peripheral edge 62, the lid 24 is disposed on the base portion 22 so that the joint peripheral edge 62 of the lid 24 contacts the joint peripheral edge 50. One or more gaps 70 are formed between the base 22 and the lid 24 where there is no adhesive 64 at one or more locations of the portion 68. In the configuration shown, a single gap 70 is particularly evident in FIG. Following task 58, the semiconductor die 38 including the MEMS device 48 is placed in the cavity 25 of the lid 24.

  Referring back to FIG. 2, following the activity 58 where the lid 24 is placed on the base 22, the packaging process 30 continues with the activity 72. In task 72, the structure of the lid 24 and the semiconductor device 34 is subjected to a thermal curing process. If the lid 24 will serve as a shield for the semiconductor die 38 located in the cavity 25, the conductive epoxy material is selected to be the adhesive 64. The conductive adhesive 64 provides a path to ground so that the lid 24 effectively shields the semiconductor die 38. In a further embodiment, the conductive epoxy material is also a thermosetting material. Thermoset conductive materials are advantageous because, at least in part, they are relatively easy to use, have a relatively long pot life and high strength.

  Thermoset epoxy materials generally cure, i.e., harden, at temperatures of 170 degrees Celsius or higher. When this structure is heated during the thermosetting process, the air inside the cavity 25 expands. A gap 70 (FIG. 6) between the lid 24 and the base 22 allows this air to be expelled from the cavity 25, thereby blowing through the adhesive 64 applied between the lid 24 and the base 22. The formation of holes is greatly hindered.

  Following heat curing activity 72, packaging process 30 continues with activity 74. In activity 74, another adhesive is applied to portion 68 (FIG. 5) to close or otherwise seal gap 70 (FIG. 6). This second application of adhesive can be performed using a standard dispenser that allows the die bonder die bond dispense tip to draw the appropriate line at a particular location with the adhesive.

  Next, activity 76 is performed, in which the adhesive dispensed in activity 74 is properly cured, resulting in semiconductor package 20 having a large hermetically sealed bond between base 22 and lid 24. . Following activity 76, the packaging process 30 may include other activities not described herein for the sake of brevity. These additional fabrication activities can include external electrical interconnect formation, dicing, inspection, and the like. Process 30 ends following packaging of semiconductor device 34 to manufacture semiconductor package 20.

  Referring now to FIGS. 7 and 8, FIG. 7 shows a top view of the semiconductor device 34 at a subsequent stage 78 of packaging, and FIG. 8 shows the semiconductor along section line 8-8 in FIG. A side view of the device 34 is shown. In accordance with activity 74 (FIG. 2), adhesive 80 is applied at the location of gap 70. Again, the adhesive 80 can be dispensed using a standard dispenser where the die bonder die bond dispensing tip applies the appropriate wire adhesive 80. As shown, the adhesive 80 is partially on the thermoset adhesive 64 as represented by the bead or line of adhesive 80 extending beyond the width of the portion 68 in FIG. Can be distributed so as to overlap. Of course, when multiple gaps 70 are formed, the adhesive 80 is applied at each location of the multiple gaps 70 to close the multiple gaps 70.

  The adhesive 80 can be a product that cures at a significantly lower temperature than the thermosetting adhesive 64. For example, the adhesive 80 can be cured, for example, at a temperature of 20-25 degrees Celsius (68-77 degrees Fahrenheit) commonly referred to as room temperature. In addition, the adhesive 80 can be, for example, a photocurable material that cures under ultraviolet (UV) radiation. Such materials are sometimes referred to as UV curable materials. The UV curable material cures or hardens almost instantaneously when exposed to UV radiation, eliminating the drying or thermal curing period required for other adhesives. Accordingly, in activity 76 (FIG. 2), the adhesive 80 can be exposed to UV radiation at room temperature by conventional techniques to facilitate curing of the adhesive 80. Since a UV curable adhesive 80 that cures at room temperature is implemented, the remaining air or gas in the cavity 25 will experience little or no expansion. Therefore, when the adhesive 80 is cured, a blow hole penetrating the adhesives 64 and 80 is not formed. Thus, a sealed cavity 25 is formed in which the semiconductor die 38 including the MEMS device 48 is disposed.

  FIG. 9 shows a side view of a semiconductor package 20 according to another embodiment. In some cases, it may be desirable to further ensure that no gap remains between the base 22 and the lid 24. Thus, in task 74 (FIG. 2) of packaging process 30 (FIG. 2), adhesive 80 is applied to the entire outer periphery 82 of lid 24 (see also FIG. 7) at the junction between base 22 and lid 24. Can be applied to. This application of adhesive 80 can be performed simultaneously with the application of adhesive 80 to portion 68 (FIG. 5) when closing gap 70 (FIG. 6).

  The embodiments described herein involve a cavity type semiconductor packaging method and a cavity type semiconductor packaging structure packaged according to the packaging method. The packaging method provides a safe and secure lid attachment that allows the release of gas that has expanded during thermal curing while providing a hermetic or near-hermetic seal. In particular, the packaging method is a two-stage process in which a thermosetting adhesive is applied to a portion of the joint periphery between the base and the lid, thereby leaving one or more gaps free of the thermosetting adhesive. With the bonding process. During the thermosetting process, the internal cavity of the lid can be blown appropriately through these gaps. Following heat curing, the remaining portion of the joint periphery is joined to close one or more gaps using an adhesive that cures at a significantly lower temperature, i.e., room temperature. In this way, a sealed cavity package is formed in which the semiconductor elements are present. The method is particularly suitable for semiconductor packages including MEMS devices that may be damaged using other lid mounting techniques.

  While preferred embodiments of the present invention have been illustrated and described in detail, those skilled in the art will recognize that various modifications can be made therein without departing from the spirit of the invention or the scope of the appended claims. It will be readily apparent. For example, the lid and base can take a variety of other shapes and sizes other than those shown. In addition, semiconductor dies, including MEMS devices, represent a variety of semiconductor devices that require cavity-type packaging.

Claims (20)

A method of attaching a lid to a base to form a cavity type semiconductor package, wherein the lid is formed to include a cavity, and the base is formed in a region drawn by a first joining peripheral edge of the base A semiconductor die is bonded to the surface of the substrate, the lid has a second bonded peripheral edge, and the method includes:
Applying the first adhesive to at least one of the first joint peripheral edge and the second joint peripheral edge, wherein the first joint peripheral edge and the second joint peripheral edge The step wherein the first adhesive is not present in the rest of the part; and
The second joint peripheral edge abuts on the first joint peripheral edge, and a gap is formed between the base and the lid at one location of the remaining portion where the first adhesive does not exist. Placing the lid on the base,
Applying a second adhesive to the remaining portion to close the gap.   The method of claim 1, wherein the first adhesive is a conductive thermosetting epoxy resin.   The method of claim 1, further comprising thermally curing the first adhesive prior to applying the second adhesive to the remaining portion.   The thermal curing is performed at a first temperature, and the method further includes the step of curing the second adhesive applied to the remaining portion at a second temperature lower than the first temperature. The method of claim 3 comprising.   The method of claim 4, wherein the second temperature is room temperature.   The method of claim 1, further comprising curing the second adhesive applied to the remaining portion by exposing the second adhesive to ultraviolet radiation.   The method of claim 1, further comprising curing the second adhesive applied to the remaining portion to hermetically seal the cavity.   The method of claim 1, wherein applying the second adhesive is performed subsequent to the placing.   The method of claim 1, further comprising applying the second adhesive to the entire outer periphery of the lid at the junction between the base and the lid. Applying the first adhesive includes creating a plurality of remaining portions in which the first adhesive is not present on both the first and second peripheral edges of the joint; A plurality of gaps are created following the placing step,
The method of claim 1, wherein applying the second adhesive distributes the second adhesive and closes each of the plurality of gaps. A cavity-type semiconductor package,
A base having a first joining peripheral edge;
A semiconductor die bonded to a surface of the base in a region drawn by the first joining peripheral edge of the base;
A lid having a second joint peripheral edge, wherein the second joint peripheral edge is configured to abut against the first joint peripheral edge when the lid is coupled to the base; and
A first adhesive applied to a part of at least one of the first joint peripheral edge and the second joint peripheral edge, wherein the first joint peripheral edge and the second joint peripheral edge One or more remaining portions are free of the first adhesive, and 1 or more between the base and the lid at one or more locations of the remaining portion where the first adhesive is not present. A first adhesive in which two or more gaps are made;
And a second adhesive applied to the one or more remaining portions to close the gap.   The semiconductor package according to claim 11, wherein the first adhesive material includes a thermosetting material.   The semiconductor package according to claim 11, wherein the first adhesive is a conductive thermosetting epoxy resin.   The semiconductor package of claim 11, wherein the second adhesive comprises a room temperature curable material.   The semiconductor package according to claim 11, wherein the second adhesive material includes an ultraviolet radiation curable material.   12. The lid of claim 11, wherein the lid is formed to have a cavity, the semiconductor die is in the cavity, and the cavity is hermetically sealed following application of the second adhesive. Semiconductor package.   The semiconductor package according to claim 11, wherein the second adhesive is further applied to the entire outer periphery of the lid at a joint portion between the base and the lid. A method of attaching a lid to a base to form a cavity type semiconductor package, wherein the lid is formed to include a cavity, and the base is formed in a region drawn by a first joining peripheral edge of the base A semiconductor die is bonded to the surface of the substrate, the lid has a second bonded peripheral edge, and the method includes:
Applying the first adhesive to at least one of the first joint peripheral edge and the second joint peripheral edge, wherein the first joint peripheral edge and the second joint peripheral edge The step wherein the first adhesive is not present in the rest of the part; and
The second joint peripheral edge abuts on the first joint peripheral edge, and a gap is formed between the base and the lid at one location of the remaining portion where the first adhesive does not exist. Placing the lid on the base,
Thermosetting the first adhesive;
Applying the second adhesive to the remaining portion so as to close the gap following the placing and the thermosetting steps.   The method of claim 18, further comprising curing the second adhesive applied to the remaining portion to hermetically seal the cavity, wherein the curing of the second adhesive is performed at room temperature. .   The method of claim 19, wherein curing the second adhesive comprises exposing the second adhesive to ultraviolet radiation.