JP2015094879A - Manufacturing method for microlens array substrate, electro-optical device, and electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for a microlens array substrate, which reduces man-hour in a lens layer polishing step and improves flatness; the microlens array substrate; an electro-optical device; and an electronic device.SOLUTION: A manufacturing method for a microlens array substrate 10 includes steps of; forming a plurality of recesses 12 in a display area E of a first surface 11a of a light transmissive substrate 11; forming a light transmissive lens layer 13 having a refractive index different from that of the substrate 11 such that the lens layer 13 covers the first surface 11a of the substrate 11 and fills the plurality of recesses 12; placing a protective member 72 to cover the display area E of the lens layer 13; removing a portion of the lens layer 13 while removing the protective member 72; and polishing a surface 13a of the lens layer 13.

Description

  The present invention relates to a method for manufacturing a microlens array substrate, an electro-optical device, and an electronic apparatus.

  There is known an electro-optical device including an electro-optical material (for example, liquid crystal) between an element substrate and a counter substrate. Examples of the electro-optical device include a liquid crystal device used as a liquid crystal light valve of a projector. Such a liquid crystal device is required to realize high light utilization efficiency. Therefore, by providing the microlens, the light incident on the liquid crystal device is condensed, and if the light is not condensed, the light shielded by the light shielding layer is also used, thereby improving the substantial aperture ratio of the liquid crystal device. The configuration is known (see, for example, Patent Document 1).

  The microlens is configured by forming a plurality of recesses on the surface of a substrate made of quartz or the like (microlens array substrate) and embedding the plurality of recesses with a lens layer having a refractive index different from that of the substrate. In the display area in which a plurality of recesses are formed on the substrate, unevenness between the recesses and the portion between the recesses is formed on the surface of the substrate, and thus the uneven shape is also reflected on the surface of the lens layer. Therefore, in order to flatten the uneven shape on the surface of the lens layer, a flattening process such as a CMP (Chemical Mechanical Polishing) process for polishing the surface of the lens layer is performed.

JP 2008-209860 A

  By the way, although not mentioned in Patent Document 1, a display region having a concavo-convex shape (having a concave portion) with respect to an outer peripheral region having no concavo-convex shape (having no concave portion) is subject to polishing in the initial stage of the CMP process. The density of the lens layer existing per unit volume is small. Therefore, in the step of performing the CMP process, the display region having the uneven shape in the lens layer is polished deeper than the outer peripheral region, and therefore the uneven shape on the surface of the lens layer in the display region is alleviated. As a result, the surface becomes lower than the outer peripheral region, resulting in a step. In addition, depending on the shape and depth of the recesses formed on the surface of the substrate, the lens layer in the display area may be compared with the outer peripheral area where the recesses outside the display area are not formed when the lens layer is formed. The surface may be lowered. In order to eliminate such a level difference between the display area and the outer peripheral area, it is necessary to increase the polishing amount of the lens layer, which increases the number of steps in the process of flattening the surface of the lens layer. Further, since the amount of polishing of the lens layer increases, more material is required to form the lens layer thicker, and the flatness of the surface of the lens layer is reduced.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  Application Example 1 A method for manufacturing a microlens array substrate according to this application example includes a step of forming a plurality of recesses in a first region of a first surface of a substrate that transmits light, and the first surface of the substrate. A step of forming a lens layer that transmits light and has a refractive index different from that of the substrate so as to embed the plurality of recesses; and a protective member is disposed in a region overlapping the first region of the lens layer in plan view A step of removing a part of the lens layer while removing the protective member, and a step of polishing the surface of the lens layer.

  According to the manufacturing method of this application example, the microlens array (MLA) is configured by embedding a plurality of concave portions formed in the first region of the first surface of the substrate with the lens layer. Then, before the step of polishing the surface of the lens layer, a step of arranging a protective member in a region overlapping with the first region of the lens layer in plan view (hereinafter referred to as an MLA region), and a lens layer while removing the protective member A step of removing a part of the substrate. Therefore, before polishing the surface of the lens layer, a part of the surface side of the lens layer that is not covered by the protective member other than the MLA region is removed along with the removal of the protective member. Accordingly, the step difference between the MLA region and the portion other than the MLA region generated in the step of polishing the surface of the lens layer can be corrected in advance by removing a part of the lens layer other than the MLA region. . Thereby, compared with the case where it does not have said process, the grinding | polishing amount for eliminating the level | step difference between an MLA area | region and parts other than an MLA area | region in the process of grind | polishing the surface of a lens layer can be decreased. As a result, the number of steps in the step of polishing the surface of the lens layer can be reduced, the amount of the lens layer forming material can be reduced, and the flatness of the surface of the lens layer can be improved.

  Application Example 2 In the method of manufacturing a microlens array substrate according to the application example, the step of removing a part of the lens layer while removing the protection member includes removing the protection member and removing the lens. It is preferable to include a step of removing a part of the layer located in a region overlapping the first region in plan view.

  When the protective member is disposed in the MLA region of the lens layer, the protective member is disposed so as to enter the concave and convex portion of the lens layer. According to the manufacturing method of this application example, in the process of removing a part of the lens layer while removing the protective member, a part of the lens layer located in the MLA region is removed while removing the protective member. Therefore, the concave and convex portions of the lens layer are removed from the surface side with the removal of the protective member. Therefore, the surface irregularities in the MLA region of the lens layer are alleviated before the surface of the lens layer is polished. Thereby, it is possible to reduce the polishing amount for relaxing the uneven shape of the lens layer in the step of polishing the surface of the lens layer. Further, since the amount of polishing for relaxing the uneven shape of the lens layer is reduced, the step between the MLA region and the portion other than the MLA region generated in the step of polishing the surface of the lens layer can be reduced. It is possible to reduce the amount of polishing for eliminating. As a result, since the amount of polishing in the step of polishing the surface of the lens layer can be reduced, the number of steps can be further reduced, and the amount of lens layer forming material can be reduced and the flatness of the surface of the lens layer can be further improved. be able to.

  Application Example 3 In the method for manufacturing a microlens array substrate according to the application example, it is preferable that the protective member is made of a resist.

  According to the manufacturing method of this application example, by using a resist as the protective member, in the step of removing a part of the lens layer while removing the protective member, the selection ratio of the protective member to the lens layer in etching is varied. Can do. Therefore, the thickness of the protective member disposed on the lens layer, the thickness of the lens layer when the level difference between the MLA region and the portion other than the MLA region of the lens layer and the unevenness of the surface in the MLA region are alleviated, and the lens layer It can be easily controlled by appropriately setting the etching rate of the protective member against the above.

  Application Example 4 In the manufacturing method of the microlens array substrate according to the application example, it is preferable that the lens layer is made of silicon oxynitride.

  According to the manufacturing method of this application example, since the lens layer is formed of silicon oxynitride, which is an inorganic material, resistance to light and high temperature can be increased as compared with the case where the lens layer is formed of a resin material. Further, by using silicon oxynitride for the lens layer, the optical refractive index can be different from that of a substrate made of quartz or the like.

  Application Example 5 An electro-optical device according to this application example includes a first substrate, a second substrate disposed opposite to the first substrate, the first substrate, and the second substrate. An electro-optical layer sandwiched therebetween, and at least one of the first substrate and the second substrate includes a microlens array substrate manufactured by the microlens array substrate manufacturing method according to the application example. It is characterized by.

  According to the configuration of this application example, it is possible to provide an electro-optical device with high light use efficiency and excellent cost competitiveness.

  Application Example 6 An electronic apparatus according to this application example includes the electro-optical device according to the application example described above.

  According to the configuration of this application example, it is possible to provide an electronic device that is bright and excellent in cost competitiveness.

FIG. 2 is a schematic plan view showing the configuration of the liquid crystal device according to the embodiment. FIG. 3 is an equivalent circuit diagram illustrating an electrical configuration of the liquid crystal device according to the embodiment. FIG. 2 is a schematic cross-sectional view illustrating a configuration of a liquid crystal device according to the present embodiment. The figure explaining the manufacturing method of the micro lens array board | substrate which concerns on this embodiment. The figure explaining the manufacturing method of the micro lens array board | substrate which concerns on this embodiment. The figure explaining the manufacturing method of the micro lens array board | substrate which concerns on this embodiment. The figure explaining the manufacturing method of the micro lens array board | substrate which concerns on this embodiment. Schematic which shows the structure of the projector as an electronic device which concerns on this embodiment. FIG. 9 is a partial cross-sectional view illustrating a configuration of a liquid crystal device according to Modification Example 1. The figure explaining an example of the planarization processing method in the manufacturing method of the conventional microlens array board | substrate.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Embodiments of the invention are described below with reference to the drawings. The drawings to be used are appropriately enlarged, reduced or exaggerated so that the part to be described can be recognized. In addition, illustrations of components other than those necessary for the description may be omitted.

  In the following embodiments, for example, when “on the substrate” is described, the substrate is disposed so as to be in contact with the substrate, or is disposed on the substrate via another component, or the substrate. It is assumed that a part is arranged so as to be in contact with each other and a part is arranged via another component.

<Electro-optical device>
Here, an active matrix liquid crystal device including a thin film transistor (TFT) as a pixel switching element will be described as an example of the electro-optical device. This liquid crystal device can be suitably used, for example, as a light modulation element (liquid crystal light valve) of a projection display device (projector) described later.

  First, a liquid crystal device as an electro-optical device according to the present embodiment will be described with reference to FIGS. 1, 2, and 3. FIG. 1 is a schematic plan view showing the configuration of the liquid crystal device according to the present embodiment. FIG. 2 is an equivalent circuit diagram showing an electrical configuration of the liquid crystal device according to the present embodiment. FIG. 3 is a schematic cross-sectional view showing the configuration of the liquid crystal device according to the present embodiment. Specifically, FIG. 3 is a schematic cross-sectional view taken along the line A-A ′ of FIG. 1.

  As shown in FIGS. 1 and 3, the liquid crystal device 1 according to the present embodiment includes an element substrate 20 as a first substrate, a counter substrate 30 as a second substrate disposed to face the element substrate 20, and A sealing material 42 and a liquid crystal layer 40 as an electro-optic layer are provided. As shown in FIG. 1, the element substrate 20 and the counter substrate 30 are substantially rectangular in a plan view. The element substrate 20 is larger than the counter substrate 30, and both the substrates are joined together via a sealing material 42 arranged in a frame shape along the edge of the counter substrate 30.

  The liquid crystal layer 40 is composed of liquid crystal having positive or negative dielectric anisotropy enclosed in a space surrounded by the element substrate 20, the counter substrate 30, and the sealing material 42. The sealing material 42 is made of an adhesive such as a thermosetting or ultraviolet curable epoxy resin. Spacers (not shown) are mixed in the sealing material 42 to keep the distance between the element substrate 20 and the counter substrate 30 constant.

  Inside the sealing material 42 arranged in a frame shape, the light shielding layers 22 and 26 provided on the element substrate 20 and the light shielding layer 32 provided on the counter substrate 30 are arranged. The light shielding layers 22, 26, and 32 have a frame-like peripheral portion, and are formed of, for example, a light shielding metal or metal oxide. Inside the frame-shaped light shielding layers 22, 26, 32 is a display area E in which a plurality of pixels P are arranged. The pixels P have, for example, a substantially rectangular shape and are arranged in a matrix.

  The display area E is an area that substantially contributes to display in the liquid crystal device 1. The light shielding layers 22 and 26 provided on the element substrate 20 are provided, for example, in a lattice shape in the display region E so as to partition the plurality of pixels P in a plane. The liquid crystal device 1 may include a dummy area that is provided so as to surround the display area E and does not substantially contribute to display.

  A data line driving circuit 51 and a plurality of external connection terminals 54 are provided along the first side on the side opposite to the display region E of the sealing material 42 formed along the first side of the element substrate 20. An inspection circuit 53 is provided on the display region E side of the sealing material 42 along the other second side facing the first side. Further, a scanning line driving circuit 52 is provided inside the sealing material 42 along the other two sides that are orthogonal to these two sides and face each other.

  On the display area E side of the sealing material 42 on the second side where the inspection circuit 53 is provided, a plurality of wirings 55 that connect the two scanning line driving circuits 52 are provided. Wirings connected to the data line driving circuit 51 and the scanning line driving circuit 52 are connected to a plurality of external connection terminals 54. In addition, a vertical conduction portion 56 is provided at a corner portion of the counter substrate 30 to establish electrical continuity between the element substrate 20 and the counter substrate 30. The arrangement of the inspection circuit 53 is not limited to this, and the inspection circuit 53 may be provided at a position along the inner side of the seal material 42 between the data line driving circuit 51 and the display area E.

  In the following description, the direction along the first side where the data line driving circuit 51 is provided is the X direction, and the direction along the other two sides orthogonal to the first side and facing each other is the Y direction. The X direction is a direction along the line A-A ′ in FIG. 1. The pixels P are partitioned in a lattice shape by the light shielding layers 22, 26 and 32, and are arranged in a matrix shape along the X direction and the Y direction.

  Further, a direction perpendicular to the X direction and the Y direction and directed upward in FIG. In this specification, viewing from the normal direction (Z direction) of the surface of the liquid crystal device 1 on the counter substrate 30 side is referred to as “plan view”.

  As shown in FIG. 2, in the display area E, the scanning lines 2 and the data lines 3 are formed so as to intersect with each other, and pixels P are provided corresponding to the intersections of the scanning lines 2 and the data lines 3. Yes. Each pixel P is provided with a pixel electrode 28 and a TFT 24 as a switching element.

  A source electrode (not shown) of the TFT 24 is electrically connected to the data line 3 extending from the data line driving circuit 51. Image signals (data signals) S1, S2,..., Sn are supplied to the data lines 3 from the data line driving circuit 51 (see FIG. 1) in a line sequential manner. A gate electrode (not shown) of the TFT 24 is a part of the scanning line 2 extending from the scanning line driving circuit 52. The scanning lines 2 are supplied with scanning signals G1, G2,..., Gm from the scanning line driving circuit 52 in a line sequential manner. A drain electrode (not shown) of the TFT 24 is electrically connected to the pixel electrode 28.

  The image signals S1, S2,..., Sn are written to the pixel electrode 28 through the data line 3 at a predetermined timing by turning on the TFT 24 for a certain period. The image signal of a predetermined level written in the liquid crystal layer 40 through the pixel electrode 28 in this manner is constant by the liquid crystal capacitance formed between the common electrode 34 (see FIG. 3) provided on the counter substrate 30. Hold for a period.

  In order to prevent the held image signals S1, S2,..., Sn from leaking, a storage capacitor 5 is formed between the capacitor line 4 formed along the scanning line 2 and the pixel electrode 28. Arranged in parallel with the liquid crystal capacitor. Thus, when a voltage signal is applied to the liquid crystal of each pixel P, the alignment state of the liquid crystal changes depending on the applied voltage level. As a result, the light incident on the liquid crystal layer 40 (see FIG. 3) is modulated to enable gradation display.

  The liquid crystal constituting the liquid crystal layer 40 modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. For example, in the normally white mode, the transmittance for incident light decreases according to the voltage applied in units of each pixel P. In the normally black mode, the transmittance for incident light increases in accordance with the voltage applied in units of each pixel P, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device 1 as a whole.

  As shown in FIG. 3, the counter substrate 30 includes a microlens array substrate 10, an optical path length adjustment layer 31, a light shielding layer 32, a protective layer 33, a common electrode 34, and an alignment film 35.

  The microlens array substrate 10 includes a substrate 11 and a lens layer 13. The substrate 11 transmits light and is made of an inorganic material such as glass or quartz. A surface on the liquid crystal layer 40 side of the substrate 11 is defined as a first surface 11a. A surface of the substrate 11 opposite to the liquid crystal layer 40 is a second surface 11b. The substrate 11 has a plurality of recesses 12 formed in the first region of the first surface 11a. The first region is a region that overlaps the display region E of the liquid crystal device 1 in plan view. Each recess 12 is provided corresponding to the pixel P.

The lens layer 13 is provided so as to cover the first surface 11 a side of the substrate 11. The lens layer 13 is formed thicker than the depth of the recess 12 and is formed so as to embed the plurality of recesses 12. The lens layer 13 is made of a material that transmits light and has a refractive index different from that of the substrate 11. More specifically, the lens layer 13 is made of an inorganic material having a higher refractive index than that of the substrate 11. Examples of such an inorganic material include SiON (silicon oxynitride), Al ₂ O _{3 and the} like. In the present embodiment, the lens layer 13 is made of SiON. Since the lens layer 13 is formed of an inorganic material, the resistance to light and high temperature can be increased as compared with the case where the lens layer 13 is formed of a resin material.

  By embedding the concave portion 12 with a material forming the lens layer 13, a convex microlens ML is configured. Accordingly, each microlens ML is provided corresponding to the pixel P. In addition, a microlens array MLA is configured by the plurality of microlenses ML. In the lens layer 13, a region where the microlens array MLA that overlaps the first region of the substrate 11 in plan view, that is, a region that overlaps the display region E in plan view is referred to as an MLA region. The surface of the microlens array substrate 10, that is, the surface of the lens layer 13, is a substantially flat surface.

  The optical path length adjustment layer 31 is provided so as to cover the microlens array substrate 10 (lens layer 13). The optical path length adjustment layer 31 is made of an inorganic material that transmits light and has substantially the same refractive index as that of the substrate 11, for example. The optical path length adjustment layer 31 has a function of adjusting the distance from the microlens ML to the light shielding layer 32 to a desired value. Therefore, the layer thickness of the optical path length adjusting layer 31 is appropriately set based on optical conditions such as the focal length of the microlens ML corresponding to the wavelength of light.

  The light shielding layer 32 is provided on the optical path length adjustment layer 31. The light shielding layer 32 is formed in a lattice shape or an island shape so as to overlap the light shielding layer 22 and the light shielding layer 26 of the element substrate 20 in plan view. FIG. 3 shows a case where the light shielding layer 32 is formed in a lattice shape and has an opening 32a. In this case, the inside of the opening 32a of the light shielding layer 32 is a region through which light is transmitted.

  The protective layer 33 is provided so as to cover the optical path length adjusting layer 31 and the light shielding layer 32. The common electrode 34 is provided so as to cover the protective layer 33. The common electrode 34 is formed across a plurality of pixels P. The common electrode 34 is made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The alignment film 35 is provided so as to cover the common electrode 34.

  The protective layer 33 is for planarizing the surface on the liquid crystal layer 40 side where the common electrode 34 is formed so as to cover the light shielding layer 32. For example, the common electrode 34 may be formed so as to directly cover the conductive light shielding layer 32, and in that case, the protective layer 33 may be omitted.

  The element substrate 20 includes a substrate 21, a light shielding layer 22, an insulating layer 23, a TFT 24, an insulating layer 25, a light shielding layer 26, an insulating layer 27, a pixel electrode 28, and an alignment film 29. . The substrate 21 transmits light and is made of an inorganic material such as glass or quartz.

  The light shielding layer 22 is provided on the substrate 21. The light shielding layer 22 is formed in a lattice shape so as to overlap the light shielding layer 32 in plan view together with the upper light shielding layer 26. The light shielding layer 22 and the light shielding layer 26 are disposed so as to sandwich the TFT 24 therebetween in the thickness direction (Z direction) of the element substrate 20. The light shielding layer 22 overlaps at least the channel region of the TFT 24 in plan view.

  By providing the light shielding layer 22 and the light shielding layer 26, the incidence of light on the TFT 24 is suppressed. The region surrounded by the light shielding layer 22 (inside the opening 22a) and the region surrounded by the light shielding layer 26 (inside the opening 26a) overlap each other in plan view and become a region through which light is transmitted.

The insulating layer 23 is provided so as to cover the substrate 21 and the light shielding layer 22. The insulating layer 23 is made of an inorganic material such as SiO ₂ .

  The TFT 24 is provided on the insulating layer 23. The TFT 24 is a switching element that drives the pixel electrode 28. The TFT 24 includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode (not shown). A source region, a channel region, and a drain region are formed in the semiconductor layer. An LDD (Lightly Doped Drain) region may be formed between the channel region and the source region or between the channel region and the drain region.

  The gate electrode is formed on the element substrate 20 in a region overlapping with the channel region of the semiconductor layer in plan view via a part (gate insulating film) of the insulating layer 25. Although not shown, the gate electrode is electrically connected to the scanning line disposed on the lower layer side through a contact hole, and the TFT 24 is controlled to be turned on / off by applying a scanning signal.

The insulating layer 25 is provided so as to cover the insulating layer 23 and the TFT 24. The insulating layer 25 is made of an inorganic material such as SiO ₂ , for example. The insulating layer 25 includes a gate insulating film that insulates between the semiconductor layer of the TFT 24 and the gate electrode. The insulating layer 25 relieves surface irregularities caused by the TFT 24. A light shielding layer 26 is provided on the insulating layer 25. An insulating layer 27 made of an inorganic material is provided so as to cover the insulating layer 25 and the light shielding layer 26.

  The pixel electrode 28 is provided for each pixel P on the insulating layer 27. The pixel electrode 28 is disposed in a region overlapping the opening 22 a of the light shielding layer 22 and the opening 26 a of the light shielding layer 26 in plan view. The pixel electrode 28 is made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The alignment film 29 is provided so as to cover the pixel electrode 28. The liquid crystal layer 40 is sandwiched between the alignment film 29 on the element substrate 20 side and the alignment film 35 on the counter substrate 30 side.

  Note that the TFT 24 and electrodes and wiring (not shown) for supplying an electrical signal to the TFT 24 are provided in a region overlapping the light shielding layer 22 and the light shielding layer 26 in plan view. A configuration in which these electrodes and wirings also serve as the light shielding layer 22 and the light shielding layer 26 may be employed.

  In the liquid crystal device 1 according to this embodiment, for example, light emitted from a light source or the like enters from the side of the counter substrate 30 (substrate 11) including the microlens ML and is collected by the microlens ML. Of the light incident on the microlens ML along the normal direction of the second surface 11b from the substrate 11 side, the incident light L1 incident along the optical axis passing through the planar center of the region of the pixel P is The lens ML goes straight as it is, passes through the liquid crystal layer 40, and is emitted to the element substrate 20 side.

  When the incident light L2 incident on the peripheral edge of the microlens ML from a region overlapping with the light shielding layer 32 (or the light shielding layer 26) in a plan view outside the incident light L1 travels straight as it is, the light shielding layer as shown by the broken line. Although the light is blocked by 32 (or the light shielding layer 26), the light is refracted toward the planar center side of the region of the pixel P due to the difference in the optical refractive index between the substrate 11 and the lens layer 13.

  In the liquid crystal device 1, the incident light L2 that is shielded by the light shielding layer 32 (or the light shielding layer 26) when traveling straight in this way also enters the opening 32a (or the opening 26a) by the action of the microlens ML. The liquid crystal layer 40 can be passed through. As a result, since the amount of light emitted from the element substrate 20 side can be increased, the light utilization efficiency can be increased.

<Manufacturing method of microlens array substrate>
Next, a method for manufacturing the microlens array substrate according to the present embodiment will be described. 4, 5, 6, and 7 are views for explaining a method of manufacturing a microlens array substrate according to the present embodiment. 4 (a), (b), (c), (d), (e) and FIGS. 5 (a), (b), (c), (d), (e) are shown in FIG. It corresponds to a cross-sectional view along the line AA ′. 4 (a), (b), (c), (d), (e), FIGS. 5 (a), (b), and the following description, the first region of the substrate 11 and the lens layer are used. The 13 MLA areas are referred to as a display area E.

  First, as shown in FIG. 4A, a mask layer 71 is formed so as to cover the first surface 11a side of the substrate 11 that transmits light made of quartz or the like. Then, the mask layer 71 is patterned to form a plurality of openings 71a in portions of the mask layer 71 that overlap the display region E in plan view. Each opening 71a is provided corresponding to the planar center position of the microlens ML (concave portion 12) obtained in a later step, that is, the planar center position of the region of the pixel P (see FIG. 3). Thereby, the 1st surface 11a of the board | substrate 11 is exposed in the opening part 71a.

  Next, as shown in FIG. 4B, isotropic etching is performed on the substrate 11 through the opening 71a of the mask layer 71, so that a portion in the display region E (first region) of the substrate 11 is obtained. A plurality of recesses 12 are formed in the substrate. As the isotropic etching treatment, for example, wet etching using an etchant such as a hydrofluoric acid solution can be used.

  By this isotropic etching process, the substrate 11 is isotropically etched from the first surface 11a side around each of the plurality of openings 71a, and a substantially hemispherical region is removed in a cross-sectional view. 12 is formed. The cross-sectional shape of the recess 12 is not limited to a spherical shape, and may be a shape that includes a substantially flat portion at the bottom or a tapered portion at the periphery. When the isotropic etching process is completed, the mask layer 71 is removed from the substrate 11 as shown in FIG.

  Next, as shown in FIG. 4D, a material that transmits light and has a refractive index different from that of the substrate 11 is deposited so as to cover the first surface 11 a side of the substrate 11 and embed a plurality of recesses 12. Thus, the lens layer 13 is formed. In this embodiment, SiON (silicon oxynitride) which is an inorganic material having a higher refractive index than that of the substrate 11 is used as the material of the lens layer 13. The lens layer 13 can be formed using, for example, a plasma CVD (Chemical Vapor Deposition) method.

  The lens layer 13 is formed thicker than the depth of the recess 12. In the display area E (MLA area), the lens layer 13 reflects the uneven shape due to the step between the recess 12 and the boundary between the recesses 12. More specifically, the portion of the lens layer 13 that overlaps the bottom of the recess 12 (the central portion of the recess 12 in plan view) in the plan view is recessed from the surface 13a of the lens layer 13 by a step D0 to form a recess 13b. By forming the concave portion 13b, a portion of the lens layer 13 that overlaps the boundary portion between the concave portions 12 in a plan view becomes a relatively convex portion 13c, and the display region E of the lens layer 13 has an uneven shape. It is formed. In the present embodiment, a step (distance in the Z direction) D0 between the concave portion 13b and the convex portion 13c in the lens layer 13 is referred to as a local step.

  In the lens layer 13, with respect to the display area E in which the local step D0 occurs, the lens layer 13 is uneven in a portion outside the display area E where the concave portion 12 is not formed in the substrate 11 (hereinafter referred to as an outer peripheral area). No shape occurs. In the subsequent steps, such a local step D0 generated in the display area E of the lens layer 13 is relaxed, and the surface 13a of the lens layer 13 is made a flat surface without unevenness across the display area E and the outer peripheral area. A planarization process is performed.

  Depending on the shape and depth of the concave portion 12 formed on the first surface 11a of the substrate 11, the height of the convex portion 13c in the display region E relative to the first surface 11a of the substrate 11 in the display region E may be a concave portion. In some cases, the height of the surface 13a in the outer peripheral region where 12 is not formed with respect to the first surface 11a of the substrate 11 may be lower.

  Here, before explaining the flattening process in the manufacturing method of the microlens array substrate according to the present embodiment, in order to make the difference from the present embodiment easier to understand, the flattening process in the conventional manufacturing method of the microlens array substrate is described. The process will be described with reference to FIG. FIG. 10 is a diagram for explaining an example of a planarization method in a conventional method for manufacturing a microlens array substrate. Each drawing in FIG. 10 corresponds to a cross-sectional view taken along line A-A ′ in FIG. 1.

  In the conventional method for manufacturing a microlens array substrate, for example, after the step of forming the lens layer 13 shown in FIG. 4D, planarization such as CMP (Chemical Mechanical Polishing) processing for polishing the surface 13a of the lens layer 13 is performed. Processing is performed. The CMP process is a processing method that uses a polishing apparatus (not shown) provided with a polishing pad and a chemical polishing agent to remove unevenness on the surface and flatten it by a combined action of chemical action and mechanical polishing. .

  As shown in FIG. 4D, in the display region E where the surface 13a of the lens layer 13 has an uneven shape (there is a recess 13b), the CMP processing is performed compared to the outer peripheral region where there is no uneven shape (there is no recess 13b). The density of the lens layer 13 existing per unit volume to be polished in the initial stage is small. Therefore, when the lens layer 13 having substantially the same volume is polished in the display region E and the outer peripheral region, the display region E with the concave portion 13b is more than the height before the CMP process compared with the outer peripheral region without the concave portion 13b. Deeply polished.

  Accordingly, as the convex portion 13c is polished in the display region E and the local step D0 with the concave portion 13b is relaxed, the height of the convex portion 13c becomes lower than the surface 13a of the lens layer 13 in the outer peripheral region. As a result, as shown in FIG. 10A, a recess 15 that is recessed with respect to the surface 13 a of the outer peripheral region is generated in the display region E in the lens layer 13. The depth of the recess 15, that is, the level difference (the distance in the Z direction) between the bottom surface 15 a and the surface 13 a of the recess 15 is defined as D2. In the present embodiment, such a step D2 in the lens layer 13 is referred to as a global step.

  When the CMP process is further continued from the state shown in FIG. 10A, the global level difference D2 also decreases as the film thickness of the lens layer 13 is reduced by polishing, as shown in FIG. 10B. However, in the CMP process, the bottom surface 15a of the concave portion 15 is also polished by polishing the surface 13a of the lens layer 13. Therefore, in order to eliminate the global step D2, it is necessary to continue the polishing.

  For this reason, if the global level difference D2 is large, the amount of polishing of the lens layer 13 is increased in order to eliminate the global level difference D2, which increases the number of CMP processing steps in the planarization process. Further, as the amount of polishing of the lens layer 13 increases, more material is required to form the lens layer 13 thicker, and the amount of material of the lens layer 13 that is polished and discarded also increases. Furthermore, the CMP process may be performed for a long time, which may lead to a decrease in flatness of the surface of the lens layer 13 instead.

  In contrast to such a conventional method for manufacturing a microlens array substrate, the present embodiment efficiently relaxes the local step D0 and the global step D2, thereby reducing the number of CMP processing steps in the planarization process of the lens layer 13. The purpose is to do. Returning to FIG. 4, the description of the manufacturing method of the microlens array substrate according to the present embodiment will be continued.

  After the step of forming the lens layer 13 shown in FIG. 4D and before the CMP process, the protective member 72 is disposed in the display area E on the lens layer 13 as shown in FIG. In the present embodiment, for example, a resist can be used as the protection member 72. Although not shown in the drawings, a resist film is formed on the lens layer 13, and a portion of the outer peripheral region of the resist film is exposed and developed using a mask, so that the resist film is disposed in the display region E of the resist film. The portion remains as the protective member 72.

  Thereby, the lens layer 13 is covered with the protective member 72 in the display area E, and the surface 13a of the lens layer 13 is exposed in the outer peripheral area. The protective member 72 is disposed so as to embed the concave portion 13 b of the lens layer 13. The film thickness T of the protective member 72 (resist film) is appropriately set according to the depth D1 (see FIG. 5A) of the recess 14 formed in the lens layer 13 in a later step.

  The surface 72a of the protection member 72 is preferably a flat surface. When the viscosity of the resist film is high, the surface 72 a of the protective member 72 may be uneven, or the protective member 72 may not be sufficiently embedded in the concave portion 13 b of the lens layer 13 and a cavity may be formed between the lens layer 13.

Next, as shown in FIG. 5A, anisotropic etching is performed on the protection member 72 and the lens layer 13, and a part of the lens layer 13 is removed while removing the protection member 72. As the anisotropic etching, a dry etching method such as RIE (Reactive Ion Etching) can be used. As the etching gas, for example, a fluorocarbon-based gas such as CF ₄ or C ₄ F ₈ can be used.

  By the anisotropic etching, the protection member 72 is removed little by little from the surface 72a side, and in the lens layer 13, the portion of the outer peripheral region not covered by the protection member 72 is little by little removed from the surface 13a side. Then, as the film thickness T of the protective member 72 decreases, the concave portion 14 is formed in a portion of the lens layer 13 that is not covered with the protective member 72. The recess 14 is formed on the outer edge of the lens layer 13 so as to surround the display area E in plan view.

  The depth of the concave portion 14, that is, the step (distance in the Z direction) between the surface 13a of the lens layer 13 and the bottom surface 14a of the concave portion 14 is defined as D1. By forming the step D1 in the outer peripheral region in advance, the global step D2 generated in the subsequent CMP process is corrected, so that the lens layer 13 can be easily flattened. The size of the step D1 is set according to the size of the local step D0 and the size of the global step D2. The selection ratio between the protective member 72 and the lens layer 13 in the anisotropic etching is appropriately set based on the film thickness T of the protective member 72, a desired value of the step D1, and the like.

  When anisotropic etching is continued from the state shown in FIG. 5A, the film thickness T of the protective member 72 is further reduced as shown in FIG. 5B, and the surface 13a of the lens layer 13 in the display region E is reduced. Exposed. Thereby, the exposed surface 13a and convex portion 13c of the lens layer 13 and the surface 72a of the protective member 72 remaining in the concave portion 13b of the lens layer 13 have substantially the same height with respect to the first surface 11a of the substrate 11. Become.

  In the outer peripheral region, the exposed portion of the lens layer 13 is etched, and the step (depth of the recess 14) D1 is further increased. When the selection ratio of the protective member 72 and the lens layer 13 in the anisotropic etching is 1: 1, the depth D1 of the concave portion 14 is the thickness of the protective member 72 (resist film) before the anisotropic etching is performed. Equal to T.

  The anisotropic etching is further continued from the state shown in FIG. 5B, and a part of the lens layer 13 located in the display area E is removed while removing the protective member 72. As a result, as shown in FIG. 5C, the protective member 72 and the lens layer 13 are further removed, and the height of the surface 13a and the convex portion 13c of the lens layer 13 with respect to the first surface 11a of the substrate 11 is low. Therefore, the local level difference D0 of the lens layer 13 in the display area E becomes small. On the other hand, the height of the surface 13a of the lens layer 13 and the height of the bottom surface 14a of the recess 14 are also reduced with respect to the first surface 11a of the substrate 11, so that the level difference (depth of the recess 14) of the lens layer 13 is reduced. ) D1 is maintained at approximately the same size.

  By the way, in the step of performing the anisotropic etching process, SiON which is an oxynitride film is etched, so that oxygen is secondarily generated. Oxygen is generated in the atmosphere in which the anisotropic etching process is performed, and as the anisotropic etching process proceeds, the lens layer 13 (with respect to the selectivity of the protective member 72 (resist film) in the anisotropic etching is selected. The selection ratio of the oxynitride film becomes relatively large. That is, the etching rate of the lens layer 13 is larger than the etching rate of the protective member 72.

  Therefore, since the etching proceeds faster on the exposed surface 13a and convex portion 13c of the lens layer 13 than on the protective member 72 remaining in the concave portion 13b of the lens layer 13, the local step D0 can be reduced. . Therefore, the step D1 for correcting the global step D2 generated in the subsequent CMP process is formed by etching using the protection member 72, and the local step D0 is relaxed by the etch back effect using the protection member 72. can do.

  The anisotropic etching is further continued from the state shown in FIG. 5C, and as shown in FIG. 5D, the local step D0 is further reduced, and the protective member 72 is slightly left in the recess 13b. The anisotropic etching process is stopped at. Then, the protective member 72 remaining in the recess 13b is removed. In addition, the level | step difference (depth of the recessed part 14) D1 of the lens layer 13 is maintained by substantially the same magnitude | size from the state shown in FIG.5 (b).

  Part B in FIG. 5D is enlarged and shown in FIG. FIG. 6A shows a state where the protective member 72 in the recess 13b is removed. FIG. 6B is a plan view of a portion C in FIG. The cross section shown in FIG. 6A corresponds to the cross section taken along the line F-F ′ of FIG. In the lens layer 13 in the state where the anisotropic etching process is stopped, in the cross section shown in FIG. 6A, the concave portions 13b are slightly left between the convex portions 13c from which the upper portions are removed. In the plan view shown in b), the concave portion 13b remains so as to surround the substantially circular convex portion 13c.

  Next, CMP processing is performed on the lens layer 13 from the state shown in FIGS. By the CMP process, as shown in FIGS. 6C and 6D, the convex portion 13c of the lens layer 13 is further removed, the concave portion 13b is further reduced, and the adjacent convex portions 13c are connected to each other. As a result, a concave portion 15 recessed from the surface 13a is formed in the lens layer 13, and a global step D2 between the bottom surface 15a of the concave portion 15 and the surface 13a is generated.

  In the present embodiment, since the local step D0 is relaxed before the CMP process is performed, the polishing amount of the CMP process for eliminating the local step D0 is smaller than that in the conventional manufacturing method shown in FIG. Can be reduced. Therefore, as compared with the conventional manufacturing method, the time required for the CMP process can be shortened, and the global level difference D2 formed at the initial stage of the CMP process is remarkably small.

  Subsequently, as shown in FIGS. 6E and 6F, by further performing the CMP process, the convex portion 13c of the lens layer 13 is further removed, the concave portion 13b is further reduced, and the local step D0 is eliminated. At the same time, the surface 13a is polished to reduce the step D1 and the global step D2.

  Further, by performing the CMP process, as shown in FIG. 5E, the step D1 is eliminated and the global step D2 is also eliminated, and the surface 13a of the lens layer 13, the bottom surface 15a of the recess 15 and the recess 14 Since the bottom surface 14a is the same surface, the surface 13a of the lens layer 13 is flattened. In this embodiment, since the global step D2 formed in the initial stage of the CMP process is smaller than in the conventional manufacturing method, the polishing amount of the CMP process for eliminating the global step D2 can be reduced.

  The process from the process shown in FIG. 4E to the process shown in FIG. 5E is a planarization process in the method for manufacturing a microlens array substrate according to the present embodiment. According to the manufacturing method according to the present embodiment, the number of CMP processing steps can be significantly reduced as compared with the conventional manufacturing method. In addition, since the amount of polishing of the lens layer 13 can be reduced as compared with the conventional manufacturing method, the amount of material for the lens layer 13 can be reduced and the amount of waste due to polishing can be reduced. Furthermore, the flatness of the surface 13a of the lens layer 13 can be improved by shortening the CMP processing time.

  By performing the above steps, the microlens array substrate 10 is completed. When the counter substrate 30 including the microlens array substrate 10 is manufactured, an optical path length adjustment layer 31, a light shielding layer 32, a protective layer 33, and the like are formed on the microlens array substrate 10 as shown in FIG. The common electrode 34 and the alignment film 35 may be sequentially formed using a known method.

  Here, the etch-back effect of the protective member 72 (resist film) that contributes to the relaxation of the local step D0 will be further described. In the above description, the anisotropic etching process is stopped and the CMP process is performed in the state shown in FIG. 5D, but the state shown in FIG. 5C, that is, the lens layer 13 in the display region E is displayed. A case where the anisotropic etching process is stopped and the CMP process is performed while the etching is not progressing as much as the state shown in FIG. 5D will be compared with this case.

  Part B in FIG. 5C is enlarged and shown in FIG. FIG.7 (b) is the figure which planarly viewed C section of Fig.7 (a). The cross section shown in FIG. 7A corresponds to the cross section taken along the line F-F ′ of FIG. As shown in FIGS. 7A and 7B, when the anisotropic etching process is stopped in the state shown in FIG. 5C, the lens layer 13 is compared with FIGS. 6A and 6B. Of these, the removal amount of the convex portion 13c is small, and the concave portion 13b remains large. Therefore, the local level difference D0 shown in FIG. 7A is larger than the local level difference D0 shown in FIG.

  FIGS. 7C and 7D show a state where the CMP process is performed on the lens layer 13 from this state. Since the local level difference D0 before performing the CMP process is large, as shown in FIG. 7C, the global level difference D2 formed in the initial stage of the CMP process is also large.

  FIGS. 7E and 7F show the state where the CMP process is further continued. As shown in FIG. 7E, the global step D2 becomes larger as the local step D0 is relaxed by the CMP process. Therefore, when the etching (etchback) using the protective member 72 is not sufficiently performed in the display area, the effect of suppressing the polishing amount of the lens layer 13 is reduced.

  Note that the anisotropic etching is stopped before the state shown in FIG. 5B is reached, and the step D1 for correcting the global step D2 is formed without performing etching (etch back) in the display region E. A method is also conceivable. However, in such a method, the global level difference D2 formed in the initial stage of the CMP process is further larger than the above, and therefore the effect of suppressing the polishing amount of the lens layer 13 is further reduced. In addition, since the level difference D1 for correcting the global level difference D2 is set larger, it is required to set the film thickness T of the protective member 72 with higher accuracy.

  On the other hand, according to the method of the present embodiment, the etching of the protective member 72 and the etching of the lens layer 13 are advanced in parallel in the display area E and the outer peripheral area, so that the level difference for correcting the global level difference D2 While forming D1, the local step D0 can be relaxed by the etch-back effect of the protective member 72. Since the local step D0 is relaxed before the CMP process and the global step D2 is also reduced, the step D1 can be further reduced.

  Further, depending on the setting of the film thickness T of the protective member 72, the etching amount when the protective member 72 and the lens layer 13 are etched in the display region E and the outer peripheral region, etc., the local step D0, the global step D2, and the global step Adjustment with the level | step difference D1 for correct | amending D2 can be performed more easily.

<Electronic equipment>
Next, an electronic apparatus according to the present embodiment will be described with reference to FIG. FIG. 8 is a schematic diagram illustrating a configuration of a projector as an electronic apparatus according to the present embodiment.

  As shown in FIG. 8, a projector (projection display device) 100 as an electronic apparatus according to this embodiment includes a polarization illumination device 110, two dichroic mirrors 104 and 105, and three reflection mirrors 106, 107, and 108. And five relay lenses 111, 112, 113, 114, 115, three liquid crystal light valves 121, 122, 123, a cross dichroic prism 116, and a projection lens 117.

  The polarization illumination device 110 includes a lamp unit 101 as a light source composed of a white light source such as an ultra-high pressure mercury lamp or a halogen lamp, an integrator lens 102, and a polarization conversion element 103. The lamp unit 101, the integrator lens 102, and the polarization conversion element 103 are disposed along the system optical axis Lx.

  The dichroic mirror 104 reflects red light (R) and transmits green light (G) and blue light (B) among the polarized light beams emitted from the polarization illumination device 110. Another dichroic mirror 105 reflects the green light (G) transmitted through the dichroic mirror 104 and transmits the blue light (B).

  The red light (R) reflected by the dichroic mirror 104 is reflected by the reflection mirror 106 and then enters the liquid crystal light valve 121 via the relay lens 115. The green light (G) reflected by the dichroic mirror 105 enters the liquid crystal light valve 122 via the relay lens 114. The blue light (B) transmitted through the dichroic mirror 105 is incident on the liquid crystal light valve 123 via a light guide system composed of three relay lenses 111, 112, 113 and two reflection mirrors 107, 108.

  The transmissive liquid crystal light valves 121, 122, and 123 as light modulation elements are disposed to face the incident surfaces of the cross dichroic prism 116 for each color light. The color light incident on the liquid crystal light valves 121, 122, 123 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 116.

  The cross dichroic prism 116 is configured by bonding four right-angle prisms, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface thereof. Yes. The three color lights are synthesized by these dielectric multilayer films, and the light representing the color image is synthesized. The synthesized light is projected onto the screen 130 by the projection lens 117 which is a projection optical system, and the image is enlarged and displayed.

  The liquid crystal light valve 121 is the one to which the liquid crystal device 1 including the microlens array substrate 10 of the above-described embodiment is applied. The liquid crystal light valve 121 is arranged with a gap between a pair of polarizing elements arranged in crossed Nicols on the incident side and emission side of colored light. The same applies to the other liquid crystal light valves 122 and 123.

  According to the configuration of the projector 100 according to the present embodiment, the projector 100 includes the liquid crystal device 1 that can obtain a bright display even if the plurality of pixels P are arranged with high definition. Can be provided.

  The above-described embodiments merely show one aspect of the present invention, and can be arbitrarily modified and applied within the scope of the present invention. As modifications, for example, the following can be considered.

(Modification 1)
The liquid crystal device 1 according to the above embodiment has a configuration in which the light shielding layer 32 is provided on the optical path length adjustment layer 31, but the present invention is not limited to such a form. The light-shielding layer 32 may be provided on the lens layer 13. FIG. 9 is a partial cross-sectional view illustrating the configuration of the liquid crystal device according to the first modification. Constituent elements common to the above-described embodiment are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIG. 9, the liquid crystal device 1 </ b> A according to Modification 1 includes an element substrate 20, a counter substrate 30 </ b> A, and a liquid crystal layer 40. The counter substrate 30A includes a microlens array substrate 10A, a light shielding layer 32, an optical path length adjustment layer 31, a common electrode 34, and an alignment film 35.

A microlens array substrate 10 </ b> A according to Modification 1 includes a substrate 11, a light transmissive layer 17, and a lens layer 13. The light transmissive layer 17 is provided on the first surface 11 a of the substrate 11. The translucent layer 17 is made of a translucent oxide film such as SiO ₂ . The light transmitting layer 17 is formed on the first surface 11a of the substrate 11 before the step of forming the mask layer 71 shown in FIG. Then, after forming the light transmitting layer 17, annealing is performed at a predetermined temperature.

  For example, the light transmitting layer 17 has an etching rate different from that of the substrate 11 in isotropic etching when the recess 12 is formed in the substrate 11. Thereby, the concave portion 12 having a desired shape can be obtained by adjusting the etching rate in the width direction (W direction) with respect to the etching rate in the depth direction (Z direction). The etching rate of the translucent layer 17 can be adjusted by the annealing temperature, annealing time, and the like. When a layer made of silicon is provided on the outer edge of the substrate 11 or the like, the transparent layer 17 is provided so as to cover the silicon layer, so that the mask layer 71 is removed after the recess 12 is formed in the substrate 11. In addition, the light transmitting layer 17 can have a function as a protective film for protecting the silicon layer.

  In the counter substrate 30 </ b> A according to Modification Example 1, the light shielding layer 32 is provided on the lens layer 13. The optical path length adjustment layer 31 is provided so as to cover the lens layer 13 and the light shielding layer 32. Therefore, since the optical path length adjusting layer 31 covers the light shielding layer 32 and also serves to flatten the surface on the liquid crystal layer 40 side where the common electrode 34 is formed, the protective layer 33 (see FIG. 3) can be omitted.

(Modification 2)
In the liquid crystal devices 1 and 1A described above, the microlens array substrates 10 and 10A are provided on the counter substrate 30, but the present invention is not limited to such a form. For example, the microlens array substrate 10 may be provided on the element substrate 20. Further, the microlens array substrate 10 may be provided on both the element substrate 20 and the counter substrate 30.

(Modification 3)
The electronic apparatus to which the liquid crystal devices 1 and 1A can be applied is not limited to the projector 100. The liquid crystal devices 1 and 1A are, for example, a projection type HUD (head-up display), a direct-view type HMD (head-mounted display), an electronic book, a personal computer, a digital still camera, a liquid crystal television, a viewfinder type, or a monitor direct-view type. It can be suitably used as a display unit for information terminal devices such as video recorders, car navigation systems, electronic notebooks, and POS.

  DESCRIPTION OF SYMBOLS 1,1A ... Liquid crystal device (electro-optical device) 10, 10A ... Microlens array substrate, 11 ... Substrate, 11a ... First surface, 12 ... Recess, 13 ... Lens layer, 13a ... Surface, 20 ... Element substrate 1), 30, 30A ... counter substrate (second substrate), 40 ... liquid crystal layer (electro-optic layer), 72 ... protective member, 100 ... projector (electronic device), E ... display area (first area) .

Claims (6)

Forming a plurality of recesses in the first region of the first surface of the substrate that transmits light;
Forming a lens layer that transmits light and has a refractive index different from that of the substrate so as to cover the first surface of the substrate and embed the plurality of recesses;
Disposing a protective member in a region overlapping the first region of the lens layer in plan view;
Removing a part of the lens layer while removing the protective member;
Polishing the surface of the lens layer;
A method of manufacturing a microlens array substrate, comprising: A method of manufacturing a microlens array substrate according to claim 1,
The step of removing a part of the lens layer while removing the protective member,
A method for producing a microlens array substrate, comprising: removing a part of the lens layer located in a region overlapping the first region in plan view while removing the protective member. A method of manufacturing a microlens array substrate according to claim 1 or 2,
The method for manufacturing a microlens array substrate, wherein the protective member is made of a resist. A method of manufacturing a microlens array substrate according to any one of claims 1 to 3,
The method for manufacturing a microlens array substrate, wherein the lens layer is made of silicon oxynitride. A first substrate;
A second substrate disposed opposite to the first substrate;
An electro-optic layer sandwiched between the first substrate and the second substrate,
At least one of the first substrate and the second substrate includes a microlens array substrate manufactured by the method for manufacturing a microlens array substrate according to any one of claims 1 to 4. Electro-optical device characterized.   An electronic apparatus comprising the electro-optical device according to claim 5.

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