JP2015099861A - Storage device and data reading method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a storage device capable of nondestructive reading and maintaining high reliability for a long time. SOLUTION: A first electrode 13, a ferroelectric layer 14 provided on the first electrode, and a second electrode 15 provided on the ferroelectric layer 14 are provided, and the second electrode is transparent. It is an electrode, and a pn junction 16 is formed between the ferroelectric layer 14 and the first electrode 13 or the second electrode 15. [Selection] Figure 1

Description

  The present invention relates to a storage device and a data reading method.

  Conventionally, a ferroelectric capacitor having an oxide ferroelectric represented by lead zirconate titanate (PZT) is known as a constituent material of a semiconductor memory. In a ferroelectric capacitor, the polarization direction can be reversibly changed / maintained by applying a predetermined external electric field, and data can be determined 1/0 based on this polarization direction. As a storage device using such a principle, for example, a nonvolatile storage device is known.

  This type of storage device includes a 1T1C type in which one transistor and one ferroelectric capacitor are arranged in each cell and 1-bit data is recorded, and two transistors and two ferroelectric capacitors are provided in each cell. A 2T2C type that records 1-bit data is known.

  In addition, a storage device in which a memory cell is basically constituted by only one ferroelectric capacitor has been proposed (see Patent Document 1). In this apparatus, an electric field that causes polarization inversion is applied to a ferroelectric capacitor, and the polarization direction is determined based on the magnitude of potential change at that time.

JP 09-116107 A

However, in the memory device of Patent Document 1, the original data is once destroyed by applying an electric field that causes polarization inversion to the ferroelectric capacitor, and the data cannot be read without such destruction. In addition, after destroying the original data, an electric field that causes polarization inversion was applied again to the ferroelectric capacitor, and the destroyed original data had to be written. For this reason, there has been a problem that the polarization inversion is repeated excessively, and the reliability of the memory device is lowered due to long-term use.
Such a problem exists not only in the storage device of Patent Document 1, but also in a storage device that requires so-called destructive reading.
The present invention has been made in view of the above situation, and an object of the present invention is to provide a storage device and a data reading method capable of nondestructive reading and maintaining high reliability over a long period of time.

According to an aspect of the present invention for solving the above problem, in a memory device including a ferroelectric capacitor in which a first electrode, a ferroelectric layer, and a second electrode are stacked, the second electrode is a transparent electrode, In the memory device, a pn junction is formed between the dielectric layer and the first electrode or the second electrode.
In this aspect, since the pn junction is formed between the ferroelectric layer and the first electrode or the second electrode, the ferroelectric capacitor has both ferroelectric characteristics and pn junction diode characteristics, It is possible to change the pn junction diode characteristics by changing the polarization direction of the induced dipole of the ferroelectric layer. Therefore, the photocurrent obtained by light irradiation can be detected, the polarization direction can be determined based on this photocurrent, and nondestructive readout without polarization reversal is possible. Furthermore, since non-destructive reading is not accompanied by polarization inversion, rewriting to hold the original data again can be omitted. Therefore, high reliability can be maintained over a long period of time.

  Here, the memory device includes a plurality of memory cells having the ferroelectric capacitor and a word line and a bit line electrically connected to the ferroelectric capacitor, and the memory device includes a plurality of memory cells. It is preferable that at least one of the ferroelectric capacitors disposed is one. This facilitates downsizing as compared with a type in which a plurality of ferroelectric capacitors are arranged in all the plurality of memory cells. Therefore, it is possible to provide a storage device that can maintain high reliability for a long time and can easily integrate memory cells at high density.

  Moreover, it is preferable that the pn junction further includes a light irradiation means capable of irradiating light. According to this, since the photovoltaic current can be reliably generated, the reliability of the storage device can be improved.

  Moreover, it is preferable that the said light irradiation means is a light emitting element comprised from the organic electroluminescent material. According to this, the increase in the size of the memory device can be suppressed by forming the light emitting element in a thin film shape, for example. Therefore, high reliability can be maintained over a long period of time, and a storage device that is advantageous for downsizing can be provided.

  It is preferable that a writing circuit is provided that polarizes the induced dipole of the ferroelectric layer in a predetermined direction by applying a polarization voltage. According to this, it is possible to provide a non-volatile RAM that is a storage device that can maintain high reliability over a long period of time and that can rewrite data written at the manufacturing and shipping stage.

  Moreover, it is preferable to provide a circuit for detecting a photocurrent obtained by light irradiation to the pn junction. According to this, the detection of the photovoltaic current is facilitated, and the reliability of the storage device can be easily maintained.

  The circuit preferably determines the polarization direction of the ferroelectric layer by comparing the detected photocurrent with a predetermined threshold. According to this, it becomes easy to determine the polarization direction of the ferroelectric layer, and it becomes easy to maintain the reliability of the memory device.

  The ferroelectric layer is preferably a p-type semiconductor. According to this, the second electrode can be configured as an n-type semiconductor, and a pn junction can be formed. Therefore, for example, a transparent electrode (ITO) whose main component is indium tin oxide, which is an n-type semiconductor, is used as the second electrode, and a storage device capable of maintaining high reliability over a long period can be provided.

  The ferroelectric layer preferably contains bismuth (Bi) and iron (Fe). According to this, the ferroelectric layer can be configured as a composite oxide having a perovskite structure containing, for example, bismuth (Bi) and iron (Fe). Therefore, it is possible to provide a storage device that can maintain high reliability over a long period of time and can reduce the environmental load using a ferroelectric layer that does not contain lead.

  The ferroelectric layer preferably contains at least one selected from the group consisting of lanthanum (La), manganese (Mn), and titanium (Ti). According to this, the ream current can be reduced and the reliability of the storage device can be improved.

According to another aspect of the present invention for solving the above problem, in the data read method of a memory device including a ferroelectric capacitor in which a first electrode, a ferroelectric layer, and a second electrode are stacked, A second electrode is a transparent electrode, and a pn junction is formed between the ferroelectric layer and the first electrode or the second electrode, and a photocurrent is generated by irradiating the pn junction with light. And a step of detecting the generated photovoltaic current. A data reading method comprising:
In this embodiment, since the memory device in which the pn junction is formed between the ferroelectric layer and the first electrode or the second electrode is used, the ferroelectric capacitor has both the ferroelectric characteristics and the pn junction diode characteristics. Thus, the pn junction diode characteristics can be changed by changing the polarization direction of the induced dipole of the ferroelectric layer. Therefore, the photocurrent obtained by light irradiation can be detected, the polarization direction can be determined based on this photocurrent, and nondestructive readout without polarization reversal is possible. Furthermore, since non-destructive reading is not accompanied by polarization inversion, rewriting to hold the original data again can be omitted. Therefore, high reliability can be maintained over a long period of time.

  Preferably, the method further includes a step of detecting the photocurrent and comparing the detected photocurrent with a predetermined threshold value to determine a polarization direction of the ferroelectric layer. According to this, it becomes easy to determine the polarization direction of the ferroelectric layer, and it becomes easy to maintain the reliability of the memory device.

1 is a circuit diagram showing a schematic configuration of a storage device according to Embodiment 1. FIG. 1 is a diagram illustrating a schematic configuration of a ferroelectric capacitor according to a first embodiment. FIG. 3 is a diagram for explaining the operation of the ferroelectric capacitor according to the first embodiment. FIG. 3 is a diagram for explaining the operation of the ferroelectric capacitor according to the first embodiment. 1 is a diagram illustrating a schematic configuration of a ferroelectric capacitor according to a first embodiment. FIG. 3 is a diagram for explaining the operation of the ferroelectric capacitor according to the first embodiment. FIG. 3 is a diagram for explaining the operation of the ferroelectric capacitor according to the first embodiment. 6A and 6B illustrate an example of a method for manufacturing a storage device according to the first embodiment. FIG. 5 is a diagram illustrating a schematic configuration of a ferroelectric capacitor according to a second embodiment. The figure which shows the relationship of current density (J) -voltage (E). The figure which shows the relationship of polarization amount (P) -voltage (E). The figure for observing the photovoltaic current by light irradiation.

(Embodiment 1)
1A and 1B are diagrams showing a schematic configuration of a storage device according to Embodiment 1 of the present invention.

As shown in the figure, the storage device 10 of this embodiment includes a transistor element 11 and a ferroelectric capacitor 12.
Among these, the ferroelectric capacitor 12 includes a first electrode 13, a ferroelectric layer 14, and a second electrode 15, a second electrode 15 is a transparent electrode, and the ferroelectric layer 14 and the second electrode 15 are separated from each other. A pn junction 16 is formed between them. According to this, the ferroelectric capacitor 12 achieves both ferroelectric characteristics and pn junction diode characteristics, and polarization of the induced dipole of the ferroelectric layer 14 (simply abbreviated as “polarization of the ferroelectric layer”). It is possible to change the pn junction diode characteristics by changing the direction of.

  In the transistor element 11, the gate 11a is connected to the word line WL via the gate line GL, the source 11b is connected to the bit line BL, and the drain 11c is connected to the plate line PL via the ferroelectric capacitor 12. . The connection mode is not limited to the above example, and the drain 11c may be connected to the ground via the ferroelectric capacitor 12.

  In the figure, a plurality of memory cells 20 including a transistor element 11, a ferroelectric capacitor 12, and the word lines WL and bit lines BL are arranged in a matrix that is continuous in the vertical and horizontal directions. However, they may be arranged continuously only in the vertical direction or only in the horizontal direction for convenience of circuit design.

  In the present embodiment, at least one of the plurality of memory cells 20 adopts a mode in which the number of ferroelectric capacitors 12 arranged is one. According to this, for example, as compared with a type in which a plurality of ferroelectric capacitors are arranged in all the plurality of memory cells, the memory cell 20 can be easily downsized and easily integrated at a high density.

  It should be noted that a mode in which the number of the ferroelectric capacitors 12 to be arranged is one for substantially all of the plurality of memory cells 20 may be adopted. This makes it easier to reduce the size of the memory cell 20. Here, “substantially all” means all except the memory cell when there is a memory cell in which a plurality of the ferroelectric capacitors 12 are preferably arranged for convenience of circuit setting.

The transistor element 11 can be omitted. That is, in the present embodiment, as shown in FIG. 1 (b), a plurality of ferroelectric capacitors 12, a plurality of word lines _WL 1 to WL _n, a plurality of main bit lines _MBL 1 _{~MBL n,} the main a plurality of sub-bit lines _SBL 1 _{~SBL n} branching respectively from the bit line _MBL 1 _{~MBL n,} it may comprise a.

In FIG. 1B, among the plurality of memory cells 20, the cell selection transistor element 11 is arranged in a part of the memory cells capable of exhibiting the cell selection function, and the gate 11a is connected via the gate line GL. A plurality of word lines WL _{1 to} WL _n are connected, a source 11 b is connected to the sub bit lines SBL _{1 to} SBL _n , and a drain 11 c is connected to the plurality of word lines WL _{1 to} WL _n via the ferroelectric capacitor 12. Although connected, the mode of connection is not limited to the above example.

According to the embodiment shown in FIG. 1B, it is possible to realize the 1C type storage device 10B having the memory cell 20 that can basically be constituted by only one ferroelectric capacitor 12, and further miniaturization is facilitated. Become.
However, if the transistor element 11 is provided, the memory cell 20 can be selected as required by the transistor element 11 and the word line WL.

  The form of the ferroelectric capacitor 12 is not limited to the above example, and a 2T2C type in which two transistor elements and two ferroelectric capacitors are arranged in each memory cell can be adopted. From the viewpoint of increasing the capacity, it is preferable to integrate a plurality of memory cells 20, but the number of memory cells 20 need not be plural.

  In such a memory device 10, for example, in the manufacturing and shipping stage, the memory cell 20 is selected by the transistor element 11 and the word line WL, and a polarization voltage is applied between the bit line BL and the plate line PL. As a result, the ferroelectric layer 14 of the ferroelectric capacitor 12 is polarized in a predetermined direction, and data is written. The written data is read as necessary based on the polarization direction of the ferroelectric layer 14.

Here, since the storage device 10 of the present embodiment includes the ferroelectric capacitor 12 described above, it can detect a photocurrent obtained by light irradiation and determine the polarization direction based on the photocurrent. Therefore, non-destructive reading without polarization reversal is possible.
Furthermore, since the storage device 10 performs nondestructive reading without polarization reversal, rewriting to hold the original data again can be omitted.

Hereinafter, a schematic configuration of the ferroelectric capacitor 12 mounted on the storage device 10 of the present embodiment will be described in detail with reference to FIGS.
As shown in the figure, the ferroelectric capacitor 12 of the present embodiment has a first electrode 13, a ferroelectric layer 14, and a second electrode 15 laminated on a substrate 17 in this order. As the substrate 17, for example, a silicon (Si) substrate or a glass substrate can be used, but it is not limited to the above example. Although not shown here, an insulating layer or an adhesion layer may be provided between the substrate 17 and the first electrode 13. When the first electrode 13, the ferroelectric layer 14, the second electrode 15, or the like is configured to also serve as the substrate 17, the substrate 17 may be omitted.

  The first electrode 13 may be any material having conductivity, such as platinum (Pt), iridium (Ir), gold (Au), aluminum (Al), copper (Cu), titanium (Ti), and stainless steel. An element, a conductive polymer, or the like can be used. The first electrode 13 may be configured by stacking a plurality of metal layers or metal oxide layers.

The second electrode 15 is configured as a transparent electrode and can transmit the irradiated light. Such a second electrode 15 varies depending on the material of the ferroelectric layer 14 and the like. For example, a transparent electrode (In ₂ O ₃ ) doped with about several percent of tin as a main component (for example) ITO) can be used. This transparent electrode (ITO) is known to function as an n-type semiconductor.

  The second electrode 15 does not need to be optically completely transparent, and may be substantially transparent. For example, the second electrode 15 only needs to have such a transmittance that incident light passes through the second electrode 15 and reaches the pn junction 16.

  As the film thickness increases, the conductivity of the second electrode 15 increases because the carrier concentration increases. On the other hand, since the light transmission distance to reach the pn junction 16 increases, the transmittance tends to decrease. For this reason, it is preferable that the film thickness of the second electrode 15 is appropriately selected in consideration of conductivity, transmittance, and the like based on the application, strength and the like.

  The ferroelectric layer 14 has a ferroelectric property in which the induced dipole spontaneously polarizes when a polarization voltage is applied. For this reason, for example, by applying a polarization voltage at the time of manufacture and shipment or rewriting, it is possible to maintain a polarization direction such that a predetermined 1/0 determination result is obtained.

  The ferroelectric layer 14 can be configured as a p-type semiconductor, for example. According to this, the pn junction 16 can be formed between the second electrode 15 made of a transparent electrode (ITO) functioning as an n-type semiconductor. In this case, from the viewpoint of efficient photoelectric conversion, the ferroelectric layer 14 can be polarized in the direction in which + (plus) charge is induced on the second electrode 15 side.

  The ferroelectric layer 14 can also be configured as an n-type semiconductor. In this case, the second electrode 15 is configured as a p-type semiconductor. At this time, from the viewpoint of efficient photoelectric conversion, the ferroelectric layer 14 can be polarized in a direction in which a negative charge is induced on the second electrode 15 side.

  Further, the ferroelectric layer 14 can be configured to include bismuth (Bi) and iron (Fe). According to this, the ferroelectric layer 14 can be configured as a composite oxide having a perovskite structure containing Bi and Fe. That is, the ferroelectric layer 14 can be typically configured as a complex oxide having a perovskite structure of bismuth ferrate. Since such a complex oxide does not contain lead, which may be a burden on the environment, the storage device 10 that can reduce the burden on the environment can be realized.

  In such a complex oxide having a perovskite structure, oxygen is 12-coordinated at the A site, and oxygen is 6-coordinated at the B site to form an octahedron. A material obtained by substituting Bi at the A site and part of Fe at the B site with various elements may be used.

  For example, the ferroelectric layer 14 preferably contains at least one selected from the group consisting of lanthanum (La), manganese (Mn), and titanium (Ti). According to this, for example, a leakage current can be reduced in a lead-free material, and the reliability of the memory device can be improved. In addition, the degree of freedom of the material constituting the ferroelectric layer 14 can be increased.

  Specifically, La is an element that substitutes Bi at the A site, and Mn is an element that substitutes Fe at the B site. Such a complex oxide is called bismuth lanthanum iron manganate (BLFM) and is represented by the following composition formula (1).

[Formula 1]
_{(Bi 1-x, La x} ) (Fe 1-y, Mn y) O 3 (1)
(In the formula, x and y are both larger than 0 and smaller than 1.)
Further, Fe at the B site of the ferroelectric layer 14 of BLFM may be replaced with Ti. Such a complex oxide is represented by the following composition formula (2).

[Formula 2]
_{(Bi 1-x, La x} ) (Fe 1-y-z, Mn y, Ti z) O 3 (2)
(In the formula, x, y, and z are all larger than 0 and smaller than 1.)
However, the composition of the ferroelectric layer 14 is not limited to the above example, and includes those that deviate from the stoichiometric composition due to defects or excess, and those in which some of the elements are replaced with other elements.

  Bi at the A site of the ferroelectric layer 14 may be replaced with samarium (Sm), cerium (Ce), etc., and Fe at the B site may be replaced with aluminum (Al), cobalt (Co), or the like. May be. Even in the case of a complex oxide containing these other elements, it is preferably configured to have a perovskite structure.

That is, as the ferroelectric layer 14, bismuth ferrate (BiFeO ₃ ), bismuth ferrate aluminumate (Bi (Fe, Al) O ₃ ), bismuth ferrate manganate (Bi (Fe, Mn) O ₃ ), Bismuth lanthanum ferrate manganate ((Bi, La) (Fe, Mn) O ₃ ), bismuth ferrate cobaltate (Bi (Fe, Co) O ₃ ), bismuth cerium ferrate ((Bi, Ce) FeO ₃ ) , Bismuth cerium iron manganate ((Bi, Ce) (Fe, Mn) O ₃ ), bismuth lanthanum cerium ferrate ((Bi, La, Ce) FeO ₃ ), bismuth lanthanum cerium iron manganate ((Bi, La, Ce) (Fe, Mn) O ₃ ), bismuth samarium ferrate ((Bi, Sm) FeO ₃ ), bismuth ferrate chromate (Bi (Cr, Fe) O ₃ ), etc. Can.

  Data writing to the ferroelectric capacitor 12 composed of the first electrode 13, the ferroelectric layer 14, and the second electrode 15 described above is, for example, writing that can be electrically connected to the first electrode 13 and the second electrode 15. The circuit 21 can be used.

  As shown in FIG. 2A, the writing circuit 21 includes, for example, a voltage applying unit 22, a switching element 23 provided between the voltage applying unit 22 and the ferroelectric capacitor 12, and the voltage applying unit 22 and the switching element. 23, and a control means 24 for transmitting a control signal.

  The voltage applying means 22 is a part that generates a polarization voltage, and a known power supply device can be used. The voltage applying means 22 can be electrically connected to the first electrode 13 and the second electrode 15 via the switching element 23 by the wiring 25. The switching element 23 can be a field effect transistor (TFT) or the like, but may be omitted.

  The control unit 24 is configured around a known microcomputer, and is configured to transmit a control signal to the voltage application unit 22 and the switching element 23 to control the voltage value and application time of the polarization voltage. .

  By providing such a write circuit 21 and configuring the ferroelectric capacitor 12A, it is possible to provide a non-volatile RAM (Random Access Memory) that can rewrite data written at the time of manufacture and shipment.

  However, when writing is performed only at the manufacturing and shipping stage, that is, when rewriting of data after manufacturing and shipping is not scheduled, the writing circuit 21 temporarily stores the first electrode 13 and the second electrode 15 at the manufacturing and shipping stage. As long as it is connectable.

  Therefore, as shown in FIG. 2B, the ferroelectric circuit 12B can be configured by omitting the write circuit 21. According to such a ferroelectric capacitor 12B, it is possible to provide a non-volatile ROM (Read Only Memory) dedicated to reading data written at the manufacturing and shipping stage.

Next, operations and functions related to the ferroelectric capacitor 12 will be described with reference to FIGS. 3 to 4 are enlarged views showing the vicinity of the pn junction 16 of the ferroelectric capacitor 12.
As shown in FIG. 3, in general, when a pn junction 16 is formed by joining a p-type semiconductor and an n-type semiconductor, holes in the p-type semiconductor are generated by an internal electric field in which the p-type semiconductor is positive and the n-type semiconductor is negative. Moves to the n-type semiconductor side, and electrons of the n-type semiconductor move to the p-type semiconductor side. As a result, a depletion layer 30 having a predetermined width A in which almost no carriers (holes and electrons) are present is formed in the vicinity of the pn junction 16.

  The depletion layer 30 is a part that affects the pn junction diode characteristics of the ferroelectric capacitor 12. When the depletion layer 30 is enlarged, its capacitance is reduced, and an electric output having high linearity with respect to the illuminance of light can be obtained, which is advantageous in making the ferroelectric capacitor 12 highly sensitive. Become.

  Here, in the ferroelectric capacitor 12 of the present embodiment shown in FIG. 4A, with respect to the ferroelectric layer 14, − (minus) charge on the side of the ferroelectric layer 14 which is a p-type semiconductor, n Polarization treatment can be performed in the direction in which + (plus) charge is induced on the second electrode 15 side which is a type semiconductor. According to this, a state in which a downward electric field (direction from the second electrode 15 side to the ferroelectric layer 14 side) is applied in the vicinity of the pn junction 16, and an expanded depletion layer 30 can be obtained ( Width B shown in FIG. 4A> width A shown in FIG.

  As shown in FIG. 4B, + (plus) charge is induced on the ferroelectric layer 14 side which is a p-type semiconductor, and-(minus) charge is induced on the second electrode 15 side which is an n-type semiconductor. Polarization treatment can also be applied in the direction. According to this, an electric field upward (direction from the ferroelectric layer 14 side to the second electrode 15 side) is applied in the vicinity of the pn junction 16, and a reduced depletion layer 30 can be obtained ( The width C shown in FIG. 4B <the width A shown in FIG.

In such a ferroelectric capacitor 12, when the light transmitted through the second electrode 15 which is an n-type semiconductor reaches the pn junction 16, the light is absorbed by the ferroelectric layer 14 and the second electrode 15 to generate carriers. Is done. In the generated carriers, electrons move to the second electrode 15 side and holes move to the ferroelectric layer 14 side by an internal electric field formed by the ferroelectric layer 14 and the second electrode 15. As a result, a photovoltaic current I _hν is generated.

In order to detect the photocurrent I _hν , for example, the current detection device 27 may be connected to the first electrode 13 and the second electrode 15 by the wiring 26. As the current detection device 27, a known device can be used.

In the embodiment of FIG. 4A, the photocurrent I _hν is detected with high sensitivity due to the depletion layer 30 expanded to the width B, and in the embodiment of FIG. 4B, the depletion layer reduced to the width C. 30 is detected with low sensitivity. As described above, according to the ferroelectric capacitor 12, both the ferroelectric characteristics and the pn junction diode characteristics are achieved. By changing the polarization direction of the induced dipole of the ferroelectric layer 14, the pn junction diode characteristics can be obtained. It can be changed.

That is, the magnitude of the detected photocurrent I _hν varies depending on the polarization direction of the ferroelectric layer 14. Therefore, the photocurrent obtained by light irradiation is detected, and based on this photocurrent, the photocurrent I _hν is detected with high sensitivity due to the depletion layer 30 expanded to the width B, and the depletion reduced to the width C is achieved. Due to the layer 30, the photocurrent _Ihv is detected with low sensitivity.

  Therefore, it is possible to detect the photocurrent obtained by light irradiation and perform nondestructive reading without polarization inversion. Furthermore, since non-destructive reading is not accompanied by polarization inversion, rewriting to hold the original data again can be omitted. Therefore, high reliability can be maintained over a long period of time.

  Further, the polarization direction can be determined using, for example, the circuit 28 shown in FIGS. The circuit 28 detects a photocurrent obtained by irradiating the pn junction 16 with light. According to such a circuit 28, it becomes possible to easily detect the photovoltaic current used for the determination. The circuit 28 preferably determines the polarization direction of the ferroelectric layer 14 by comparing the detected photocurrent with a predetermined threshold. According to this, the polarization direction can be easily determined.

Specifically, the circuit 28 can be configured to include a current detection device 27 that detects the photocurrent I _hν and a control unit 24 that transmits a control signal to the current detection device 27. The current detection device 27 and the control means 24 may be separated from each other or may be integrally formed.

As the control means 24, the above-mentioned one can be basically used. The control means 24 here receives information relating to the photocurrent I _hν detected by the current detection device 27, compares the photocurrent I _hν with a threshold value, and determines the polarization direction of the ferroelectric layer 14. have.

As an example, the control unit 24, when the detected photovoltaic current I _hv is larger than the threshold value, are able to detect a photoelectric current I _hv with high sensitivity, i.e., the depletion layer 30 is obtained by enlarging the width B As shown in FIG. 4A, it is determined that the polarization direction is such that − (minus) charge is induced on the ferroelectric layer 14 side which is a p-type semiconductor.

On the other hand, when the detected photocurrent I _hν is equal to or lower than the threshold value, the photocurrent I _hν can be detected only with low sensitivity, that is, the depletion layer 30 reduced to the width C is obtained. It is determined that the polarization direction is such that + (plus) charges are induced on the ferroelectric layer 14 side which is a p-type semiconductor as shown in FIG.

  Such a determination result of the polarization direction is an example in the case where the second electrode 15 is configured as an n-type semiconductor, and in the case where the second electrode 15 is configured as a p-type semiconductor, The reverse determination result is obtained.

The threshold value can be obtained in advance by experiments or the like. If a value smaller than the minimum value of the photocurrent I _hν that can be detected with high sensitivity and a value within a range that is larger than the maximum value of the photocurrent I _hν that can be detected with low sensitivity is selected as the threshold value, an erroneous determination is made. It will surely be prevented.

The threshold value can be a fixed value, and according to this, the calculation load can be suppressed. However, the threshold value may be determined for each reading using various detection values.
The value used for the comparison with the threshold value is not limited to the current value of the photovoltaic current detected by the current detection device 27, but may be a value correlated with the current value of the photovoltaic current. Various detection values may be used to correct the current value of the photovoltaic current detected by the current detection device 27.

As for the handling when the photocurrent and the threshold value are equal, it is possible to predetermine a preferable mode by a test or the like, and it may be included in the case where the threshold value is larger than the photocurrent. May be included in the smaller one.
Here, the storage device 10 preferably includes a light irradiation unit capable of irradiating the pn junction 16 with light. According to this, a photovoltaic current can be generated reliably.

  The light irradiation means is preferably a light emitting element 31 made of an organic electroluminescence material. Such a light emitting element 31 has a function of emitting light by excited electrons generated by recombination of electrons and holes injected into an organic compound, and can be formed in a thin film shape, for example. According to this, the amount and type of light can be adjusted by adjusting the light emitting material and the like, and the increase in size of the apparatus due to the provision of the light irradiation means can be easily suppressed.

  As shown in FIG. 5, the light emitting element 31 can be formed in layers on the second electrode 15 which is a transparent electrode. According to this, it becomes easy to make the light by light emission reach the pn junction 16 through the second electrode 15.

  If possible, an organic electroluminescent material may be added to the constituent material of the second electrode to impart a light emitting function to the second electrode. According to this, light by light emission can surely reach the pn junction 16.

  Although the wiring to the light emitting element 31 is not shown in the figure, the connection of the wiring and the mode of stacking the light emitting elements are not limited to the above example. The light emitting element 31 may be formed on the inner wall of the package of the memory cell 20. The light irradiating means can be omitted if the package is a transparent member and a mode in which sunlight or indoor light is guided to the pn junction 16 is secured.

  For example, when the package is a transparent member, or when the light from the light emitting element 31 is irradiated as a whole including other components, any ferroelectric capacitor 12 can be used as long as electrical connection is ensured. Although a current can be generated, a memory cell that generates a photocurrent may be selected by the transistor element 11 and the word line WL so that a photocurrent is generated only in a predetermined ferroelectric capacitor 12. . In addition, a predetermined partition wall may be provided inside the package, or a cover member that covers the package may be used.

Next, a data reading method by the storage device 10 of the present embodiment described above will be described in detail with reference to FIGS.
Among these, FIGS. 6A to 6B are diagrams schematically showing a data reading method relating to the RAM 10 that is the storage device 10 of the present embodiment and that can rewrite data. FIG. 6A shows an example of this embodiment, and FIG. 6B shows a conventional example.

  6A and 6B, for example, in the manufacturing and shipping stage, one data is written into the memory cells 20b and 20d among the plurality of memory cells 20a to 20e, and the memory cells 20a, 20c, and 20e have 0 data. An example will be described.

  In the conventional example shown in FIG. 6B, in the reading process, an electric field that causes polarization inversion is applied to the memory cells 20a to 20e in the process p1, and the polarization direction is determined in the process p2 based on the magnitude of the potential change. Rewriting was performed in step p3.

  On the other hand, in the example of this embodiment shown in FIG. 6A, a process P1 for generating a photocurrent by irradiating light to the PN junction 16 and a process P2 for detecting the generated photocurrent are performed. Have. The step P2 preferably includes a step of determining the polarization direction of the ferroelectric layer 14 by comparing the detected photovoltaic current with a predetermined threshold value.

  In the process P1, the memory cells 20a to 20e may be individually irradiated with light, or the entire light may be irradiated including other components in the package. In the case of irradiating light as a whole, by providing the transistor element 11, it becomes possible to select the memory cells 20a to 20d that generate the photocurrent by the transistor element 11 and the word line WL.

Here, in the process P2, the magnitude of the detected photocurrent is different between the memory cells 20b and 20d and the other memory cells 20a, 20c and 20e.
For example, the ferroelectric layers of the memory cells 20b and 20d are polarized in a direction in which + (plus) charge is induced on the second electrode 15 side which is an n-type semiconductor, and the memory cells 20a, 20c and 20e are strong. It is assumed that the dielectric layer is polarized in a direction in which a negative charge is induced on the second electrode 15 side which is an n-type semiconductor.

  Then, high sensitivity detection is realized in the memory cells 20b and 20d, and the detected photocurrent is relatively large. On the other hand, the memory cells 20a, 20c, and 20e have low sensitivity detection, and the detected photocurrent is relatively small.

  Based on the magnitude relationship between the photocurrent and the threshold value, the polarization direction of the ferroelectric layer 14 is determined. For example, one data is determined when the photocurrent detected in the memory cells 20b and 20d is larger than the threshold, and 0 when the photocurrent detected in the memory cells 20a, 20c and 20e is less than the threshold. Data is determined.

  Thus, according to the data reading method of this embodiment, nondestructive reading without polarization inversion is possible in determining the polarization direction of the ferroelectric layer 14. In addition, since nondestructive reading without polarization reversal is possible, the rewriting step can be omitted.

  Thereafter, reading is repeated, and writing and rewriting are performed as necessary. In any reading process, in the present embodiment, the above steps P1 to P2 are performed, so that non-destructive operation without polarization inversion is performed. Reading is possible, and rewriting can be omitted.

  According to the data reading method of the present embodiment, since the chance of polarization inversion in the reading process can be suppressed as compared with the conventional example, the nonvolatile RAM can rewrite data after the manufacturing and shipping stage. Therefore, it is possible to provide the storage device 10 that can perform nondestructive reading and can maintain high reliability over a long period of time.

  In this embodiment, the reading step can be performed without applying an electric field that causes polarization inversion as in the conventional example, which is advantageous for power saving. When sunlight is used as a light source, it is possible to read data with substantially no power source except for a minute current that can be applied when a memory cell is selected.

Furthermore, in this embodiment, since rewriting in the reading process is omitted, the control load required during the rewriting operation can be reduced, and it is advantageous for high-speed response.
In addition, since a mechanism for generating a photovoltaic current by light irradiation is used, standby power for determining the polarization direction can be reduced, and circuit design can be improved.

  FIGS. 7A to 7B are diagrams schematically showing a data reading method related to the ROM which is the storage device 10 of the present embodiment and is dedicated to reading data. FIG. 7A shows an example of this embodiment, and FIG. 7B shows a conventional example.

Also in the conventional example shown in FIG. 7B, as in FIG. 6B, an electric field that causes polarization inversion is applied to the memory cells 20a to 20e in the step p1, and the polarization is changed in the step p2 depending on the magnitude of the potential change. The direction was determined, and rewriting was performed in the subsequent step p3.
In order to perform rewriting, it is indispensable to provide a writing circuit even for a read-only ROM.

  On the other hand, in the present embodiment shown in FIG. 7A, the process P1 of generating light by irradiating light to the PN junction 16 and the generated photocurrent are detected, and the detected photocurrent is detected. Is compared with a predetermined threshold value to determine the polarization direction of the ferroelectric layer 14.

  According to this, as in the present embodiment shown in FIG. 6A, high reliability can be maintained over a long period of time. In addition, it is advantageous for power saving, circuit design is improved, and it is advantageous for reduction of control load and high-speed response.

  In particular, in the ROM mode shown in FIG. 7A, it is possible to omit the writing circuit, which was essential in the conventional example. Therefore, it is further advantageous from the viewpoint of miniaturization and circuit design, and it is also possible to provide a storage device with a high security level that is difficult to alter data written in the manufacturing stage.

  Next, an example of a method for manufacturing the storage device 10 of the present embodiment will be described with reference to FIGS. 8A to 8D are cross-sectional views showing a manufacturing example of the ferroelectric capacitor 12 mounted on the memory device 10 in particular.

As shown in FIG. 8A, a silicon dioxide (SiO ₂ ) film functioning as an insulating layer 32 is formed on the surface of a silicon (Si) substrate 17 by thermal oxidation or the like, and titanium oxide is formed on the silicon dioxide film. An adhesion layer 33 made of, for example, is formed by sputtering, thermal oxidation, or the like. Then, a first electrode 13 made of platinum, iridium, iridium oxide, or a laminated structure thereof is formed on the entire surface of the adhesion layer 33 by a sputtering method, a vapor deposition method, or the like. Note that the insulating layer 32 and the adhesion layer 33 may be omitted.

  Next, as shown in FIG. 8B, the insulating layer 32, the adhesion layer 33, and the first electrode 13 are simultaneously patterned on the formed first electrode 13 using a resist (not shown) having a predetermined shape as a mask.

  Next, the ferroelectric layer 14 is stacked on the first electrode 13. The manufacturing method of the ferroelectric layer 14 is not particularly limited. For example, a MOD (Metal-Organic) that obtains a ferroelectric film made of a metal oxide by coating and drying a solution containing a metal complex and firing at a high temperature. It can be manufactured using a chemical solution method such as a Decomposition method or a sol-gel method. In addition, the ferroelectric layer 14 can be manufactured by a liquid phase method or a solid phase method such as a laser ablation method, a sputtering method, a pulse laser deposition method (PLD method), a CVD method, an aerosol deposition method, or the like. Is possible.

  Specifically, a precursor solution for forming the ferroelectric layer 14 is applied onto the first electrode 13 using a spin coating method or the like to form a precursor film (application process), and this precursor The film is heated to a predetermined temperature (for example, 150 to 200 ° C.) and dried for a predetermined time (drying step). Next, the dried precursor film is degreased by heating it to a predetermined temperature (for example, 350 to 450 ° C.) and holding it for a certain time (degreasing step), and then the precursor film is heated to a predetermined temperature (for example, 600 to 850). C.) and crystallized by holding, for example, for 1 to 10 minutes (firing step). As a result, as shown in FIG. 8C, the ferroelectric layer 14 made of a complex oxide having a perovskite structure containing, for example, Bi and Fe is formed on the first electrode 13.

  Next, as shown in FIG. 8D, a second electrode 15 as a transparent electrode (ITO) made of indium tin oxide or the like is formed on the formed ferroelectric layer 14 by sputtering or the like, and if necessary. Then, the ferroelectric layer 14 and the second electrode 15 are simultaneously patterned to form the ferroelectric capacitor 12 in which the first electrode 13, the ferroelectric layer 14 and the second electrode 15 are laminated. Further, the substrate 17 may be thinned to a predetermined thickness, or unnecessary portions may be cut by dicing or the like. If necessary, annealing can be performed at a predetermined temperature (for example, 600 to 850 ° C.). Thereby, a favorable interface between the ferroelectric layer 14 and the first electrode 13 or the second electrode 15 can be formed, and the crystallinity of the ferroelectric layer 14 can be improved.

  After that, if the manufactured ferroelectric capacitor 12, the word line WL and the bit line BL, and the transistor element 11 as necessary are packaged in combination, the memory device 10 of this embodiment can be manufactured.

(Embodiment 2)
FIG. 9 is a diagram showing a schematic configuration of a storage device according to Embodiment 2 of the present invention.
As shown in the figure, the ferroelectric capacitor 42 mounted on the memory device of this embodiment is formed by laminating a first electrode 43, a ferroelectric layer 44, and a second electrode 45, and the second electrode 45 is a transparent electrode. In this case, a pn junction 46 is formed between the ferroelectric layer 44 and the first electrode 43.
The first electrode 43, the ferroelectric layer 44, and the second electrode 45 are stacked on the substrate 17 in this order. The type of the substrate 17 is not limited and can be omitted.

  The first electrode 43 can be configured to have a function as an n-type semiconductor by adding a small amount of a predetermined Group 5 element as a donor, for example. According to this, the ferroelectric layer 44 is configured as a p-type semiconductor, and the pn junction 46 can be formed between the first electrode 43 and the ferroelectric layer 44.

  However, the first electrode 43 can also be configured to have a function as a p-type semiconductor by adding a small amount of a predetermined Group 3 element as an acceptor, for example. According to this, the ferroelectric layer 44 is configured as an n-type semiconductor, and the pn junction 46 can be formed between the first electrode 43 and the ferroelectric layer 44.

The second electrode 45 of the present embodiment can be configured as a transparent electrode as in the first embodiment, but does not necessarily have a function as an n-type semiconductor or a p-type semiconductor.
Here, the ferroelectric layer 44 is made of a material having ferroelectric characteristics and transparency. According to this, the light transmitted through the second electrode 45 further passes through the ferroelectric layer 44 and reaches the pn junction 46 formed between the ferroelectric layer 44 and the first electrode 43. .

As the ferroelectric material having transparency here, the above composition formula (1) and composition formula (2), and composite oxides thereof such as lead titanate (PbTiO ₃ ), lead zirconate titanate ( Pb (Zr, Ti) O ₃ ; PZT), potassium niobate (KNbO ₃ ), sodium niobate (NaNbO ₃ ), bismuth sodium titanate ((Bi, Na) TiO ₃ ; BNT), bismuth potassium titanate (( Bi, K) TiO ₃ ; BKT).

  When the ferroelectric layer 44 is configured as a p-type semiconductor, from the viewpoint of efficient photoelectric conversion, − (minus) charge on the side of the first electrode 43 that is an n-type semiconductor, and ferroelectric that is a p-type semiconductor. Polarization treatment can be performed in the direction in which + (plus) charge is induced on the body layer 44 side.

  In the case where the ferroelectric layer 44 is configured as an n-type semiconductor, from the viewpoint of efficient photoelectric conversion, + (plus) charge on the first electrode 43 side which is a p-type semiconductor, and a p-type semiconductor. Polarization processing can be performed in a direction in which a negative charge is induced on the ferroelectric layer 44 side.

  Although not shown, the ferroelectric capacitor 42 of this embodiment can also include the write circuit 21 and the circuit 28. In addition, the light emitting element 31 can be stacked on the second electrode 45, the first electrode 43 and the second electrode 45 can have a light emitting function, or the light emitting element 31 can be formed at a predetermined location in the package. .

  Also in the memory device described above, since the pn junction 46 is formed between the ferroelectric layer 44 and the first electrode 43, the ferroelectric capacitor 42 achieves both ferroelectric characteristics and pn junction diode characteristics. Thus, the pn junction diode characteristics can be changed by changing the polarization direction of the ferroelectric layer 44.

  Therefore, the photocurrent obtained by light irradiation can be detected, the polarization direction can be determined based on this photocurrent, and nondestructive readout without polarization reversal is possible. Furthermore, since non-destructive reading is not accompanied by polarization inversion, rewriting to hold the original data again can be omitted. Therefore, high reliability can be maintained over a long period of time.

(Example)
<Solution preparation>
A BLFMT precursor solution for forming the ferroelectric layer 14 was prepared by the following procedure. First, propionic acid was measured in a beaker, and bismuth acetate, lanthanum acetate, iron acetate, manganese acetate, and tetraisopropoxytitanium were mixed at a molar ratio of 80: 20: 96: 1: 3. Next, after stirring for 1 hour at 140 ° C. on a hot plate, the BLFMT precursor solution was prepared by adjusting to 0.3 mol / L with propionic acid.

<Production of storage device>
A silicon dioxide film as an insulating layer 32 is formed on the surface of a 6-inch silicon (Si) substrate 17 by thermal oxidation, and aluminum nitride titanium, iridium, iridium oxide, and platinum are stacked on the silicon dioxide film to form a first. An electrode 13 was formed.

  On the 1st electrode 13, said BLFMT precursor solution was apply | coated at 1500 rpm by the spin coat method. Next, after heating at 180 ° C. for 2 minutes on a hot plate, it was heated at 350 ° C. for 3 minutes. After repeating this application | coating-heating process 4 times, it heated at 650 degreeC under nitrogen for 5 minutes using the RTA (Rapid Thermal Annealing) apparatus. By repeating this series of steps twice, the ferroelectric layer 14 was formed.

A second electrode 15 made of indium tin oxide (ITO) was formed on the ferroelectric layer 14 by a sputtering method using a metal through mask. As described above, the ferroelectric capacitor 12 was produced.
The manufactured ferroelectric capacitor 12 was provided, and the memory device 10 of Example 1 was manufactured by a conventional method.

(Comparative example)
A memory device of Comparative Example 1 was produced in the same manner as in Example 1 except that the second electrode was platinum.
<PN junction diode characteristics>
About the ferroelectric capacitor mounted in the storage device of Example 1 and Comparative Example 1, “4140B” manufactured by Hewlett-Packard Company was used, and the current was shielded from the ambient light in the atmosphere (humidity 40 to 50%). The relationship (J-E Curve) between the density J (μA / cm ² ) and the voltage E (V) was determined.

  FIG. 10 shows J-E Curve. In Comparative Example 1 represented by the dotted line, the characteristics of the ohmic junction in which the current density J is directly proportional to the voltage E was observed, whereas in Example 1 represented by the solid line, in one direction, for example, in the negative voltage direction. A characteristic characteristic of a diode peculiar to a pn junction in which only a current easily flows was observed. From the diode characteristics shown in FIG. 10, it was found that in Example 1, the ferroelectric layer 14 is a p-type semiconductor, and the second electrode 45, that is, the transparent electrode (ITO) is an n-type semiconductor. .

  Further, since the ferroelectric capacitor 12 mounted in Example 1 was manufactured in the same manner as the ferroelectric capacitor mounted in Comparative Example 1 except for the second electrode 15, the pn observed in Example 1 was obtained. It has been found that the junction diode characteristics are caused by the second electrode 15 which is an n-type semiconductor.

<P-E loop measurement>
About the ferroelectric capacitor mounted in the memory | storage device of Example 1 and the comparative example 1, using the electrode pattern of (phi) = 500micrometer using "FCE-1A" by the Toyo technica company, the triangular waveform of frequency 1kHz at room temperature By applying, the relationship (P-E loop) between the polarization amount P (μC / cm ² ) and the voltage E (V) was obtained.

  FIG. 11 shows the P-E loop. Since both Comparative Example 1 represented by the dotted line and Example 1 represented by the solid line showed a hysteresis curve (hysteresis) characteristic of the ferroelectric, both are ferroelectrics, for example for polarization. It became clear that polarization caused by applying a voltage can be maintained.

  However, in Comparative Example 1 represented by the dotted line, a symmetrical hysteresis was observed, whereas in Example 1 represented by the solid line, a laterally asymmetric hysteresis was observed. This is because Example 1 has pn junction diode characteristics as described above, and thus has different electrical characteristics in the positive voltage region and the negative voltage region. From this result, in Example 1, it was clarified that the ferroelectric layer 14 has both ferroelectric characteristics and pn junction diode characteristics.

<Photoelectric conversion characteristics>
Regarding the ferroelectric capacitor 12 mounted in Example 1, “FCE-1A” manufactured by Toyo Technica Co., Ltd. and 6514 type electrometer manufactured by Keithley Co. were used, and their pn junction diode characteristics, particularly photoelectric conversion characteristics were evaluated. Specifically, the ferroelectric layer 14 was polarized by applying FCE-1A and applying a + 20V or −20V unipolar triangular waveform with a frequency of 1 kHz to an electrode pattern of φ = 500 μm at room temperature. Next, using a picoampere meter, the photocurrent was measured while repeatedly turning on and off the fluorescent lamp under a potential of 2 mV (inevitable circuit potential).

  Such measurement is performed in a downward direction in which a negative charge is induced on the ferroelectric layer 14 side which is a p-type semiconductor and a positive charge is induced on the second electrode 15 side which is the n-type semiconductor side. When the dielectric layer 14 is polarized, + (plus) charge is induced on the ferroelectric layer 14 side which is a p-type semiconductor, and-(minus) charge is induced on the second electrode 15 side which is an n-type semiconductor side. This was performed both when the ferroelectric layer 14 was polarized in the upward direction.

  FIG. 12 shows the photoelectric conversion characteristics. As shown in the figure, the photovoltaic current density was observed in Example 1. Thereby, it was found that the light of the irradiated fluorescent lamp transmitted through the second electrode 15 that was transparent in the visible light region, reached the depletion layer 30, and the internal photoelectric effect was developed.

Further, as represented by the alternate long and short dash line, the photocurrent obtained when the ferroelectric layer 14 was polarized upward was −30 nA / cm ² . On the other hand, as represented by the solid line, the photovoltaic current obtained when the ferroelectric layer 14 is polarized downward is −133 nA / cm ² , that is, compared with the measurement result represented by the alternate long and short dash line. The absolute value was as high as about 4.4 times.

  As a result, by depolarizing the ferroelectric layer 14 downward or upward, the depletion layer 30 region expands or contracts, and a difference occurs in the detected photocurrent. Therefore, polarization is performed based on the photocurrent. It turns out that the direction can be determined.

(Other embodiments)
As mentioned above, although one Embodiment of this invention was described, the fundamental structure is not limited to what was mentioned above.
The ferroelectric layer 14 of the ferroelectric capacitor 12 mounted on the storage device 10 of this embodiment can be suitably used for various optical elements. For example, when the ferroelectric layer 14 is configured as a p-type semiconductor, the second electrode (n-type semiconductor) that forms a pn junction 16 with the ferroelectric layer 14 depending on the polarization direction of the ferroelectric layer 14. A carrier concentration of 15 or the like can be controlled. As a result, the optical characteristics can be changed according to the ferroelectric characteristics of the ferroelectric layer 14.

  Optical elements that can be suitably used include optical switches, wavelength converters, optical waveguides, refractive index control elements, electronic shutter mechanisms, half mirrors, frequency control filters (low-pass filters, high-pass filters), and harmful rays such as infrared rays. Examples thereof include a blocking filter, an optical interference filter, an optical interferometer, an optical filter using a photonic crystal effect by quantum dot formation, and a light-heat conversion filter.

  Further, the ferroelectric capacitor 12 mounted on the storage device 10 of the present embodiment can be suitably used as a ferroelectric element. Examples of the ferroelectric element that can be suitably used include a ferroelectric transistor (FeFET), a ferroelectric arithmetic circuit (FeLogic), and a ferroelectric capacitor.

  In addition, the ferroelectric capacitor 12 mounted on the memory device 10 of the present embodiment exhibits good piezoelectric characteristics, and can be suitably used for a piezoelectric element. Examples of the piezoelectric element that can be suitably used include a liquid ejecting apparatus, an ultrasonic motor, an ultrasonic transmitter, an ultrasonic detector, a vibratory dust removing apparatus, a piezoelectric transformer, an acceleration sensor, a pressure sensor, a piezoelectric speaker, a piezoelectric pump, and A pressure-electric conversion apparatus is mentioned.

  Furthermore, since the ferroelectric capacitor 12 mounted on the storage device 10 of the present embodiment exhibits good pyroelectric characteristics, it can be suitably used for a pyroelectric element. Pyroelectric elements that can be suitably used include a temperature detector, a living body detector, an infrared detector, a terahertz detector, a thermal-electric converter, and the like.

  10, 10B memory device, 11 transistor element, 12, 12A, 12B, 42 ferroelectric capacitor, 13, 43 first electrode, 14, 44 ferroelectric layer, 15, 45 second electrode, 16 pn junction, 17 substrate , 20 memory cells, 21 polarization processing circuit (write circuit), 22 voltage application means, 23 switching element, 24 control means, 25, 26 wiring, 27 current detection device, 28 circuit, 30 depletion layer, 31 light emitting element, 32 insulation Layer, 33 adhesion layer

Claims (12)

In a memory device including a ferroelectric capacitor in which a first electrode, a ferroelectric layer, and a second electrode are stacked,
The memory device, wherein the second electrode is a transparent electrode, and a pn junction is formed between the ferroelectric layer and the first electrode or the second electrode. The memory device includes a plurality of memory cells having the ferroelectric capacitor, and word lines and bit lines electrically connected to the ferroelectric capacitor,
The memory device according to claim 1, wherein at least one of the plurality of memory cells has one ferroelectric capacitor arranged.   The storage device according to claim 1, further comprising a light irradiation unit capable of irradiating the pn junction with light.   The storage device according to claim 3, wherein the light irradiation unit is a light emitting element made of an organic electroluminescence material.   5. The memory device according to claim 1, further comprising a writing circuit that polarizes the induced dipole of the ferroelectric layer in a predetermined direction by applying a polarization voltage. 6.   The storage device according to claim 1, further comprising a circuit that detects a photocurrent obtained by light irradiation to the pn junction.   The storage device according to claim 6, wherein the circuit determines the polarization direction of the ferroelectric layer by comparing the detected photocurrent with a predetermined threshold value.   The memory device according to claim 1, wherein the ferroelectric layer is a p-type semiconductor.   The memory device according to claim 1, wherein the ferroelectric layer includes bismuth (Bi) and iron (Fe).   The said ferroelectric layer contains at least 1 type selected from the group which consists of lanthanum (La), manganese (Mn), and titanium (Ti), It is any one of Claims 1-9 characterized by the above-mentioned. Storage device. In a data reading method of a memory device including a ferroelectric capacitor in which a first electrode, a ferroelectric layer, and a second electrode are stacked,
As the storage device, the second electrode is a transparent electrode, and a pn junction is formed between the ferroelectric layer and the first electrode or the second electrode.
Irradiating the pn junction with light to generate a photovoltaic current;
Detecting the generated photovoltaic current;
A data reading method comprising:   12. The data read-out according to claim 11, further comprising a step of determining the polarization direction of the ferroelectric layer by detecting the photocurrent and comparing the detected photocurrent with a predetermined threshold value. Method.

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