JP2015154044A - Method for manufacturing multilayer ceramic capacitor, and multilayer ceramic capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer ceramic capacitor having a large capacity, though being small-sized.SOLUTION: A step of manufacturing a chip which includes: provided in a ceramic element body 10, first and second inner electrodes 11 and 12 which oppose each other with a ceramic portion interposed therebetween in a thickness direction; a first via hole electrode 17 which is connected to the first inner electrode 11 and spreads to a surface of the ceramic element body 10; and a second via hole electrode 18 which is connected to the second inner electrode 12 and spreads to the surface of the ceramic element body 10, each of the first and second inner electrodes 11 and 12 being exposed to first and second side surfaces and first and second end surfaces 10e and 10f, an etching step for removing exposed portions of the first and second inner electrodes 11 and 12 in the first and second side surfaces and the first and second end surfaces 10e and 10f, and a filling step for filling insulators into removal portions of the first and second inner electrodes 11 and 12, are performed.

Description

  The present invention relates to a method for manufacturing a multilayer ceramic capacitor and a multilayer ceramic capacitor.

  Conventionally, multilayer ceramic capacitors are used in various electronic devices. Patent Document 1 describes an example of a multilayer ceramic capacitor. The multilayer ceramic capacitor described in Patent Document 1 has a rectangular parallelepiped ceramic body. In the ceramic body, first internal electrodes and second internal electrodes are alternately provided along the thickness direction. The first internal electrode is exposed at the first end face of the ceramic body. A first external electrode is provided on the first end face. The first internal electrode is electrically connected to the first external electrode at the first end face. The second internal electrode is exposed at the second end face of the ceramic body. A second external electrode is provided on the second end face. The second internal electrode is electrically connected to the second external electrode at the second end face.

  In the multilayer ceramic capacitor, the first internal electrode should not be electrically connected to the second external electrode. Therefore, the first internal electrode is provided away from the second end surface. On the other hand, the second internal electrode should not be electrically connected to the first external electrode. For this reason, the second internal electrode is provided apart from the first end surface.

  Such a multilayer ceramic capacitor is manufactured as follows, for example. First, a ceramic green sheet for forming a ceramic body is created. A conductive layer for constituting the first or second internal electrode is printed on the ceramic green sheet. A ceramic green sheet, a ceramic green sheet printed with a conductive layer for constituting the first internal electrode, and a ceramic green sheet printed with a conductive layer for constituting the second internal electrode are appropriately laminated and pressed. Thus, a mother laminate is obtained. The mother laminated body is divided into a plurality of parts to produce a raw ceramic body. A ceramic body is obtained by firing a raw ceramic body. Thereafter, the multilayer ceramic capacitor can be completed by forming the first and second external electrodes.

JP 2013-227219 A

  Multilayer ceramic capacitors have a desire to be miniaturized without reducing the capacitance. In order to realize this, it is preferable to increase the area of the region where the first internal electrode and the second internal electrode face each other. Therefore, it is preferable to shorten the distance between the first internal electrode and the second end face and shorten the distance between the second internal electrode and the first end face. However, in the multilayer ceramic capacitor described in Patent Document 1, a misalignment of the conductive layer for constituting the internal electrode, a misalignment between the sheets when the ceramic green sheets are laminated, and the internal electrode when the mother laminate is pressed In consideration of the positional deviation of the first, it is difficult to sufficiently reduce the distance between the first internal electrode and the second end face and the distance between the second internal electrode and the first end face. Therefore, the multilayer ceramic capacitor described in Patent Document 1 has a problem that it is difficult to realize a large-capacity capacitor while being small.

  A main object of the present invention is to provide a monolithic ceramic capacitor having a small capacity and a large capacity.

  In the method for manufacturing a multilayer ceramic capacitor according to the present invention, first and second main surfaces extending along the length direction and the width direction, and first and second side surfaces extending along the length direction and the thickness direction, and , A ceramic body having first and second end faces extending in the width direction and the thickness direction, and the first and second ceramics provided in the ceramic body and facing each other through the ceramic portion in the thickness direction. The second internal electrode and the first internal electrode connected to the first internal electrode, the first via-hole electrode reaching the surface of the ceramic body, and the second internal electrode connected to the surface of the ceramic base body A chip having two via-hole electrodes and having the first and second internal electrodes exposed on the first and second side surfaces and the first and second end surfaces is manufactured. An etching process is performed to remove the exposed portions of the first and second side surfaces and the first and second end surfaces of the first and second internal electrodes by etching. A filling step of filling the removed portions of the first and second internal electrodes with an insulator is performed.

  In the method for manufacturing a multilayer ceramic capacitor according to the present invention, in the etching step, the exposed portions of the first and second internal electrodes may be etched by immersing the chip in an etching solution.

  In the method for manufacturing a multilayer ceramic capacitor according to the present invention, the first internal electrode may have a first opening, and the second internal electrode may have a second opening. The method for manufacturing a multilayer ceramic capacitor according to the present invention includes a first via hole that passes through the second opening and extends from the first main surface to the second main surface, and passes through the first opening. Forming a second via hole extending from the first main surface to the second main surface in the ceramic body, forming a first via hole electrode in the first via hole, and forming a second via hole in the second via hole. And a step of forming the via hole electrode.

  In the method for manufacturing a multilayer ceramic capacitor according to the present invention, after the filling step, the first external electrode connected to the first via-hole electrode and the second via-hole electrode connected to the first via-hole electrode are formed on the ceramic body. The method may further include a step of forming two external electrodes.

  In the method for manufacturing a multilayer ceramic capacitor according to the present invention, the first and second external electrodes may be formed on at least one of the first and second main surfaces, respectively.

  In the method for manufacturing a multilayer ceramic capacitor according to the present invention, the removal portion of the first and second internal electrodes may be filled with resin or ceramics in the filling step.

  A multilayer ceramic capacitor according to the present invention includes a ceramic body, first and second internal electrodes, a first via hole electrode, a second via hole electrode, and an insulating material. The ceramic body has first and second main surfaces, first and second side surfaces, and first and second end surfaces. The first and second main surfaces extend along the length direction and the width direction. The first and second side surfaces extend along the length direction and the thickness direction. The first and second end faces extend along the width direction and the thickness direction. The first and second internal electrodes are provided so as to recede from the first and second side surfaces and the first and second end surfaces in the ceramic body. The first and second internal electrodes are opposed to each other through the ceramic portion in the thickness direction. The first via hole electrode is connected to the first internal electrode. The first via hole electrode reaches the surface of the ceramic body. The second via hole electrode is connected to the second internal electrode. The second via hole electrode reaches the surface of the ceramic body. The insulating material is filled between the first and second internal electrodes, the first and second side surfaces, and the first and second end surfaces.

  In the multilayer ceramic capacitor according to the present invention, the insulating material may be made of resin or ceramics.

  According to the present invention, it is possible to provide a monolithic ceramic capacitor having a large capacity while being small.

It is a typical top view of the 1st ceramic green sheet in one embodiment of the present invention. It is a typical top view of the 2nd ceramic green sheet in one embodiment of the present invention. It is a typical top view of the mother layered product in one embodiment of the present invention. It is a typical top view of the mother layered product in one embodiment of the present invention. It is a typical top view of the chip in one embodiment of the present invention. It is a typical side view of the chip in one embodiment of the present invention. It is a typical front view of the chip in one embodiment of the present invention. It is typical sectional drawing in line VIII-VIII of FIG. It is typical sectional drawing of the chip | tip after the etching in one Embodiment of this invention. It is typical sectional drawing of the chip | tip after the etching in one Embodiment of this invention. It is a typical sectional view of a ceramic body in one embodiment of the present invention. It is a typical sectional view of a ceramic body in one embodiment of the present invention. It is a typical perspective view of the multilayer ceramic capacitor in one embodiment of the present invention. It is a typical perspective view of the multilayer ceramic capacitor in the 1st modification. It is a typical perspective view of the multilayer ceramic capacitor in the 2nd modification. It is a typical perspective view of the multilayer ceramic capacitor in the 3rd modification. It is a typical perspective view of the multilayer ceramic capacitor in the 4th modification.

  Hereinafter, an example of the preferable form which implemented this invention is demonstrated. However, the following embodiment is merely an example. The present invention is not limited to the following embodiments.

  Moreover, in each drawing referred in embodiment etc., the member which has a substantially the same function shall be referred with the same code | symbol. The drawings referred to in the embodiments and the like are schematically described. A ratio of dimensions of an object drawn in a drawing may be different from a ratio of dimensions of an actual object. The dimensional ratio of the object may be different between the drawings. The specific dimensional ratio of the object should be determined in consideration of the following description.

  In the present embodiment, a method for manufacturing the multilayer ceramic capacitor 1 shown in FIG. 13 will be described with reference to FIGS.

First, the ceramic green sheet 50 (refer FIG.1 and FIG.2) is produced. The method for producing the ceramic green sheet 50 is not particularly limited. The ceramic green sheet 50 can be produced, for example, by printing a slurry containing dielectric ceramic powder on a carrier film and drying it. Specific examples of dielectric ceramics preferably used include BaTiO ₃ , CaTiO ₃ , SrTiO ₃ , CaZrO _{3 and the} like. The slurry usually contains an organic solvent, a binder and the like in addition to the dielectric ceramic powder. For example, a Mn compound, Mg compound, Si compound, Fe compound, Cr compound, Co compound, Ni compound, rare earth compound, or the like may be added to the slurry. The application of the slurry can be performed using, for example, a die coater, a gravure coater, a micro gravure coater, or the like.

  Next, on the ceramic green sheet 50, the 1st conductive layer 51 for comprising the 1st internal electrode 11 mentioned later is formed, and the 1st ceramic green sheet 50a shown by FIG. 1 is produced. In the first conductive layer 51, a plurality of openings 51a are provided in a matrix. The opening 51a is for constituting a first opening 11a described later.

  Further, a second conductive layer 52 for constituting a second internal electrode 12 described later is formed on the ceramic green sheet 50, and the second ceramic green sheet 50b shown in FIG. 2 is produced. In the second conductive layer 52, a plurality of openings 52a are provided in a matrix. The opening 52a is for constituting a second opening 12a described later.

  Note that the first and second conductive layers 51 and 52 can be formed by applying a conductive paste containing conductive particles, for example. The conductive paste can be applied by, for example, a screen printing method, an ink jet method, a gravure printing method, or the like. Further, the first and second conductive layers 51 and 52 can be formed by, for example, a plating method.

  Next, after laminating at least one ceramic green sheet 50 on which the conductive layers 51 and 52 are not formed, the first ceramic green sheets 50a and the second ceramic green sheets 50b are alternately laminated, A mother laminate 60 shown in FIG. 3 is produced by laminating at least one ceramic green sheet 50 on which the layers 51 and 52 are not formed. You may press after laminating | stacking the ceramic green sheets 50, 50a, and 50b.

  Next, as shown in FIG. 4, a plurality of first via holes 61 and a plurality of second via holes 62 are formed in the mother stacked body 60. The first and second via holes 61 and 62 are formed so as to penetrate the mother stacked body 60 in the thickness direction. The first and second via holes 61 and 62 are formed across one main surface and the other main surface of the mother laminated body 60.

  The first via hole 61 is formed along the thickness direction so as to pass through the opening 52 a formed in the second conductive layer 52 and penetrate the first conductive layer 51. On the other hand, the second via hole 62 is formed along the thickness direction so as to pass through the opening 51 a formed in the first conductive layer 51 and penetrate the second conductive layer 52.

  The first and second via holes 61 and 62 can be formed by, for example, laser light irradiation.

  Next, a first via hole electrode 71 is formed by filling the first via hole 61 with a conductive paste containing conductive particles. For this reason, the first via hole electrode 71 is connected to the first conductive layer 51. The first via-hole electrode 71 passes through the opening 52 a formed in the second conductive layer 52 and is not connected to the second conductive layer 52.

  By filling the second via hole 62 with a conductive paste containing conductive particles, a second via hole electrode 72 is formed. For this reason, the second via hole electrode 72 is connected to the second conductive layer 52. The second via hole electrode 72 passes through the opening 51 a of the first conductive layer 51 and is not connected to the first conductive layer 51.

  Next, the mother laminated body 60 is cut along the cut lines L1 and L2. Thereby, a plurality of chips are produced from the mother laminate 60. A plurality of chips 80 shown in FIGS. 5 to 8 are manufactured by firing the chips.

  As shown in FIGS. 5 to 8, the chip 80 includes a ceramic body 10. The ceramic body 10 has a substantially rectangular parallelepiped shape. The ceramic body 10 includes first and second main faces 10a and 10b, first and second side faces 10c and 10d, and first and second end faces 10e and 10f. The first and second main surfaces 10a and 10b are arranged along the length direction L and the width direction W, respectively. The first and second side surfaces 10c and 10d are arranged along the length direction L and the thickness direction T, respectively. The first and second end faces 10e and 10f are arranged along the width direction W and the thickness direction T, respectively. The length direction, the width direction, and the thickness direction T are orthogonal to each other.

  As shown in FIGS. 6 to 8, a plurality of first internal electrodes 11 and a plurality of second internal electrodes 12 are provided inside the ceramic body 10. The first internal electrodes 11 and the second internal electrodes 12 are provided alternately in the thickness direction T. As FIG. 8 shows, the 1st internal electrode 11 and the 2nd internal electrode 12 which adjoin in the thickness direction T have opposed through the ceramic part 10g.

  Each of the plurality of first internal electrodes 11 has a first opening 11a. The first openings 11a of the plurality of first internal electrodes 11 are provided at substantially the same position in a plan view (when viewed from the thickness direction T).

  Each of the plurality of second internal electrodes 12 has a second opening 12a. The second openings 12a of the plurality of second internal electrodes 12 are provided at substantially the same position in a plan view (when viewed from the thickness direction T).

  As shown in FIGS. 6 and 7, the first and second inner electrodes 11, 12 are respectively provided on the first and second side faces 10c, 10d and the first and second end faces 10e, 10f, respectively. Exposed.

  As shown in FIG. 8, the ceramic body 10 is provided with first and second via holes 15 and 16. The first and second via holes 15 and 16 respectively penetrate the ceramic body 10 in the thickness direction T. The first and second via holes 15 and 16 are provided across the first main surface 10a and the second main surface 10b, respectively.

  The first via hole 15 penetrates the first internal electrode 11. The first via hole 15 passes through the second opening 12 a provided in the second internal electrode 12. For this reason, the first via hole 15 passes through the second opening 12a and reaches the second main surface 10b from the first main surface 10a. A first via hole electrode 17 is provided in the first via hole 15. The first via hole electrode 17 is connected to the first internal electrode 11. The first via hole electrode 17 is not connected to the second internal electrode 12.

  The second via hole 16 penetrates the second internal electrode 12. The second via hole 16 passes through the first opening 11 a provided in the first internal electrode 11. The second via hole 16 passes through the first opening 11a and extends from the first main surface 10a to the second main surface 10b. A second via hole electrode 18 is provided in the second via hole 16. The second via hole electrode 18 is connected to the second internal electrode 12. The second via hole electrode 18 is not connected to the first internal electrode 11.

  Next, the exposed portions of the first and second side surfaces 10c and 10d and the first and second end surfaces 10e and 10f of the first and second inner electrodes 11 and 12 are removed by etching (etching step). . As shown in FIGS. 9 and 10, in the chip 80a after etching, the first and second inner electrodes 11 and 12 are respectively connected to the first and second side faces 10c and 10d and the first and second side electrodes 10a and 10d. It is located at a position retracted from the end faces 10e, 10f. The first and second side surfaces 10c and 10d and the first and second end surfaces 10e and 10f of the ceramic body 10 have a removal portion 10h formed by a recess that reaches the first or second internal electrode 11 or 12. Is formed.

  The chip 80a is etched by immersing the chip 80a in an etching solution or by applying an etching solution to the first and second side faces 10c and 10d and the first and second end faces 10e and 10f of the chip 80a. It can be carried out. When the chip 80a is immersed in the etching solution, the chip 80a is immersed in the etching solution with at least a part of the first and second main surfaces 10a and 10b including the exposed portions of the via-hole electrodes 17 and 18 protected. It is preferable. Further, it is preferable to immerse the chip 80a in the etching solution while stirring the etching solution.

  In the present embodiment, an example in which the etching process of the chip 80a is performed after the chip 80 is baked will be described. However, the present invention is not limited to this. For example, the chip may be fired after the chip etching process.

  Next, as shown in FIGS. 11 and 12, an insulating material 19 is provided in the removal portion 10h by filling the removal portion 10h with an insulator made of resin, ceramics, or the like (filling step).

  In this embodiment, the insulating material 19 is provided only in the removal part 10h. That is, the insulating material 19 is provided only between the internal electrodes 11 and 12 and the side surfaces 10c and 10d or the end surfaces 10e and 10f. However, the present invention is not limited to this configuration. The insulating material 19 may be provided in the removal portion 10h and may cover at least a part of the side surfaces 10c and 10d and the end surfaces 10e and 10f. The insulating material 19 may be provided so as to cover substantially the entire side surfaces 10c and 10d and end surfaces 10e and 10f, for example.

  Next, as shown in FIG. 13, the first and second external electrodes 13 and 14 are formed on the ceramic body 10 to complete the multilayer ceramic capacitor 1. The first external electrode 13 is formed so as to cover at least the exposed portion of the first via-hole electrode 17 on the first and second main surfaces 10 a and 10 b so as to be connected to the first via-hole electrode 17. In the present embodiment, specifically, the first external electrode 13 extends from the first end face 10e to the first and second main faces 10a and 10b and the first and second side faces 10c and 10d. To form.

  The second external electrode 14 is formed so as to cover at least the exposed portion of the second via-hole electrode 18 on the first and second main surfaces 10 a and 10 b so as to be connected to the second via-hole electrode 18. Specifically, in the present embodiment, the second external electrode 14 extends from the second end face 10f to the first and second main faces 10a and 10b and the first and second side faces 10c and 10d. To form.

  The first and second external electrodes 13 and 14 can be formed by, for example, applying a conductive paste or plating. For example, a conductive electrode layer is formed and baked to form a fired electrode layer, and one or a plurality of plating layers are formed thereon to form the first and second external electrodes 13 and 14. Also good.

  If the first and second via-hole electrodes 17 and 18 are exposed on at least one of the first and second main surfaces 10a and 10b as in the present embodiment, the first and second Each of the external electrodes 13 and 14 may be formed on at least the exposed portions of the first or second via-hole electrodes 17 and 18 on the first and second main surfaces 10a and 10b. For example, as shown in FIG. 14, each of the first and second external electrodes 13 and 14 may be formed only on the first and second main surfaces 10a and 10b. Further, for example, as shown in FIG. 15, the first and second external electrodes 13 and 14 are moved from the first or second main surface 10a or 10b to the first or second end surface 10e or 10f, respectively. You may provide so that it may reach.

  In the present embodiment, the dimension along the length direction L of the ceramic body 10 can be, for example, about 0.4 mm to 1.0 mm. The dimension along the width direction W of the ceramic body 10 can be, for example, about 0.2 mm to 0.3 mm. The dimension along the thickness direction T of the ceramic body 10 can be, for example, about 0.2 mm to 0.5 mm. The dimension along the thickness direction T of the ceramic part 10g can be, for example, about 0.2 mm to 0.5 mm. The thickness of the 1st and 2nd internal electrodes 11 and 12 can be about 0.2 mm-1.0 mm, for example. The number of first and second internal electrodes 11 and 12 can be, for example, about 50 to 1000. The diameters of the via holes 15 and 16 can be, for example, about 100 μm to 150 μm. The diameter of the via-hole electrodes 17 and 18 can be set to, for example, about 30 μm to 80 μm. If the opening 11a and the opening 12a are separated from the via hole electrodes 17 and 18 by 10 μm or more, the insulation resistance can be maintained between the via hole electrodes 17 and 18, the internal electrode 11 and the internal electrode 12, but in order to increase the capacitance 30 μm to 50 μm is preferable.

  As described above, in the present embodiment, the first and second inner electrodes 11 and 12 are formed so as to be exposed to the first and second side faces 10c and 10d and the first and second end faces 10e and 10f. To do. Thereafter, the exposed portions of the first and second internal electrodes 11 and 12 are etched to remove the first and second internal electrodes 11 and 12 from the first and second side surfaces 10c and 10d and the first and second sides. It is made to recede from the end faces 10e, 10f. For this reason, the distance between the 1st internal electrode 11 and the 2nd end surface 10f and the distance between the 2nd internal electrode 12 and the 1st end surface 10e can be shortened. For example, considering the printing accuracy of the conductive paste layer on the ceramic green sheet and the positional accuracy when the ceramic green sheet is laminated, the distance between the first internal electrode and the second end surface, and the second It is not always necessary to increase the distance between the internal electrode and the first end face. For this reason, the area of the area | region where the 1st internal electrode 11 and the 2nd internal electrode 12 oppose through the ceramic part 10g can be enlarged. Therefore, it is possible to realize a monolithic ceramic capacitor 1 having a small capacity and a large capacity.

  Further, an insulating material 19 is provided in the removal portion 10 h of the first and second internal electrodes 11 and 12. By providing this insulating material 19, it is possible to effectively suppress moisture from entering the gap between the internal electrodes 11, 12 and the ceramic body 10. From the viewpoint of more effectively suppressing moisture from entering the gap between the internal electrodes 11 and 12 and the ceramic body 10, the insulating material 19 is provided in the removal portion 10h, and the side surface 10c, 10d and end surfaces 10e and 10f are preferably provided so as to cover at least a part thereof.

(Other variations)
FIG. 16 is a schematic perspective view of a multilayer ceramic capacitor according to a third modification. FIG. 17 is a schematic perspective view of the multilayer ceramic capacitor in the fourth modification.

  As shown in FIG. 16, the via holes 15 and 16 and the via hole electrodes 17 and 18 may be provided so as to be exposed at the first or second end face 10 e or 10 f. Further, as shown in FIG. 17, the via hole 15 and the via hole electrode 17 are provided so as to be exposed on the first end face 10e and the first or second side face 10c, 10d, and the via hole 16 and the via hole electrode 18 are provided. The second end face 10f and the first or second side face 10c, 10d may be exposed.

1: multilayer ceramic capacitor 10: ceramic body 10a: first main surface 10b: second main surface 10c: first side surface 10d: second side surface 10e: first end surface 10f: second end surface 10g: Ceramic part 10h: removal part 11: first internal electrode 11a: first opening 12: second internal electrode 12a: second opening 13: first external electrode 14: second external electrode 15: first Via hole 16: second via hole 17: first via hole electrode 18: second via hole electrode 19: insulating material 50: ceramic green sheet 50a: first ceramic green sheet 50b: second ceramic green sheet 51: first 1 conductive layer 52: second conductive layer 51a: opening 52: second conductive layer 52a: opening 60: mother laminated body 61: first via hole 62: second via hole 71: 1 of the via hole electrode 72: second via hole electrode 80: tip 80a: Chip L1 after etching, L2: cut line

Claims (8)

First and second main surfaces extending along the length direction and the width direction, first and second side surfaces extending along the length direction and the thickness direction, and first extending along the width direction and the thickness direction And a first ceramic body having a second end face, first and second internal electrodes that are provided in the ceramic body and are opposed to each other through a ceramic portion in a thickness direction, and the first internal body A first via-hole electrode connected to the electrode and reaching the surface of the ceramic body; and a second via-hole electrode connected to the second internal electrode and reaching the surface of the ceramic body. And producing a chip in which each of the first and second internal electrodes is exposed on each of the first and second side surfaces and the first and second end surfaces;
An etching step of removing the exposed portions of the first and second side surfaces and the first and second end surfaces of the first and second internal electrodes by etching;
A filling step of filling the removed portions of the first and second internal electrodes with an insulator;
A method for manufacturing a multilayer ceramic capacitor.   2. The method of manufacturing a multilayer ceramic capacitor according to claim 1, wherein in the etching step, the exposed portions of the first and second internal electrodes are etched by immersing the chip in an etching solution. The first internal electrode has a first opening;
The second internal electrode has a second opening;
A first via hole passing through the second opening and extending from the first main surface to the second main surface; and passing through the first opening and passing through the first main surface from the first main surface. Forming a second via hole reaching the main surface of the ceramic body,
Forming the first via hole electrode in the first via hole;
Forming the second via hole electrode in the second via hole;
The method for producing a multilayer ceramic capacitor according to claim 1, further comprising:   After the filling step, a first external electrode connected to the first via hole electrode and a second external electrode connected to the second via hole electrode are formed on the ceramic body. The manufacturing method of the multilayer ceramic capacitor as described in any one of Claims 1-3 further provided with a process.   The method for manufacturing a multilayer ceramic capacitor according to claim 4, wherein the first and second external electrodes are formed on at least one of the first and second main surfaces, respectively.   The method for manufacturing a multilayer ceramic capacitor according to claim 1, wherein in the filling step, a resin or a ceramic is filled in a removal portion of the first and second internal electrodes. First and second main surfaces extending along the length direction and the width direction, first and second side surfaces extending along the length direction and the thickness direction, and first extending along the width direction and the thickness direction And a ceramic body having a second end face;
First and second interiors that are provided in the ceramic body so as to recede from the first and second side surfaces and the first and second end surfaces, and are opposed to each other with a ceramic portion in the thickness direction. Electrodes,
A first via hole electrode connected to the first internal electrode and reaching the surface of the ceramic body;
A second via hole electrode connected to the second internal electrode and reaching the surface of the ceramic body;
An insulating material filled between the first and second internal electrodes, the first and second side surfaces, and the first and second end surfaces;
A multilayer ceramic capacitor comprising:   The multilayer ceramic capacitor according to claim 7, wherein the insulating material is made of resin or ceramics.

Images