JP2017126671A - Solid-state imaging device - Google Patents

Abstract

A solid-state imaging device capable of improving the image quality characteristics of a captured image is provided.
According to one embodiment, a solid-state imaging device is provided. The solid-state imaging device according to the embodiment includes an optical black region, a contact plug, and a voltage application unit. The optical black region is provided in the semiconductor layer and blocks light from the subject. The contact plug is electrically connected to the semiconductor layer in the optical black region. The voltage application unit applies a predetermined voltage to the contact plug.
[Selection] Figure 2

Description

  Embodiments described herein relate generally to a solid-state imaging device.

  Conventionally, a solid-state imaging device includes pixels arranged in an effective pixel area that receives light from a subject and pixels arranged in an optical black area where light from the subject is shielded. Further, the optical black (OB) region includes two types of pixels, that is, an OB with a photodiode (PD) and an OB without a PD.

  In such a solid-state imaging device, the dark current of the photodiode is calculated based on the difference between the signal read from the OB with PD arranged in the optical black region and the signal read from the OB without PD, and accordingly The dark current correction of the image signal of the pixel in the effective pixel region is performed. For this reason, it is desirable to make the dark current of the PD-less OB zero.

  However, in such a solid-state imaging device, it is difficult to completely eliminate the dark current generated in the vicinity of the photodiode in the pixel without PD, and the dark current component of the photodiode cannot be obtained accurately. The image quality characteristics were insufficient. For example, in a back-illuminated solid-state imaging device, it is difficult to reduce the dark current on the light incident surface side to zero with an OB without PD. Also in the surface irradiation type solid-state imaging device, it is difficult to make the dark current generated deep in the silicon substrate zero.

JP 2012-120076 A

  An object of one embodiment is to provide a solid-state imaging device that can improve image quality characteristics of a captured image.

  According to one embodiment, a solid-state imaging device is provided. The solid-state imaging device according to the embodiment includes an optical black region, a contact plug, and a voltage application unit. The optical black region is provided in the semiconductor layer and blocks light from the subject. The contact plug is electrically connected to the semiconductor layer in the optical black region. The voltage application unit applies a predetermined voltage to the contact plug.

FIG. 1 is a block diagram illustrating a schematic configuration of a solid-state imaging apparatus according to the embodiment. FIG. 2 is a schematic cross-sectional view of pixels arranged in an OB region with a PD with a contact plug in the pixel array according to the embodiment. FIG. 3 is a schematic diagram illustrating an example of a circuit configuration of pixels arranged in an OB region with a PD with a contact plug included in the solid-state imaging device according to the embodiment. FIG. 4 is a flowchart illustrating a processing procedure executed by the solid-state imaging device according to the embodiment. FIG. 5 is a schematic cross-sectional view of pixels arranged in a PD-less OB region with a contact plug in a pixel array according to another modification of the embodiment. FIG. 6 is a flowchart illustrating a processing procedure executed by the solid-state imaging device according to another modification of the embodiment.

  Hereinafter, a solid-state imaging device according to an embodiment will be described in detail with reference to the accompanying drawings. In addition, this invention is not limited by this embodiment.

  FIG. 1 is a block diagram illustrating a schematic configuration of a solid-state imaging device 10 according to the embodiment. As shown in FIG. 1, the solid-state imaging device 10 includes a pixel array 2, a vertical scanning circuit 11, a load circuit 12, a column ADC (Analog Digital Converter) circuit 13, a horizontal scanning circuit 14, a reference voltage generating circuit 15, and a timing control circuit. 16 and a post-processing unit 17.

  In the pixel array 2, the pixels 20 are arranged in a two-dimensional array (matrix) in the horizontal direction (row direction) RD and the vertical direction (column direction) CD. The pixel 20 corresponds to one pixel of a captured image in the pixel array 2.

  In addition, the pixel array 2 includes an effective pixel region 3 in which incident light is photoelectrically converted to generate an image signal, and an optical black region (in which an incident light is blocked to generate a dark current component that is a black level reference signal). (Hereinafter referred to as “OB region”) 4.

  In this embodiment, the pixels 20 from the first row to the second row of the pixel array 2 are the pixels 20 of the OB region 4, and the pixels 20 from the third row to the n-th row of the pixel array 2 are the effective pixel regions 3. Pixel 20. That is, the OB region 4 is disposed on one side edge portion in the pixel array 2. As another arrangement of the OB area 4 in the pixel array 2, for example, the OB area 4 may be arranged so as to surround the outer edge of the effective pixel area 3.

  The OB region 4 includes an OB region 41 with a photodiode (hereinafter referred to as “PD”) and an OB region 42 with a PD with a contact plug. The PD-equipped OB region 41 is a region where a dark current component, which is a black level reference signal generated in the pixel 20 of the OB region 41, and a noise component generated by the charge read operation are generated. The PD-attached OB region 42 with a contact plug is a region where a noise component generated by the charge read operation after the dark charge generated in the pixels 20 in the region 42 is discharged from the contact plug is generated. The structure of the pixel 20 arranged in the PD-equipped OB region 42 with a contact plug will be described later with reference to FIG.

  Further, the pixel array 2 is provided with a horizontal control line Hlin for performing read control of the pixel 20 in the horizontal direction RD, and a vertical signal line Vlin for transmitting a voltage signal read from the pixel 20 in the vertical direction CD. .

  The vertical scanning circuit 11 sequentially selects the pixels 20 to be read out in units of rows. The load circuit 12 reads a voltage signal from the pixel 20 to the vertical signal line Vlin for each column. The column ADC circuit 13 samples the voltage signal of each pixel 20 for each column by CDS (Correlated Double Sampling).

  The horizontal scanning circuit 14 sequentially selects the pixels 20 to be read out in units of columns. The reference voltage generation circuit 15 outputs the reference voltage VREF to the column ADC circuit 13. This reference voltage VREF is used for comparison with a voltage signal input to the column ADC circuit 13 via the vertical signal line Vlin.

  The timing control circuit 16 controls the timing of reading the voltage signal of each pixel 20 with respect to the vertical scanning circuit 11. The post-processing unit 17 calculates a pixel signal by performing dark current correction based on the various sampled voltage signals. Further, the post-processing unit 17 outputs (Vout) the calculated pixel signal.

  In the solid-state imaging device 10, the vertical scanning circuit 11 selects the pixels 20 in the vertical direction CD for each row, and the horizontal scanning circuit 14 selects the pixels 20 in the horizontal direction RD for each column. Then, in the load circuit 12, a source follower operation is performed with the selected pixel 20, so that a voltage signal read from the pixel 20 is sent to the column ADC circuit 13 through the vertical signal line Vlin.

  Here, the conventional solid-state imaging device includes a pixel disposed in an effective pixel region that receives light from a subject and a pixel disposed in an optical black region where light from the subject is blocked. Further, the optical black (OB) region includes two types of pixels, that is, an OB with a photodiode (PD) and an OB without a PD.

  Therefore, in such a solid-state imaging device, based on a difference between a signal read from an OB with PD arranged in an optical black region and a signal read from an OB without PD where dark current actually remains. The dark current of the photodiode is calculated, and the dark current correction of the image signal of the pixel in the effective pixel region is performed accordingly, and the image quality characteristic of the captured image is insufficient.

  Therefore, in the solid-state imaging device 10 according to the present embodiment, a PD-attached OB region 42 with a contact plug is provided in the OB region 4 instead of the PD-less OB, and the charge reading operation is performed using the pixels 20 in the region 42. The generated noise component was generated separately.

  In the solid-state imaging device 10, the voltage signal corresponding to the noise component is subtracted from the voltage signal of the pixel 20 in the PD-equipped OB region 41 to calculate an accurate dark current component, thereby improving the image quality characteristic of the captured image. Improved.

  Next, with reference to FIG. 2, the structure of the pixel 20 arranged in the OB region 42 with PD with contact plug will be described. The structure of the pixel 20 is a two-pixel one-cell structure in which one floating diffusion is shared by two photodiodes.

  FIG. 2 is a schematic cross-sectional view of the pixel 20 arranged in the PD-equipped OB region 42 with the contact plug in the pixel array 2 according to the embodiment. Here, for the sake of convenience, the description will be made with the side on which the light 9 of the pixel 20 is incident as the upper side and the side opposite to the side on which the light 9 of the pixel 20 is incident as the lower side.

  As shown in FIG. 2, the pixel 20 includes a photoelectric conversion element 40 and an element isolation region 64 in the semiconductor layer 6. Further, the pixel 20 includes an antireflection layer 8, a color filter 82, and a microlens 83 in which a light shielding film 81 is sequentially stacked on the light receiving surface of the semiconductor layer 6.

  The photoelectric conversion element 40 includes, for example, a P-type Si layer 60 doped with a P-type low concentration impurity such as boron, and an N-type high concentration such as phosphorus inside the P-type Si layer 60. This is a photodiode formed by a PN junction with an N-type Si region 61 doped with a certain amount of impurities.

  In this embodiment, the photoelectric conversion element 40 is formed on the interface of the semiconductor layer 6 opposite to the light receiving surface. That is, the photoelectric conversion element 40 is formed by forming the N-type Si region 61 serving as a charge storage region in the deep portion (lower layer portion) of the P-type Si layer 60.

  The element isolation region 64 is DTI (Deep Trench Isolation) and includes a region 62 doped with a P-type impurity embedded in a trench formed in the depth direction of the semiconductor layer 6 from the upper surface of the semiconductor layer 6. And an insulating member 63 provided on the side and upper surfaces of the region 62.

  The element isolation region 64 includes a floating diffusion 66 (hereinafter referred to as “FD”) in the wide portion 65 opposite to the light receiving surface in the region 62 doped with P-type impurities.

  The antireflection layer 8 is made of, for example, a Si nitride film, and prevents reflection of incident light that passes through the color filter 82. A light shielding film 81 is embedded in the antireflection layer 8 provided in the OB region 4. The light shielding film 81 prevents the light 9 from entering the photoelectric conversion element 40.

  That is, in the OB region 4, the light receiving surface side of the semiconductor layer 6 is covered with the light shielding film 81, and the light 9 does not enter the photoelectric conversion element 40. On the other hand, in the effective pixel region 3, the light-shielding film 81 is not covered on the light receiving surface side of the semiconductor layer 6, and the light 9 enters the photoelectric conversion element 40.

  For example, the color filter 82 transmits incident light of any one of the three primary colors of red, green, and blue. The microlens 83 is a plano-convex lens and condenses the light 9 incident on the pixel array 2 onto the photoelectric conversion element 40.

  Further, the pixel 20 includes a multilayer wiring layer 7 on the surface side opposite to the light receiving surface side of the semiconductor layer 6. The multilayer wiring layer 7 is provided on the support substrate 75. The multilayer wiring layer 7 includes an interlayer insulating film 70, a multilayer wiring 72 provided inside the interlayer insulating film 70, a contact plug 50, and a transfer gate 74.

  In this example, the multilayer wiring 72 is composed of three layers of a first wiring 72a, a second wiring 72b, and a third wiring 72c. The three layers of wirings 72a, 72b, 72c are stacked in this order on the surface of the semiconductor layer 6 opposite to the light receiving surface.

  The contact plug 50 electrically connects the first wiring 72 a and the N-type Si region 61 serving as a charge storage region of the photoelectric conversion element 40. In the contact plug 50, an insulating film 52 is formed on the inner surface of the contact hole 51 formed from the upper surface of the multilayer wiring layer 7 to the upper surface of the first wiring 72a, and tungsten or the like is formed inside the contact hole 51, for example. It is formed by embedding the conductive member 53.

  The transfer gate 74 is provided via a gate insulating film 73 at a position close to the element isolation region 64 including the FD 66 on the surface opposite to the light receiving surface side of the semiconductor layer 6. In this example, the photoelectric conversion element 40, the FD 66, the gate insulating film 73, and the transfer gate 74 constitute a transfer transistor TRS1.

  Further, the pixel 20 includes the voltage application unit 5 at an arbitrary position in the solid-state imaging device 10. The voltage application unit 5 is connected to the contact plug 50 via the first wiring 72 a of the multilayer wiring layer 7 and is a charge storage region of the photoelectric conversion element 40 by applying a predetermined positive voltage to the contact plug 50. The dark charges 90 accumulated in the N-type Si region 61 are discharged.

  Here, the dark charge 90 generated in the pixels 20 in the OB region 4 will be described. In the OB region 4, the light receiving surface side of the semiconductor layer 6 is covered by the light shielding film 81, and the light 9 does not enter the photoelectric conversion element 40, but the charges other than the charges generated by photoelectrically converting the incident light to the semiconductor layer 6. May be generated.

  Such charges are caused by damage to the semiconductor layer 6 due to polishing of the light receiving surface side of the semiconductor layer 6 by CMP (Chemical Mechanical Polishing) or formation of a trench for the element isolation region 64 by RIE (Reactive Ion Etching). This charge is generated due to a defect and is generally called dark charge 90.

  Further, the dark charges 90 generated in the semiconductor layer 6 are attracted to the N-type Si region 61 which is the charge storage region of the photoelectric conversion element 40 formed in the lower layer portion of the semiconductor layer 6, and the N-type Si region 61 is thus drawn. Accumulated in.

  In the pixel 20 disposed in the PD-attached OB region 42 with the contact plug, the dark charge 90 accumulated in the N-type Si region 61 is generated by applying a predetermined positive voltage to the contact plug 50 by the voltage application unit 5. It is discharged to the outside through the multilayer wiring layer 7.

  That is, the pixel 20 arranged in the OB region 42 is used as a reference or comparison pixel that does not include any dark charge 90 generated when the semiconductor layer 6 is damaged.

  The solid-state imaging device 10 according to the above-described embodiment includes the OB region 42 with a PD with a contact plug in the OB region 4 of the pixel array 2. The pixel 20 arranged in the region 42 is used as a reference or comparison pixel that does not include the dark charges 90 generated when the semiconductor layer 6 is damaged.

  Accordingly, the solid-state imaging device 10 can separately generate a noise component generated by the charge reading operation using the pixels 20 in the region 42.

  Therefore, the solid-state imaging device 10 accurately subtracts the voltage signal corresponding to the noise component generated by the pixel 20 of the PD with OB region 42 with the contact plug from the voltage signal of the pixel 20 of the PD with OB region 41 to accurately A dark current component can be calculated.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component, and can improve the image quality characteristics of the captured image.

  Next, a circuit configuration of the pixel 20 disposed in the OB region 42 with a PD with a contact plug will be described. FIG. 3 is a schematic diagram illustrating an example of a circuit configuration of the pixel 20 disposed in the OB region 42 with the PD with the contact plug included in the solid-state imaging device 10 according to the embodiment.

  As shown in FIG. 3, the pixel 20 includes two photodiodes PD1 and PD2, and two transfer transistors TRS1 and TRS2. Further, the pixel 20 includes a floating diffusion FD, an amplification transistor AMP, a reset transistor RST, and an address transistor ADR. Note that FIG. 2 described above shows a physical arrangement of the photodiode PD1, the transfer transistor TRS1, and the floating diffusion FD in the two-pixel one-cell structure.

  Each photodiode PD1, PD2 has an anode connected to the ground and a cathode connected to the sources of the transfer transistors TRS1, TRS2. Further, a wiring extending from the voltage application unit 5 is connected to the cathodes of the photodiodes PD1 and PD2. Each drain of the two transfer transistors TRS1, TRS2 is connected to one floating diffusion FD.

  Each transfer transistor TRS1, TRS2 performs a charge read operation from the photodiodes PD1, PD2 when a transfer signal is input to the transfer gate. The source of the reset transistor RST is connected to the floating diffusion FD.

  The drain of the reset transistor RST is connected to the power supply voltage line VDD. The reset transistor RST resets the potential of the floating diffusion FD to the potential of the power supply voltage when a reset signal is input to the gate.

  Further, the gate of the amplification transistor AMP is connected to the floating diffusion FD. The source of the amplification transistor AMP is connected to the vertical signal line Vlin, and the drain is connected to the source of the address transistor ADR. The vertical signal line Vlin is connected to the current source T. The drain of the address transistor ADR is connected to the power supply voltage line VDD.

  Next, dark current correction using the pixels 20 arranged in the above-described PD-equipped OB region 42 with a contact plug will be described. FIG. 4 is a flowchart illustrating a processing procedure executed by the solid-state imaging device 10 according to the embodiment. The flowchart shown in FIG. 4 is an example.

  As shown in FIG. 4, the solid-state imaging device 10 first exposes all the pixels 20 in the pixel array 2 at the same timing (step S101). Next, the solid-state imaging device 10 discharges the dark charges 90 (see FIG. 2) generated in the pixels 20 of the PD-equipped OB region 42 with the contact plug (step S102).

  Specifically, as shown in FIG. 2 described above, a predetermined positive voltage is applied from the voltage application unit 5 to the contact plug 5 via the first wiring 72a of the multilayer wiring layer 7, thereby the photoelectric conversion element 40. The dark charges 90 accumulated in the N-type Si region 61, which is the charge accumulation region, are discharged. Note that the discharge of the dark charge 90 (step S102) can be substituted by discharging a discharge at all timings during the period of the global shutter (step S101) by always applying a constant voltage to the contact plug 5.

  More specifically, as shown in FIG. 3 described above, first, the potentials of the transfer transistors TRS1 and TRS2, the reset transistor RST, the address transistor ADR, and the amplification transistor AMP are set to the same potential. Then, a predetermined voltage is applied to the transfer gates of the transfer transistors TRS1 and TRS2, the voltage levels of the transfer transistors TRS1 and TRS2 are fixed, and the electrical connection between the photodiodes PD1 and PD2 and the transfer transistors TRS1 and TRS2 is cut off. To do. After that, the dark charge 90 is discharged from the photodiodes PD1 and PD2 by applying a predetermined positive voltage by the voltage application unit 5.

  Thus, the solid-state imaging device 10 can reliably discharge the dark charges 90 in the photodiodes PD1 and PD2 by cutting off the electrical connection between the photodiodes PD1 and PD2 and the transfer transistors TRS1 and TRS2. .

  Subsequently, the solid-state imaging device 10 reads the signal charges of all the pixels 20 in the pixel array 2 (step S103). As a result, in the pixel 20 in the PD-attached OB region 41, the dark current component, which is a black level reference signal, and the noise component generated by the charge read operation flow into the floating diffusion 66 (FD). In addition, in the pixel 20 in the PD-equipped OB region 42 with the contact plug, a noise component generated by the charge reading operation flows into the floating diffusion 66 (FD).

  Then, the solid-state imaging device 10 calculates the voltage signal S1 corresponding to the noise component generated by the charge reading operation from the pixel 20 in the PD-equipped OB region 42 with the contact plug (Step S104).

  Further, the solid-state imaging device 10 calculates the voltage signal S2 corresponding to the mixed component of the dark current component and the noise component in the pixel 20 in the PD-equipped OB region 41.

  Next, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20 in the PD with OB region 42 with the contact plug from the voltage signal S2 of the pixel 20 in the PD with OB region 41 to obtain the dark current component. ΔT is calculated (step S105).

  Thereafter, the solid-state imaging device 10 performs dark current correction by subtracting the dark current component ΔT from the voltage signal S3 of the pixel 20 in the effective pixel region 3, and calculates the pixel signal P of the pixel 20 in the effective pixel region 3 ( Step S106). In this embodiment, the dark current correction is performed by the post-processing unit 17 (see FIG. 1).

  As described above, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20 in the PD-equipped OB region 42 with the contact plug from the voltage signal S2 of the pixel 20 in the PD-equipped OB region 41 to obtain the dark current. The component ΔT is calculated. For this reason, the solid-state imaging device 10 can calculate an accurate dark current component ΔT.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component ΔT, and can improve the image quality characteristics of the captured image.

  Next, a pixel array 2 according to another modification of the embodiment will be described. The pixel array 2 is different in that no photodiode is provided in the pixel 20 arranged in the above-described PD-equipped OB region 42 with a contact plug. Hereinafter, an optical black region in which such pixels are arranged is referred to as a PD-less OB region with a contact plug.

  FIG. 5 is a schematic cross-sectional view of the pixel 20a arranged in the PD-less OB region with a contact plug in the pixel array 2 according to another modification of the embodiment. Of the constituent elements shown in FIG. 5, the same constituent elements as those shown in FIG. 2 are designated by the same reference numerals as those shown in FIG.

  As shown in FIG. 5, the contact plug 50 in the pixel 20 a electrically connects the first wiring 72 a and the P-type Si layer 60. In the pixel 20a, an N-type Si region that becomes a charge storage region of the photodiode is not provided in the P-type Si layer 60.

  Since the pixel 20a is not doped with an N-type high-concentration impurity for forming an N-type Si region inside the P-type Si layer 60, dark charges due to crystal defects caused by ion implantation are eliminated. 90 does not occur.

  That is, since the pixel 20a suppresses the damage to the semiconductor layer 6 and reduces the amount of the dark charge 90, when a predetermined positive voltage is applied to the contact plug 50 from the voltage application unit 5. The discharge time of the dark charge 90 from the pixel 20a is shortened.

  The solid-state imaging device 10 according to the above-described embodiment includes an OB region without a PD with a contact plug in the OB region 4 of the pixel array 2. The pixel 20a disposed in such a region is used as a reference or comparison pixel that does not include the dark charge 90 generated when the semiconductor layer 6 is damaged.

  Accordingly, the solid-state imaging device 10 can separately generate a noise component generated by the charge reading operation using the pixel 20a in the PD-less OB region with a contact plug.

  Therefore, the solid-state imaging device 10 subtracts the voltage signal corresponding to the noise component generated by the pixel 20a in the OB area without PD with the contact plug from the voltage signal of the pixel 20 in the OB area 41 with PD, thereby obtaining accurate darkness. The current component can be calculated.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component, and can improve the image quality characteristics of the captured image.

  Next, dark current correction using the pixel 20a arranged in the above-described PD-less OB region with a contact plug will be described. FIG. 6 is a flowchart illustrating a processing procedure executed by the solid-state imaging device 10 according to the embodiment. Note that the flowchart shown in FIG. 6 is an example.

  As shown in FIG. 6, the solid-state imaging device 10 first exposes all the pixels 20 and 20a in the pixel array 2 at the same timing (step S201). Next, the solid-state imaging device 10 discharges the dark charge 90 (see FIG. 5) generated in the pixel 20a in the PD-less OB region with a contact plug (step S202).

  Specifically, as shown in FIG. 5 described above, a predetermined positive voltage is applied to the contact plug 50 from the voltage application unit 5 via the first wiring 72a of the multilayer wiring layer 7 to thereby form P-type Si. The dark charges 90 present in the layer 60 are discharged.

  Subsequently, the solid-state imaging device 10 reads the signal charges of all the pixels 20 and 20a in the pixel array 2 (step S203). As a result, in the pixel 20 in the PD-attached OB region 41, the dark current component, which is a black level reference signal, and the noise component generated by the charge read operation flow into the floating diffusion 66 (FD). In addition, in the pixel 20a in the PD-less OB region with a contact plug, a noise component generated by the charge reading operation flows into the floating diffusion 66 (FD).

  Then, the solid-state imaging device 10 calculates the voltage signal S1 corresponding to the noise component generated by the charge reading operation from the pixel 20a in the PD-less OB region with a contact plug (Step S204).

  Further, the solid-state imaging device 10 calculates the voltage signal S2 corresponding to the mixed component of the dark current component and the noise component in the pixel 20 in the PD-equipped OB region 41.

  Next, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20a in the OB region without PD with the contact plug from the voltage signal S2 of the pixel 20 in the OB region 41 with PD to obtain the dark current component ΔT. Is calculated (step S205).

  Thereafter, the solid-state imaging device 10 performs dark current correction by subtracting the dark current component ΔT from the voltage signal S3 of the pixel 20 in the effective pixel region 3, and calculates the pixel signal P of the pixel 20 in the effective pixel region 3 ( Step S206). In this embodiment, the dark current correction is performed by the post-processing unit 17 (see FIG. 1).

  As described above, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20a in the OB area without PD with the contact plug from the voltage signal S2 of the pixel 20 in the OB area 41 with PD, thereby obtaining a dark current component. ΔT is calculated. For this reason, the solid-state imaging device 10 can calculate an accurate dark current component ΔT.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component ΔT, and can improve the image quality characteristics of the captured image.

  In addition, the dark current correction performed by the solid-state imaging device 10 according to the above-described embodiment is performed by subtracting the dark current component ΔT from the voltage signal S3 of the pixel 20 in the effective pixel region 3 to obtain the pixel signal of the pixel 20 in the effective pixel region 3. Although P is calculated, it is not limited to this form.

  As another form, the solid-state imaging device 10 first generates a voltage signal S1 corresponding to the noise component of the pixels 20 and 20a in the OB region with or without the PD with the contact plug from the voltage signal S3 of the pixel 20 in the effective pixel region 3. Subtract. Then, the solid-state imaging device 10 calculates the pixel signal P of the pixel 20 in the effective pixel region 3 by subtracting the dark current component ΔT from the subtracted voltage signal (S3-S1).

  In such a configuration, for example, when the voltage signal S3 of the pixel 20 in the effective pixel region 3 includes a voltage signal corresponding to a noise component generated by the charge reading operation from the pixel 20, the voltage signal S3 The noise component inside can be removed.

  Therefore, the solid-state imaging device 10 can remove noise components in the voltage signal S3 of the pixel 20 in the effective pixel region 3 by using the pixels 20 and 20a in the OB region with or without the PD with the contact plug. The image quality characteristics of the captured image can be further improved.

  Moreover, although the case where the solid-state imaging device 10 according to the above-described embodiment is a back-illuminated solid-state imaging device has been described, the configuration of the contact plug 50 and the voltage application unit 5 described above is a front-illuminated solid-state imaging device. Can be adopted.

  Even in such a case, the surface irradiation type solid-state imaging device can separately generate a noise component generated by the charge reading operation using the pixels in the PD-less OB region with the contact plug.

  Therefore, such a solid-state imaging device calculates an accurate dark current component by subtracting a voltage signal corresponding to a noise component generated by a pixel in the PD-less OB region with a contact plug from a voltage signal of the pixel in the OB-region with PD. can do.

  Therefore, such a solid-state imaging device can perform dark current correction based on the calculated accurate dark current component, and can improve the image quality characteristics of the captured image.

  In the pixels 20 and 20a according to the above-described embodiments, the Si layer 60 is P-type and the Si region 61 is N-type. However, the present invention is not limited to this, and the Si layer 60 is N-type and the Si region 61 is P-type. As a mold, the pixels 20 and 20a may be configured.

  In the above-described embodiment, the two-pixel one-cell structure pixels 20 and 20a have been described as an example, but the same applies to pixels having other structures such as a one-pixel one-cell structure or a four-pixel one-cell structure. .

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 10 Solid-state imaging device, 11 Vertical scanning circuit, 12 Load circuit, 13 Column ADC circuit, 14 Horizontal scanning circuit, 15 Reference voltage generation circuit, 16 Timing control circuit, 17 Subsequent processing part, 2 pixel array, 20 pixels, 3 Effective pixels Region, 4 optical black region, 40 photoelectric conversion element, 41 OB region with PD, 42 OB region with PD with contact plug, 5 voltage application unit, 50 contact plug, 51 contact hole, 52 insulating film, 53 conductive member, 6 Semiconductor layer, 60 P-type Si layer, 61 N-type Si region, 62 P-type impurity doped region, 63 insulating member, 64 element isolation region, 65 wide portion, 66 floating diffusion, 7 multilayer wiring layer, 70 Interlayer insulation film, 7 Multilayer wiring, 73 Gate insulating film, 74 Transfer gate, 75 Support substrate, 8 Antireflection layer, 81 Light shielding film, 82 Color filter, 83 Micro lens, 9 Light, 90 Dark charge, CD vertical direction, RD horizontal direction, Hlin horizontal Control line, Vlin vertical signal line, PD1, PD2 photodiode, TRS1, TRS2 transfer transistor, RST reset transistor, AMP amplification transistor, T current source

Claims (6)

An optical black region provided in the semiconductor layer and shielded from light from the subject;
A contact plug electrically connected to the semiconductor layer in the optical black region;
A solid-state imaging device comprising: a voltage applying unit that applies a predetermined voltage to the contact plug. The contact plug is
The solid-state imaging device according to claim 1, wherein charges generated in the semiconductor layer in the optical black region are discharged. The semiconductor layer is
A plurality of photoelectric conversion elements having a charge storage region;
The contact plug is
The solid-state imaging device according to claim 1, wherein the solid-state imaging device is electrically connected to the charge storage region of the plurality of photoelectric conversion elements. A wiring layer is provided on the side opposite to the light receiving surface side of the semiconductor layer,
The contact plug is
The solid-state imaging device according to claim 1, wherein the wiring of the wiring layer and the semiconductor layer are electrically connected. The optical black region is
The solid-state imaging device according to claim 1, wherein the solid-state imaging device is provided on an outer edge of an effective pixel region that receives light from a subject. Comprising a read transistor for reading charges from the semiconductor layer in the optical black region;
The read transistor is
The solid-state imaging device according to claim 1, wherein the voltage level is fixed by applying a predetermined voltage to the gate.

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