JP2019221111A - Rectifier circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a rectifier circuit capable of rectifying electric power having a wide range of input levels. SOLUTION: A plurality of input-side transmission lines connected in series between an input unit to which a high-frequency input power is input and a reference potential, and a plurality of input-side transmission lines between the plurality of input-side transmission lines. Among the connection points, a plurality of diodes having an anode connected to one corresponding connection point, an output node connected to the cathode of each of the plurality of diodes, and an output capacitor connected between the reference potential. And with precursors multiple diodes have different sizes from each other, a rectifying circuit. For example, a plurality of output-side transmission lines connected between the cathodes of the plurality of diodes and the output node are provided, and the plurality of output-side transmission lines are odd-numbered multiples of the half wavelength of the input power. Has a length. [Selection diagram] FIG. 4

Description

  The present invention relates to a rectifier circuit.

  Conventionally, a rectifier circuit that rectifies high-frequency input power is known (for example, see Patent Document 1).

JP 2006-345637 A

  However, in the prior art, the input level of rectifiable input power is limited to a specific power range. For example, as shown in FIG. 6 of Patent Document 1, a relatively high output power can be obtained for a specific input level power (0 dBm (1 mW)), but for other input level powers. Sufficient rectification characteristics cannot be obtained.

  Thus, the present disclosure provides a rectifier circuit that can rectify power over a wide range of input levels.

The present disclosure
An input unit to which high-frequency input power is input, and a plurality of input-side transmission lines connected in series between a reference potential and
Among a plurality of connection points between each of the plurality of input-side transmission lines, a plurality of diodes whose anodes are connected to a corresponding one of the connection points,
An output node connected to each cathode of the plurality of diodes, and an output capacitor connected between the reference potential,
The precursor diodes provide rectifier circuits having different sizes from each other.

  According to the rectifier circuit according to the present disclosure, power of a wide range of input levels can be rectified.

FIG. 3 is a circuit diagram illustrating a configuration of a rectifier circuit according to a comparative example. FIG. 6 is a diagram illustrating an example of detection characteristics of a rectifier circuit according to a comparative example. FIG. 9 is a diagram illustrating an example of detection characteristics obtained by a simulation of a rectifier circuit according to a comparative example. FIG. 2 is a circuit diagram illustrating a configuration of a rectifier circuit according to the first embodiment. FIG. 4 is a circuit diagram illustrating a configuration of a rectifier circuit according to a second embodiment. FIG. 9 is a circuit diagram illustrating a configuration of a rectifier circuit according to a third embodiment. FIG. 9 is a circuit diagram illustrating a configuration of a rectifier circuit according to a fourth embodiment. 5 is a flowchart illustrating an operation flow of the rectifier circuit according to the embodiment. FIG. 9 is a diagram illustrating an example of detection characteristics obtained by a simulation of the rectifier circuit according to the second embodiment.

  First, a rectifier circuit according to a comparative example will be described for comparison with the rectifier circuit according to the present embodiment.

  FIG. 1 is a circuit diagram illustrating a configuration of a rectifier circuit according to a comparative example. The rectifier circuit 10 shown in FIG. 1 converts high-frequency input power input from the input node 1 to DC power and outputs DC power from the output node 7 to an RF (Radio Frequency) -DC (Direct Current) converter. It is. The rectifier circuit 10 includes a DC cut input capacitor 2, a matching circuit 3, a diode 4, an RF choke 5, and a charge storage capacitor 6. The matching circuit 3 includes a transmission line 3a having an inductance component (may be an inductance element) and a capacitor 3b. The capacitor 3b has one end connected between the input capacitor 2 and the transmission line 3a, and the other end connected to the ground 8. The diode 4 has a cathode connected between the transmission line 3 a and the RF choke 5, and an anode connected to the ground 8. The capacitor 6 has one end connected between the RF choke 5 and the output node 7 and the other end connected to the ground 8.

  FIG. 2 shows an example of the detection characteristic of the rectifier circuit 10 shown in FIG. When the input level of the high-frequency input power input from the input node 1 increases to some extent, the DC output power output from the output node 7 saturates or decreases as shown in FIG. This is because if the voltage of the input power exceeds the breakdown voltage of the diode 4, sufficient rectification characteristics cannot be obtained.

  FIG. 3 is a diagram illustrating an example of detection characteristics obtained by a simulation of the rectifier circuit 10 illustrated in FIG. Represents According to this simulation result, although the highest output voltage is obtained for input power of −25 dBm (3 μW), the output voltage obtained for input power of other input levels is greatly reduced. Would.

  The rectifier circuit is preferably used for power generation using radio waves around the user, for example, radio waves radiated for a mobile phone or a wireless LAN (Local Area Network), so-called environmental power generation. Radio waves of 1 μW to 1 mW are output near the wireless LAN base unit. In order to obtain DC power from weak radio waves such as environmental radio waves, power conversion circuits (rectifier circuits) are expected to have high conversion efficiency for input powers of 1 μW to 1 mW. That is, in order to convert high-frequency power having a wide input level of about 1 μW to 1 mW into DC power, a rectifier circuit capable of converting input power having a wide dynamic range is desired. However, in the rectifier circuit 10 shown in FIG. 1, the level of input power that can be rectified while securing high conversion efficiency is limited to a specific power range.

  On the other hand, the rectifier circuit of the present embodiment has a configuration capable of converting high-frequency power of various input levels into DC power and supplying a DC voltage to a predetermined load. Specific examples of the electronic device including the rectifier circuit of the present embodiment include an RF tag and an IoT (Internet of Things) device, but such an electronic device is not limited to these devices. Next, the rectifier circuit of the present embodiment will be described.

FIG. 4 is a circuit diagram illustrating the configuration of the rectifier circuit according to the first embodiment. The rectifier circuit 101 illustrated in FIG. 4 is an RF-DC converter that converts high-frequency input power Pin input from the input node 61 into DC power and outputs the DC output power Pout from the output node 62. Rectifier circuit 101 includes an input capacitor 11, a plurality of input transmission line _{20 1 ~20 N +} 1, the choke element 30, a plurality of diodes ₄₀ 1 to 40 _N, a plurality of output transmission line ₅₀ 1 to 50 _N, and an output capacitor 12 Prepare. Hereinafter, the input side transmission line is also referred to as “input line”, and the output side transmission line is also referred to as “output line”. N represents an integer of 2 or more.

The high-frequency input power Pin is input to one end of the input capacitor 11. The input capacitor 11 is connected between the input node 61 and _one ends of the plurality of input lines 201 to 20N _{+ 1} . For example, input power Pin in a microwave or millimeter wave frequency band is input to input node 61. Input capacitor 11 has one end the other end is connected to the input node 61 is connected to the input line 20 ₁ of the first stage. The input node 61 and the input capacitor 11 are examples of an input unit to which high-frequency input power is input. By providing the input capacitor 11, a DC component input from the input node 61 can be effectively cut. By connecting an antenna to the outside of the input node 61, a so-called rectenna circuit is formed.

A plurality of input lines _{20 1 ~20 N +} 1 are connected in series to the other end of the input capacitor 11. Some or all of the input lines _{20 1} ~20 N + 1 is a transmission line having an inductance component may be a transmission line inductance element is inserted in series.

The choke element 30 is an example of an RF choke, and is connected between the ends of the plurality of input lines _{20N + 1} and the reference potential 63. More specifically, the choke element 30 has one end connected to the input line _{20N + 1} and the other end connected to the reference potential 63. The reference potential 63 is, for example, a ground. Inductance of the choke element 30 is sufficiently larger than the inductance of the plurality of input lines _{20 1 ~20 N +} 1. Choke element 30 is inserted in order to fix the plurality of input lines _{20 1 ~20 N +} 1 potential to galvanically reference potential 63.

The plurality of input lines _{20 1 ~20 N +} 1 each between, there are a plurality of connection points ₂₁ 1 through 21 _N. Each anode of the plurality of diodes 40 ₁ to 40 _N is connected to a corresponding one of the plurality of connection points 21 _{1 to} 21 _N. Diode 40 ₁ of the anode of the first stage counted from the input capacitor 11 side, an input capacitor 11 first stage counted from the side of the input line 20 ₁ and counting from the input capacitor 11 side second stage input line 20 ₂ It is connected to a connection point 21 ₁ between. That is, for all _k , the anode of the _k-th diode 40 _k from the input capacitor 11 side is the k-th input line 20 _k from the input capacitor 11 side and the (k + 1) -th input line from the input capacitor 11 side. 20 _{k + 1} and is connected to a connection point 21 _k . k represents an integer of 1 or more and (N-1) or less.

One end of each of a plurality of output lines ₅₀ 1 to 50 _N, of the cathode of each of the plurality of diodes ₄₀ 1 to 40 _N, is connected to the cathode of the corresponding one. Input capacitor 11 of the first stage counted from the side output line 50 _1, counted from the input capacitor 11 side are connected to the cathode of the diode 40 ₁ of the first stage. That is, for all i, the output line 50 _i at the i-th stage from the input capacitor 11 side is connected to the cathode of the diode 40 _{i at} the i-th stage from the input capacitor 11 side. i represents an integer of 1 or more and N or less.

The output capacitor 12 is an output capacitance connected between an output node 62 connected to each cathode of the plurality of diodes 40 ₁ to 40 _N and a reference potential 63. In the present embodiment, the output capacitor 12, an output node 62 connected to a plurality of output lines 50 ₁ to 50 _N of the respective other end, is connected between the reference potential 63. The output capacitor 12 has one end connected to the output node 62 and the other end connected to the reference potential 63. The output capacitor 12, at least a charge flowing from one diode of the plurality of diodes 40 ₁ to 40 _N are accumulated.

  Here, the rectifier circuit rectifies using the nonlinearity of the diode. Therefore, if the size of the diode is small, input power at a small voltage level can be converted into DC power with high conversion efficiency. However, in a diode having a small size, when the voltage level of the input power increases, the peak voltage applied to the diode in the forward direction becomes too large with respect to the forward voltage Vf, so that the conversion efficiency decreases. The forward voltage Vf indicates a rising voltage at which a forward current starts rising in the IV characteristics (current-voltage characteristics) of the diode.

Therefore, a plurality of diodes ₄₀ 1 to 40 _N in this embodiment have different sizes from each other. If the size of the diode changes, the forward voltage Vf also changes. Therefore, even when high voltage level of the input power, since it rectified using rectifying characteristics of the larger diode size of the plurality of diodes 40 ₁ to 40 _N, it is possible to suppress a decrease in conversion efficiency . Therefore, according to the rectifier circuit 101 of the present embodiment, by using diodes of various sizes, a wide dynamic range can be realized with respect to the voltage level of the input power, and the input power Pin of a wide range of voltage levels can be realized. Can be rectified.

For example, for all k, from the input capacitor 11 side of the plurality of diodes ₄₀ 1 to 40 _N of the k-th stage diode, the input capacitor 11 side of the plurality of diodes _{40 1 ~40 N (k + 1} ) -th stage It has a smaller size than a diode. k represents an integer of 1 or more and (N-1) or less. Thus, for example, a relatively small input power Pin voltage level, can be rectified by the high conversion efficiency by diode 40 ₁ of the first stage, the voltage level of the input power Pin increases, the input power Pin is the second-stage diode it rectified while maintaining high conversion efficiency by 40 _2. When the voltage level of the input power Pin further increases, rectification is performed by the third and subsequent diodes. Therefore, the voltage range of the input power Pin that can be rectified can be expanded while maintaining high conversion efficiency.

Output line ₅₀ 1 to 50 _N, respectively, preferably has a line length of an odd multiple of a half wavelength of the high frequency of the input power Pin. That is, the output lines 50 ₁ to 50 _N, when the wavelength of the high frequency of the input power Pin and lambda, preferably has a line length of an odd multiple of one length of 2 minutes (= lambda / 2) of the wavelength lambda . For example, output line ₅₀ 1 to 50 _N are points to suppress the loss, it is preferable to have a line length of both lambda / 2.

The other end of each of the output lines 50 ₁ to 50 _N, since it is connected to the reference potential 63 via an output capacitor 12, the high frequency will be short-circuited to the reference potential 63. When the output line ₅₀ 1 to 50 _N have a line length of an odd multiple of half the wavelength of the input power Pin, standing waves are generated to each of the output lines ₅₀ 1 to 50 _N. Thus, output line ₅₀ 1 to 50 _N of respective end (i.e., the diode ₄₀ 1 to 40 _N cathodes of respective) also will be short-circuited to the reference potential 63 to the high frequency. Therefore, the transmission lines on the input side, the ladder circuit of N LC transmission line by an inductance L _i and capacitance Cd _i are connected in series is formed. L _i represents the inductance of the input line 20 _i of the i-th stage, Cd _i represents the capacitance seen on the anode side of the diode 40 _i of the i-th stage from the i-th stage of the connection point 21 _i. These ratios of the square root _{(= √ (Cd i / L} i)) is the characteristic impedance of each input line. Since a ladder circuit including a plurality of LC transmission lines is formed, broadband transmission characteristics can be obtained.

Also, from a plurality of input lines ₂₀ 1 _{to 20} input capacitor 11 side of the _{N + 1} and inductance of k-th input line is, from the input capacitor 11 side of the plurality of diodes ₄₀ 1 to 40 _N of the k-th stage diode The ratio with the capacity is _{defined as Ak} . Further, an inductance having a plurality of input lines _{20 1 ~20 N +} 1 of the input capacitor 11 side (k + 1) th stage of the input line, the input capacitor 11 side of the plurality of diodes ₄₀ 1 to 40 _N (k + 1) stage The ratio with the capacitance of the eye diode is assumed to be _{Ak + 1} . k is an integer of 1 or more and (N-1) or less. At this time, if A _k−1 and A _k are constant for all k, the characteristic impedances of the LC transmission lines are uniform, so that the loss is reduced and the conversion efficiency from input power Pin to DC power is improved. I do.

Since the size of the diode varies the capacitance Cd _i also changes, the inductance L _i may not be equal to each other, so that the the A _k-1 and A _k becomes constant to different values inductance L _i You may change it. For example, the diode size is set to increase as the number of stages increases, but if A _k−1 and A _k are constant, the diode size is not set to increase as the number of stages increases. Is also good.

  FIG. 5 is a circuit diagram illustrating the configuration of the rectifier circuit 102 according to the second embodiment. Descriptions of the same configurations and effects as those of the above-described embodiment will be omitted by using the above description. When excessive power is applied to the diode, the output voltage Vout output from the output node 62 may decrease as shown in the simulation result of FIG. This is because the voltage applied in the reverse direction to the diode by the input of the high-frequency input power Pin exceeds the breakdown voltage of the diode, so that sufficient rectification characteristics cannot be obtained.

Therefore, the rectifier circuit 102 shown in FIG. 5, in accordance with the output voltage Vout of the output node 62 includes a disconnect mechanism 90 to separate the at least one diode of the plurality of diodes ₄₀ 1 to 40 _N from the output node 62. Disconnecting mechanism 90 according to the voltage drop of the output node 62, disconnecting the plurality of diodes ₄₀ 1 to 40 _N from the output node 62 in order from the smaller size.

The rectifier circuit of FIG. 5 102, as such disconnection mechanism 90 includes a plurality of switches ₇₀ 1 to 70 _N and the control circuit 80.

A plurality of switches ₇₀ 1 to 70 _N is an element that is between the cathode of each of the plurality of diodes ₄₀ 1 to 40 _N. In the present embodiment, a plurality of switches ₇₀ 1 to 70 _N is between the plurality of output transmission line ₅₀ 1 to 50 _N of the respective other end. For example, the switch 70 ₁ is in between the other end of the output line 50 ₁ and the other end of the output line 50 _2. That is, for all k, the switch 70 _k is between the other end of the _k-th output line 50 _{k and} the other end of the (k + 1) -th output line 50 _{k + 1} . k represents an integer of 1 or more and (N-1) or less. Specific examples of the switch ₇₀ 1 to 70 _N, include transistors such as FET (Field Effect Transistor).

Control circuit 80, in response to the voltage drop of the output node 62, to disconnect the output node 62 a plurality of diodes ₄₀ 1 to 40 _N from the smaller size in order to control the plurality of switches ₇₀ 1 to 70 _N . More specifically, the control circuit 80, when detecting the voltage drop of the output node 62, to decouple the plurality of diodes 40 ₁ to 40 _N from the output node 62 from the smaller to the order of size, the plurality of switches 70 ₁ - 70 _N are controlled in order from on to off.

  The function of the control circuit 80 is realized, for example, by the processor operating according to the control program read from the memory. The control program defines a procedure for causing the processor to execute the processing performed by the control circuit 80. Specific examples of the control circuit 80 including the processor include a microcomputer, an ASIC (Application Specific Integrated Circuit), and the like.

FIG. 6 is a circuit diagram illustrating the configuration of the rectifier circuit 103 according to the third embodiment. Descriptions of the same configurations and effects as those of the above-described embodiment will be omitted by using the above description. Rectifier circuit 103 shown in FIG. 6, of the output line ₅₀ 1 to 50 _N of each of the other end, a plurality of capacitors ₁₂ 1 to 12 _N which one end to a corresponding one of the other end is connected. Thus, the voltage output from the cathode of each of diodes ₄₀ 1 to 40 _N is stabilized.

FIG. 7 is a circuit diagram illustrating the configuration of the rectifier circuit 104 according to the fourth embodiment. Descriptions of the same configurations and effects as those of the above-described embodiment will be omitted by using the above description. Rectifier circuit 104 shown in FIG. 7, in accordance with the output voltage Vout of the output node 62 includes a disconnect mechanism 90 to separate the at least one diode of the plurality of diodes ₄₀ 1 to 40 _N from the output node 62. Disconnecting mechanism 90 according to the voltage drop of the output node 62, disconnecting the plurality of diodes ₄₀ 1 to 40 _N from the output node 62 in order from the smaller size.

Rectifier circuit of FIG. 7 104, as such disconnection mechanism 90 includes a plurality of switches ₇₀ 1 to 70 _N and the control circuit 80.

A plurality of switches ₇₀ 1 to 70 _N is an element which is in between the cathode of each of the plurality of diodes ₄₀ 1 to 40 _N, and the output node 62. In the present embodiment, the plurality of switches ₇₀ 1 to 70 _N, is the other end of each of a plurality of output lines ₅₀ 1 to 50 _N, between the output node 62. For example, the switch 70 ₁ is in between the other end and the output node 62 of the output line 50 _1. That is, for all i, the switch 70 _i is between the other end of the _i-th output line 50 _i and the output node 62. i represents an integer of 1 or more and N or less.

Control circuit 80, in response to the voltage drop of the output node 62, to disconnect the output node 62 a plurality of diodes ₄₀ 1 to 40 _N from the smaller size in order to control the plurality of switches ₇₀ 1 to 70 _N . More specifically, the control circuit 80, when detecting the voltage drop of the output node 62, to decouple the plurality of diodes 40 ₁ to 40 _N from the output node 62 from the smaller to the order of size, the plurality of switches 70 ₁ - 70 _N are controlled in order from on to off.

FIG. 8 is a flowchart illustrating the operation of the rectifier circuit of the present embodiment. The processing shown in FIG. 8 is executed by the control circuit 80. In the initial state, the switch ₇₀ 1 to 70 _N are all turned on.

In step S1-1, the control circuit 80 determines whether or not a state where the output voltage Vout has dropped below the threshold voltage Vth is detected. When the control circuit 80 determines that the state where the output voltage Vout has dropped below the threshold voltage Vth is not detected, the control circuit 80 ends this processing. On the other hand, the control circuit 80, the output voltage Vout when the state of being lower than the threshold voltage Vth is determined to have been detected, to turn off the switch 70 ₁ of the first stage (step S2-1). Accordingly, the diode 40 ₁ which is presumed to cause a decrease in the output voltage Vout is disconnected from the output node 62.

The control circuit 80 determines whether or not after the first stage of the switch 70 ₁ off, state in which the output voltage Vout becomes lower than the threshold voltage Vth is detected (step S1-2). When the control circuit 80 determines that the state where the output voltage Vout has dropped below the threshold voltage Vth is not detected, the control circuit 80 ends this processing. On the other hand, the control circuit 80, when a state where the output voltage Vout becomes lower than the threshold voltage Vth is determined to have been detected, the second stage switch 70 ₂ is also turned off (step S2-2). Accordingly, the diode 40 ₂ which is presumed to cause a decrease in the output voltage Vout is disconnected from the output node 62.

The switches are sequentially turned off until the state in which the output voltage Vout has dropped below the threshold voltage Vth is no longer detected (steps S1-N, S2-N). Thus, disconnecting mechanism 90, until the voltage drop of the output node 62 turns to voltage rise, disconnected from the output node 62 a plurality of diodes 40 ₁ to 40 _N in ascending order of size.

FIG. 9 is a diagram illustrating an example of detection characteristics obtained by a simulation of the rectifier circuit 102 (see FIG. 5) according to the second embodiment, and illustrates a detection voltage (from the output node 62) with respect to an input power Pin having a frequency of 2.45 GHz. DC output voltage Vout). In this simulation result, the output of the diode 40 ₁ is saturated with -21 dBm, diode 40 _2, saturated with -19 dBm. As described above, the magnitude of the input power at which the voltage is saturated varies depending on the size of the diode.

Therefore, the control circuit 80, the output voltage Vout or the output power Pout is output from the output node 62 to control the on-off switch ₇₀ 1 to 70 _N so as to maximize. As a result, as shown by the dashed line in FIG. 9, even when the input power Pin increases, the output voltage Vout can be maintained at a high state.

  As described above, the rectifier circuit has been described with the embodiment, but the present invention is not limited to the above embodiment. Various modifications and improvements, such as combinations and replacements with some or all of the other embodiments, are possible within the scope of the present invention.

Regarding the above embodiments, the following supplementary notes are further disclosed.
(Appendix 1)
An input unit to which high-frequency input power is input, and a plurality of input-side transmission lines connected in series between a reference potential and
Among a plurality of connection points between each of the plurality of input-side transmission lines, a plurality of diodes whose anodes are connected to a corresponding one of the connection points,
An output node connected to each cathode of the plurality of diodes, and an output capacitor connected between the reference potential,
A rectifier circuit, wherein the plurality of precursor diodes have different sizes from each other.
(Appendix 2)
A plurality of output-side transmission lines connected between respective cathodes of the plurality of diodes and the output node,
The rectifier circuit according to claim 1, wherein the plurality of output-side transmission lines have a line length that is an odd multiple of a half wavelength of the input power.
(Appendix 3)
The ratio of the inductance of the k-th input transmission line from the input unit side of the plurality of input transmission lines to the capacitance of the k-th diode from the input unit side of the plurality of diodes. Is the inductance of the (k + 1) -th input-side transmission line from the input unit side of the plurality of input-side transmission lines, and the (k + 1) -th stage of the plurality of diodes from the input unit side. The rectifier circuit according to claim 2, wherein a ratio of the diode to the capacitance is constant.
(Appendix 4)
Supplementary notes 1 to 3 in which the k-th diode from the input unit side of the plurality of diodes has a smaller size than the (k + 1) -th diode from the input unit side among the plurality of diodes. The rectifier circuit according to any one of the preceding claims.
(Appendix 5)
A plurality of switches between respective cathodes of the plurality of diodes;
The rectifier circuit according to claim 4, further comprising: a control circuit that controls the plurality of switches so as to disconnect the plurality of diodes from the output node in order from a smaller size in response to a voltage drop of the output node. .
(Appendix 6)
A plurality of switches between the respective cathodes of the plurality of diodes and the output node;
The rectifier circuit according to claim 4, further comprising: a control circuit that controls the plurality of switches so as to disconnect the plurality of diodes from the output node in order from a smaller size in response to a voltage drop of the output node. .
(Appendix 7)
5. The rectifier circuit according to claim 1, further comprising a disconnection mechanism that disconnects at least one of the plurality of diodes from the output node in accordance with a voltage of the output node. 6.
(Appendix 8)
The rectifier circuit according to claim 7, wherein the disconnection mechanism disconnects the plurality of diodes from the output node in order from a smaller size in accordance with a voltage drop of the output node.
(Appendix 9)
The input unit includes an input capacitor to which the input power is input at one end,
The rectifier circuit according to any one of supplementary notes 1 to 8, wherein the plurality of input-side transmission lines are connected in series to the other end of the input capacitor.
(Appendix 10)
The rectifier circuit according to any one of supplementary notes 1 to 9, wherein ends of the plurality of input-side transmission lines are connected to the reference potential via a choke element.
(Appendix 11)
A plurality of input-side transmission lines connected in series to an input unit to which high-frequency input power is input;
A choke element connected between a terminus of the plurality of input-side transmission lines and a reference potential;
Among a plurality of connection points between each of the plurality of input-side transmission lines, a plurality of diodes whose anodes are connected to a corresponding one of the connection points,
A plurality of output-side transmission lines each having one end connected to a corresponding one of the cathodes of the plurality of diodes;
An output node connected to the other end of each of the plurality of output-side transmission lines, and an output capacitor connected between the reference potential,
A rectifier circuit, wherein the plurality of precursor diodes have different sizes from each other.
(Appendix 12)
The rectifier circuit according to claim 11, wherein the plurality of output-side transmission lines have a line length that is an odd multiple of a half wavelength of the input power.
(Appendix 13)
The ratio of the inductance of the k-th input transmission line from the input unit side of the plurality of input transmission lines to the capacitance of the k-th diode from the input unit side of the plurality of diodes. Is the inductance of the (k + 1) -th input-side transmission line from the input unit side of the plurality of input-side transmission lines, and the (k + 1) -th stage of the plurality of diodes from the input unit side. 13. The rectifier circuit according to claim 12, wherein a ratio of the diode to the capacitance is constant.
(Appendix 14)
Supplementary notes 11 to 13 wherein the k-th diode from the input unit side of the plurality of diodes has a smaller size than the (k + 1) -th diode from the input unit side of the plurality of diodes. The rectifier circuit according to any one of the preceding claims.
(Appendix 15)
A plurality of switches between the other ends of the plurality of output-side transmission lines,
The rectifier circuit according to claim 14, further comprising: a control circuit configured to control the plurality of switches so as to disconnect the plurality of diodes from the output node in ascending order of size according to a voltage drop of the output node. .
(Appendix 16)
The other end of each of the plurality of output-side transmission lines, a plurality of switches between the output node,
The rectifier circuit according to claim 14, further comprising: a control circuit configured to control the plurality of switches so as to disconnect the plurality of diodes from the output node in ascending order of size according to a voltage drop of the output node. .
(Appendix 17)
The rectifier circuit according to any one of supplementary notes 11 to 14, further comprising a disconnection mechanism that disconnects at least one of the plurality of diodes from the output node according to a voltage of the output node.
(Appendix 18)
The rectifier circuit according to claim 17, wherein the disconnection mechanism disconnects the plurality of diodes from the output node in order from a smaller size in accordance with a voltage drop of the output node.
(Appendix 19)
The input unit includes an input capacitor to which the input power is input at one end,
The rectifier circuit according to any one of supplementary notes 11 to 18, wherein the plurality of input-side transmission lines are connected in series to the other end of the input capacitor.
(Appendix 20)
19. The rectifier circuit according to claim 7, wherein the disconnection mechanism disconnects the plurality of diodes from the output node until a voltage drop at the output node turns into a voltage increase.
(Appendix 21)
The diode of the k-th stage from the input unit side of the plurality of diodes has a smaller size than the diodes of the (k + 1) -th and subsequent stages from the input unit side of the plurality of diodes. The rectifier circuit according to any one of 1 to 3, and 11 to 13.

10 rectifying circuit 11 input capacitor 12 the output capacitor _{20 1 ~20 N +} 1 input side transmission line _{21 1 ~21 N +} 1 connection point 30 the choke element ₄₀ 1 to 40 _N diode ₅₀ 1 to 50 _N output side transmission line 61 input node 62 output node 63 Reference potentials 70 ₁ to 70 _N switch 80 Control circuit 90 Separation mechanism 101 to 104 Rectifier circuit

Claims (10)

An input unit to which high-frequency input power is input, and a plurality of input-side transmission lines connected in series between a reference potential and
Among a plurality of connection points between each of the plurality of input-side transmission lines, a plurality of diodes whose anodes are connected to a corresponding one of the connection points,
An output node connected to each cathode of the plurality of diodes, and an output capacitor connected between the reference potential,
A rectifier circuit, wherein the plurality of precursor diodes have different sizes from each other. A plurality of output-side transmission lines connected between respective cathodes of the plurality of diodes and the output node,
The rectifier circuit according to claim 1, wherein the plurality of output-side transmission lines have a line length that is an odd multiple of a half wavelength of the input power.   The ratio of the inductance of the k-th input transmission line from the input unit side of the plurality of input transmission lines to the capacitance of the k-th diode from the input unit side of the plurality of diodes. Is the inductance of the (k + 1) -th input-side transmission line from the input unit side of the plurality of input-side transmission lines, and the (k + 1) -th stage of the plurality of diodes from the input unit side. 3. The rectifier circuit according to claim 2, wherein the ratio of the diode to the capacitance is constant.   2. The k-th diode of the plurality of diodes from the input unit side has a smaller size than the (k + 1) -th diode of the plurality of diodes from the input unit side. 3. 4. The rectifier circuit according to claim 3. A plurality of switches between respective cathodes of the plurality of diodes;
5. The rectifier according to claim 4, further comprising: a control circuit configured to control the plurality of switches so as to disconnect the plurality of diodes from the output node in order from a smaller size in response to a voltage drop of the output node. 6. circuit. A plurality of switches between the respective cathodes of the plurality of diodes and the output node;
5. The rectifier according to claim 4, further comprising: a control circuit configured to control the plurality of switches so as to disconnect the plurality of diodes from the output node in order from a smaller size in response to a voltage drop of the output node. 6. circuit.   5. The rectifier circuit according to claim 1, further comprising a disconnection mechanism that disconnects at least one of the plurality of diodes from the output node according to a voltage of the output node. 6.   The rectifier circuit according to claim 7, wherein the disconnecting mechanism disconnects the plurality of diodes from the output node in order from a smaller size in response to a voltage drop of the output node. The input unit includes an input capacitor to which the input power is input at one end,
The rectifier circuit according to any one of claims 1 to 8, wherein the plurality of input-side transmission lines are connected in series to the other end of the input capacitor.   The rectifier circuit according to any one of claims 1 to 9, wherein ends of the plurality of input-side transmission lines are connected to the reference potential via a choke element.

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