JP2023022864A - Semiconductor device manufacturing method - Google Patents

Abstract

To improve electrical characteristics of a semiconductor device by eliminating an effect of dopants on an injection amount in a co-implantation process to be used to suppress diffusion of dopants in a germanium substrate.SOLUTION: A method for manufacturing a semiconductor device includes a first ion implantation step of implanting dopant species for imparting N-type or P-type electrical characteristics to a germanium substrate in an ion implantation step of adding impurities to the germanium substrate, and a second ion implantation step of implanting ions having a mass heavier than germanium and belonging to a group 4 element into a region of the germanium substrate where the dopant species are to be implanted in an implantation step performed before the first ion implantation step.SELECTED DRAWING: Figure 1

Description

The present invention relates to a method of manufacturing a semiconductor device using co-implantation.

Junction formation technology is one of the issues in the ion implantation process for germanium substrates with high carrier mobility. Approaches to this problem have used various techniques to control the implantation profile of the dopant species implanted into the substrate.

For example, in Patent Document 1, in addition to the dopant species implanted into the substrate, other ion species such as carbon and aluminum ions are additionally implanted using an implantation technique called co-implantation to diffuse the dopant in the implantation depth direction. It has been proposed to suppress , and control the injection profile.

JP 2017-157779

By using the co-implantation described in Patent Document 1, it is possible to suppress the diffusion of the dopant in the direction of the implantation depth and control the implantation profile, but the device through this implantation process has a high sheet resistance and high mobility. Further improvement is required in doing so.

In addition, since aluminum ions impart the same or opposite properties electrically to dopants implanted into germanium substrates, they have been considered to be difficult to handle because they greatly affect the amount of dopants implanted.

Accordingly, the present invention provides a method of manufacturing a semiconductor device capable of improving the electrical characteristics of the semiconductor device by eliminating the effect on the dopant injection amount in the co-implantation process used to suppress dopant diffusion in the germanium substrate. offer.

A method for manufacturing a semiconductor device includes:
In the ion implantation process of adding impurities to the germanium substrate,
a first ion implantation step of implanting a dopant species that imparts N-type or P-type electrical properties to the germanium substrate;
In an implantation step performed before the first ion implantation step,
and a second ion implantation step of implanting ions of a Group 4 element having a mass heavier than that of germanium into a region of the germanium substrate into which the dopant species is implanted.

Since germanium, which is a group 4 element, is used in the second ion implantation process, germanium does not have electrical properties. That is, it does not contribute to the formation of N-type or P-type, and thus does not affect the implantation of dopant species used to form N-type or P-type. Therefore, electrical characteristics of the semiconductor device can be improved.

The relationship of the ion implantation amount in each ion implantation process is
It is preferable that the amount of ions to be implanted in the second ion implantation step is smaller than the amount of ions to be implanted in the first ion implantation step.

Unlike the dopant species that impart electrical properties, excessive implantation of the ion species used for co-implantation unnecessarily prolongs the implantation process. The ion implantation process can be performed efficiently by setting the ion implantation doses to the above-described relationship.

Specifically, it is desirable to employ the following manufacturing method.
Having an annealing step of the germanium substrate after the first ion implantation step,
the second ion implantation step is an ion implantation step performed twice with different ion species;
In the dopant species implantation profile after the annealing step,
In the second ion implantation step, the implantation of one ion species suppresses the diffusion of the implantation profile by the first ion implantation step in a region where the implantation depth is deep from the substrate surface,
Implantation of other ion species suppresses diffusion of the implantation profile due to the first ion implantation step in regions where the implantation depth is shallow from the substrate surface.

More specifically,
A method of manufacturing a semiconductor device, wherein the one ion species is tin and the other ion species is hafnium.

Since an element homologous to germanium, which is a Group 4 element, is used, germanium does not have electrical properties. That is, it does not contribute to the formation of N-type or P-type, and thus does not affect the implantation of dopant species used to form N-type or P-type. Therefore, electrical characteristics of the semiconductor device can be improved.

Graph showing dependence of sheet resistance on co-ion implantation species Graph showing the change in the SIMS profile of phosphorus with the addition of various co-implantation species. Graph showing change in SIMS profile of phosphorus by hafnium ions Flowchart representing the manufacturing process of a semiconductor device Explanatory diagram of an example of development using co-injection

FIG. 1 is a graph showing the dependence of sheet resistance on co-ion implantation species. In this graph, in addition to phosphorus (P), which is a dopant species, other ion species (co-implantation species) are additionally implanted into the germanium substrate. When the implantation depth of phosphorus and the implantation depth of the co-implantation species are the same, the dose of the co-implantation species (5.0×10 ¹⁴ atoms/cm ² ) is larger than the dose of phosphorus (1.0×10 ¹⁵ atoms/cm 2 ). cm ² ).
The annealing temperature was set to 640 to 800° C. during the peak heat treatment, and the sheet resistance after annealing was measured at each annealing temperature.

The solid line and broken line graphs in FIG. 1 are obtained when aluminum (Al) and carbon (C) are respectively implanted as co-implantation species as in Patent Document 1, which is a conventional technique.
On the other hand, the graph indicated by the dashed-dotted line is obtained when tin (Sn) is implanted as the co-implantation species.
As can be seen by comparing the graphs, when tin (Sn) is implanted, the sheet resistance can be kept lower than when conventional aluminum or carbon is used as the co-implantation species. The reason for the reduction in sheet resistance is that the solid solubility in germanium, which is the base substrate material, is superior to that of conventional co-implantation species such as aluminum and carbon.

FIG. 2 is a graph comparing SIMS profiles after ion implantation using the same co-implantation species as in FIG. is the substrate surface.
Focusing on a deep region (30 nm to 40 nm) from the substrate surface and comparing the spread of the implantation profile, it was found that the diffusion of dopant species (P) can be suppressed by using tin compared to conventionally used aluminum and carbon. I know there is. Note that the dopant species profile when tin (Sn) is used as the co-implantation species is called a box profile because of its shape.

By using tin (Sn) as a co-implantation species, the sheet resistance is lower than that of conventional co-implantation species, and diffusion of the dopant species in a deep region from the substrate surface can be suppressed more remarkably.
Further, since tin (Sn) is a Group IV element like germanium, it does not contribute to the formation of N-type or P-type impurity regions in the germanium substrate. In other words, since there is no influence on the implantation of group III or group V ions, which are dopant species that impart electrical properties to the germanium substrate, the electrical properties of the impurity region are improved.

In FIG. 2, co-implantation of tin (Sn) has described the effect of suppressing the diffusion of dopant species in a region deep from the substrate surface. may

For example, co-implantation of hafnium (Hf) can suppress the diffusion of relatively high concentrations of dopant species in shallow regions near the substrate surface. FIG. 3 depicts how the phosphorus profile changes depending on the presence or absence of hafnium (Hf) as a co-implantation species. As shown in FIG. 3, by co-implanting hafnium (Hf), the implantation concentration at the location of region A shown in the figure is approximately the same as the profile of phosphorous (P) when no annealing is performed (one-dot chain line). can be maintained. Further, even in the region B where the implantation concentration of phosphorus (P) is relatively high, it is possible to sufficiently suppress the diffusion of dopant species during annealing.
In this way, it is possible to suppress the diffusion of the high-concentration dopant in the region where the implantation depth is shallow (near the substrate surface), so that the contact resistance can be reduced.

As described above, by implanting tin (Sn) or hafnium (Hf) as co-implantation species into the germanium substrate, the sheet resistance and contact resistance can be reduced, and the electrical characteristics of the semiconductor device can be improved.
In addition, since these elements are Group IV elements, they do not affect the implantation of dopant species when forming N-type or P-type on the germanium substrate, so that electrical characteristics can be improved in the manufacturing process of the semiconductor device. . Note that the co-implantation species in the present invention is not limited to tin (Sn) or hafnium (Hf), and any group 4 element having a mass heavier than germanium may be used.

FIG. 4 is a flow chart showing the manufacturing process of the semiconductor device according to the present invention. First, co-implantation species are implanted into the germanium substrate in the second ion implantation step 1 . Next, dopant species are implanted in a first ion implantation step 2 .
Since the co-implantation species is not an ion species necessary for manufacturing a semiconductor device, the ion implantation dose in the second ion implantation step 1 is smaller than the ion implantation dose in the first ion implantation step 2 . After each ion implantation step is performed, an annealing step 3 is performed.

The second ion implantation step 1 may be performed twice with different ion species. For example, ion implantation using tin (Sn) as the co-implantation species described above is performed, and then ion implantation using hafnium (Hf) as the co-implantation species is performed. Also, the order of implanting the co-implanted species may be reversed. By implanting the co-implantation species twice, both the effect obtained by co-implanting tin (Sn) and the effect obtained by co-implanting hafnium (Hf) can be obtained.
Note that the co-implantation species is not limited to tin (Sn) or hafnium (Hf), and is appropriately selected from Group 4 elements having a mass heavier than germanium according to the purpose.

In addition, as a development example of the present invention, it is possible to improve channel mobility. FIG. 5 depicts a MOSFET structure with germanium as the channel material. By implanting the above-described co-implantation species together with the dopant species into the source and drain regions, strain (stress in the direction of the arrow shown) is generated in each region indicated by p-Ge to improve channel mobility. can be achieved.

In addition, it goes without saying that the present invention is not limited to the above-described embodiments, and that various modifications are possible without departing from the spirit of the present invention.

1 Second ion implantation step 2 First ion implantation step 3 Annealing step

Claims (4)

In the ion implantation process of adding impurities to the germanium substrate,
a first ion implantation step of implanting a dopant species that imparts N-type or P-type electrical properties to the germanium substrate;
In an implantation step performed before the first ion implantation step,
and a second ion implantation step of implanting ions of a group IV element having a mass heavier than that of germanium into a region of the germanium substrate into which the dopant species is implanted. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the amount of ions to be implanted in said second ion implantation step is smaller than the amount of ions to be implanted in said first ion implantation step. Having an annealing step of the germanium substrate after the first ion implantation step,
the second ion implantation step is an ion implantation step performed twice with different ion species;
In the dopant species implantation profile after the annealing step,
In the second ion implantation step, the implantation of one ion species suppresses the diffusion of the implantation profile by the first ion implantation step in a region where the implantation depth is deep from the substrate surface,
3. The method of manufacturing a semiconductor device according to claim 1, wherein the implantation of other ion species suppresses diffusion of the implantation profile due to said first ion implantation step in a region having a shallow implantation depth from the substrate surface. 4. The method of manufacturing a semiconductor device according to claim 1, wherein said one ion species is tin and said other ion species is hafnium.

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