JP2025087361A - Power Semiconductor Device - Google Patents

Abstract

To provide a power semiconductor device with high reliability, in which a stress reduction, an improvement of an insulation pressure, and an improvement heat dissipation are realized.SOLUTION: A power semiconductor device has: a heat dissipation member 7 in which a heat dissipation surface 10a of a semiconductor element 1 is exposed from a sealing resin 10, and that is arranged so as to be opposite to the heat dissipation surface 10a; and an insulation plate 4. The insulation plate 4 is partially arranged at least on the outside of the sealing resin 10 in a plan surface direction. The heat dissipation member 7 comprises: a convex part 7c that is projected toward the heat dissipation surface 10a, and provided with a projection surface 7d to be opposite to the heat dissipation surface 10a; and a concave part 7e that is provided around the convex part 7c in the plan surface direction, and is formed away from the insulation plate 4 as compared with the projection surface 7d in a lamination direction. The projection surface 7d is formed larger in the plan surface direction than that of the heat dissipation surface 10a to be arranged oppositely. The concave part 7e is formed at a position where an end part X3 of the sealing resin 10 and the insulation plate 4 are overlapped in view of a plan surface.SELECTED DRAWING: Figure 2

Description

The present invention relates to a power semiconductor device.

To reduce the burden on the environment, the use of hybrid and electric vehicles is becoming more widespread, and emphasis is being placed on miniaturization and cost reduction for power semiconductor devices in power conversion devices, which are one of the components installed in these vehicles. In order to miniaturize power semiconductor devices that generate a large amount of heat, it is necessary to improve the cooling performance. For example, Patent Document 1 discloses the configuration of a power semiconductor device in which a power module is provided with a cooler via a thermally conductive member and an insulating member, and the power module, thermally conductive member, and cooler are connected to ensure cooling performance.

JP 2016-105451 A

In the technology described in Patent Document 1, when the power module is made to be compatible with high voltages, an insulating member is provided to ensure insulation between the heat dissipation member and the external terminals of the semiconductor module. This insulating member reduces thermal resistance by applying pressure to the heat dissipation member, ensuring cooling performance and improving long-term reliability. However, insulating members with high dielectric strength, such as ceramic plates, may crack when pressurized, which poses the problem of reduced reliability. In view of this, the present invention aims to provide a highly reliable power semiconductor device that achieves reduced stress, improved dielectric strength, and improved heat dissipation.

The power semiconductor device includes a semiconductor element, a conductor part thermally and electrically connected to the semiconductor element, and a sealing member that mold-seals the semiconductor element and the conductor part. The semiconductor package includes a heat dissipation surface, which is the surface of the conductor part opposite to the surface connected to the semiconductor element, exposed from the sealing member, a heat dissipation member arranged opposite the heat dissipation surface, and an insulating plate provided between the semiconductor package and the heat dissipation member. A part of the insulating plate is arranged at least on the outer side of the sealing member in a planar direction, and the heat dissipation member has a convex part that protrudes toward the heat dissipation surface and has a protruding surface that faces the heat dissipation surface, and a concave part that is arranged around the convex part in the planar direction and has a surface formed away from the insulating plate in the stacking direction compared to the protruding surface. The protruding surface is formed larger in the planar direction than the heat dissipation surface that is arranged opposite to it, and the concave part is formed at a position where the end of the sealing member and the insulating plate overlap in a planar view.

We can provide highly reliable power semiconductor devices that reduce stress, improve dielectric strength, and improve heat dissipation.

FIG. 2 is a cross-sectional view of a semiconductor package in a power semiconductor device. 1 is a cross-sectional view of a power semiconductor device according to a first embodiment of the present invention. FIG. 3 is an exploded plan view of the power semiconductor device of FIG. 2 . FIG. 5 is a cross-sectional view of a power semiconductor device according to a second embodiment of the present invention. FIG. 5 is an exploded plan view of the power semiconductor device of FIG. 4 .

The following describes an embodiment of the present invention with reference to the drawings. The following description and drawings are examples for explaining the present invention, and some parts have been omitted or simplified as appropriate for clarity of explanation. The present invention can also be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

The position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc., in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

(First embodiment and overall configuration of the present invention)
(Figure 1)
A semiconductor package 100, which serves as a semiconductor module in a power semiconductor device, includes a semiconductor element 1, a first conductor portion 3a, a second conductor portion 3b, and an external terminal 3c. The first conductor portion 3a and the second conductor portion 3b are thermally and electrically connected to the semiconductor element 1, and are made of, for example, copper, a copper alloy, aluminum, or an aluminum alloy. An electrode provided on one surface of the semiconductor element 1 is joined to the first conductor portion 3a by a bonding material 2. An electrode provided on the other surface of the semiconductor element 1 is joined to the second conductor portion 3b by the bonding material 2. The material of the bonding material 2 is, for example, a solder material, a sintered material, or the like.

The first conductor 3a and the second conductor 3b are mold-sealed such that the heat dissipation surface 10a, which is the surface opposite to the surface connected to the semiconductor element 1, is exposed from the sealing resin 10, which is the sealing member. This allows the semiconductor package 100 to dissipate heat generated in the semiconductor package 100 to the heat dissipation member 7, which will be described later, via the heat dissipation surfaces 10a exposed on both sides. The external terminal 3c is provided with a portion of the terminal protruding outward from the sealing member 10, which allows the semiconductor package 100 to be electrically connected to external wiring (not shown).

(Figure 2)
The first conductor 3a is connected to the insulating plate 4, which is an insulating layer having electrical insulation properties, on the heat dissipation surface 10a via a heat conduction layer 5a made of a heat conductive material. The insulating plate 4 is connected to a heat conduction layer 5b made of a heat conductive material on the surface opposite to the surface to which the first conductor 3a is connected, and is connected to the heat dissipation member 7 via the heat conduction layer 5b. In this way, of the heat dissipation members 7 provided on both surfaces of the semiconductor package 100, one heat dissipation member 7 faces the heat dissipation surface 10a of the first conductor 3a.

The second conductor 3b is connected to the insulating plate 4 on the heat dissipation surface 10a via the thermally conductive layer 5a. The insulating plate 4 is connected to the thermally conductive layer 5b on the surface opposite to the surface to which the second conductor 3b is connected, and is connected to the heat dissipation member 7. In this way, of the heat dissipation members 7 provided on both sides of the semiconductor package 100, the other heat dissipation member 7 faces the heat dissipation surface 10a of the second conductor 3b.

The insulating plate 4 and the thermally conductive layers 5a and 5b sandwiching the insulating plate 4 are provided between the semiconductor package 100 and the heat dissipation member 7 and are in close contact with each other. As a result, a refrigerant flows inside the heat dissipation member 7, and the semiconductor package 100 ensures cooling by thermally conducting the heat generated by the semiconductor element 1 to the heat dissipation member 7 via the thermally conductive layers 5a and 5b and the insulating plate 4, and also electrically insulates the semiconductor package 100 from the heat dissipation member 7.

The insulating plate 4 is an insulating sheet made of a material with high thermal conductivity and high dielectric strength, such as ceramics such as aluminum oxide (alumina), aluminum nitride, and silicon nitride, or fine powders of these materials.

Thermal conductive layers 5a and 5b are made of thermally conductive materials such as thermally conductive grease, TIM (Thermal Interface Material), or heat dissipation sheets.

The heat dissipation member 7 is made of a material having thermal conductivity, such as composite materials of Cu, Cu alloy, Cu-C, Cu-CuO, or composite materials of Al, Al alloy, AlSiC, Al-C, etc.

The heat dissipation member 7 has a protruding portion 7c that protrudes toward the heat dissipation surface 10a of the first conductor portion 3a and the heat dissipation surface 10a of the second conductor portion 3b and has a protruding surface 7d that faces each of the heat dissipation surfaces 10a. The heat dissipation member 7 also has a recessed portion 7e that is provided around the protruding portion 7c in the planar direction and has a surface that is formed farther from the insulating plate 4 than the protruding surface 7d in the stacking direction. The protruding surface 7d is formed larger in the planar direction than the opposing heat dissipation surface 10a, so that the heat dissipated from the heat dissipation surface 10a can be reliably absorbed by the heat dissipation member 7 and the heat dissipation performance is not deteriorated. The heat dissipation member 7 is pressurized toward the semiconductor package 100 according to the arrow of the pressure unit 11.

The ends of the first conductor portion 3a and the second conductor portion 3b in the planar direction are designated as X1, the end of the convex portion 7c of the heat dissipation member 7 in the planar direction is designated as X2, the end of the sealing resin 10 in the planar direction is designated as X3, and the end of the insulating plate 4 in the planar direction is designated as X4.

End X2 is located outside end X1 in the planar direction and inside end X3 of sealing member 10 in the planar direction. The recess 7e of heat dissipation member 7 is formed at a position where end X3 of sealing member 10 and insulating plate 4 overlap in a planar view.

The end X4 of the insulating plate 4 is disposed outside the end X3 of the sealing resin 10, and at least a portion of the insulating plate 4 is provided outside the sealing resin 10 in the planar direction. The insulating plate 4 is a white ceramic plate that does not have a wiring layer that forms a conductor on both sides, and the insulating plate 4 is sandwiched on both sides by the thermally conductive layers 5a and 5b, which contributes to suppressing cracks in the insulating plate 4.

(Figure 3)
3(a) is a plan view of a semiconductor package 100 having the heat dissipation member 7 of FIG. 2 with the upper heat dissipation member 7, the first conductor portion 3a, and the semiconductor element 1 removed, FIG. 3(b) is a plan view of the heat dissipation member 7 of FIG. 3(a), and FIG. 3(c) is a cross-sectional view of the heat dissipation member 7 of FIG. 3(b).

The heat dissipation member 7 has bolt holes 9 at each of the four corners as shown in FIG. 3. When bolts (not shown) are inserted into the bolt holes 9, pressure is applied to the heat dissipation member 7 as indicated by the arrows in the pressure applying portion 11 (FIG. 2), and the heat dissipation member 7 is pressed toward the semiconductor package 100. Note that as long as the heat dissipation member 7 is configured to be pressed toward the semiconductor package 100, clips, leaf springs, and the like may be used instead of bolts. Furthermore, the pressure applying portion 11 of the semiconductor package 100 may be formed at the position of the convex portion 7c of the heat dissipation member in the stacking direction.

The semiconductor package 100 has external terminals 3c that protrude from the sealing member 10 to the outside, and the insulating plate 4 overlaps at least a portion of the external terminals 3c when viewed in a plan view. This increases the creepage distance between the external terminals 3c and the heat dissipation members 7 formed on both sides of the semiconductor package 100, improving the dielectric strength, and preventing dielectric breakdown even when the semiconductor package 100 is used at high voltage. Note that the insulating plate 4 for ensuring the creepage distance does not have to be configured to be disposed over the entire surface in the planar direction as shown in FIG. 3, but may be formed only in the portion where the external terminals 3c protrude from the sealing member 10 to the outside.

The heat conductive layer 5b is provided between the insulating plate 4 and the protruding portion 7c, so that the protruding portion 7c does not come into direct contact with the heat dissipation member 7 and acts as a stress relief layer. When a load is applied to the pressure applying portion 11 of the heat dissipation member 7, the heat dissipation member 7 undergoes bending deformation with the end portion X2 of the protruding portion 7c as the fulcrum. The heat conductive layer 5b on the recessed portion 7e, which is affected by the stress caused by this deformation, is provided thicker in the stacking direction by the step difference between the protruding portion 7c and the recessed portion 7e. As a result, even if pressure is applied to the pressure applying portion 11, stress is less likely to be applied to the insulating plate 4, and cracks in the insulating plate 4 are suppressed.

The heat dissipation member 7 may be composed of a single member or multiple members. The heat dissipation member 7 may have a water channel through which a refrigerant flows, pin fins, corrugated fins, etc., inside, or may have other cooling forms such as air cooling.

Second Embodiment
(Fig. 4, Fig. 5)
Figure 5(a) is a plan view of a semiconductor package 100 equipped with the heat dissipation member 7 of Figure 4, with the upper heat dissipation member 7, first conductor portion 3a, and semiconductor element 1 removed in the stacking direction, Figure 3(b) is a plan view of the heat dissipation member 7 of Figure 3(a), and Figure 3(c) is a cross-sectional view of the heat dissipation member 7 of Figure 3(b).

As shown in FIG. 5(a), the recess 7e is formed so that, when viewed in a plan view, the recess 7e does not extend to the position of the bolt hole 9 of the heat dissipation member 7. The end X5 of the recess 7e in the planar direction is provided on the outer side of the end X4. This prevents the thickness of the heat dissipation member 7 from becoming thin around the bolt hole 9, which is the load-bearing portion for pressurizing the heat dissipation member 7 toward the semiconductor package 100, and therefore allows for efficient pressure application.

The above-described embodiment of the present invention provides the following advantages:

(1) A semiconductor package 100 having a semiconductor element 1, conductors 3a, 3b thermally and electrically connected to the semiconductor element 1, and a sealing member 10 that mold-seals the semiconductor element 1 and the conductors 3a, 3b, and in which a heat dissipation surface 10a, which is the surface of the conductors 3a, 3b opposite the surface that connects to the semiconductor element 1, is exposed from the sealing member 10, a heat dissipation member 7 arranged opposite the heat dissipation surface 10a, and an insulating plate 4 provided between the semiconductor package 100 and the heat dissipation member 7, and a portion of the insulating plate 4 is sealed in a planar direction. The heat dissipation member 10 is disposed at least outside the sealing member 10, and has a protruding portion 7c that protrudes toward the heat dissipation surface 10a and has a protruding surface 7d that faces the heat dissipation surface 10a, and a recessed portion 7e that is disposed around the protruding portion 7c in the planar direction and has a surface that is formed farther from the insulating plate 4 than the protruding surface 7d in the stacking direction, and the protruding surface 7d is formed larger in the planar direction than the heat dissipation surface 10a that is disposed opposite it, and the recessed portion 7e is formed at a position where the end X3 of the sealing member 10 and the insulating plate 4 overlap in a plan view. In this way, a highly reliable power semiconductor device that realizes stress reduction, improved dielectric strength, and improved heat dissipation can be provided.

(2) The insulating plate 4 is a white ceramic plate that does not have a wiring layer made of a conductor. By using such a material, it is possible to reduce stress and improve the dielectric strength.

(3) The semiconductor package 100 has terminals 3c that protrude from the sealing member 10 to the outside, and the insulating plate 4 overlaps at least a portion of the terminals 3c in a plan view. This ensures a creepage distance between the heat dissipation member 7 and the terminals 3c, improving the dielectric strength.

(4) A thermally conductive material is provided between the insulating plate 4 and the heat dissipation member 7. This allows the heat generated by the semiconductor package 100 to be transferred to the heat dissipation member 7 while electrically insulating the semiconductor package 100 from the heat dissipation member 7.

(5) A thermally conductive material is provided between the insulating plate 4 and the semiconductor package 100, or between the insulating plate 4 and the heat dissipation member 7. In this way, the semiconductor package 100 and the heat dissipation member 7 are electrically insulated from each other, while the heat generated by the semiconductor package 100 can be transferred to the heat dissipation member 7.

The present invention is not limited to the above-described embodiment, and various modifications and other configurations can be combined without departing from the spirit of the invention. Furthermore, the present invention is not limited to those having all of the configurations described in the above-described embodiment, and also includes those in which some of the configurations have been omitted.

REFERENCE SIGNS LIST 1 Semiconductor element 2 Bonding material 3a First conductor 3b Second conductor 3c External terminal 4 Insulating plates 5a, 5b Thermal conduction layer 7 Heat dissipation member 7c Convex portion of heat dissipation member 7d Protruding surface 7e Concave portion of heat dissipation member 9 Bolt hole 10 Sealing resin 10a Heat dissipation surface 11 Pressurizing portion X1 End portion X2 of conductor portion End portion X3 of convex portion of heat dissipation member End portion X4 of sealing resin End portion X5 of insulating plate End portion 100 of concave portion of heat dissipation member

Claims (5)

a semiconductor package including a semiconductor element, a conductor portion thermally and electrically connected to the semiconductor element, and a sealing member for molding and sealing the semiconductor element and the conductor portion, the conductor portion having a heat dissipation surface exposed from the sealing member, the heat dissipation surface being a surface of the conductor portion opposite to a surface connected to the semiconductor element;
a heat dissipation member disposed opposite the heat dissipation surface;
an insulating plate provided between the semiconductor package and the heat dissipation member,
a portion of the insulating plate is disposed at least outside the sealing member in a planar direction;
the heat dissipation member has a convex portion that protrudes toward the heat dissipation surface and has a protruding surface facing the heat dissipation surface, and a concave portion that is provided around the convex portion in a planar direction and has a surface that is formed farther away from the insulating plate than the protruding surface in a stacking direction,
The protruding surface is formed larger in a planar direction than the heat dissipation surface disposed opposite thereto,
the recess is formed at a position where an end of the sealing member and the insulating plate overlap in a plan view. 2. The power semiconductor device according to claim 1,
The power semiconductor device, wherein the insulating plate is a white ceramic plate not provided with a wiring layer made of a conductor. 2. The power semiconductor device according to claim 1,
the semiconductor package has a terminal portion protruding from the sealing member to an outside,
the insulating plate has at least a portion overlapping with the terminal portion in a plan view. 2. The power semiconductor device according to claim 1,
a thermally conductive material is provided between the insulating plate and the heat dissipation member. 2. The power semiconductor device according to claim 1,
a thermally conductive material is provided between the insulating plate and the semiconductor package, or between the insulating plate and the heat dissipation member.

Images