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JP2644731B2 - Method of manufacturing voltage-dependent nonlinear resistor - Google Patents

Method of manufacturing voltage-dependent nonlinear resistor

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Publication number
JP2644731B2
JP2644731B2 JP61126089A JP12608986A JP2644731B2 JP 2644731 B2 JP2644731 B2 JP 2644731B2 JP 61126089 A JP61126089 A JP 61126089A JP 12608986 A JP12608986 A JP 12608986A JP 2644731 B2 JP2644731 B2 JP 2644731B2
Authority
JP
Japan
Prior art keywords
voltage
varistor
tio
nonlinear resistor
dependent nonlinear
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61126089A
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Japanese (ja)
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JPS62282414A (en
Inventor
慶一 野井
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Description

【発明の詳細な説明】 産業上の利用分野 本発明は電気機器、電子機器で発生する異常高電圧、
ノイズ、静電気から半導体及び回路を保護するための積
層構造でコンデンサ特性とバリスタ特性を有する電圧依
存性非直線抵抗器の製造方法に関するものである。
The present invention relates to an electric device, an abnormal high voltage generated in an electronic device,
The present invention relates to a method for manufacturing a voltage-dependent nonlinear resistor having a capacitor characteristic and a varistor characteristic in a laminated structure for protecting semiconductors and circuits from noise and static electricity.

従来の技術 従来、各種電気機器、電子機器における異常高電圧の
吸収、ノイズの除去、火花消去、静電気対策のために電
圧依存性非直線抵抗特性を有するSiCバリスタやZnO系バ
リスタなどが使用されていた。このようなバリスタの電
圧−電流特性は近似的に次式のように表すことができ
る。
Conventional technology Conventionally, SiC varistors and ZnO-based varistors with voltage-dependent non-linear resistance characteristics have been used to absorb abnormally high voltage, eliminate noise, eliminate sparks, and take measures against static electricity in various electric and electronic devices. Was. The voltage-current characteristics of such a varistor can be approximately expressed by the following equation.

I=(V/C)α ここで、Iは電流、Vは電圧、Cはバリスタ固有の定
数であり、αは、電圧非直線指数である。
I = (V / C) α where I is a current, V is a voltage, C is a constant unique to a varistor, and α is a voltage non-linear index.

SiCバリスタのαは2〜7程度、ZnO系バリスタではα
が50にもおよぶものがある。このようなバリスタは比較
的高い電圧の吸収には優れた性能を有しているが、誘電
率が低く、固有の静電容量が小さいため、バリスタ電圧
以下の比較的低い電圧の吸収に対してはほとんど効果を
示さず、また誘電損失tanδが5〜10%と大きい。
Α of the SiC varistor is about 2 to 7, and α of the ZnO varistor.
There are as many as 50. Such varistors have excellent performance in absorbing relatively high voltages, but because of their low dielectric constant and small inherent capacitance, they can absorb relatively low voltages below the varistor voltage. Has almost no effect, and the dielectric loss tan δ is as large as 5 to 10%.

一方、これらの低電圧のノイズなどの除去には見掛け
の誘電率が5×104程度でtanδが1%前後の半導体コン
デンサが利用されている。しかし、このような半導体コ
ンデンサはサージなどによりある限度以上の電圧または
電流が印加されると、破壊したりしてコンデンサとして
の機能を果たさなくなったりする。
On the other hand, a semiconductor capacitor having an apparent dielectric constant of about 5 × 10 4 and a tan δ of about 1% is used for removing these low-voltage noises and the like. However, when a voltage or a current exceeding a certain limit is applied due to a surge or the like, such a semiconductor capacitor is broken or loses its function as a capacitor.

そこで最近になって、SrTiO3を主成分とし、バリスタ
特性とコンデンサ特性の両方の機能を有するものが開発
されているが、バリスタ電圧が低く、αが大きく、誘電
率が大きく、サージ耐量が大きいといった特性をすべて
同時に満足するものは未だに得られていない。
Therefore, recently, those having SrTiO 3 as a main component and having both varistor characteristics and capacitor characteristics have been developed, but the varistor voltage is low, α is large, the dielectric constant is large, and the surge withstand capability is large. No one that satisfies all these characteristics at the same time has yet been obtained.

また、従来の積層型セラミックバリスタとしては特開
昭51−18849号公報に示されたものがあるが、これは第
4図に示すようにあらかじめ焼結を完了したバリスタ素
子の表裏に一対の電極を形成し、それらを並列に接続す
るように電極を付与したものを積み重ね、バリスタの電
極2が取り出し部分以外でも外部に露出した構造となっ
ている。さらに、この部分の保護とバリスタ素子1の接
着のために接着剤や外装用樹脂などの有機物で表面をコ
ーティングするものである。
A conventional multilayer ceramic varistor is disclosed in Japanese Patent Application Laid-Open No. S51-18849. As shown in FIG. 4, a pair of electrodes are provided on the front and back of a varistor element which has been sintered in advance. And varistors are stacked so as to connect them in parallel, and the varistor electrode 2 is exposed to the outside even at portions other than the take-out portion. Further, the surface is coated with an organic substance such as an adhesive or an exterior resin for protecting this portion and bonding the varistor element 1.

発明が解決しようとする問題点 この方法によると、焼結温度、バリスタ素子の厚みの
制限からV1mAの値を低くするのに適していないという問
題点があった。
Problems to be Solved by the Invention According to this method, there was a problem that it was not suitable for lowering the value of V1mA due to limitations on the sintering temperature and the thickness of the varistor element.

そこで、本発明は、半導体及び回路をノイズ、静電気
などから保護するために、バリスタ電圧が低く、αが大
きく、誘電率は大きく、tanδは小さく、サージ耐量は
大きいといったすべての特性を満足できるコンデンサ特
性を有する電圧依存性非直線抵抗器を提供することを目
的とするものである。
Therefore, the present invention provides a capacitor capable of satisfying all characteristics such as a low varistor voltage, a large α, a large dielectric constant, a small tanδ, and a large surge withstand voltage in order to protect semiconductors and circuits from noise, static electricity, and the like. It is an object of the present invention to provide a voltage-dependent nonlinear resistor having characteristics.

問題点を解決するための手段 この目的を達成するために本発明の電圧依存性非直線
抵抗器の製造方法は、SrTiO3、CaxSr1-xTiO3(0.001≦
x≦0.5)、 BaySr1-yTiO3(0.001≦y≦0.5)、 MgzSr1-zTiO3(0.001≦z≦0.5)、 のうち少なくとも一種類以上を主成分とする複数のセラ
ミック生シートと、Na2O、NaF、Li2O、LiF、K2O、KF、A
g2O、CuO、Cu2O、Tl2Oのうち少なくとも一種類以上を含
んだ複数の内部電極とを交互に、かつ、この内部電極の
外部電極への取出し部分以外は前記セラミック生シート
で囲まれるように積層して積層体を形成し、焼成後、前
記積層体の端面に内部電極と接続するように外部電極を
形成するものである。
Means for Solving the Problems In order to achieve this object, a method for manufacturing a voltage-dependent nonlinear resistor according to the present invention comprises SrTiO 3 , Ca x Sr 1-x TiO 3 (0.001 ≦
x ≦ 0.5), Ba y Sr 1-y TiO 3 (0.001 ≦ y ≦ 0.5), Mg z Sr 1-z TiO 3 (0.001 ≦ z ≦ 0.5) Ceramic raw sheet, Na 2 O, NaF, Li 2 O, LiF, K 2 O, KF, A
g 2 O, CuO, Cu 2 O, alternately with a plurality of internal electrodes containing at least one or more of Tl 2 O, and except for the portion of this internal electrode to the external electrode, the ceramic raw sheet A laminate is formed by being laminated so as to be surrounded, and after firing, an external electrode is formed on an end face of the laminate so as to be connected to an internal electrode.

作用 この方法によると、焼成時に内部電極中のNa2O、Na
F、Li2O、LiF、K2O、KF、Ag2O、CuO、Cu2O、Tl2Oのうち
少なくとも一種類以上がセラミック生シートの結晶粒界
に拡散して結晶粒界を選択的に高抵抗化し、結晶粒界に
エネルギー障壁を形成するためバリスタ特性が発現す
る。また、結晶粒子内部が低抵抗、結晶粒界が高抵抗で
あることからコンデンサ特性が発現する。
Action According to this method, Na 2 O, Na
At least one of F, Li 2 O, LiF, K 2 O, KF, Ag 2 O, CuO, Cu 2 O, Tl 2 O diffuses into the grain boundaries of the raw ceramic sheet and selects the grain boundaries Varistor characteristics are exhibited because the resistance is increased and an energy barrier is formed at the crystal grain boundary. In addition, since the inside of the crystal grains has a low resistance and the crystal grain boundaries have a high resistance, capacitor characteristics are exhibited.

その結果バリスタ電圧が低く、比較的αが大きく、誘
電率が大きく、tanδが小さく、サージ耐量が大きいと
いった特性を同時に満足することのできる電圧依存性非
直線抵抗器が得られる。
As a result, it is possible to obtain a voltage-dependent nonlinear resistor that can simultaneously satisfy the characteristics of a low varistor voltage, a relatively large α, a large dielectric constant, a small tan δ, and a large surge resistance.

また、本発明による電圧依存性非直線抵抗器はZnO系
の積層バリスタに比べ誘電率が5〜20倍も大きく、ノイ
ズ、静電気といった立上りの急峻なパルスに対してもき
わめて有効である。
Further, the voltage-dependent nonlinear resistor according to the present invention has a dielectric constant 5 to 20 times as large as that of a ZnO-based laminated varistor, and is extremely effective against a steep rising pulse such as noise or static electricity.

さらに、内部電極は外部への取り出し部分を除いて全
てセラミック生シートで囲まれており、空隙部分が少な
いので水分の浸入や外装用樹脂等の変質による電極の特
性劣化が少なく耐湿性、高温負荷特性に優れている。
Furthermore, the internal electrodes are all surrounded by a raw ceramic sheet except for the parts that are taken out, and there are few voids, so there is little deterioration in electrode characteristics due to intrusion of moisture or deterioration of exterior resin, etc., humidity resistance, and high temperature load. Excellent characteristics.

以下に実施例をあげて本発明を具体的に説明する。 Hereinafter, the present invention will be described specifically with reference to examples.

まず、主原料を下記の第1表に示した組成になるよう
に秤量し、ボールミルなどで24時間混合する。そして、
乾燥させた後、800〜1200℃で2時間仮焼し、再び粉
砕、乾燥した後、有機バインダー、分散剤、可塑剤を加
えてスラリー状とする。これをシート成型法(たとえば
ドクターブレード法など)によって所定の膜厚の生シー
トを作る。
First, the main raw materials are weighed so as to have the composition shown in Table 1 below, and mixed by a ball mill or the like for 24 hours. And
After being dried, it is calcined at 800 to 1200 ° C. for 2 hours, crushed and dried again, and then an organic binder, a dispersant and a plasticizer are added to form a slurry. This is formed into a green sheet having a predetermined thickness by a sheet molding method (eg, doctor blade method).

一方、金、白金、パラジウム、銀、モリブデンなどの
合金からなる内部電極材料に、下記の第1表に示した粒
界を高抵抗化することのできる物質を加えペースト状に
し、前記生シートの片面にスクリーン印刷法などにより
内部電極を塗布し、この生シートを所定枚数積み重ね、
電極を印刷していない生シートを上、下に積み重ね圧着
し、所定の大きさに切断する。
On the other hand, to the internal electrode material made of an alloy such as gold, platinum, palladium, silver, and molybdenum, a substance capable of increasing the resistance of the grain boundaries shown in Table 1 below is added to form a paste, and the raw sheet An internal electrode is applied on one side by a screen printing method or the like, and a predetermined number of the raw sheets are stacked,
Raw sheets on which electrodes are not printed are stacked on top and bottom, pressed and cut to a predetermined size.

次いで、N2:H2=9:1の還元性ガス雰囲気中で1350〜15
00℃で5時間焼成し、その後空気中で800〜1100℃で3
時間焼成した。次に、内部電極を露出させた両端面に銀
電極を塗布し、580℃で焼付ける。
Then, 1350 to 15 in a reducing gas atmosphere of N 2 : H 2 = 9: 1.
Bake at 00 ° C for 5 hours and then in air at 800-1100 ° C for 3 hours.
Fired for hours. Next, silver electrodes are applied to both end surfaces exposing the internal electrodes, and baked at 580 ° C.

このようにして得られた素子は、第1図〜第3図に示
すように粒界高抵抗化物質含有内部電極6の外部への取
り出し部分を除いてすべてコンデンサ特性を有するバリ
スタ素体に封入されて、電極が一体化した同一の積層焼
結体5のみで囲まれた構造となっており、空隙部分が少
なく、水分が浸入しにくいため、外装用樹脂による内部
電極6の特性劣化が少ない。また、図で7及び8は端面
電極である。
As shown in FIGS. 1 to 3, all of the devices thus obtained are encapsulated in a varistor element having a capacitor characteristic except for a portion of the internal electrode 6 containing a high-grain-boundary material, which is taken out to the outside. Then, the structure is surrounded only by the same laminated sintered body 5 in which the electrodes are integrated. Since there are few voids and it is difficult for moisture to enter, the characteristic deterioration of the internal electrodes 6 due to the exterior resin is small. . Also, in the figure, 7 and 8 are end face electrodes.

次に、前記のようにして得られた素子の特性を以下の
第2表に示す。
Next, the characteristics of the device obtained as described above are shown in Table 2 below.

なお、誘電率は1kHzでの静電容量から計算した値であ
り、サージ耐量は8×20μsecのパルス電流を印加した
後のV1mA(1mAの電流を流した時の電圧)の変化が±10
%以内である時の印加電流波高値により評価している。
The dielectric constant is a value calculated from the capacitance at 1 kHz, and the surge withstand capability is that the change in V 1mA (voltage when a current of 1 mA flows) after applying a pulse current of 8 × 20 μsec is ± 10%.
% Was evaluated based on the peak value of the applied current.

本実施例においてシート成形法はドクターブレード法
のみ示したが、その他のどんな成膜法でもかまわない。
In this embodiment, only the doctor blade method is shown as the sheet forming method, but any other film forming method may be used.

また、組成中の添加物とその添加量はコンデンサとバ
リスタの両方の特性を発現するものであればどのような
ものでもかまわない。さらに、本実施例では積層した後
還元性雰囲気中で焼成したが、あらかじめ配合原料を還
元性雰囲気中で焼成しておき、粉砕、シート成形、電極
印刷、積層、切断した後、空気中で焼成して端面電極を
形成しても同様の効果があることを確認した。また、本
実施例では内部電極として、パラジウム、銀−パラジウ
ム、白金−ロジウム、白金−イリジウム、白金−モリブ
デン、白金−タングステン、についてのみ示したが、こ
れは金、銀、パラジウム、白金、ロジウム、イリジウ
ム、モリブデン、タングステン、ニッケル、鉄、クロ
ム、銅のうちの一種類の金属またはこれらの金属からな
る合金を主成分としてなるものであればよいものであ
る。
The additives in the composition and the amount of the additives may be any as long as they exhibit the characteristics of both the capacitor and the varistor. Further, in the present embodiment, after lamination, the mixture was fired in a reducing atmosphere. However, the blended raw materials were fired in a reducing atmosphere in advance, and then pulverized, sheet-formed, electrode printed, laminated, cut, and fired in the air. Thus, it was confirmed that the same effect was obtained even if the end face electrode was formed. Further, in the present embodiment, only palladium, silver-palladium, platinum-rhodium, platinum-iridium, platinum-molybdenum, platinum-tungsten are shown as internal electrodes, but these are gold, silver, palladium, platinum, rhodium, Any material may be used as long as it is mainly composed of one kind of metal of iridium, molybdenum, tungsten, nickel, iron, chromium, and copper or an alloy made of these metals.

なお、主成分の組成の範囲を規定したのはx,y,zは0.0
01未満では効果を示さず、0.5を超えると粒成長が抑制
されるため、バリスタ電圧が高く、誘電率が小さくな
り、サージ耐量が著しく小さくなるためである。
The range of the composition of the main component is defined as x, y, z is 0.0
If it is less than 01, no effect is exhibited, and if it exceeds 0.5, the grain growth is suppressed, so that the varistor voltage is high, the dielectric constant is small, and the surge withstand capability is extremely small.

なお、本実施例では素体の主原料成分及び素体の結晶
粒界を高抵抗化することが可能な物質はそれぞれ一種類
についてのみ示したが、素体の主原料成分としては、Sr
TiO3、CaxSr1-xTiO3(0.001≦x≦0.5)、 BaySr1-yTiO3(0.001≦y≦0.5)、MgzSr1-zTiO3(0.00
1≦z≦0.5)のうち複数種を同時に加えてもかまわな
い。また、素体の結晶粒界を高抵抗化することが可能な
物質としてはNg2O,NaF,Li2O,LiF,K2O,KF,Ag2O,CuO,Cu
2O,Tl2Oのうち複数種を同時に加えてもかまわない。
In the present embodiment, only one kind of each of the main raw material component of the element body and the substance capable of increasing the crystal grain boundary of the element body is shown.
TiO 3, Ca x Sr 1- x TiO 3 (0.001 ≦ x ≦ 0.5), Ba y Sr 1-y TiO 3 (0.001 ≦ y ≦ 0.5), Mg z Sr 1-z TiO 3 (0.00
A plurality of types (1 ≦ z ≦ 0.5) may be added at the same time. In addition, substances capable of increasing the resistance of the crystal grain boundaries of the element body include Ng 2 O, NaF, Li 2 O, LiF, K 2 O, KF, Ag 2 O, CuO, Cu
Multiple types of 2 O and Tl 2 O may be added at the same time.

このようにして得られた素子を85℃、95%RHの条件下
で課電率95%で湿中負荷試験をしたところ、1500時間後
のバリスタ電圧の変化率は+3.5%と従来の1/3以下の値
であり、耐湿特性は著しく改善された。また、125℃の
高温負荷試験においても従来の1/4以下の変化率を示
し、耐高温特性にもすぐれていることが確認された。
The device thus obtained was subjected to a wet / medium load test at 85 ° C. and 95% RH at a power application rate of 95%. The change rate of the varistor voltage after 1500 hours was + 3.5%, which was the conventional value. The value was 1/3 or less, and the moisture resistance was significantly improved. In addition, even in a high-temperature load test at 125 ° C, the rate of change was 1/4 or less of the conventional rate, and it was confirmed that the high-temperature resistance was excellent.

発明の効果 以上本発明によると、焼成時に内部電極中に含まれる
セラミック生シートの結晶粒界を高抵抗化することが可
能な物質が結晶粒界に拡散して、結晶粒界を選択的に高
抵抗化し結晶粒界にエネルギー障壁を形成するためバリ
スタ特性が発現し、バリスタ電圧が低く、比較的αが大
きく、誘電率が大きく、tanδが小さく、サージ耐量が
大きいといった特性を同時に満足できる電圧依存性非直
線抵抗器が得られる。
Effects of the Invention According to the present invention as described above, a substance capable of increasing the crystal grain boundary of a ceramic green sheet contained in an internal electrode during firing is diffused into the crystal grain boundary, and the crystal grain boundary is selectively formed. A varistor characteristic is exhibited because the resistance is increased and an energy barrier is formed at the crystal grain boundary, and a voltage that can simultaneously satisfy characteristics such as a low varistor voltage, a relatively large α, a large dielectric constant, a small tanδ, and a large surge withstand voltage. A dependent nonlinear resistor is obtained.

そして、内部電極中に含まれるセラミック生シートの
結晶粒界を高抵抗化することが可能な物質は積層体の焼
結を促進し、気孔率を小さくすることができるので、外
部からの水分の浸入を防ぐとともに、外装用樹脂などの
変質による特性劣化が少なく耐湿特性、高温負荷特性に
優れている。
A substance included in the internal electrode and capable of increasing the resistance of the crystal grain boundary of the ceramic green sheet promotes sintering of the laminate and can reduce the porosity. In addition to preventing intrusion, there is little deterioration in characteristics due to deterioration of exterior resin and the like, and it has excellent moisture resistance and high temperature load characteristics.

また、結晶粒子内部が低抵抗、結晶粒界が高抵抗であ
ることからコンデンサ特性が発現する。
In addition, since the inside of the crystal grains has a low resistance and the crystal grain boundaries have a high resistance, capacitor characteristics are exhibited.

そして、内部電極の外部への取出し部分以外は全てセ
ラミック生シートで囲まれており空隙部分が少ないの
で、外部からの水分の浸入や外装用樹脂などの変質によ
る電極の特性劣化が少なく、耐湿特性、高温負荷特性に
なお一層優れたものとなる。
Except for the part where the internal electrode is taken out, all parts are surrounded by the raw ceramic sheet and there are few voids.Therefore, there is little deterioration of the electrode characteristics due to intrusion of moisture from the outside or deterioration of the exterior resin, etc. And high temperature load characteristics.

さらにZnO系の積層バリスタに比べ、誘電率が5〜20
倍も大きく、ノイズ、静電気といった立上りの急峻なパ
ルスに対して極めて有効である。
Furthermore, the dielectric constant is 5-20 compared to the ZnO-based multilayer varistor.
It is twice as large, and is extremely effective against a steep rising pulse such as noise or static electricity.

従って、本発明によるとノイズ、静電気から半導体お
よび回路を保護することのできるコンデンサ特性を有す
る電圧依存性非直線抵抗器を得ることができ、その効果
は極めて大きい。
Therefore, according to the present invention, it is possible to obtain a voltage-dependent nonlinear resistor having capacitor characteristics capable of protecting a semiconductor and a circuit from noise and static electricity, and the effect is extremely large.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明による電圧依存性非直線抵抗器の斜視
図、第2図は第1図の切断線A−A′に沿って切断し、
矢印の方向に見た断面図、第3図は第1図の切断線B−
B′に沿って切断し、矢印の方向に見た断面図、第4図
は従来例の電圧依存性非直線抵抗器の斜視図である。 5……積層焼結体、6……粒界高抵抗化物質含有内部電
極、7,8……端面電極。
FIG. 1 is a perspective view of a voltage-dependent nonlinear resistor according to the present invention, FIG. 2 is a sectional view taken along a cutting line AA 'of FIG.
FIG. 3 is a sectional view taken in the direction of the arrow, and FIG.
FIG. 4 is a sectional view taken along the line B 'and viewed in the direction of the arrow, and FIG. 4 is a perspective view of a conventional voltage-dependent nonlinear resistor. 5: laminated sintered body, 6: internal electrode containing a grain boundary high resistance material, 7, 8: end face electrode.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】SrTiO3、CaxSr1-xTiO3(0.001≦x≦0.
5)、 BaySr1-yTiO3(0.001≦y≦0.5)、 MgzSr1-zTiO3(0.001≦z≦0.5)、のうち少なくとも一
種類以上を主成分とする複数のセラミック生シートと、
Na2O、NaF、Li2O、LiF、K2O、KF、Ag2O、CuO、Cu2O、Tl
2Oのうち少なくとも一種類以上を含んだ複数の内部電極
とを交互に、かつ、この内部電極の外部電極への取出し
部分以外は前記セラミック生シートで囲まれるように積
層して積層体を形成し、この積層体の焼成後、同積層体
の端面に内部電極と接続するように外部電極を形成する
電圧依存性非直線抵抗器の製造方法。
(1) SrTiO 3 , Ca x Sr 1-x TiO 3 (0.001 ≦ x ≦ 0.
5), a plurality of ceramics mainly composed of at least one of Ba y Sr 1-y TiO 3 (0.001 ≦ y ≦ 0.5) and Mg z Sr 1-z TiO 3 (0.001 ≦ z ≦ 0.5) Sheet and
Na 2 O, NaF, Li 2 O, LiF, K 2 O, KF, Ag 2 O, CuO, Cu 2 O, Tl
Alternately with a plurality of internal electrodes containing at least one kind of 2 O, and, except for a portion where the internal electrodes are taken out to external electrodes, are laminated so as to be surrounded by the ceramic raw sheet to form a laminate. Then, after firing this laminate, a method of manufacturing a voltage-dependent non-linear resistor, wherein an external electrode is formed on an end face of the laminate so as to be connected to an internal electrode.
【請求項2】内部電極は金、銀、パリジウム、白金、ロ
ジウム、イリジウム、モリブデン、タングステン、ニッ
ケル、鉄、クロム、銅のうちの一種類の金属またはこれ
らの金属からなる合金を主成分としてなる特許請求の範
囲第1項に記載の電圧依存性非直線抵抗器の製造方法。
2. The internal electrode is composed mainly of one of gold, silver, paridium, platinum, rhodium, iridium, molybdenum, tungsten, nickel, iron, chromium and copper, or an alloy of these metals. The method for manufacturing a voltage-dependent nonlinear resistor according to claim 1.
JP61126089A 1986-05-30 1986-05-30 Method of manufacturing voltage-dependent nonlinear resistor Expired - Lifetime JP2644731B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61126089A JP2644731B2 (en) 1986-05-30 1986-05-30 Method of manufacturing voltage-dependent nonlinear resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61126089A JP2644731B2 (en) 1986-05-30 1986-05-30 Method of manufacturing voltage-dependent nonlinear resistor

Publications (2)

Publication Number Publication Date
JPS62282414A JPS62282414A (en) 1987-12-08
JP2644731B2 true JP2644731B2 (en) 1997-08-25

Family

ID=14926328

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61126089A Expired - Lifetime JP2644731B2 (en) 1986-05-30 1986-05-30 Method of manufacturing voltage-dependent nonlinear resistor

Country Status (1)

Country Link
JP (1) JP2644731B2 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5823921B2 (en) * 1978-02-10 1983-05-18 日本電気株式会社 voltage nonlinear resistor
JPS5654009A (en) * 1979-10-09 1981-05-13 Matsushita Electric Industrial Co Ltd Internal electrode material composition for laminated chip varistor
JPS57166006A (en) * 1981-04-06 1982-10-13 Nippon Electric Co Electrode material for zinc oxide voltage nonlinear resistor
JPS6022310A (en) * 1983-07-18 1985-02-04 株式会社村田製作所 Multifunction chip part

Also Published As

Publication number Publication date
JPS62282414A (en) 1987-12-08

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