JP2669216B2 - Semiconductor stress detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for improving the characteristics of a semiconductor stress detecting device using a polycrystalline Si piezoresistor.

[0002]

2. Description of the Related Art As a conventional semiconductor stress detecting device, for example, "Micro-Diaphragm Pressure Sensor" Proceedin
gs of the 6th Sensor Symposium, 1986. pp. 23-27 ". FIGS. 5A and 5B are diagrams showing an example of the semiconductor pressure detecting device as described above, wherein FIG. 5A is a plan view and FIG.
FIG. 4A is a cross-sectional view taken along the line BB ′ of FIG. In FIG.
Is a cavity formed by etching in the Si substrate 26, 29
Is a Si ₃ N ₄ film defining the cavity 21. Reference numeral 22 denotes a diaphragm which is hermetically formed so as to cover the cavity 21, and is composed of Si ₃ N ₄ films 27, 28 and ₃₀ . The diaphragm 22 is formed with p-type polycrystalline Si piezoresistors 23 and 24 sandwiched between Si ₃ N ₄ films 27 and 28. The piezoresistor 23 is formed at the periphery of the diaphragm, and the piezoresistor 24 is formed at the center of the diaphragm. Reference numeral 25 denotes an etching hole used for etching the cavity 21, which is sealed with a Si ₃ N ₄ film 30.

Next, a brief description will be given of a manufacturing method. (10
A Si ₃ N ₄ film is deposited on the (0) plane Si substrate by LPCVD, and a window is opened on a portion to be a cavity. Next, a portion to be a cavity is covered with a polycrystalline Si layer (not shown) serving as an etch channel, and a window is formed until the portion reaches the etching hole 25. On this, a Si ₃ N ₄ film 28 and a polycrystalline Si layer constituting the diaphragm 22 are sequentially formed by LPCVD, and boron is ion-implanted into the polycrystalline Si layer, followed by patterning to form piezoresistors 23 and 24. . next,
After covering the piezoresistor with the Si ₃ N ₄ film 27, an etching hole 25 is made, and the etch channel of polycrystalline Si and the Si substrate thereunder are etched with an anisotropic etching solution such as KOH to form a cavity 21. I do. Next, after forming contact etching and wiring electrodes (not shown), PECV
D deposits the Si ₃ N ₄ film 30 and seals the cavity.

When pressure is applied to the diaphragm structure as described above, stresses in opposite directions are generated at the center and the end of the diaphragm, and the resistance values of the piezo resistors 23 and 24 change to opposite polarities. By forming a bridge circuit with the resistors 23 and 24, a voltage corresponding to the pressure can be output. In such a surface type pressure sensor, miniaturization is possible because etching from the back side is not used, and the leak current is small because the piezo resistance of the polycrystalline Si film formed on the insulating film is used. There is an advantage that it can be operated even in a high temperature atmosphere.

[0005]

In the conventional semiconductor stress detecting device as described above, a bridge circuit is simply constituted by a p-type polycrystalline Si piezoresistor.
Since the gauge factor of the p-type polycrystalline Si resistor has a temperature coefficient, there is a problem that the sensitivity of the bridge circuit as described above has a large temperature dependency. Further, in order to eliminate the above temperature dependency, it is necessary to provide a compensating circuit, which causes a problem that the structure becomes complicated and the cost becomes high.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and has as its object to provide a semiconductor stress detecting device which has a small temperature dependency of sensitivity and does not require a special compensation circuit. And

[0007]

Means for Solving the Problems In order to achieve the above object, the present invention is configured as described in the claims. That is, in the present invention, a p-type polycrystal disposed on a structural portion in which stress is generated in response to the application of an external physical quantity such that the direction of current flowing through the resistor is perpendicular to the applied stress. A plurality of Si piezoresistors and n-type polycrystalline Si piezoresistors are formed respectively,
Type polycrystalline Si piezoresistors are paired on opposite sides, and n
A full-bridge circuit is constructed by using a pair of type polycrystalline Si piezoresistors as another pair of opposite sides. The external physical quantity is, for example, acceleration or pressure. In addition, the above-mentioned structural portion has, for example, a cantilever structure or a double-supported beam structure, and is formed of a semiconductor or an insulator. The piezoresistor is generally formed so that a current flows in the longitudinal direction of a rectangle, but is not limited to a rectangle and may be another shape such as a square.
In short, it is only necessary that the direction of current flow is parallel to the stress.

[0008]

According to the experiments of the present inventors, the resistance formed in the direction parallel to the applied stress and the resistance formed in the direction perpendicular to the stress in the p-type polycrystalline Si resistance and the n-type polycrystalline Si resistance. It was found that there was a large difference in the resistance change rate characteristics with respect to stress. FIGS. 3A and 3B are diagrams showing an example of the above-described resistance change rate characteristics. FIG. 3A shows the characteristics of a p-type polycrystalline Si resistor, and FIG. 3B shows the characteristics of an n-type polycrystalline Si resistor. As can be seen from FIG. 3A, in the p-type polycrystalline Si resistor, the resistance change rate with respect to the stress is significantly different between the resistance parallel to the stress and the resistance perpendicular to the stress, and the resistance change with respect to the temperature change. The rate of change of the rate is reversed. That is, the temperature dependence of the sensitivity has the opposite sign and the same polarity (the difference from 0 in the resistance change rate is as follows:
Parallel indicates a negative direction, and vertical indicates a positive direction, both of which are larger). Also, in the n-type polycrystalline Si resistor, the resistance change rate with respect to the stress is significantly different between the resistance parallel to the stress and the resistance perpendicular to the stress, and the temperature dependence of the sensitivity has the opposite sign and the opposite polarity characteristic (resistance The difference from 0 in the rate of change indicates that as the temperature decreases, the rate of change increases in the positive direction for parallel and decreases in the negative direction for vertical).

The present invention has been made on the basis of the novel knowledge of the present inventors as described above, and a p-type polycrystalline Si piezoresistor and an n-type polycrystalline Si piezoresistor formed perpendicular to stress are provided. By appropriately combining them to form a bridge circuit, a semiconductor stress detecting device having a small temperature dependency is realized. As can be seen from the characteristics of FIG. 3, the p-type polycrystalline Si piezoresistor and the n-type polycrystalline Si piezoresistor formed perpendicularly to the applied stress have the resistance change characteristics with respect to the applied stress in the opposite direction and the sensitivity is lower. The temperature dependence shows the opposite sign with the opposite sign. That is, when stress is applied, the resistance change rate changes in the positive direction for the p-type and changes in the negative direction for the n-type. Further, the difference from 0 in the resistance change rate increases in the positive direction in the p-type and decreases in the negative direction in the vertical direction as the temperature decreases. Therefore, the temperature dependence of sensitivity can be reduced by forming a full-bridge circuit using the p-type polycrystalline Si piezoresistors as a pair of opposite sides and the n-type polycrystalline Si piezoresistors as another pair of opposite sides. The p-type polycrystalline Si piezoresistor and the n-type polycrystalline Si piezoresistor have the opposite sign in resistance change characteristics with respect to applied stress, so that sufficient sensitivity can be obtained even if the connection is made as described above.

[0010]

FIG. 1 is a diagram showing an embodiment of the present invention.
Is a plan view, and (b) is a cross-sectional view taken along the line AA 'of (a). In FIG. 1, 1 is a silicon substrate, 2 is a thin beam portion formed by performing a lectrochemical etching on the back surface of the silicon substrate, and 3 is a weight portion, which is connected to the substrate 1 via the beam portion 2. Reference numeral 4 is a substantially U-shaped groove formed so as to surround the weight portion 3 and the beam portion 2, and the beam is formed by etching from the front surface side or by forming a p-type layer in advance and performing electrochemical etching from the back surface. It can be realized by etching at the same time. Four polycrystalline Si piezoresistors are formed on the beam 2, and the resistance value changes due to the stress generated in the beam 2 when the acceleration is applied so that the acceleration can be detected. Polycrystalline Si piezoresistor is 2
One is p-type polycrystalline Si piezoresistors 51 and 52, the other two are n-type polycrystalline Si piezoresistors 61 and 62, and 4
Both books are formed in the direction perpendicular to the applied stress. The arrow 50 indicates the direction of stress. The above-mentioned four polycrystalline Si piezoresistors are a pair of opposite sides of p-type polycrystalline Si piezoresistors 51 and 52, and n-type polycrystalline Si piezoresistors 61 and 62.
And are connected so as to form another pair of opposite sides to form a full bridge circuit as shown in FIG. In addition, 7 is Si
The O ₂ film, 8 is a substrate pedestal. Further, for simplification, the peripheral circuit, the wiring, and the SiO ₂ film are not shown.

Next, the operation will be described. When acceleration is applied, the beam 2 bends and generates stress. As a result, the resistance value of the polycrystalline Si piezoresistor changes, and the voltage is output as a voltage change of the full bridge circuit, that is, a voltage difference between the two output terminals V _A and V _B. If the resistance value of the polycrystalline Si piezoresistor before the stress is applied is R, the polycrystalline S
The resistance value of the i-piezoresistor changes as in the following (Equation 1). R → R + ΔR = R (1 + Gε) (Equation 1) where G = (ΔR / R) (1 / ε): Gauge factor perpendicular to stress ε: Strain In this case, the output voltage V _OUT of the full bridge circuit is , (Equation 2).

[0012]

(Equation 2)

Where R _{p is a} p-type polycrystalline Si piezoresistor 5
Resistance value of 1, 52 G _p : Gauge factor of p-type polycrystalline Si piezoresistors 51, 52 R _n : Resistance value of n-type polycrystalline Si piezoresistors 61, 62 G _n : n-type polycrystalline Si piezoresistor 61, Gauge factor of 62 At this time, if 1 >> Gε and R _p = R _n , the following equation (3) can be obtained from equation (2).

[0014]

(Equation 3)

However, V _CC : power supply voltage The sensitivity S at this time is represented by the following (Equation 4) by differentiating the Equation (3) by ε.

[0016]

(Equation 4)

The temperature characteristic of the sensitivity is expressed by the following equation (5).

[0018]

(Equation 5)

T: temperature For example, a polycrystalline Si film is formed at a substrate temperature of 630 ° C. to a thickness of 3500 °, boron is 2 × 10 ¹⁵ cm to ² (in the case of a p-type), and phosphorus is 5 × 10 ¹⁵ After ion implantation with a dose of cm ~ ² (in case of n type), oxidation is performed to form 6 on the polycrystalline Si.
A 00 Å oxide film is grown and further annealed in a N ₂ atmosphere at 900 ° C. for 30 minutes to form p-type and n-type polycrystalline S
When the i resistance was formed, the temperature coefficient of the stress in this piezoresistance and the rate of change of the gauge factor G _{T in} the vertical direction was TCG _p = -2200 ppm / K TCG _n = 7700 ppm / K. For example, in a 30 ° C., a _{G p = -5.9 G n = 0.16} , dG p /dT=0.013 dG n /dT=0.012 next, vertical polycrystalline Si piezo stress It has been found that the resistance has properties as shown in the following (Equation 6) and (Equation 7). G _p <0 G _n > 0 (Equation 6)

[0020]

(Equation 7)

When the above equations (6) and (7) have a relationship, it can be seen from the equations (4) and (5) that the temperature change of the sensitivity output is two digits while maintaining the sensitivity output. It turns out that the degree can be improved. For this reason, by optimizing the conditions of the p-type and n-type polycrystalline Si piezoresistors formed in the vertical direction with respect to the stress, a full-bridge circuit is formed, thereby canceling the temperature characteristics of the sensitivity output while maintaining the sensitivity output. In addition, the temperature dependency of the sensitivity can be made much smaller than in the past.

Next, FIG. 4 is a plan view of another embodiment of the present invention. This embodiment is an example in which the present invention is applied to a pressure sensor. In FIG. 4, the p-type polycrystalline Si piezoresistors 51 and 52 and the n-type polycrystalline Si piezoresistors 61 and 62 are formed on the periphery of the diaphragm 11 parallel to the sides of the diaphragm, that is, in the direction perpendicular to the applied stress. There is. These are wired as shown in FIG. 4 to form a full bridge circuit. When pressure is applied to the diaphragm 11, stress is generated and the bridge circuit has the same action as that shown in the embodiment of FIG. Hereinafter, the same effect can be obtained, and a pressure sensor whose sensitivity is temperature-compensated can be easily obtained.

In the above-described embodiments, an example of a stress detecting device having a thin-walled structure has been described. However, the present invention can be applied to a stress detecting device having no thin-walled structure. The effect is obtained. Further, in the embodiments described above, the example in which the polycrystalline Si piezoresistor is formed on the semiconductor substrate is shown. However, the present invention is not limited to the semiconductor substrate, and the polycrystalline Si piezoresistor may be formed on an insulating substrate. Similar effects can be obtained.

[0024]

As described above, according to the present invention, a bridge circuit is formed by appropriately combining a p-type polycrystalline Si piezoresistor and an n-type polycrystalline Si piezoresistor formed perpendicular to an applied stress. This has the effect of canceling out the temperature dependence of the gauge factor of the polycrystalline Si piezoresistor and obtaining a semiconductor stress detection device with a small temperature dependence with a simple configuration without using a temperature compensation circuit.

[Brief description of the drawings]

FIG. 1 is a plan view and a cross-sectional view of one embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of the embodiment of FIG.

FIG. 3 is a characteristic diagram showing a relationship between an applied stress and a resistance change rate depending on a direction in which a piezoresistor is formed.

FIG. 4 is a plan view and a sectional view of another embodiment of the present invention.

FIG. 5 is a plan view and a cross-sectional view of a conventional device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Silicon substrate 2 ... Beam part 3 ... Weight part 4 ... Groove 50 ... Arrow showing the direction of application of stress 51, 52 ... p-type polycrystalline Si resistor 61, 62 formed perpendicular to the applied stress 61, 62 ... n-type polycrystalline Si resistor 7 ... SiO ₂ film 8 ... substrate pedestal 11 ... diaphragm 21 ... cavity 22 ... diaphragm 23, 24 ... p-type polycrystalline Si resistor 25 ... etching holes 26 ... Si substrate 27 to which are formed in the vertical direction 30 ... Si ₃ N ₄ film

Claims (1)

(57) [Claims] 1. A p-type polycrystal Si disposed on a structure in which stress is generated in response to the application of an external physical quantity such that the direction of current flowing through the resistor is perpendicular to the applied stress.
A plurality of piezoresistors and n-type polycrystalline Si piezoresistors are formed, the p-type polycrystalline Si piezoresistors are a pair of opposite sides, and the n-type polycrystalline Si piezoresistors are another pair of opposite sides. A semiconductor stress detection device comprising a circuit.