JP2868630B2 - Semiconductor package mounting structure - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor package.
It relates to the mounting structure.

[0002]

2. Description of the Related Art Conventionally, as a semiconductor package, an SOJ (SMALL OUTL
Various types such as INE J-LEAD), SOP (SMALL OUTLINE PACKAGE), and DIP (DUAL INLINE PACKAGE) have been used, but all have one lead terminal per signal. .

[0003]

On the other hand, with the recent proposal of various high-density mounting forms such as three-dimensional mounting, various lead shapes of semiconductor packages are also required. Has a drawback of low versatility in mounting.

SUMMARY OF THE INVENTION The present invention has been made to solve the above drawbacks, and has improved the mounting density by three-dimensional mounting.
It is intended to provide a mounting structure of a semiconductor package .

[0005]

According to the present invention, there is provided the above object.
Is a semi- conductor for mounting a semiconductor package on a board, which has multiple external connection leads protruding from both side edges of the package body.
The mounting structure of the body package, wherein each of the external connection leads
The two lead terminals are bent in a J-shape in opposite directions.
And the board is mounted on the device mounting surface.
Two semiconductor chips are arranged facing each other, and the semiconductor package
Elastically so that each lead terminal of the
Semiconductor package mounting structure
It is more accomplished to provide a granulation.

[0006]

According to the above construction, two lead terminals are arranged on each external connection lead of the semiconductor package according to the present invention, and each lead terminal is independently bent in accordance with the mounting form. You.

As a result, it is possible to obtain external connection leads of various shapes by bending the two lead terminals 2 and 2 in independent directions, and to cope with various mounting forms including three-dimensional mounting. Can be.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. As shown in FIG. 1, the semiconductor package according to the present invention has a lead pair 3 composed of two lead terminals 2 for one signal, and each lead terminal 2, 2 belonging to the same lead pair 3 Are bonded to the same I / O pad of a chip sealed in the package body 1.

As shown in FIGS. 1 and 2, a lead pair 3 arranged for each signal is composed of two lead terminals 2 and 2 which are stacked so as to overlap in a plan view. For example, it can be obtained by joining two lead frames by spot welding or the like. In addition, as shown in FIG. 3, the lead pair 3 can also be formed by arranging two lead terminals 2 side by side in a plan view.

FIG. 4 shows a semiconductor package obtained by processing the above-mentioned lead pair 3 into a shape suitable for three-dimensional mounting.
Each lead terminal 2 constituting the lead pair 3 is bent in a J-shape in directions opposite to each other. As shown in FIG. 5, two substrates on which the semiconductor package is mounted are erected with the element mounting surfaces 4 facing each other, and the semiconductor package utilizes the elasticity of the lead terminals 2 between the substrates 5 and 5. Press-fit.
This mounting form is particularly effective for a memory element. An address bus and a data bus are formed in the element mounting surface 4 of the substrate 5 in the vertical direction, and each lead pair 3, 3. Are directly pressed and connected on these bus lines.

Therefore, in this embodiment, a lead-out pattern is not required, as compared with the conventional mounting structure which requires a pattern to be drawn out once from the bus line to the element bonding pad. This has the advantage that the number of elements can be increased and the number of elements can be easily increased.

In the above-described embodiment, the case where each lead pair 3 is mounted by being pressed against the bus line of the substrate 5 by utilizing its elasticity is shown, but even if the lead pair 3 is soldered. The good thing is, of course.

When a memory module is constructed using the semiconductor device according to the present invention, signals used independently such as control signals correspond to the corresponding read pairs 3 by branching connection pads from the control bus. Alternatively, as shown in FIG. 6, the corresponding lead pair 3 may be inserted into the through hole 6 of the substrate 5. As described above, the lead pair 3 is formed to be thick enough to be inserted into the through hole 6 so that it can be used as an insertion type lead. 2 may be formed to have a normal thickness, and one of them may be cut off when used as an insertion type lead.

Although the case where the semiconductor device according to the present invention is three-dimensionally mounted has been described above, it is of course possible to use the semiconductor device as a normal surface mounted device, and each lead terminal 2 is bent in the opposite direction. In this case, a semiconductor element having a reverse type lead arrangement is prepared because a reverse type semiconductor element can be obtained only by changing the lead terminals 2 joined to the substrate 5 to those vertically symmetrical. This eliminates the necessity of performing, and can improve the versatility, and the unused lead terminals 2 have a heat radiation effect, which is advantageous in terms of thermal design.

The lead terminals 2 of the semiconductor device according to the present invention are not limited to those having a J-shaped bend as described above. As shown in FIG. You can also maintain compatibility.

[0016]

As is apparent from the above description, according to the semiconductor package of the present invention, it is possible to obtain external connection leads of various shapes by bending two lead terminals in independent directions. It can correspond to various mounting forms including three-dimensional mounting.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of the present invention.

2A and 2B are views showing a lead pair, FIG. 2A is a plan view, and FIG.
Is a side view.

3A and 3B are diagrams showing another lead pair, wherein FIG. 3A is a plan view,
(B) is a side view.

FIG. 4 is a diagram showing a processed lead pair.

FIG. 5 is a diagram showing a three-dimensional mounting state.

6A and 6B are views showing a modification of FIG. 5, wherein FIG. 6A is a side view,
(B) is a figure which shows a board | substrate.

FIG. 7 is a diagram showing a modification of the present invention.

[Explanation of symbols]

 1 Package body 2 Lead terminal 3 Lead pair

Claims (1)

(57) [Claims] A semiconductor package comprising a plurality of external connection leads projecting from both side edges of a package body is mounted on a substrate.
Mounting structure of a semiconductor package, wherein each of the external connection leads connects two lead terminals in opposite directions.
Formed as a pair of leads bent in a J-shape, two substrates are arranged with the device mounting surfaces facing each other , and the semiconductor package faces each lead terminal of the lead pair.
It is elastically deformed so as to be pressed against the substrate
Semiconductor package mounting structure.