JP2892587B2 - Field emission device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission device known as a cold cathode and a method for manufacturing the same.

[0002]

2. Description of the Related Art An electric field applied to a metal or semiconductor surface is 10
^At about ⁹ [V / m], electrons pass through the barrier due to the tunnel effect, and electrons are emitted in a vacuum even at room temperature. This is called field emission, and a cathode that emits electrons based on this principle is called a field emission cathode (hereinafter referred to as FEC).
It is called).

In recent years, it has become possible to manufacture a surface emission type field emission cathode composed of a micron size field emission cathode by making full use of semiconductor processing technology. A large number of field emission cathodes are formed on a substrate. The device is expected to be an element constituting a flat display device or various electronic devices by irradiating electrons emitted from the respective emitters to a phosphor screen.

As one of the methods for manufacturing such a field emission device, there is a rotary oblique deposition method developed by Spindt (US Pat. No. 3,789,471). SPINDT
FIGS. 20A and 20B show the FEC manufactured by the method. In the FEC of FIG. 20A, a thin film conductor layer 101 serving as a cathode electrode is formed on a substrate 100 made of glass or the like by vapor deposition, and an S-doped impurity is further formed thereon.
i deposited by resistive layer 102 is formed a further SiO ₂
Thereby, an insulating layer 103 is formed. Then, Nb to be the gate electrode layer 104 is deposited thereon.

A hole 114 is provided in the insulating layer 103 and the gate electrode layer 104, and the hole 11 in such a substrate is provided.
A cone-shaped emitter 115 is formed on the resistance layer 102 by depositing Mo as an emitter material on the fourth side by forward evaporation.

[0006] Such an FEC is a cone-shaped emitter 1.
Since the distance between the gate electrode layer 104 and the gate electrode layer 104 can be made submicron,
By applying a voltage of only several tens of volts between 04,
Electrons can be emitted from the emitter 115.

FIG. 20B shows an FEC having a triode structure.
In this example, another insulating layer 107 is provided on the gate electrode layer 104, and a second gate electrode 108 is stacked thereon. The second gate electrode 108 plays a role for focusing the electrons extracted from the emitter.

A display device can be constructed by using an FEC as shown in FIGS. 20A and 20B.
A display device using 20 (b) is configured as shown in FIG . That is, the anode substrate 116 to which the phosphor material is attached is disposed above the substrate on which a large number of the FECs are formed in an array. Then, the control voltage V _G1 with respect to the first gate 104, a voltage V _G2 for the focusing operation to the second gate 108, and by applying the anode voltage V _A, the phosphor by electrons emitted from the emitter 115 Can emit light, and a display device can be obtained.

[0009]

By the way, an FEC which forms an emitter on a cone by such a Spindt method.
Then, there are the following problems. Since the emitter cone is formed by a relatively poor controllability method such as vapor deposition, it is difficult to maintain the accuracy of the emitter shape / size and the distance between the emitter and the gate. In particular, since the positional relationship between the tip of the emitter and the gate greatly affects the field emission characteristics, it is a great disadvantage that it is difficult to maintain the accuracy between the emitter and the gate. Further, for the same reason, there is a problem that it is difficult to maintain reproducibility and uniformity of the production.

[0010]

SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a field emission device and a method of manufacturing the same which can easily maintain good manufacturing accuracy, high reproducibility and uniformity. The purpose is to:

[0011] For this reason, as the field emission device, cathode
Formed by etching part of the silicon substrate
Multiple roof-type emitters and corresponding
Control electrode (first gate) and focusing electrode (second gate)
Field emission according to the voltage applied to the control electrode.
To be configured. And furthermore, the roof type emitter
When the width is W and the arrangement pitch is P, P / W is 2
5, the roof-type emitters are arranged in a comb shape.
So that

[0012] Further, the device has a roof-type emitter formed by partially etching a cathode with a silicon substrate, and a control electrode and a focusing electrode corresponding to the roof-type emitter. Field emission is performed according to a voltage applied to the control electrode. The method for manufacturing the field emission device configured as described above includes a cathode layer
Form a mask layer on a silicon substrate
Patterning in the shape of a
The cathode layer into a wedge shape using the mask layer as a mask
And forming a thermal oxide film on the surface.
An insulating layer and a control electrode layer are formed on the
After performing the polishing, the top side of the control electrode layer
Forming an insulating layer, a focusing electrode layer, and a protective layer on the
Mask layer, protective layer, and thermal oxide film above the emitter
Removing stripes to form a stripe-shaped emitter;
A stripe-shaped emitter having a P / W of 2 to 5
Process into a comb shape to make a roof-shaped emitter,
To as rope line.

[0013]

According to the above manufacturing method, since the emitter is manufactured by etching with high controllability, it is easy to maintain accuracy and reproducibility . Further, since the emitter and the cathode are integrally formed, the process can be facilitated and the operating characteristics can be made uniform. In addition, by making the emitter a roof type, an electron emission point is determined, and a stable emission current can be obtained. In addition, silicon
By forming a locator and having a focusing electrode,
The above P / W can be set in a wide range so as to take a value of 2 to 5.
Wear.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a field emission device (FEC) of the present invention and a method of manufacturing the same will be described below.

<FEC as Example and Manufacturing Method Thereof> FIG. 1 shows an FEC according to an example . In FIG. 1, reference numeral 10 denotes a cathode layer formed of a silicon substrate (Si). Reference numeral 11 denotes a roof-shaped emitter, which is integrally formed of Si with the cathode layer. The width W and pitch P of the roof-type emitter 11 are set so that the value of P / W is about 2 to 5. 12 is an insulating layer made of, for example, SiO ₂ , 13 is a control electrode made of Nb
(First gate) . Furthermore, an insulating layer of SiO ₂
14, a focusing electrode (second gate) 15 of Nb is provided.
It is.

[0016] illustrating a method of manufacturing the FEC by FIGS 14. 2A to 14A show a cross-sectional state of the FEC in each step, and FIG. 2B shows a planar state.

As shown in FIG. 2, first, a silicon substrate Si is cleaned (RCA cleaning) with three kinds of solutions. The three types of solutions are a solution of ammonia and hydrogen peroxide, a solution of hydrogen fluoride, and a solution of hydrochloric acid and hydrogen peroxide.

Next, the cleaned silicon substrate Si is placed in an oxidation furnace, and a thermal oxide film SiO ₂ is formed as shown in FIG. The oxidation furnace treatment is, for example, at 1100 ° C. for 4 to 5 hours, and O ₂
Gas flows in.

Next, a resist is added in a stripe shape to
HF etching is performed, and the thermal oxide film SiO ₂ is patterned in a stripe shape as shown in FIG. 4 (only one pattern is shown in the drawing).

Here, RIE etching is performed to process the silicon substrate Si into a wedge shape as shown in FIG. RIE
For etching, for example, SF ₆ 40 sccm, ₆ Pa,
It is performed under the conditions of 140 W and 3.5 min.

After processing as described above, the substrate is placed in a thermal oxidation furnace and a thermal oxide film SiO ₂ is formed as shown in FIG. The oxidation furnace treatment is, for example, at 1100 ° C. for 4 to 5 hours,
₂ Gas flows in. This processing time is determined by the thermal oxide film S
The time is set so that a thermally oxidized film SiO ₂ having a suitable thickness can be obtained so that the tip of the emitter when the iO ₂ is removed is sharpened like a roof.

Next, the insulating layer on the thermal oxide film SiO ₂ from its upper surface as shown in FIG. 7 (SiO _2), a gate layer (N
b) is deposited. Then, the gate layer (Nb) is patterned as shown in FIG. 8 to form the first gate 13. After the first gate 13 is patterned, an insulating layer (SiO ₂ ) and a gate layer (Nb) are deposited from the upper surface, and an aluminum layer (Al) and a molybdenum layer (Mo) are deposited as protective films in the subsequent steps. To the state shown in FIG .

Then, the layer serving as the emitter mask is removed by BHF etching to obtain the state shown in FIG . Since the Mo layer serves as a protective film against the BHF etching solution, each layer such as the thermal oxide film SiO ₂ is removed at a portion above the emitter as shown in the figure, and a stripe-shaped emitter protrusion having a substantially triangular cross section is displayed. A hole is formed at the same time as it is emitted.

Next, subjected to patterning by adding the resist R on the top surface, so that the non-resist portions R _OP as shown in FIG. 11 is formed. The patterning of the resist R
This is for combing the stripe-shaped emitter projections to form a roof-type emitter. As described above, the value of P / W is about 2 to 5 for the width W and the pitch P of the roof-type emitter 11. Patterning is performed as follows. In this state, RIE etching is performed with SF ₆ gas using the Al layer as a mask layer.

After the RIE etching is completed, the resist R is removed, and the Al layer and the Mo layer are further removed with phosphoric nitric acid .
State 12 is assumed. In this state, the stripe-shaped emitter protrusions are divided into comb-like shapes by RIE etching to form a plurality of roof-type emitters 11.

Next, a resist R is applied as shown in FIG.
Perform IE etching. As a result, the second gate (focusing electrode) is patterned, and the resist is removed after RIE etching, as shown in FIG . That is, FIG.
The FEC of main manufacturing process shown in ends.

[0027] Having described the field emission device and a manufacturing method thereof in the above Example <electrode structure can be applied to the embodiment> The configuration of the case of manufacturing a display device using such a field emission device This will be described below.

FIG . 15 shows a schematic configuration as an example of a display device using the FEC of the embodiment . In this display device 1, image data for display is supplied to a memory 2, and a timing controller 3
Is read out and supplied to the shift register 6.

The timing controller 3 controls the scanning driver 4 so that the scanning operation is performed in the vertical direction. That the scan-side driver 4 will be sequentially applying a scan voltage to the cathode C ₁ -C _n.

Image data for one horizontal line is supplied from the shift register 6 to the data driver 5 based on a timing signal from the timing controller 3, and a voltage based on the image data for one horizontal line is applied to the gate line G.
It will be applied to ₁ ~G _m. Note that the gates G ₁ to G ₁
G _m, the second gate G _S of the first gate G _F and the focusing electrode as each control electrode is formed in a state of being laminated through an insulating portion, the image data is first gate G
_F will be applied. And each gate line G
₁ to the second gate in ~G _m second gate driver 7
Is applied. In the case of a monochrome display device, the second gate driver 7 controls each of the gate lines G _{1 to} G
_A common voltage may be applied to the second gate of _m , and in the case of a color display device, the second gate driver 7 may operate so that the second gate selects a color.

It is to be noted that various methods are conceivable for selecting a luminescent pixel and a luminescent color in accordance with the configuration of the display device, such as selection using a cathode, a first gate, a second gate, or an anode. Not even.

In the display area, for example, cathodes C _{1 to} C _n are arranged in a horizontal line direction on a glass substrate, for example.
Above this, an emitter array as described in each of the above embodiments is formed. Further above the first gate G _F and the second gate G _{S in} each of the gate lines G _{1 to} G _m .
Is arranged.

Although not shown in this figure, the gates G ₁ to G ₁
Will be G _m and the cathode C ₁ -C _n each multiple roof-type emitter at the intersection with a position of the (11 or 22) is formed, the gate G ₁ ~G _m and cathode C ₁ ~
Many FEC arrays at the intersection of C _n
One pixel will be formed.

[0034] A _N shown by the one-dot chain line, the cathode C ₁ -C
₂ shows an anode disposed above _n and gates G _{1 to} G _m , and a phosphor is applied to each pixel. And
When a voltage is applied on the basis of the image data to the first gate G _F, electrons from FEC intersections become pixels of the cathode being driven by the vertical scanning at that time (C ₁ -C _n) to the anode A _N Is emitted to excite the phosphor, and a display operation is performed.

The F of this embodiment in such a display device
As the EC array, various types of gate patterns described below are conceivable (note that the following description is based on the first gate G).
_F and second gate G _S is described as the same pattern).

FIG . 16 shows an example in which one gate is formed by a plurality of stripe patterns as shown by hatched portions. In this case, the gap between the stripes becomes an electron emission portion from the roof-type emitter 11, that is, a gate opening.

FIG . 17 shows a shape corresponding to more dots (one dot of phosphor), in which an elongated hole H is formed corresponding to the roof-type emitter 11. Further, in the roof-type emitter 11, the emitted electrons are likely to spread in the width W direction. In order to more effectively suppress the crosstalk, the elongated holes H should be parallel to the cathode lines as shown in FIG. (However, this is the case when the gap between dots is small in the gate direction).
Further, as shown in FIG.
May be formed so that the gate pattern and the roof-type emitter 11 are formed.

[0038]

As described above, in the field emission device according to the present invention, the roof type emitter is provided with a pitch P / width W of 2-5.
As a result, the emission current can be stabilized as compared with the stripe-shaped emitter by being formed in a comb shape, and the roof-type emitter is integrally formed with the cathode, so that the cathode and the emitter can be formed. Variations in characteristics due to boundary changes between them are eliminated, and uniformity of characteristics can be obtained for the manufactured FEC. A focusing electrode is provided
As a result , the display device can widen the gap between the anode and the cathode, and can increase the anode voltage to achieve high brightness. Further, the drive circuit can be simplified and the driver cost can be reduced.

Further, according to the method for manufacturing a field emission device of the present invention, the FEC having the above structure can be manufactured by simple steps, and the method of generating an emitter is not limited to vapor deposition . Further, since the emitter and the like are formed by etching having higher controllability than vapor deposition, it is easy to maintain accuracy, and there is an effect that manufacturing reproducibility and uniformity are high.
A C array can be manufactured.

[Brief description of the drawings]

FIG. 1 is an explanatory view of a structure of an embodiment of a field emission device of the present invention.

FIG. 2 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 3 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 4 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 5 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 6 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 7 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 8 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 9 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 10 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 11 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 12 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 13 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 14 is an explanatory view of an embodiment of the manufacturing method of the present invention.

FIG. 15 is an explanatory diagram of a display device using an embodiment of the present invention.
is there.

FIG. 16 shows a gate pattern that can be employed in an embodiment of the present invention .
FIG.

FIG. 17 is a gate pattern that can be employed in an embodiment of the present invention .
FIG.

FIG. 18 is a gate pattern that can be employed in an embodiment of the present invention .
FIG.

FIG. 19 is a gate pattern that can be employed in an embodiment of the present invention .
FIG.

FIG. 20 is an explanatory diagram of an FEC array.

FIG. 21 is an explanatory diagram of a display device using an FEC array.
is there.

[Explanation of symbols]

1 display device 2 memory 3 the timing controller 4 the scan-side driver 5 data-side driver 6 shift register 7 second gate driver 10, C ₁ -C _n cathode 11 roof-type emitter 12, 14 insulating layer 13, G _F First gate 15, G _S Second gate G ₁ ~G _m gate lines A _N anode

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hisataka Ochiai 629 Oshiba, Mobara-shi, Chiba Futaba Electronics Industry Co., Ltd. (72) Inventor Junji Ito 1-4-1, Umezono, Tsukuba-shi, Ibaraki Pref. Within the Research Institute of Technology (72) Inventor Masatake Kanamaru 1-1-4 Umezono, Tsukuba-shi, Ibaraki Pref. Katsumi Enari, Examiner at the Electronic Technology Research Laboratory, AIST (56) References JP-A-6-12974 (JP, A JP-A-5-274997 (JP, A) JP-A-51-50648 (JP, A) JP-A-4-312739 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01J 1/30 H01J 9/02

Claims (2)

(57) [Claims] A plurality of roof-type emitters formed by partially etching a silicon substrate serving as a cathode; a control electrode and a focusing electrode corresponding to the roof-type emitter;
While being configured to field emission is performed in accordance with the voltage applied to the control electrode, the width of the roof-type emitter
W, when the arrangement pitch of the roof type emitter is P
Each roof type emitter is combed so that P / W is 2 to 5.
A field emission device characterized by being arranged in a shape . 2. A semiconductor device comprising a plurality of roof-type emitters formed by partially etching a silicon substrate serving as a cathode, a control electrode and a focusing electrode corresponding to the roof-type emitters, and an electric field corresponding to a voltage applied to the control electrodes. A method of manufacturing a field emission device, wherein at least the following steps (a) to (f) are performed as a method of manufacturing a field emission device configured to emit light. (A) A mask layer is formed on a silicon substrate on which a cathode layer is to be formed, and is patterned in a stripe shape. (B) The cathode layer is processed into a wedge shape using the patterned mask layer as a mask, and a thermal oxide film is formed on the surface thereof. (C) An insulating layer and a control electrode layer are formed on the upper surface side of the thermal oxide film, and the control electrode is patterned. (D) An insulating layer, a focusing electrode layer, and a protective layer are formed on the upper surface side of the control electrode layer. (E) The mask layer, protective layer, and thermal oxide film above the emitter are removed to form a stripe-shaped roof-type emitter . (F) Stripe-shaped roof-type emitter
The width of the wing was W and the pitch of the roof emitters was P.
Sometimes, it is processed into a comb shape so that P / W becomes 2 to 5.