JP2822905B2 - Encoding / decoding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an encoding / decoding apparatus for video, audio, data, etc. The present invention relates to an encoding / decoding device in which a circuit detected by the device is enhanced.

[0002]

2. Description of the Related Art In a conventional data compressing / decompressing apparatus of a transmission system, as shown in FIG. An error is detected by error correction circuits 4 and 5 such as Reed-Solomon.

[0003] Further, it is impossible to detect the data error in the compression unit 3 of the encoding device 1 and the interface between the compression unit 3 and the error correction unit 4 by the error correction 5 in the decoding device 2. Therefore, conventionally, in the encoding device 1, the periodic signal is inserted into the original signal such as the video signal input and the like and compressed, and the decoding device 2 that inputs the compressed data expands the data in the expansion unit 6. Later, a method of judging the validity of data and detecting an error is adopted.

[0004]

As described above, in the conventional encoding / decoding apparatus, data compression is performed by inserting a periodic signal into the original data and then performing variable-length encoding, and decoding is performed on the decoding apparatus side. Judge the validity of the data and perform error detection.

[0005] At this time, even if data containing an error is decompressed, periodic data may be generated depending on the content of the data, and there is a problem that error detection may not be possible. Further, since error detection is limited to intervals at which periodic data occurs, there is a problem that error detection cannot be performed early.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide an encoding / decoding device that detects an error at high speed and reliably.

[0007]

In order to achieve the above object, according to the present invention, a decoding apparatus provided with an error correcting means and a decompressing means further comprises the step of generating data other than statistically encoded data from input data. Detecting means for detecting an error in end-of-block data, and the input data
Means for detecting an error of the periodic signal inserted in the block line header of the above , and means for detecting an error of the total number of blocks in one frame ,
(1) Detection of occurrence of data other than statistically encoded data,
(2) Detection of end of block data, (3) Block
Detection of periodic signals inserted in the
(4) Detection of the total number of blocks in one frame and hierarchical
And an encoding / decoding apparatus characterized by performing an accurate error detection .

In the compressed data input to the decoding device, preferably, a predetermined number of data forms one block, end-of-block data is inserted at the end of one block, and the predetermined number of blocks One block line is formed, a block line header is added to one block line, and a predetermined number of block lines
Form a frame. According to a preferred aspect of the present invention, in a device for inputting a compressed data string and decoding the compressed data string via an error correction circuit and an expansion circuit, the data string output from the error correction circuit is compared with a variable length coding table. A code identification circuit for decomposing the data into code data, a code comparison circuit for receiving the code data output from the code identification circuit and detecting the presence / absence of a code other than the variable-length coded data, A block number comparing circuit for comparing whether or not a predetermined value is obtained, a periodic signal comparing circuit for checking a periodic signal separated from within the block line header and checking whether input data is appropriate,
And a error detection circuit for sending a control signal to the decompression circuit by error generated from the above circuit, (1) Statistical code
Of data generation other than coded data, (2) End of object
Lock data detection, (3) in block line header
(4) detection of the periodic signal inserted in the frame
It is characterized in that detection of the number of blocks and error detection are performed hierarchically .

[0009]

According to the encoding / decoding apparatus of the present invention, the apparatus described in the conventional example, that is, data compression is performed by inserting a periodic signal into original data and then performing variable-length encoding.
A circuit for judging the validity of the data decoded on the decoding device side and performing error detection includes: (1) a statistical code code (Huffman code, etc.) identification circuit and detection of occurrence of a code that does not exist in the statistical code code (2) Equipped with a circuit for counting the number of data, and by detecting the validity of the total number of data in frame units, a data error can be detected more quickly and more reliably. It was made. That is, according to the present invention, it is possible to detect at high speed a data error generated between the compression unit of the encoding device and the compression unit and the error correction unit.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. FIG.
Is a format per frame of the video signal which is the original signal. FIG. 3 shows the data structure after compression.

The compressed data input to the decoding device 14 will be described in advance. The video signal, which is the original signal, is compressed per frame according to the format shown in FIG. 2, resulting in a data string as shown in FIG.

Referring to FIG. 2, data of one frame of a video signal is divided into, for example, eight horizontal dots and eight vertical lines in order to perform block compression. In this case, one frame is 72
It is composed of 0 dots × 480 lines.

Referring to FIG. 2, data compression is performed in units of 8 dots × 8 lines (referred to as “block”).
For example, one block line is composed of 65 blocks.

At the head of the block line, a block line header (HD1, HD2,..., HD60) is added.

One frame is composed of 60 block lines, and a frame header (VHD) is added to the head of one frame of data.

The periodic signal is inserted in the block line header. For example, the block line header is HD1
= “000001” b, HD2 = “000010” b,
.., HD60 = “111100” b (where b means binary display).

The data in each block becomes variable-length data when compressed using Huffman coding or the like.
The data sequence is as shown in FIG. That is, referring to FIG. 3, the data length of each block (1, 2,..., 65, etc.) is variable.

The data in each block is composed of a Huffman code, and an end of block code (EOB) is added to the end of the block.

From the structure of the compressed data, the following four layers are considered to detect error data hierarchically.

(1) Verification of individual data in a block.

(2) Verification for each block.

(3) Verification for each block line.

(4) Verification for each frame.

The following method is used as an error detection method for each layer.

(1) Detection of occurrence of data other than Huffman code.

(2) EOB data detection.

(3) Detection of a periodic signal inserted in the block line header.

(4) Detection of the total number of blocks in one frame.

The present invention is characterized by having the above-mentioned hierarchical structure for error detection.

Referring to FIG. 1, a decoding apparatus 14 according to the present embodiment includes an error correction circuit 7, a code identification circuit 8, a decompression circuit 9, a code comparison circuit 10, a block number comparison circuit 11,
It comprises a periodic signal comparison circuit 12 and an error detection circuit 13.

Referring to FIG. 1, the operation of the present embodiment will be described. The compressed data input to the decoding device 14 is corrected by the error correction circuit 7 for a data error in the transmission path, and the code identification circuit 8 Is input to

The code identification circuit 8 compares the input data string with a Huffman code table and decomposes it into individual code data. The code data is input to the code comparison circuit 10.

The code identification circuit 8 detects the EOB and the frame header of each block, and generates a block pulse and a frame pulse.

The block pulse and the frame pulse are input to the block number comparison circuit 11.

Further, the code identification circuit 8 separates the periodic signal in the block line header from the compressed data. The separated periodic signal is input to the periodic signal comparison circuit 12.

The code comparison circuit 10 detects the presence or absence of a code other than the Huffman code data, and detects whether the end of one block ends with an end of block code (EOB). The code comparison circuit 10 outputs an error pulse 10E to the error detection circuit 13 when an error occurs, such as when a code other than Huffman code data is detected, or when the end of one block does not end with EOB.

The block number comparison circuit 11 clears the internal counter with the frame pulse, counts the block pulse, and compares whether or not the number of blocks in one frame is a specified value. If the counted number of blocks is incorrect, the block number comparison circuit 11 outputs an error pulse 11E to the error detection circuit 13.

The periodic signal comparison circuit 12 checks the periodic signal separated from the block line header and compares whether the input data is appropriate. If invalid, an error pulse 12E is output to the error detection circuit 13.

The error detection circuit 13 sends a signal to the decompression circuit 9 in response to an error generated from each section, and performs control such as initialization of decompression processing and freeze of an image.

Although the present invention has been described with reference to the above embodiments, the present invention is not limited only to the above embodiments.
Needless to say, various modes according to the principle of the present invention are included. For example, the format of the compressed data shown in FIG. 2 and the like is for facilitating understanding of the present invention, and does not limit the present invention in any way.

[0042]

As described above, according to the present invention, in an encoding / decoding apparatus, a data error occurring between a compression section and a compression section and an error correction section can be corrected by (1) data other than Huffman code. High-speed and reliable detection by detecting occurrence, (2) detecting EOB data, (3) detecting a periodic signal inserted in the block line header, and (4) detecting the total number of blocks in one frame. Has the result that

Further, according to the present invention (claim 2), the encoding apparatus has a hierarchical structure for detecting an error generated between the compression section and the interface between the compression section and the error correction section at high speed. Thereby, for example, the signal transmission quality and reliability of an encoding / decoding device (video codec) for video signals and the like are improved, and the speed is increased.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a diagram illustrating an example of a format of one frame of a video signal which is an original signal.

FIG. 3 is a diagram illustrating a compressed data structure according to the present invention.

FIG. 4 is a diagram for explaining error occurrence and detection in a conventional encoding / decoding device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Encoding device 2 Decoding device 3 Compression part 4, 5 Error correction circuit 6 Decompression part 7 Error correction circuit 8 Code discrimination circuit 9 Decompression circuit 10 Code comparison circuit 11 Block number comparison circuit 12 Period signal comparison circuit 13 Error detection circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-6-86080 (JP, A) JP-A-5-153090 (JP, A) JP-A-6-85793 (JP, A) 115123 (JP, A) IEICE Technical Report, IT85-17, p. 25-30 Hiroshi Yasuda, "International Standard for MPEG / Multimedia Coding", Maruzen Co., Ltd., September 30, 1994, p. 60-100 (58) Field surveyed (Int. Cl. ⁶ , DB name) H03M 13/00

Claims (2)

(57) [Claims] 1. A decoding device comprising an error correction means and an expansion means, further comprising: means for detecting occurrence of data other than statistically encoded data from input data; and means for detecting an error of end-of-block data. Means for detecting an error of the periodic signal inserted in the block line header of the input data, and means for detecting an error of the total number of blocks in one frame.
Detection of data generation other than statistically encoded data, (2) detection of end-of-block data, (3) detection of a periodic signal inserted in a block line header, (4) detection of the total number of blocks in one frame, And a hierarchical error detection apparatus. 2. A predetermined number of data forms one block, and end-of-block data is inserted at the end of the one block. A predetermined number of the blocks form one block line, and the one block A device in which a block line header is added to a line, a predetermined number of the block lines form one frame, and a compressed data sequence is input and decoded through an error correction circuit and a decompression circuit. A code identification circuit that compares a data string output from the error correction circuit with a variable-length encoding table to decompose the data into code data; and a code other than the variable-length encoded data that is input with the code data output from the code identification circuit A code comparison circuit for detecting the presence or absence of a block, and a block for comparing whether or not the number of blocks in one frame is a predetermined value. A cycle number comparison circuit that checks a periodic signal separated from within the block line header to check whether input data is appropriate; and controls the decompression circuit based on an error generated by each of the circuits. And (1) detection of occurrence of data other than statistically encoded data,
(2) Detection of end of block data, (3) Block
Detection of periodic signals inserted in the
(4) Detection of the total number of blocks in one frame
An encoding / decoding device for performing error detection .