JP2824469B2 - Semiconductor integrated circuit device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a technique which is effective when used in an output circuit for driving an inductive load using a source follower type output MOSFET. Things.

[Conventional technology]

As an example of a power output circuit for driving an inductive load, there is, for example, a magazine "Electronic Technology", November 1987, pages 22 to 25. In this power MOSFET, the source is grounded, and the drain is connected to a motor or the like which is an inductive load.

[Problems to be solved by the invention]

A power output circuit mounted on a vehicle, such as a solenoid for electronic fuel injection, is desirably a high-side drive circuit (source forward circuit) in which the power output element is on the power supply voltage side and the load is on the ground potential side of the circuit. . This is because, if the load is connected to the power supply voltage side, if the load is grounded due to a collision accident or the like, an overcurrent may flow through the load and cause a fire.

However, in a source follower output circuit such as that shown in FIG.
When the gate of the SFET Q1 is set to a low level such as the ground potential of the circuit, the output MOSFET Q1 can be turned off from the on state. However, since a back electromotive voltage is generated in the load L,
As shown in FIG. 10, the source potential of the output MOSFET Q1 becomes a negative potential, which is the substantial threshold voltage of the output MOSFET Q1.
When the voltage reaches Vth, the output MOSFET Q1 is turned on again to clamp the potential of the output terminal OUT. Above threshold voltage V
Since th is a voltage that is relatively small in absolute value, it takes time to release the energy stored in the load L, and the switching of the output MOSFET to the off state is substantially delayed. This means that when the load L is driven by a pulse width modulation signal, the back electromotive voltage period, in other words, the longer the switching time of the output MOSFET to the substantially off state, the longer the pulse width modulation signal. , The pulse width duty is restricted, and the control range is narrowed.

In addition to the output circuit described above, a PNP as shown in Fig. 11
In the input circuit with the type transistor T1, the input terminal
When the input signal supplied to IN tries to become a negative voltage, the diode D3 existing in the structure of the PNP transistor is turned on, clamping the input signal and causing the internal circuit to malfunction due to the current. For example, in a television receiver circuit, a signal formed by a flyback transformer or the like has a negative voltage, and thus malfunction occurs when the above input circuit is used.

That is, in the conventional semiconductor integrated circuit device, since the operating voltage and the ground potential of the circuit are uniquely determined by the low impedance power supply outside or inside the circuit,
When viewed from the input or output terminal, when the voltage becomes higher than the operating voltage and lower than the ground potential of the circuit, there is a problem that the operation is not guaranteed.

An object of the present invention is to provide a semiconductor integrated circuit device capable of expanding a dynamic range of a signal viewed from an input / output terminal.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[Means for solving the problem]

The outline of a typical invention disclosed in the present application will be briefly described as follows. That is,
A semiconductor integrated circuit is supplied with an operating voltage and / or a circuit ground potential from the outside via a unidirectional element, and a unidirectional element and / or an input / output terminal from an internal ground potential to an input / output terminal. A one-way element is provided for the internal operating voltage.

(Operation)

According to the above-described means, the signal at the input and / or output terminal can be expanded by the switching operation of the unidirectional element without being restricted by the internal operating voltage and / or the ground potential.

〔Example〕

FIG. 1 shows a circuit diagram of an embodiment in which the power output circuit according to the present invention is used in a high-side drive circuit (source follower circuit) for driving an inductive load L such as a motor or a solenoid. Have been.

The power output circuit of this embodiment is formed as a single integrated circuit IC as shown by a broken line in the figure, and is not particularly limited. However, as described later, the power MOSFET Q1 uses a substrate as its drain region. Has a structure in which a drain electrode is provided on the back side of the substrate.

The drain of power MOSFET Q1 is coupled to power supply voltage Vcc. The source of the MOSFET Q1 is coupled to an external terminal OUT, where an inductive load L such as the motor or solenoid is provided. Therefore, the power output MOSFET Q1 is
Operates as a source follower output MOSFET.

A drive circuit including a drive MOSFET Q2 and a load resistor RL is provided at the gate of the power MOSFET Q1. As the operating voltage of the drive circuit, a voltage Vcc + V obtained by boosting the power supply voltage Vcc by the booster circuit BST is used. The control signal in is supplied to the gate of the drive MOSFET Q2 through an inverter circuit N1, although not particularly limited. Although not particularly limited, the operating voltage of the inverter circuit N1 is a 5-V system voltage that is relatively lower than the power supply voltage Vcc. In response to this, the control signal in is set to a relatively low logic level such as the ground potential of the low level circuit by setting the high level to 5V. Therefore, the drive circuit including the inverter circuit N1, the MOSFET Q2, and the resistor R performs a kind of level conversion operation.

In this embodiment, the following configuration is adopted to increase the substantial switching speed of the output MOSFET Q1 to the off state. That is, the ground potential GND 'of the internal circuit such as the source of the drive MOSFET Q2 is supplied through the diode D1. That is, the ground potential GND 'of the internal circuit of the IC becomes a high voltage which is level-shifted by the forward voltage of the diode D1 with respect to the external ground potential GND. This ground potential GND 'is also used as the ground potential of the inverter circuit N1 and the boost circuit BST. Then, in order to expand the dynamic range of the output terminal OUT on the negative polarity side,
In other words, in order to prevent the output MOSFET Q1 from being turned on again by the back electromotive voltage of the load L, a diode from the circuit ground potential GND 'to the output terminal OUT is used.
D2 is provided.

For example, when the control signal in is at a high level, the output signal of the inverter circuit N1 is at a low level such as the ground potential of the circuit. According to the low level of this output signal, drive MOSFET Q2
Is turned off, and the operating voltage Vcc + V boosted through the resistor R is supplied to the gate of the power MOSFET Q1.
The boosted voltage + V formed by the booster circuit BST is
It is set to be equal to or higher than the substantial threshold voltage of TQ1. Therefore, as shown in the waveform diagram of FIG. 2, when the MOSFET Q1 is in the ON state, the power supply voltage Vcc is output from the source as it is, so that a high output voltage without voltage loss can be obtained. In such a steady state of operation, the diode
D2 is in an off state because it is reverse-biased, and the output signal can be obtained.

When the control signal in switches from the high level to the low level, the output signal of the inverter circuit N1 changes to the high level, and the drive MOSFET Q2 is turned on. With this, the power MO
Since the gate and source of SFETQ1 are short-circuited, power MOSFET
ETQ1 is switched from the on state to the off state. At this time, a back electromotive voltage is generated in the load L, and the output terminal OUT to which the source of the power MOSFET Q1 is coupled is lowered to a negative potential.
The diode D2 is turned on according to the back electromotive voltage,
Also lower the ground potential GND 'inside the IC. Therefore, even if the back electromotive voltage is generated, the MOSFET Q2 is connected to the inverter circuit N1.
The output MOSFET Q1 is kept in the OFF state because the ON state is maintained by the high level of the output signal. That is, the voltage of the output terminal OUT is not clamped by the internal circuit, and the operation of the internal circuit is guaranteed.

In this embodiment, a voltage clamp circuit including a diode D3 and a Zener diode ZD is provided for the load L. Therefore, as shown in the waveform diagram of FIG.
When the output MOSFET Q1 is turned off, the potential of the output terminal OUT becomes a large negative voltage of-(VD3 + VZD). Here, VD3 is a forward voltage of the diode D3, and VZD is a Zener voltage of the Zener diode ZD. By setting the clamp voltage to an absolutely high value, the energy stored in the inductive load L can be released in a short time. This allows the output MOSF
The control range when controlling the ETQ1 with the pulse width modulation signal can be expanded.

FIG. 3 is a circuit diagram showing an embodiment in which the present invention is applied to an input circuit using a PNP transistor.

Also in this embodiment, the ground potential is applied to the IC internal circuit via the diode D1. Then, in order to expand the dynamic range on the negative polarity side of the input terminal IN,
A diode D3 extending from the internal ground potential GND 'to the input terminal IN as described above is added. In this configuration, when the signal supplied to the input terminal IN becomes negative, the diode D3 is turned on and the internal ground potential GND 'is applied to the input terminal I.
Decrease according to N signal. As a result, the input terminal IN
Signal is not voltage clamped by a diode or the like in the internal circuit, and the input dynamic range can be expanded below the ground potential. In this case, since the internal circuit also lowers the ground potential GND 'according to the input signal, the operation of the internal circuit is guaranteed.

FIG. 4 is a block diagram schematically showing the present invention.

In this embodiment, a general method of expanding the dynamic range of input and output to a negative side below ground potential and a positive side above power supply voltage Vcc, taking an amplifier circuit AMP configured in a semiconductor integrated circuit as an example. It is shown.

That is, the circuit ground potential GND 'and the operating voltage Vcc'
Are supplied through diodes D1 and D4, respectively. Therefore, the ground potential GND 'is connected to the external ground potential GND as described above.
In contrast, the level is increased by the forward voltage of diode D1. The operating voltage Vcc 'is made lower than the external power supply voltage Vcc by the forward voltage of the diode D4. Then, in order to expand the dynamic range of negative polarity below the ground potential GND, between the input terminal IN and the output terminal OUT and the ground potential GND ′, as described above, the input terminals IN and Diodes D3 and D2 are provided respectively toward the output terminal OUT.

On the other hand, in order to expand the dynamic range on the positive polarity side above the power supply voltage Vcc, the input terminal IN and the output terminal OUT
Between the input terminal IN and the output terminal toward the operating voltage Vcc ', respectively.
5 is provided.

In this configuration, when the potential of the input terminal IN or the output terminal OUT becomes the negative polarity as described above, the ground potential GND 'is also reduced by the diode D3 or D2. Conversely, when the potential of the input terminal IN or the output terminal OUT becomes higher than the power supply voltage Vcc, the operating voltage Vcc 'is also increased by the diode D6 or D5. As described above, the amplifier circuit AMP of the present embodiment follows an input terminal IN or an output terminal OUT when the absolute value of the input terminal IN or the output terminal OUT exceeds the range of the given ground potential GND or voltage voltage Vcc. As a result, the internal ground potential and the operating voltage also change, so that the operation of the internal circuit can be assured while expanding the dynamic range of the signal.

FIG. 5 shows a main part circuit diagram of another embodiment.

In the figure, the internal ground potential GND 'of the semiconductor integrated circuit IC is supplied via the base and the emitter of the transistor T2 instead of the diode D1 as described above. A diode D provided between the input terminal IN and the ground potential GND '
Instead of 3, the base and the emitter of the transistor T3 are used. In this configuration, the collector current IS
By using 2 and the collector current IS1 of the transistor T3 as the sense current, the terminal having the lowest potential can be detected. For example, when the collector current IS2 of the transistor T2 flows, the terminal for supplying the ground potential GND is the lowest potential, and when the collector current IS1 of the transistor T3 flows, the ground potential GND ′ is set to the input terminal.
Indicates that IN is at the lowest potential. If a transistor such as the transistor T3 is provided for each terminal, the terminal that is set to the lowest potential among the plurality of terminals can be detected. By adopting such a configuration, it can be used for feedback and the like.

FIG. 6 is a block diagram showing still another embodiment of the present invention.

In this embodiment, a circuit configured in a semiconductor integrated circuit IC is divided into a plurality of blocks CB1, CB2, and CB3. A diode D is connected to each circuit block CB1 to CB3.
1 "Ground potential G from external terminals via D1 'and D1 respectively
ND is given. The diode D3 as described above is provided between an input terminal IN for supplying an input signal to the circuit block CB1 and a ground potential corresponding to the input terminal IN. The diode D2 as described above is provided between an output terminal OUT for sending an output signal to the circuit block CB3 and a ground potential corresponding to the output terminal OUT.
In this configuration, when the input terminal IN is set to a negative potential, the ground potential of the corresponding circuit block CB1 follows it, and the other circuit blocks CB2 and CB3
It can be set to the ground potential via D1 'and D1. vice versa,
When the output terminal OUT is set to a negative potential, the ground potential of the corresponding circuit block CB3 follows it, and the other circuit blocks CB1 and CB2 are set to the ground potential via the diodes D1 ″ and D1 ′. By adopting such a configuration, it is possible to obtain a semiconductor integrated circuit having a circuit block that is not affected by the input voltage and the output voltage.

FIG. 7 is a structural sectional view of one embodiment of the MOSFET Q1 and the diodes D1 and D2 of the embodiment of FIG.

Power MOSFET Q1 has an N-type drain region. Therefore, the drain electrode D is provided on the back side of the substrate. A power supply voltage Vcc is applied to the drain electrode D. The P-type channel region forming power MOSFET Q1 is formed in a ring shape on the surface of the substrate. Similarly, a ring-shaped N-type source region is formed on the surface of the P-type channel region. A gate electrode G is formed on the surface of the channel region sandwiched between the source region and the substrate as the drain region via a gate insulating film. The source region and the channel region are commonly connected to form a source electrode S. As a result, the drive current of the MOSFET Q1 flows in the vertical direction of the substrate.

Such a power MOSFET Q1 and each of the above circuit elements are formed on the same substrate. Therefore, a P-type isolation region (ISO) is formed on the N-type substrate, and the circuit elements are formed via the P-type isolation region ISO. For example, diode D1
A transistor in which transistors are diode-connected is used. That is, an N-type collector region is formed in the P-type isolation region ISO, a P-type base region is formed in the collector region, and an N-type emitter region is formed in the base region to form an NPN transistor. Configure. Then, the P-type region as the base and the N-type region as the collector are connected to form a diode connection. The ground potential GND of the circuit is supplied to the N-type emitter region acting as the cathode through an external terminal. The base and collector regions commonly connected as anodes are the P-type isolation regions.
The bias voltage to ISO is connected to the ground potential point GND 'of the circuit. Further, the base and collector regions commonly connected as the anode are connected to the anode side of the diode D2. A transistor having the same structure as described above is used for the diode D2, and its base and collector are commonly connected to form a diode. The base and the collector are the base as the anode electrode of the diode D1,
Connected to collector. The emitter of the transistor that forms this diode D2 is the MOSFET Q1
Connected to the source S of the

In such a semiconductor structure, the isolation region ISO
There is a large parasitic diode between the substrate and the substrate. Therefore, even if the power supply voltage Vcc is reversely connected to the ground potential point GND of the circuit, in other words, even if a ground potential is applied to the terminal Vcc and a voltage such as +12 V is applied to the terminal GND, the diode D1 is not connected. Since it is inserted, an excessive current that would destroy the element does not flow. Therefore, the semiconductor integrated circuit device of this embodiment is suitable for a power switch circuit mounted on a vehicle. Because, in an automobile, when the engine cannot be started due to the discharge of the battery, it often happens that the engine is connected to the battery of another automobile to start the engine. In this case, the possibility of reverse connection between the batteries by a cable is extremely high. Even if such a reverse connection is made, in the above-mentioned semiconductor integrated circuit device, the element is not broken.

FIG. 8 is a structural sectional view of another embodiment. In this embodiment, a plurality of blocks are provided in the semiconductor integrated circuit as in the embodiment of FIG. That is, two isolation regions ISO1 and ISO2 are provided on the semiconductor substrate. For example, in the isolation area ISO1, the circuit block shown in FIG.
When the input terminal IN is provided as in CB1, the diodes D3 and D1 ″ are formed using the transistor structure in the same manner as described above, and the supply of the ground potential and the connection between the ground potential and the input terminal IN are performed. When an output terminal OUT such as the circuit block CB3 in FIG. 6 is provided in the region ISO2, diodes D1 and D2 having the same structure are configured to supply the ground potential and connect the ground potential to the output terminal OUT. Do.

Each of the above isolation regions ISO1 and ISO2 has a diode D1
And D1 ″. In this configuration, the potentials of the isolation regions ISO1 and ISO2 follow the lowest potentials of the terminals IN and OUT, respectively, and can be maintained at the lowest potential of the circuit. The operation of the vertical parasitic transistor (T4) based on the isolation region ISO1 (ISO2) can be suppressed.
Given Vcc, the above two separation areas ISO1 and ISO2
Are used as an emitter and a collector, and the occurrence of a parasitic transistor in the lateral direction, which is based on the substrate between them, can be suppressed.

In the system in which the operating voltage is also supplied through a diode as in the embodiment shown in FIG. 4, the voltage is also supplied to the substrate through the diode.

The operational effects obtained from the above embodiment are as follows. (1) The operating voltage and / or the ground potential of the circuit are externally supplied to the semiconductor integrated circuit via the one-way element, and the one-way element and / or Alternatively, by providing a unidirectional element directed from the input / output terminal to the internal operating voltage, the signal of the input and / or output terminal is restricted by the internal operating voltage and / or the ground potential by the switching operation of the unidirectional element. The effect of being able to expand without receiving is obtained.

(2) A ground potential is supplied to the semiconductor integrated circuit constituting the high-side drive circuit via a diode, and a diode is inserted between the ground potential and the source follower output terminal, thereby providing an output. The time for turning off the MOSFET substantially can be shortened. This has the effect that the inductive load can be driven by the pulse width modulation signal.

(3) As described in (1) or (2) above, by adopting a configuration in which the ground potential is supplied via a diode, the effect of improving the breaking strength when the power supply is reversely connected can be obtained. Can be

(4) A configuration in which a circuit configured in a semiconductor integrated circuit is divided into a plurality of blocks, a ground potential or an operating voltage is supplied to each of the blocks via a diode, and a diode is provided between the block and an external terminal for transmitting and receiving a signal. With this configuration, the minimum potential equal to or lower than the ground potential and the maximum potential equal to or higher than the operating voltage can be determined for each block in accordance with the voltage of the external terminal. In this configuration, an effect is obtained that a semiconductor integrated circuit having a circuit block that is not likely to be affected by the input voltage or the output voltage can be obtained.

Although the invention made by the inventor has been specifically described based on the embodiment, the invention of the present application is not limited to the embodiment, and various changes can be made without departing from the gist of the invention. For example, in the embodiment of FIG.
Diodes D1 to D6 to be added according to the voltage of IN or OUT
Can be variously selected. A plurality of power MOSFETs may be provided on one semiconductor substrate. In this case, a power MOSFET having a drain as a substrate is inevitably used as a high-side drive circuit (source forward circuit) having a common drain. The power MOSFET drives an inductance load such as a motor or a solenoid as shown in FIG. 1, and can be replaced with a conventional mechanical switch element such as a drive circuit for driving lamps such as an automobile headlamp. It is suitable for the power switch circuit of FIG.

When configuring a low-side drive circuit, the output
A P-channel MOSFET may be used as the MOSFET and the drive MOSFET. In this configuration, the P-channel MOSF
Since the ground potential of the circuit is given to the drain of ET,
A low-side drive circuit with a load on the power supply voltage Vcc side can be configured.

The present invention can be widely used for semiconductor integrated circuit devices.

〔The invention's effect〕

The effect obtained by the representative one of the inventions disclosed in the present application will be briefly described as follows. That is, the semiconductor integrated circuit is supplied with an operating voltage and / or the ground potential of the circuit from the outside via the one-way element, and the one-way element and / or the input / output from the internal ground potential to the input / output terminal. By providing a unidirectional element from the terminal to the internal operating voltage, the signal of the input and / or output terminal is not restricted by the internal operating voltage and / or ground potential due to the switching operation of the unidirectional element. Can be expanded.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIG. 2 is a waveform diagram for explaining the operation thereof, FIG. 3 is a circuit diagram showing another embodiment of the present invention, FIG. 4 is a block diagram of one embodiment showing the present invention in a general concept, FIG. 5 is a main part circuit diagram showing another embodiment of the present invention, and FIG. 6 is another embodiment of the present invention. FIG. 7 is a structural cross-sectional view showing one embodiment of the circuit of FIG. 1, and FIG. 8 is a cross-sectional view showing one embodiment corresponding to FIG. 9, FIG. 9 is a circuit diagram showing an example of a source follower output circuit, FIG. 10 is a waveform diagram for explaining an example of its operation, and FIG. 11 is a circuit diagram for explaining an example of an input circuit. It is. IC: Semiconductor integrated circuit, L: Load (inductive), BST:
… Booster circuit, N1… Inverter circuit, AMP …… Amplifier circuit, CB1 to CB3 …… Circuit block, Io …… Constant current source

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Hirotaka Mochizuki 1479, Kamizuhoncho, Kodaira-shi, Tokyo Inside Hitachi Microcomputer Engineering Co., Ltd. (56) References JP-A-62-71257 (JP, A) 62-226654 (JP, A) JP-A-62-125659 (JP, A)

Claims (5)

(57) [Claims] 1. An external power supply terminal to which a power supply voltage is externally supplied, an external ground terminal to which a ground potential is externally supplied, an external output terminal, an output for sending an output signal to the external output terminal, and an internal ground. An internal circuit having a potential point; an output-side unidirectional element provided to allow a current flowing from the internal ground potential point of the internal circuit to the external output terminal; and the internal ground potential point of the internal circuit. And a ground-side unidirectional element provided so as to allow a current to flow from the external output terminal to the external ground terminal. When a negative voltage is generated at the external output terminal, the output-side signal is supplied according to the negative voltage. A semiconductor integrated circuit device, wherein the directional element is turned on to change the internal ground potential point of the internal circuit in the negative potential direction and the ground side unidirectional element is turned off. . 2. The internal circuit includes: a power MOSFET having a drain connected to the external power supply terminal and a source connected to the external output terminal; and a power MOSFET driving the gate of the power MOSFET. A drive circuit comprising a drive MOSFET having a source connected to a ground potential point and a drain connected to the gate of the power MOSFET, and a load resistor having one end connected to the drain of the drive MOSFET; An inductive load is connected between the terminal and the external ground potential, and the drive MOSFET of the drive circuit is turned on and the power MOSFET is turned off, so that the back electromotive force of the inductive load causes the drive MOSFET to turn off. 2. The semiconductor integrated circuit device according to claim 1, wherein said negative voltage is generated at an external output terminal. 3. An external power supply terminal supplied with a power supply voltage from the outside, an external ground terminal supplied with a ground potential from the outside, an external input terminal, an input supplied with an input signal from the external input terminal, and an internal An internal circuit having a ground potential point; an input-side one-way element provided to flow a current flowing from the internal ground potential point of the internal circuit to the external input terminal; and the internal ground potential of the internal circuit. A ground-side unidirectional element provided to flow a current from a point to the external ground terminal. When a negative voltage is generated at the external input terminal, the input side is controlled according to the negative voltage. A semiconductor integrated circuit, wherein the one-way element is turned on to change the internal ground potential point of the internal circuit to a negative potential direction and the ground-side one-way element is turned off. Location. 4. An external terminal to which a power supply voltage is externally supplied, an external ground terminal to which a ground potential is externally supplied, an external input terminal, an external output terminal, and an input signal supplied from the external output terminal. An internal circuit having an input for transmitting an output signal to the external output terminal and an internal ground potential point; and a current flowing from the internal ground potential point of the internal circuit to the external input terminal. An input-side one-way element, an output-side one-way element provided to allow a current flowing from the internal ground potential point of the internal circuit to the external output terminal, and from the internal ground potential point of the internal circuit. A ground-side unidirectional element provided to allow a current flowing toward the external ground terminal to flow, and when a negative voltage is generated at the external input terminal, the input side according to the negative voltage When the directional element is turned on to change the internal ground potential point of the internal circuit in the negative potential direction and the ground-side one-way element is turned off, a negative voltage is generated at the external output terminal. Is characterized in that the output-side one-way element is turned on in accordance with the negative voltage so that the internal ground potential point of the internal circuit is changed in the negative potential direction and the ground-side one-way element is turned off. Semiconductor integrated circuit device. 5. The semiconductor integrated circuit device according to claim 1, wherein said one-way element comprises a diode-connected bipolar transistor.