JP2978902B1 - BGA type semiconductor device and its manufacturing method - Google Patents
BGA type semiconductor device and its manufacturing methodInfo
- Publication number
- JP2978902B1 JP2978902B1 JP22878098A JP22878098A JP2978902B1 JP 2978902 B1 JP2978902 B1 JP 2978902B1 JP 22878098 A JP22878098 A JP 22878098A JP 22878098 A JP22878098 A JP 22878098A JP 2978902 B1 JP2978902 B1 JP 2978902B1
- Authority
- JP
- Japan
- Prior art keywords
- type semiconductor
- photosensitive polyimide
- semiconductor device
- bga type
- metal wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 229920001721 polyimide Polymers 0.000 claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 21
- 229910000679 solder Inorganic materials 0.000 claims abstract description 19
- 239000004642 Polyimide Substances 0.000 claims description 32
- 239000011810 insulating material Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- 239000009719 polyimide resin Substances 0.000 abstract description 3
- 230000004927 fusion Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052801 chlorine Inorganic materials 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005489 elastic deformation Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052708 sodium Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
Landscapes
- Paints Or Removers (AREA)
Abstract
【要約】
【課題】 半田ボールとチップ間に弾性を有する絶縁層
を設けることで、耐クラック性を増し、以て、半田寿命
を長くすることを可能にしたＢＧＡ型半導体装置を提供
する。
【解決手段】 チップ１上に設けたポリイミド樹脂から
なる所定の厚みの弾性を有する絶縁層２と、前記絶縁層
２上に設けられた金属配線３と、この金属配線３上に融
着せしめた半田ボール４とで構成したことを特徴とす
る。Provided is a BGA type semiconductor device in which an elastic insulating layer is provided between a solder ball and a chip to increase crack resistance and thereby prolong the solder life. SOLUTION: An insulating layer 2 having a predetermined thickness and made of a polyimide resin and having elasticity provided on a chip 1, a metal wiring 3 provided on the insulating layer 2, and a fusion bonding on the metal wiring 3. It is characterized by comprising the solder ball 4.
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ＢＧＡ型半導体装
置とその製造方法に係わり、特に、熱歪みに対し半田寿
命を伸ばすことを可能にしたＢＧＡ型半導体装置とその
製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a BGA type semiconductor device and a method of manufacturing the same, and more particularly, to a BGA type semiconductor device capable of extending a solder life against thermal distortion and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】ＢＧＡ型半導体装置の半田寿命を長くす
るための技術としては、例えば、特開平７−３２１２４
７号公報に示されたＢＧＡ型半導体装置が知られてい
る。この半導体装置では、図３に示されているように、
パッケージのベース２１全面にわたり一様な長円のパッ
ド（ランドともいう）２２を形成している。2. Description of the Related Art As a technique for extending the solder life of a BGA type semiconductor device, for example, Japanese Unexamined Patent Publication No.
A BGA type semiconductor device disclosed in Japanese Patent Application Laid-Open No. 7-1995 is known. In this semiconductor device, as shown in FIG.
A uniform elliptical pad (also referred to as a land) 22 is formed over the entire surface of the base 21 of the package.
【０００３】しかし、熱履歴により応力が集中するのは
パッケージのベース周辺部分であるから、ベース中央付
近のパッドも一様に長円に形成すると周辺部分の半田ボ
ールにクラックが生じ、そのため、所定の効果が得られ
ないという欠点があった。However, since stress concentrates due to heat history in the peripheral portion of the base of the package, if the pad near the center of the base is also uniformly formed into an elliptical shape, cracks occur in the solder balls in the peripheral portion. There is a drawback that the effect of (1) cannot be obtained.
【０００４】[0004]
【発明が解決しようとする課題】本発明の目的は、上記
した従来技術の欠点を改良し、特に、半田ボールとチッ
プ間に弾性を有する絶縁層を設けることで、耐クラック
性を増し、以て、半田寿命を長くすることを可能にした
新規なＢＧＡ型半導体装置とその製造方法を提供するも
のである。SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned drawbacks of the prior art, and in particular, to provide an elastic insulating layer between a solder ball and a chip to increase crack resistance. Accordingly, the present invention provides a novel BGA type semiconductor device capable of extending the solder life and a method of manufacturing the same.
【０００５】[0005]
【課題を解決するための手段】本発明は上記した目的を
達成するため、基本的には、以下に記載されたような技
術構成を採用するものである。即ち、本発明に係わるＢ
ＧＡ型半導体装置の態様は、チップ上に設けられた感光
性ポリイミドと非感光性ポリイミドとを交互に複数回積
層した絶縁層と、前記チップ上の設けられたパッドと前
記絶縁層上とを接続するように設けられた金属配線と、
前記絶縁層上に設けられた金属配線上に融着せしめた半
田ボールとで構成したことを特徴とするものである。 SUMMARY OF THE INVENTION The present invention basically employs the following technical configuration to achieve the above object. That is, B according to the present invention
The embodiment of the GA type semiconductor device is a photosensitive device provided on a chip.
Multiple times alternately with photosensitive polyimide and non-photosensitive polyimide
A layered insulating layer, a metal wiring provided to connect the pad provided on the chip and the insulating layer,
And a solder ball fused to a metal wiring provided on the insulating layer .
【０００６】叉、本発明に係わるＢＧＡ型半導体装置の
製造方法の第１態様は、チップ上に非感光性ポリイミド
を塗布し、この上に感光性ポリイミドを塗布する第１の
工程と、前記感光性ポリイミドを所定のパターンに感光
させ、このパターンをマスクとして前記非感光性ポリイ
ミドを所定のパターン状に形成する第２の工程と、前記
第１の工程と、第２の工程とを繰り返し、所定の厚みの
絶縁層に形成する第３の工程と、を含むことを特徴とす
るものであり、叉、第２態様は、前記絶縁材層上に金属
配線を蒸着する第４の工程と、前記金属配線上に半田ボ
ールを融着せしめる第５の工程と、を含むことを特徴と
するものである。A first aspect of the method of manufacturing a BGA type semiconductor device according to the present invention comprises a first step of applying a non-photosensitive polyimide on a chip and applying a photosensitive polyimide thereon, A second step of exposing the photosensitive polyimide to a predetermined pattern and forming the non-photosensitive polyimide in a predetermined pattern using this pattern as a mask, the first step, and the second step are repeated to obtain a predetermined pattern. A third step of forming a metal wiring on the insulating material layer, and a third step of forming a metal wiring on the insulating material layer. And a fifth step of fusing the solder ball onto the metal wiring.
【０００７】[0007]
【発明の実施の形態】本発明に係わるＢＧＡ型半導体装
置は、チップ上に設けたポリイミド樹脂からなる所定の
厚みの弾性を有する絶縁層と、前記絶縁層上に設けられ
た金属配線と、この金属配線上に融着せしめた半田ボー
ルとで構成したものであるから、熱歪みの影響は、絶縁
膜塩素運の弾性で吸収される。従って、耐クラック性が
向上すると共に、半田寿命を長くすることが可能になっ
た。DESCRIPTION OF THE PREFERRED EMBODIMENTS A BGA type semiconductor device according to the present invention comprises an insulating layer having a predetermined thickness made of a polyimide resin and provided on a chip, a metal wiring provided on the insulating layer, Since it is composed of solder balls fused on metal wiring, the effect of thermal strain is absorbed by the elasticity of chlorine transport in the insulating film. Therefore, the crack resistance is improved, and the solder life can be extended.
【０００８】[0008]
【実施例】以下に、本発明に係わるＢＧＡ型半導体装置
とその製造方法の具体例を図面を参照しながら詳細に説
明する。図１は、本発明に係わるＢＧＡ型半導体装置の
具体例の構造を示す図であって、図１には、チップ１上
に設けたポリイミド樹脂からなる所定の厚みの弾性を有
する絶縁層２と、前記絶縁層２上に設けられた金属配線
３と、この金属配線３上に融着せしめた半田ボール４と
で構成したＢＧＡ型半導体装置が示され、叉、前記絶縁
層２は、感光性ポリイミド２Ｂと、非感光性ポリイミド
２Ａとを交互に積層したものであるＢＧＡ型半導体装置
が示され、叉、前記絶縁層２は、感光性ポリイミド２Ｂ
と、非感光性ポリイミド２Ａとを交互に複数回積層した
ものであるＢＧＡ型半導体装置が示され、更に、前記金
属配線３は、前記チップ１上のパッド５と前記半田ボー
ル４とを接続するものであり、前記絶縁層２の側面６に
も蒸着されているＢＧＡ型半導体装置が示されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A specific example of a BGA type semiconductor device and a method of manufacturing the same according to the present invention will be described below in detail with reference to the drawings. FIG. 1 is a view showing the structure of a specific example of a BGA type semiconductor device according to the present invention. In FIG. 1, an insulating layer 2 having a predetermined thickness and made of a polyimide resin provided on a chip 1 is provided. A BGA type semiconductor device comprising a metal wiring 3 provided on the insulating layer 2 and a solder ball 4 fused to the metal wiring 3 is shown. A BGA type semiconductor device is shown in which polyimide 2B and non-photosensitive polyimide 2A are alternately laminated, and the insulating layer 2 is made of photosensitive polyimide 2B.
And a BGA type semiconductor device in which a non-photosensitive polyimide 2A is alternately laminated a plurality of times. Further, the metal wiring 3 connects the pad 5 on the chip 1 to the solder ball 4. 1 shows a BGA type semiconductor device which is also deposited on the side surface 6 of the insulating layer 2.
【０００９】なお、７はチップ１上に設けられた非感光
性ポリイミド膜であり、チップ１をＮａ，Ｃｌ、アンモ
ニヤ、若しくは、金属等の汚染から保護するために設け
た膜である。以下に、本発明を更に詳細に説明する。図
１に示すように、本発明ではチップ１上面に非感光性ポ
リイミド膜７（２Ａ）を塗布し、半田ボール４搭載箇所
では感光性ポリイミド２Ｂ、非感光性ポリイミド２Ａと
交互に約１０ミクロン厚みで塗布していき、ポリイミド
の合計の厚みは１００ミクロンとしている。Reference numeral 7 denotes a non-photosensitive polyimide film provided on the chip 1, which is a film provided for protecting the chip 1 from contamination with Na, Cl, ammonia, metal, or the like. Hereinafter, the present invention will be described in more detail. As shown in FIG. 1, in the present invention, a non-photosensitive polyimide film 7 (2A) is applied on the upper surface of a chip 1, and a photosensitive polyimide 2B and a non-photosensitive polyimide 2A are alternately formed on the solder ball 4 mounting portion by a thickness of about 10 μm. The total thickness of the polyimide is 100 microns.
【００１０】なお、具体的には、図２の示すように、非
感光性ポリイミド２Ａ、感光性ポリイミド２Ｂ、を塗布
した後、感光性ポリイミド２Ｂを感光して所定のパター
ンを形成し、このパターンで非感光性ポリイミド２Ａを
パターンニングする（図２（ａ）〜図２（ｃ））。この
後、再び、非感光性ポリイミド２Ａ、感光性ポリイミド
２Ｂを塗布した後、この感光性ポリイミド２Ｂを感光し
てパターンを形成し、このパターンで感光性ポリイミド
２Ａを再びパターンニングする（図２（ｄ）〜図２
（ｆ））。このような工程を複数回繰り返して、最終的
に積層ポリイミドの厚みを１００ミクロンにしている。Specifically, as shown in FIG. 2, after applying a non-photosensitive polyimide 2A and a photosensitive polyimide 2B, the photosensitive polyimide 2B is exposed to light to form a predetermined pattern. Is used to pattern the non-photosensitive polyimide 2A (FIGS. 2A to 2C). Thereafter, the non-photosensitive polyimide 2A and the photosensitive polyimide 2B are applied again, the photosensitive polyimide 2B is exposed to light to form a pattern, and the photosensitive polyimide 2A is patterned again with this pattern (FIG. 2 ( d) to FIG.
(F)). Such a process is repeated a plurality of times, and finally the thickness of the laminated polyimide is set to 100 μm.
【００１１】金属配線３は、チタンータングステン合金
を２０００オングストローム蒸着し、次に０、１ミクロ
ン〜１ミクロンの銅を蒸着し、更に１０〜２０ミクロン
の銅めっきを施す。この際、突起状のポリイミド上にも
金属配線３は形成される。For the metal wiring 3, a titanium-tungsten alloy is vapor-deposited in a thickness of 2,000 angstroms, copper of 0.1 micron to 1 micron is vapor-deposited, and copper plating of 10 to 20 microns is further performed. At this time, the metal wiring 3 is also formed on the protruding polyimide.
【００１２】[0012]
【発明の効果】本発明に係わるＢＧＡ型半導体装置とそ
の製造方法は、上述のように構成したので、実装基板と
パケージとの熱膨張率差により応力が発生しても積層ポ
リイミドにより弾性変形が吸収され、半田ボールクラッ
クや金属配線の断線が回避される等優れた効果を有す
る。As described above, the BGA type semiconductor device and the method of manufacturing the same according to the present invention are constructed as described above. Therefore, even if stress is generated due to a difference in the coefficient of thermal expansion between the mounting substrate and the package, elastic deformation is caused by the laminated polyimide. It has excellent effects such as absorption of solder ball cracks and disconnection of metal wiring.
【図１】本発明に係わるＢＧＡ型半導体装置の断面図で
ある。FIG. 1 is a sectional view of a BGA type semiconductor device according to the present invention.
【図２】本発明のＢＧＡ型半導体装置の製造工程を説明
する図である。FIG. 2 is a view illustrating a manufacturing process of the BGA type semiconductor device of the present invention.
【図３】従来技術を説明する図である。FIG. 3 is a diagram illustrating a conventional technique.
１ チップ ２ 絶縁層 ２Ａ 非感光性ポリイミド ２Ｂ 感光性ポリイミド ３ 金属配線 ４ 半田ボール ５ パッド ６ 絶縁層の側面 Reference Signs List 1 chip 2 insulating layer 2A non-photosensitive polyimide 2B photosensitive polyimide 3 metal wiring 4 solder ball 5 pad 6 side of insulating layer
Claims (3)
と非感光性ポリイミドとを交互に複数回積層した絶縁層
と、前記チップ上の設けられたパッドと前記絶縁層上と
を接続するように設けられた金属配線と、前記絶縁層上
に設けられた金属配線上に融着せしめた半田ボールとで
構成したことを特徴とするＢＧＡ型半導体装置。1. Photosensitive polyimide provided on a chip
And an insulating layer formed by laminating a plurality of times and a non-photosensitive polyimide alternately, a pad provided on the said chip and said insulating layer above
A metal wiring provided to connect the insulation layer
And a solder ball fused on a metal wiring provided in the BGA type semiconductor device.
し、この上に感光性ポリイミドを塗布する第１の工程
と、 前記感光性ポリイミドを所定のパターンに感光させ、こ
のパターンをマスクとして前記非感光性ポリイミドを所
定のパターン状に形成する第２の工程と、 前記第１の工程と、第２の工程とを繰り返し、所定の厚
みの絶縁層に形成する第３の工程と、 を含むことを特徴とするＢＧＡ型半導体装置の製造方
法。 2. A non-photosensitive polyimide is coated on the chip.
And a first step of applying a photosensitive polyimide thereon.
And the photosensitive polyimide is exposed to a predetermined pattern.
Using the non-photosensitive polyimide as a mask with the pattern
The second step of forming a predetermined pattern, the first step, and the second step are repeated to obtain a predetermined thickness.
And a third step of forming the BGA type semiconductor device on the insulating layer.
Law.
４の工程と、 前記金属配線上に半田ボールを融着せしめる第５の工程
と、 を含むことを特徴とする請求項２記載のＢＧＡ型半導体
装置の製造方法。 3. The method according to claim 1, wherein a metal wiring is deposited on the insulating material layer.
Step 4 and a fifth step of fusing a solder ball on the metal wiring
If, BGA type semiconductor according to claim 2, characterized in that it comprises a
Device manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22878098A JP2978902B1 (en) | 1998-08-13 | 1998-08-13 | BGA type semiconductor device and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22878098A JP2978902B1 (en) | 1998-08-13 | 1998-08-13 | BGA type semiconductor device and its manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2978902B1 true JP2978902B1 (en) | 1999-11-15 |
| JP2000058706A JP2000058706A (en) | 2000-02-25 |
Family
ID=16881742
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22878098A Expired - Fee Related JP2978902B1 (en) | 1998-08-13 | 1998-08-13 | BGA type semiconductor device and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2978902B1 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002050717A (en) * | 2000-08-03 | 2002-02-15 | Nec Corp | Semiconductor device and manufacturing method thereof |
| US6518675B2 (en) * | 2000-12-29 | 2003-02-11 | Samsung Electronics Co., Ltd. | Wafer level package and method for manufacturing the same |
| JP4672199B2 (en) * | 2001-07-10 | 2011-04-20 | 富士通株式会社 | Electrical interconnection method |
| JP4736762B2 (en) | 2005-12-05 | 2011-07-27 | 日本電気株式会社 | BGA type semiconductor device and manufacturing method thereof |
| JP4536757B2 (en) * | 2007-08-02 | 2010-09-01 | 株式会社フジクラ | Semiconductor package and semiconductor package manufacturing method |
-
1998
- 1998-08-13 JP JP22878098A patent/JP2978902B1/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000058706A (en) | 2000-02-25 |
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