JP3162464B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which bump electrodes having a straight wall structure are formed on a semiconductor chip surface with high precision.

[0002]

2. Description of the Related Art In recent years, semiconductor devices (semiconductor chips or semiconductor elements) have been highly integrated, and there has been an increasing demand for mounting such a semiconductor device on a wiring board at high density. Various methods have been proposed as means for mounting a semiconductor device on a wiring board surface at high density, but recently, a flip chip mounting method is mainly used. In order to enable the flip-chip mounting method, it is premised that a bump electrode having a projecting shape is formed on a bonding pad of a semiconductor device. Various methods for forming the bump electrode have been proposed, and are described in detail in "Semiconductor Packaging Handbook" Science Forum pp131. For example, as shown in cross section in FIG. 6, there is a means for forming a barrier metal layer 3 on a bonding pad 2 of a semiconductor chip 1 and forming a bump electrode 4 thereon by electroplating or the like. being called. In FIG. 6, reference numeral 5 denotes a passivation film provided on the surface of the semiconductor chip 1. Further, as shown in cross section in FIG. 7, a barrier metal layer 3 is formed on the bonding pad 2 of the semiconductor chip 1, and an electrical connection is made using a thick film resist (not shown) in which the bonding pad 2 portion is opened. There is also a means for forming the bump electrode 4 vertically by plating or the like, which is generally called a straight wall bump.

In flip-chip connection, as shown in FIG. 8, a bump electrode 4 of a semiconductor chip 1 and a connection electrode portion 7 of a wiring board 6 are aligned, and then the solder layer 8 is reflowed. Connection is being made. Usually, the solder layer 8 is formed on the bump electrode 4 in advance, or the solder layer 8 is supplied on the connection electrode portion 7 of the wiring board 6 in the form of preliminary solder, or a combination of both. ing.

[0004] In addition, flip-chip mounting is generally used to prevent stress generated from a difference in thermal expansion coefficient between the semiconductor chip (semiconductor device) 1 and the wiring board 6 from being concentrated on the bump electrodes 4. A resin is filled and arranged (not shown) between the chip 1 and the wiring board 6. Thus, the resin is filled between the semiconductor chip 1 and the wiring board 6.
By arranging, failures due to thermal expansion can be reduced to some extent, but not always enough. In particular, when the coefficient of thermal expansion between the semiconductor chip 1 and the wiring board 6 is largely different, stress often concentrates on the interface between the wiring board 6 and the resin, and the bump electrode 4 is often broken. Since the bump electrode 4 performs the electrical connection and the mechanical connection at the same time, when it is destroyed, the electrical characteristics are immediately affected and the circuit device on which the semiconductor chip 1 is mounted is broken.

Therefore, attempts have been made to make the coefficient of thermal expansion of the wiring board 6 close to that of silicon constituting the semiconductor chip 1. For example, a COW (Chip On Wafer) using silicon for the wiring board 6 has been proposed, but requires a complicated process that is equal to or more than that of the semiconductor chip 1 in manufacturing the board, and is extremely expensive. become.

[0006] On the other hand, in order to solve the failure at the junction of the bump electrodes 4 due to the thermal stress, attempts have been made to make the bump electrode 4 structure resistant to thermal stress. For example, a means has been proposed in which the shape of the bump electrode 4 is shaped like a drum in consideration of the connection method. When the semiconductor chip 1 provided with the bump electrodes 4 is connected and mounted on the surface of the wiring board 6, this means is to first connect the bump electrodes 4 of the semiconductor chip 1 to the connection electrode portions 7 on the surface of the wiring board 6, The bump electrode 4 is in a molten state, and the distance between the semiconductor chip 1 and the wiring board 6 is increased to form a drum shape. However, in the case of this method and means, if the distance to be separated is not sufficiently calculated, a connection failure may occur, and the shape control may not be sufficiently performed. In addition, a required effect may be obtained unless the height of the bump electrode 4 is increased. There is a problem that it is not exhibited.

Further, since the flip-chip connection is a face-down mounting, the heat generation surface of the semiconductor chip (semiconductor element) 1 is opposed to the wiring board 6, and the amount of heat generated is easily accumulated in the semiconductor chip 1. There is a problem that the function of the semiconductor chip 1 is easily impaired by the accumulated heat. In particular, between the semiconductor chip 1 and the wiring board 6,
When the resin is filled and arranged, the effect of the heat storage is significant. Therefore, the present inventors first set the bonding pad 2 of the semiconductor chip 1 and the connection electrode portion 7 of the wiring substrate 6 to Cu
Arrange and connect metal with good thermal conductivity such as
We proposed a structure to cover the area with solder (Japanese Patent Application No. Hei 3-2136)
No. 19).

On the other hand, in the semiconductor chip 1, as represented by an ASIC or the like, the number of bonding pads 2 for connection to an external signal processing circuit tends to increase.
There are not a few semiconductor chips (semiconductor devices or semiconductor elements) exceeding 100 pins. In order to flip-chip mount such a multi-pin semiconductor chip 1 at a high density, it is required to form the semiconductor chip 1 having bump electrodes 4 having a uniform height and a high height. That is, the bump electrode 4
If the height is not uniform, a connection may not be made between the corresponding connection electrode portion 7 on the surface of the wiring substrate 6, while the higher the bump electrode 4, the higher the reliability of the connection strength against thermal stress. Will be higher. In order to increase the height of the bump electrode 4, a required metal is deposited by, for example, an electroplating method to form the bump electrode 4. In the plating, the deposition rate depends on the current density. For this reason, it is difficult to control the semiconductor chip 1 so as to eliminate variations in height. In the case where the bump electrode 4 is formed by a plating method, the height variation of the pump electrode 4 is generally about ± 10% in the semiconductor chip 1. Therefore, for example, in the case of a bump electrode 4 having a height of 50 μm, means for forming the semiconductor chip 4 having a variation of about ± 5 μm include a vapor deposition method, a dip method, and a ball bonding method. There have been problems such as insufficient control and an inability to increase the height. In any case, in the flip chip mounting method of the semiconductor chip 1, despite the fact that the variation in the height of the bump electrode 4 has a remarkable influence on the mounting reliability, a sufficient response has not been established. is there.

[0009]

As described above,
When a semiconductor chip (semiconductor device) 1 having a bump electrode 4 formed and provided on a bonding pad 2 is flip-chip mounted on a required wiring board 6, the phase of the thermal expansion coefficient between the wiring board 6 and the semiconductor chip 1 is increased. There is a problem that breakage occurs in the bump electrode 4 due to thermal stress caused by the difference. As a workaround for such a problem, a COW method in which the thermal expansion coefficient of the wiring board 6 is made equal to the thermal expansion coefficient of the semiconductor chip 1 to reduce the thermal stress has been proposed. I need. Further, there has been proposed a structure in which the stress applied to the bump electrode 4 is reduced by controlling the mounting process so that the bump electrode 4 has a high drum shape. On the other hand, as a heat dissipation method for flip-chip connection, a method has been proposed in which a metal having a high thermal conductivity is buried in the bump electrode 4 and used as a heat dissipation path. These bump electrodes 4 are required to have a uniform bump height in any case, and even if a bump electrode having a particularly high height is to be formed by a general electroplating method, the bump electrode 4 must have a uniform height. Very difficult to control. That is, although the bump electrode 4 itself can be formed by the conventional method of forming the bump electrode 4, it is difficult to control the height of the bump electrode 4. The bump electrode 4 has a structure in which the connection resistance between the semiconductor chip 1 and the wiring board 6 on which the chip is flip-chip mounted is increased, and the periphery of the bump electrode 4 is covered with solder centered on a metal having good thermal conductivity such as Cu.
In this case, there is a problem that the heat dissipation deteriorates and the reliability of the flip-chip mounted semiconductor chip 1 is reduced.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and the height of bump electrodes required for flip-chip mounting a semiconductor device (semiconductor chip) on a wiring board (circuit board) is determined by electroplating. It is an object of the present invention to provide a method of manufacturing a semiconductor device provided with means capable of forming a semiconductor device more uniformly.

[0011]

According to the present invention, there is provided a method of manufacturing a semiconductor device comprising means for forming a bump electrode on a bonding pad surface of a semiconductor chip. A step of forming a first conductive layer, a step of forming a plating resist film having a bump electrode formed on the surface of the first conductive layer, and a step of forming a second resist film on a main surface of the plating resist film excluding a side wall surface. Forming a conductive layer, connecting the first conductive layer to a cathode of a power supply with a short-circuit protection circuit, and connecting a second conductive layer and a counter electrode made of a material constituting main components of the bump electrode to an anode of the power supply. And immersing the semiconductor chip in an electrolytic solution to perform plating for forming a bump electrode.

That is, according to the present invention, there is provided a method of manufacturing a semiconductor device having means for forming a straight-walled bump electrode on a bonding pad on a semiconductor chip surface by an electroplating method, separately from the first conductive layer serving as a cathode. Forming a second conductive layer on a surface portion of a plating resist film for selectively forming a bump electrode, and bringing a metal for forming a bump electrode deposited from the first conductive layer into contact with the second conductive layer; The main point is to automatically stop the deposition of GaN and suppress or reduce the variation in height (thickness) of the formed bump electrode. Then, in the step of forming the bump electrode by plating, if necessary, an auxiliary electrode having a sufficiently large area as compared with a portion where the first conductive layer is in contact with the electrolyte is connected to the second conductive layer, and more preferably. The first conductive layer is divided into a plurality of parts, and the auxiliary electrode is made of the same material as that of the first conductive layer, and the area thereof is set to be larger than the area of the second conductive layer.

[0013]

According to the method of manufacturing a semiconductor device according to the present invention,
In forming a high straight wall bump electrode by an electroplating method, the first electrode serving as a cathode is used.
Separately from the conductive layer, after forming the second conductive layer on the surface portion of the plating resist film for forming the bump electrode, the first conductive layer is connected to the cathode of the power supply having the short-circuit protection circuit, and the second conductive layer and the counter electrode are connected to the second conductive layer. A positive power supply is connected, and the semiconductor chip is immersed in an electrolytic solution to perform electroplating for forming bump electrodes.
Then, when the bump electrode metal accompanying the progress of the electroplating grows by plating and reaches the opening end face of the plating resist film, in other words, when the growing plating tip face comes into contact with the second conductive layer, the short-circuit protection circuit is activated. As a result, the current supply is stopped, and the formation of the bump electrode is automatically terminated.

In this step, if the first conductive layer is divided into at least one region on the surface of the semiconductor chip and connected to a cathode of a power supply, a bump electrode formed by plating is divided for each divided region. Since the height is easily controlled uniformly, the variation in the height of the bump electrode can be further reduced. Further, separately from the first conductive layer serving as a cathode, a second conductive layer is formed on a surface portion of a plating resist film for forming a bump electrode. When an auxiliary electrode having a large area is connected to the second conductive layer and plating for forming a bump electrode is performed, when the bump electrode metal contacts the second conductive layer, a current also flows to the auxiliary electrode and the current density sharply increases. To decline. Therefore,
When the area of the auxiliary electrode is sufficiently large, the growth of the plating film is substantially stopped, and the formation of the bump electrode is completed. In any case, when the bump electrode metal deposited from the first conductive layer contacts the second conductive layer formed on the plating resist film surface, the deposition of the plating metal can be stopped.

That is, if the thickness of the plating resist film is arbitrarily set and the bump electrodes of the semiconductor chip are formed by electroplating as described above, the height is restricted by the thickness of the plating resist film. Such (or uniform) bump electrodes can be formed. By flip-chip mounting a semiconductor chip having bump electrodes of uniform height, it is possible to realize a semiconductor device having low connection resistance and excellent thermal stress and heat dissipation.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 1 (a) to 1 (i), 2, 3, 4 and 5. FIG.

FIGS. 1A to 1I are cross-sectional views schematically showing an embodiment of a method for manufacturing a semiconductor device according to the present invention, and FIGS. 2 and 3 show steps in the method for manufacturing a semiconductor device according to the present invention. 4 and 5 are cross-sectional views schematically showing main parts of different embodiments of a method of manufacturing a semiconductor device according to the present invention.
First, a first embodiment of a method for manufacturing a semiconductor device according to the present invention will be described.

As shown in FIG. 1 (a), a principal part is shown in cross section, a bonding pad 2 is formed on one main surface, and a passivation film 5 is formed except for the bonding pad 2 region.
A semiconductor chip (semiconductor device or element) 1 in which is formed is prepared, and for example, on the surface of the bonding pad 2 and the surface of the passivation film 5 of the semiconductor chip 1, for example,
Cu / Ti is deposited on the entire surface to a thickness of about 2 μm to form the first conductive layer 9.
Is formed.

Then, a thick film resist AZ4903 (trade name, manufactured by Hoechst Japan Co., Ltd.) was spin-coated to a thickness of 50 μm.
A resist layer 10 is formed to a degree and baked at 200 ° C. (FIG. 1B).

On the semiconductor chip 1 on which the resist layer 10 is formed as described above, for example, Cu-Ti is vapor-deposited on the entire surface of the resist layer 10 to a thickness of about 2 μm, and a second conductive layer 11 is deposited and formed. 1 (c)). Next, for example, OFPR-800 (trade name, manufactured by Tokyo Ohka Co., Ltd.) is formed on the second conductive layer 11 thus formed.
The spin-coating, exposure, one side than the bonding pads 2 have a 80 [mu] m ^□ opening of the developer is small 20 [mu] m, patterning is performed for Shoyo openings are formed in the size of 60μm to resist OFPR. Using the patterned resist OFPR as a mask, Cu forming a part of the second conductive layer 11 is etched with a mixed solution of ammonium persulfate, sulfuric acid, and ethanol, and then a mixed solution of EDTA, ammonia, and hydrogen peroxide. Then, Ti as another part of the second conductive layer 11 is etched to remove OFPR-800 by ascent. At this time, since AZ-4903 has been baked at 200 ° C., the acetone used for stripping the OFPR remains undissolved / removed (FIG. 1 (d)).

Next, the resist AZ-4903 layer 10 is dry-etched using RIE, using the second conductive layer Cu / Ti11 partially etched as a mask, as a mask. Thus, a semiconductor chip for forming bump electrodes on which the first conductive layer 9 and the second conductive layer 11 are formed is formed (FIG. 1E). The semiconductor chip for forming a bump electrode shown in FIG. 1E is formed, for example, by spin-coating a resist AZ-4903 to form a 50 μm thick resist, and then exposing and developing the bonding pad 2 having an opening of 80 μm ^square. Alternatively, it is also possible to form an opening having a size of 60 .mu.m, each side having a size smaller by 20 .mu.m, in the resist, and to deposit Cu again by a thickness of about 1 .mu.m.

Thereafter, using the second conductive layer 11 as a mask, the semiconductor chip 1 from which the resist AZ-4903 layer 10 in the bump electrode formation region has been selectively removed is, as shown in FIG.
The first conductive layer 9 is connected to the cathode of the power supply 14 on which the short-circuit protection circuit is formed, and the second conductive layer 11 and the counter electrode 12 made of a high-purity copper plate are connected to the anode of the power supply 14. More copper sulfate
250 g / l, with a solution 15 consisting of sulfuric acid (specific gravity 1.84) 50 g / l, set the bath temperature 25 ° C., a current density of 5A / dm ² was applied, with gentle agitation height 50μm plating Cu I do.
When copper, which is the metal of the bump electrode 4 deposited from the first conductive layer 9, comes into contact with the second conductive layer 11, as shown in cross section in FIG. In order to stop, the bump plating ends (FIG. 1 (f)).

As described above, after selectively forming Cu only on the surface of the bonding pad 2 region, the plating resist AZ-4903 layer 10 is removed with acetone. Then
Cover the positive resist OFPR-800 again, and leave the positive resist O
The FPR-800 is patterned, and the first resist is mixed with ammonium persulfate, sulfuric acid and ethanol using the patterned positive resist OFPR-800 as a mask.
After etching Cu which forms a part of the conductive layer 9, the Ti which also forms a part of the first conductive layer 9 is etched with a solution composed of EDTA, ammonia and aqueous hydrogen peroxide, and finally OFPR-8
00 is removed with acetone (FIG. 1 (g)). FIG. 3 is a sectional view showing a structure in which a plurality of required bump electrodes 4 are formed in this way.

Next, a method of mounting and connecting the semiconductor chip 1 on which the bump electrodes 4 having a uniform height (uniform) are formed on the surface of the alumina-based wiring board 6 will be described. A solder layer 8 is formed in advance on the surface of the connection electrode portion 7 of the alumina-based wiring board 6 by printing, and the semiconductor device (semiconductor chip) 1 is mounted on the wiring board 6 in a so-called face-down positional relationship. And the bump electrodes 4 of the semiconductor chip 1 are aligned with the connection electrode portions 7 of the wiring board 6 by a method using a half mirror, which is a known technique.
(FIG. 1 (h)). The bump electrode 4 of FIG. At this time, the wiring substrate 6 is held on a stage having a heating mechanism, and is preliminarily heated to 280 ° C. higher than the melting point of the eutectic solder 8 formed on the wiring substrate 6 in the form of preliminary solder.

On the other hand, the collet holding the semiconductor chip 1 on which the bump electrodes 4 are formed is heated on the surface of the bump electrodes 4 by heating in a nitrogen atmosphere at the same temperature of 280 ° C. as the stage on which the wiring board 6 is mounted. The solder layer 8 is melted, and the semiconductor chip 1 and the wiring board 6 are electrically connected and mounted (FIG. 1 (i)). After the connection and mounting, the gap between the semiconductor element 1 and the wiring board 6 is filled with, for example, silicone resin so as to cover the mounted semiconductor element (semiconductor chip) 1 and the semiconductor chip 1 is flip-chip mounted on the wiring board 6. The formed semiconductor device is formed.

Next, another embodiment of the method of manufacturing a semiconductor device according to the present invention will be described.

This example of the manufacturing method is different from the above-described example of the manufacturing method in the method of electroplating the bump electrode 4, but the other steps are basically the same. That is, a plating resist AZ-4903 layer 10 is used as a mask for the second conductive layer 11.
1 (a) for selectively removing the bump electrode 4 forming region of FIG.
The process up to (e) is advanced.

Next, as shown in cross section in FIG.
The first conductive layer 9 of the semiconductor chip 1 for forming a bump electrode on which the conductive layer 9 and the second conductive layer 11 are formed is used as a cathode of a power source, and has a sufficiently large area as compared with a portion where the first conductive layer 9 is in contact with an electrolytic solution. The auxiliary electrode 13 made of a high-purity copper plate having a second conductive layer
Then, a counter electrode 12 made of a similar high-purity copper plate is connected to the anode, and electroplating is performed to form a required bump electrode 4. In this example, the plating solution composition, bath temperature,
The plating conditions such as the current density were set in the same manner as in the above example.

After the bump electrodes 4 are formed by electroplating, the removal of the second conductive layer 11, the plating resist film 10, and the selective removal of the first conductive layer 9 are performed in the same manner as in the above example. A semiconductor chip having a bump electrode 4 having a structure as shown in cross section in FIG. 1 (g) is obtained. The connection of the semiconductor chip (semiconductor device) on which the bump electrodes 4 are formed with copper having a high thermal conductivity to the alumina-based wiring board 6 is shown in FIG. 1 (h) and (i) in cross section. This is done in the same way as shown.

In the semiconductor device manufactured by the method of manufacturing a semiconductor device according to the present invention described above, variations in the height of the bump electrodes 4 formed by electrolytic plating are caused within the surface of the semiconductor chip 1 of the plating resist film 10. And the variation of the height of the bump electrode formed by electrolytic plating is ± 2% even if the thickness of the plating resist film 10 is set to 20 μm or 50 μm.
%. This means that when the bump electrode is formed by the conventional electrolytic plating, when the thickness of the plating resist film is 20 μm, the height variation is ± 10%, and when the thickness is 50 μm, the height variation is ± 5%. This indicates that the degree of variation is significantly reduced as compared with.

When the semiconductor device 1 manufactured above was flip-chip mounted on the surface of the alumina-based wiring board 6,
The connection resistance between the bump electrode 4 and the connection electrode portion 7 of the alumina-based wiring board 6 is 0.005Ω / pad, and the connection resistance for each pad of the semiconductor device having 100 pins is 0.005Ω ± 0.0005Ω / pad. And the resistance values were consistent with a variation within ± 10%. On the other hand, the height variation of the bump electrode obtained by the conventional manufacturing method is ± 5μ.
m was flip-chip mounted in the same way.
0.1Ω / pad, and the variation in the connection resistance value was extremely large.

Further, the coefficient of thermal expansion is 6.0 to 6.5 × 10 ^-6 /
The result of flip-chip mounting with the connection structure shown in FIG. 1 (h) on the surface of the alumina-based wiring substrate 6 which is twice as high as 3.5 ° ^C./° C. and 3.5 × 10 ⁻⁶ / ° C. of silicon, (-55 ℃ (30min) ~ 25 ℃ (5min) ~ 150 ℃ (30min)
No increase in connection resistance was observed even after 1000 cycles at 2525 ° C. (5 min)). Further, when resin was sealed between the semiconductor element 1 and the wiring board 6, no failure was observed up to 3000 cycles. As described above, the semiconductor device (semiconductor chip) obtained by the manufacturing method according to the present invention has excellent reliability and the like, and can be provided with satisfactory practical use.

The present invention is not limited to the above embodiment, but can be variously modified without departing from the gist thereof. For example, the metal forming the bump electrode formed by electrolytic plating is not limited to Cu, but may be Au, Pd, Pt, Ni
Or the like may be used. In the case of electrolytic plating, the first conductive layer serving as a cathode is made of a material such as Cu / Ti, whose dimensions, thickness,
The configuration is not limited. Further, the material, dimensions, thickness, and configuration of the second conductive layer are not similarly limited, and the types and thicknesses of the plating resist and the etching resist are not similarly limited.

[0034]

According to the present invention, a straight wall bump electrode having a high height and a uniform height can be easily formed and provided on a semiconductor device (semiconductor element) surface by electroplating. It becomes possible. That is, in the method of the present invention, a second conductive layer is formed on a surface portion of a plating resist film for forming a bump electrode separately from the first conductive layer serving as a cathode, and the first conductive layer is provided with a short-circuit protection circuit. The second conductive layer and the counter electrode are connected to the anode of the power supply to the cathode of the power supply, and the electroplating for forming the bump electrode in the electrolytic solution is performed. When the contact is made, the short-circuit protection circuit operates to stop the current supply, so that the formation of the bump electrode is automatically stopped and terminated. In other words, the height of the bump electrode formed by plating is always automatically controlled according to the thickness of the plating resist film for forming the bump electrode. To form

In the plating of the bump electrode, the first conductive layer is divided into at least one region on the semiconductor element surface, and when the first conductive layer is connected to a cathode of a power supply, the bump formed by plating is formed. Variations in electrode height can be extremely reduced.

Further, a second conductive layer is formed on the surface of the plating resist film for forming a bump electrode separately from the first conductive layer serving as a cathode, while the first conductive layer is in contact with the electrolyte. An auxiliary electrode having a sufficiently large area is connected to the second conductive layer, the first conductive layer is connected to the cathode of the power supply, the counter electrode is connected to the anode of the power supply, and immersed in an electrolytic solution to form an electrode for forming a bump electrode. When plating is performed, when the bump electrode metal comes into contact with the second conductive layer, a current also flows through the auxiliary electrode, and the current density sharply decreases. At this time, if the area of the auxiliary electrode is sufficiently large, the growth of the plating film is substantially stopped, and the formation of the bump electrode is completed. In any case, according to the manufacturing method of the present invention, when the bump metal deposited from the first conductive layer comes into contact with the second conductive layer, the deposition of the plating metal is automatically stopped and terminated, This makes it possible to form a uniform bump electrode. Also, by mounting a semiconductor device having bump electrodes having such a uniform height in a so-called flip-chip manner, low connection resistance, thermal stress,
It is possible to realize a mounted circuit device having excellent heat dissipation.

[Brief description of the drawings]

FIGS. 1A and 1B schematically show an embodiment of a method for manufacturing a semiconductor device according to the present invention, wherein FIG. 1A is a cross-sectional view showing a state in which a first conductive layer is formed, and FIG. Sectional view showing a state in which a plating resist film is formed thereon, (c) is a sectional view showing a state in which a second conductive layer is formed on the plating resist film, (d)
Is a cross-sectional view showing a state where the second conductive layer is patterned,
(e) is a cross-sectional view showing a state where a plating resist film is patterned using the patterned second conductive layer as a mask, and (f) is a cross-sectional view showing a state where bump electrodes are selectively formed on the first conductive layer by plating. FIG. 1G is a cross-sectional view showing a state where required bump electrodes are formed, FIG. 2H is a cross-sectional view showing a state where a semiconductor device is flip-chip mounted on a wiring board surface, and FIG.
FIG. 3 is a cross-sectional view showing a state where the semiconductor device is flip-chip mounted on the wiring board surface.

FIG. 2 is a cross-sectional view schematically showing a state in one step of an embodiment of a method of manufacturing a semiconductor device according to the present invention.

FIG. 3 is a cross-sectional view schematically showing a state in another step of the embodiment of the method of manufacturing the semiconductor device according to the present invention.

FIG. 4 is a cross-sectional view schematically showing an implementation state of an electroplating step in an embodiment of a method of manufacturing a semiconductor device according to the present invention.

FIG. 5 is a cross-sectional view schematically showing an implementation state of an electroplating step in another embodiment of the method of manufacturing a semiconductor device according to the present invention.

FIG. 6 is a cross-sectional view illustrating a configuration of a bump electrode in a conventional semiconductor device.

FIG. 7 is a sectional view showing another configuration of a bump electrode in a conventional semiconductor device.

FIG. 8 is a cross-sectional view showing a state in which a conventional semiconductor device is flip-chip mounted on a wiring board surface.

[Explanation of symbols]

1. Semiconductor device (semiconductor element or semiconductor chip)
2. Bonding pad 3. Barrier metal layer
Bump electrode 5 Passivation film 6 Wiring board 7 Connection electrode part of wiring board 8 Solder layer 9
... First conductive layer 10 ... Plating resist layer 11 ... Second conductive layer 12 ... Counter electrode 13 ... Auxiliary electrode 14 ... Plating power supply 15 ... Plating solution

Claims (1)

(57) [Claims] 1. A method of manufacturing a semiconductor device comprising means for forming a bump electrode on a bonding pad surface of a semiconductor chip, wherein a first conductive layer is formed on a main surface of the semiconductor chip on which the bump electrode is formed. Forming a plating resist film in which a bump electrode forming portion is opened on the upper surface of the first conductive layer, and forming a second conductive layer on a main surface of the plating resist film excluding a side wall surface; Connecting the first conductive layer to a cathode of a power supply with a short-circuit protection circuit, connecting the second conductive layer and a counter electrode made of a material constituting a main component of the bump electrode to an anode of the power supply, and connecting the semiconductor chip to an electrolyte. Performing a plating process for forming a bump electrode by immersion in a semiconductor device.