JP3139803B2 - Impulse response measurement device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an impulse response measuring device for measuring an impulse response of an object to be measured.

[0002]

2. Description of the Related Art With the advent of digital audio represented by a compact disk (CD), the sound quality of a source has been significantly improved. Along with this, various parts have been studied to improve the sound quality of audio equipment. In addition, when examining the improvement of sound quality of such audio equipment, not only is it possible to visually confirm the difference in sound quality between conventional audio equipment and sound equipment that achieves high sound quality, but also to quantify this difference in sound quality quantitatively. A measurement method for confirming is also being studied. That is, as one of the measurement methods, a measurement method which analyzes a transient response characteristic of a device under test based on an impulse response of the device under test has become mainstream.

Therefore, an impulse response measuring device described below has been conventionally known. Hereinafter, a conventional impulse response measuring device will be described with reference to FIG. In FIG. 8, 81 is a signal generator for generating a signal for measurement, 82 is a device under test, 83 is an input terminal for inputting the output of the device under test 82, 84 is a signal input from the input terminal 83 from an analog signal. An A / D converter (analog / digital converter) for converting into a digital signal, an arithmetic unit 85 for synchronously adding the output of the A / D converter 84, and an output terminal 86 for outputting the output of the arithmetic unit 85. 9 is an explanatory diagram of the operation of the signal generator 81, FIG. 10 is an explanatory diagram of the operation of the A / D converter 84, and FIG.
12 is an operation flow of the arithmetic unit 85.

Next, the operation of this conventional example will be described. The signal generator 81 generates a pulse signal as shown in FIG. The response signal of the device under test 82 to this pulse signal is as shown in FIG. When this output signal is converted into a digital signal by the A / D converter 84, the converted signal becomes as shown in FIG. 9 (c). By the way, this impulse response measuring device generates a signal close to an impulse from a signal generator 81, and sets a response signal of the device under test 82 to an output signal of the signal generator 81 as an impulse response of the device under test 82. This output signal is converted into a digital signal by the A / D converter 84. That is, the smaller the pulse width of the output pulse of the signal generator 81, the higher the accuracy of the impulse response of the device under test 82.

In order to analyze the characteristics of the device under test 82 from various angles using the impulse response, it is necessary to convert the impulse response into a digital signal and store it. Therefore, the impulse response signal of the device under test 82 is A /
The digital signal is converted by the D converter 84. However, A
The / D converter 84 samples the input signal at the sampling cycle interval, and as shown in FIG. 10 when a signal having a small pulse width is converted into a digital signal. That is, when the impulse response signal of the device under test 82 is A / D-converted several times, different results are obtained depending on the start timing of the A / D conversion, and the reproducibility of the measurement data and the measurement accuracy are lowered. Therefore, a plurality of measurements are performed on one device under test, and the arithmetic unit 85 performs synchronous addition on the measurement results to improve reproducibility and measurement accuracy.

Here, as a method of synchronous addition, for example, as shown in FIG. 11A, a sampling point (time) when an input signal to the A / D converter 84 first reaches a predetermined voltage value,
That is, the data at the first sampling point (time) when the data obtained by converting the input signal into the digital signal reaches the predetermined numerical value is stored in the predetermined address of the memory in the arithmetic unit 85 shown in FIG. Place the measurement data in.

This will be described with reference to the operation flow shown in FIG. 12. First, an impulse response signal corresponding to the output signal of the signal generator 81 is supplied to the device under test 82 by the A / D converter 84.
And the arithmetic unit 85 finds the first sampling point where the A / D converted data exceeds a predetermined numerical value. Then, the measured data is stored so that the data at the sampling point is stored at a predetermined address of the memory in the arithmetic unit 85. Next, the impulse response is measured for the same device under test 82, and the digital data converted by the A / D converter 84 is used to determine the first sampling point (time) when the arithmetic unit 85 reaches a predetermined numerical value. Then, the data at the sampling point is made to correspond to a predetermined address of the memory in the arithmetic unit 85, added to the data already stored in the memory, and stored in the memory again. The above processing is performed a predetermined number of times and averaged.

The above synchronous addition is expressed by a mathematical expression. A / D
The impulse response signal converted to digital data by the converter 84 is represented by x (i, j) (i = 1, 2,..., Mj = 1,
2,..., N: i is the number of measurements, j is a sampling number), m is the sampling point that first reaches a predetermined value in the arithmetic unit 85, and M is the output y of the arithmetic unit 85 if M is the number of synchronous additions.
(L) (l = 1, 2,..., N) becomes (Equation 1). Further, if the data is added synchronously from the data before the sampling point m (that is, i = m) and before the α sampling point (that is, i = m−α), the relationship between i and l becomes (Equation 2).

[0009]

(Equation 1)

[0010]

(Equation 2)

The output of the arithmetic unit 85 is output from an output terminal 86. Thus, A / D
The influence on the reproducibility of the measurement data due to the limitation of the sampling speed of the converter 84 or the irregular sampling start timing is removed.

[0012]

However, in the above-mentioned conventional configuration, it is said that an A / D converter having a high speed and a large quantization number is required to measure the impulse response of the device under test with high accuracy. The problem is that the measurement signal is originally an impulse, but it is impossible to actually generate an impulse, so a pulse-like signal is usually used as the measurement signal. Because of its small size, for example, when measuring an object to be measured having different characteristics between a large amplitude and a small amplitude, such as a speaker, there is a problem that it is difficult to measure when the vibration amplitude of the diaphragm of the speaker is large. Is to perform synchronous addition in order to obtain reproducibility of measured data, but in reality, the average value of data sampled at an arbitrary time within one sampling cycle, that is, the sampling cycle For the following time window is data subjected to smoothing processing of the data had problem that can not be accurately measured the impulse response of the object to be measured.

The present invention solves the above-mentioned conventional problem. Since it is not necessary to use an impulse for the measurement signal, the signal has a large average power in the time axis direction and a signal having a wide frequency range. By using white noise, it is possible to measure the impulse response of the diaphragm of the speaker from a small amplitude to a large amplitude with respect to an object to be measured such as a speaker, Since it is not necessary to use an impulse and uses a digital signal read from a digital source, high-precision measurement is possible by using an A / D converter with characteristics equivalent to the sampling frequency and quantization number of the digital source. And a sampler generated at the time of A / D conversion based on a digital signal read from a digital source or the like. Removes any irregularities in the start points of the measurement, thereby eliminating the effects on the reproducibility of the measured data, etc., and converts the digital signal read from the digital source used for measurement into an analog signal And an impulse response measuring apparatus capable of removing an influence on a signal of an A / D converter for converting a response output of a device under test into a digital signal and performing measurement. The purpose is to do so.

[0014]

In order to achieve this object, an impulse response measuring apparatus according to the present invention comprises a first input terminal for inputting a digital signal read from a digital source or the like, and a first input terminal. First storage means for storing an input digital signal, first signal generation means for generating a reference signal synchronized with the digital signal input to the first input terminal, and converting the digital signal into an analog signal A second input terminal for inputting a response output signal of the device under test with respect to the converted analog signal, and a digital signal based on a reference signal output from the first signal generating means, the analog signal being input to the second input terminal. A first conversion unit for converting into a signal, a second storage unit for storing an output of the first conversion unit, and a signal stored in the second storage unit. The time lag between the signals stored in the first storage means is detected with reference to the signal stored in the first storage means, and the time lag is corrected for the signal stored in the second storage means. A first calculating unit that performs a calculation, a third storing unit that stores an output of the first calculating unit, a second calculating unit that calculates a spectrum of a signal stored in the first storing unit, A third calculating means for calculating a spectrum of the signal stored in the third storing means, a fourth calculating means for dividing an output of the third calculating means by an output of the second calculating means, A fourth storage means for storing an output of the fourth calculation means, and a fifth calculation means for converting a signal stored in the fourth storage means into a time axis signal; The output of the calculating means is output.

According to another aspect of the present invention, there is provided an impulse response measuring apparatus according to the present invention, wherein a third input terminal for inputting a digital signal recorded on a digital source or the like, and a signal input to the third input terminal. Fifth storage means for storing a digital signal, a second signal generation means for generating a reference signal, and a fifth signal conversion means for converting the digital signal into an analog signal based on the reference signal output from the second signal generation means. A second conversion means, an output terminal for outputting an output signal of the second conversion means, a fourth input terminal for inputting a response output signal of the device under test with respect to an analog signal output from the output terminal, Third conversion means for converting an analog signal input to a fourth input terminal into a digital signal based on a reference signal output by the second signal generation means; A sixth storage unit for storing an output of the unit, and a time lag between a signal stored in the sixth storage unit and a signal stored in the fifth storage unit is stored in the fifth storage unit. A sixth calculating means for detecting the stored signal as a reference and correcting the signal stored in the sixth storing means, and a seventh storing means for storing an output of the sixth calculating means A seventh calculating means for calculating the spectrum of the signal stored in the fifth storage means, an eighth calculating means for calculating the spectrum of the signal stored in the seventh storage means, A ninth operation means for dividing an output of the eighth operation means by an output of the seventh operation means, and an eighth operation means for storing an output of the ninth operation means.
Storage means, and tenth calculation means for converting a signal stored in the eighth storage means into a time axis signal,
The output of the tenth arithmetic means is output.

Further, in order to achieve this object, an impulse response measuring apparatus according to the present invention comprises a fifth input terminal for inputting a digital signal read out from a digital source or the like, and a digital signal input to the fifth input terminal. Ninth storage means for storing a signal, third signal generation means for generating a reference signal synchronized with a digital signal inputted to the fifth input terminal, and an analog signal obtained by converting the digital signal into an analog signal A sixth input terminal for inputting an input signal, a seventh input terminal for inputting a response output signal of the device under test with respect to the analog signal obtained by converting the digital signal into an analog signal, the sixth input terminal, and the seventh input terminal. First signal switching means for selectively switching an analog signal input to an input terminal; and an output of the first signal switching means to the third signal switching means. A fourth converting means for converting a digital signal based on the reference signal signal generating means outputs,
A second signal switching means for switching and outputting the output of the fourth conversion means in synchronization with the first signal switching means, and an analog signal supplied to the sixth input terminal by the first signal switching means. Tenth storage means for storing the output of the fourth conversion means output by the second signal switching means when a signal is selected, and inputting the first signal switching means to the seventh input terminal An eleventh storage unit for storing an output of the fourth conversion unit output by the second signal switching unit when the selected analog signal is selected, and a signal stored in the tenth storage unit. The time lag between the signals stored in the ninth storage means is detected with reference to the signal stored in the ninth storage means, and the signal stored in the tenth storage means is corrected. First Calculation means, a twelfth storage means for storing the output of the eleventh calculation means, and a signal between the signal stored in the eleventh storage means and the signal stored in the ninth storage means. A twelfth correction unit detects a time lag based on a signal stored in the ninth storage unit and corrects the signal stored in the eleventh storage unit.
Calculation means, a thirteenth storage means for storing an output of the twelfth calculation means, a thirteenth calculation means for calculating a spectrum of a signal stored in the ninth storage means,
Fourteenth operation means for calculating the spectrum of the signal stored in the twelfth storage means, and fifteenth operation means for calculating the spectrum of the signal stored in the thirteenth storage means
And the output of the fourteenth computing means is the first
A sixteenth calculating means for dividing by an output of the third calculating means, a fourteenth storing means for storing an output of the sixteenth calculating means, and an output of the thirteenth calculating means. Seventeenth calculating means for dividing by the output, fifteenth storing means for storing the output of the seventeenth calculating means, and storing the signal stored in the fifteenth storing means in the fourteenth storing means An eighteenth operation means for dividing by the signal which has been input, a sixteenth storage means for storing an output of the eighteenth operation means, and a signal stored in the sixteenth storage means being converted into a time axis signal. Nineteenth arithmetic means for performing
The output of the nineteenth arithmetic means is output.

[0017]

According to the present invention, the following operations are performed by the above configuration. That is, a digital signal read from a digital source or the like is input to the first input terminal and stored in the first storage means. At this time, the first signal generating means generates a reference signal synchronized with the input digital signal and supplies it to the first converting means. When a response signal of the device under test with respect to the signal obtained by converting the digital signal into an analog signal is input to a second input terminal, the first conversion means outputs a signal based on a reference signal output from the first signal generation means. This analog signal is converted into a digital signal. The converted signal is stored in the second storage means. Next, the first calculating means calculates the time lag between the signal stored in the second storage means and the signal stored in the first storage means by using the signal stored in the first storage means. Correct as a reference. Then, a correction output for the signal stored in the second storage unit, which is the output of the first calculation unit, is stored in the third storage unit. Next, the second calculation means calculates the spectrum of the signal stored in the first storage means. Similarly, the third calculation means calculates the spectrum of the signal stored in the third storage means. Then, the fourth arithmetic means divides the output of the third arithmetic means by the output of the second arithmetic means. The output of the fourth operation means is stored in the fourth storage means. Next, the fifth calculation means converts the spectrum signal stored in the fourth storage means from the frequency domain to the time axis domain. Then, the output of the fifth calculating means is output. That is, the spectrum of the output signal of the device under test with respect to the signal for measurement is divided by the spectrum of the signal for measurement in the frequency domain, and the result of the division is converted from the frequency domain to the time domain to calculate and output an impulse response. ing.

Further, according to the present invention, the following operation is achieved by the above-described configuration. That is, a digital signal read from a digital source or the like is input to the third input terminal and stored in the fifth storage means. The second signal generating means generates a reference signal and supplies it to the second and third converting means. Further, the digital signal is converted into an analog signal based on the reference signal generated by the second signal generating means, and is output from an output terminal. An analog signal output from the output terminal is supplied to the device under test. When a response signal of the device under test to this signal is input to the fourth input terminal, the third converter converts the analog signal into a digital signal based on the reference signal output from the second signal generator.
The converted signal is stored in the sixth storage means. next,
The sixth calculating means corrects a time lag between the signal stored in the sixth storage means and the signal stored in the fifth storage means based on the signal stored in the fifth storage means. I do. Then, the correction output for the signal stored in the sixth storage means, which is the output of the sixth arithmetic means, is the seventh output.
Is stored in the storage means. Next, the seventh calculating means sets the fifth
The spectrum of the signal stored in the storage means is calculated. Similarly, the eighth calculation means calculates the spectrum of the signal stored in the seventh storage means. Then, the ninth operation means divides the output of the eighth operation means by the output of the seventh operation means. The output of the ninth operation means is stored in the eighth storage means. Next, the tenth arithmetic means converts the spectrum signal stored in the eighth storage means from the frequency domain to the time axis domain. Then, the output of the tenth calculation means is output. That is, the spectrum of the output signal of the device under test with respect to the signal for measurement is divided by the spectrum of the signal for measurement in the frequency domain, and the result of the division is converted from the frequency domain to the time domain to calculate and output an impulse response. ing.

Further, according to the present invention, the following operation is achieved by the above configuration. That is, a digital signal read from a digital source or the like is input to the fifth input terminal and stored in the ninth storage means. At this time, the third signal generating means generates a reference signal synchronized with the input digital signal and supplies it to the fourth converting means. When an analog signal obtained by converting the digital signal into an analog signal is input to a sixth input terminal, and a response signal of the device under test to the signal obtained by converting the digital signal into an analog signal is input to a seventh input terminal, The first signal switching means selectively switches an analog signal input to the sixth and seventh input terminals. The signal selected by the first signal switching means is input to the fourth conversion means. The fourth converter converts the analog signal into a digital signal based on the reference signal output from the third signal generator. The signal obtained by converting the signal input from the sixth input terminal is the second signal.
Is output to the tenth storage means by the signal switching means of
Stored in the tenth storage means. The signal obtained by converting the signal input from the seventh input terminal is output to the eleventh storage means by the second signal switching means and stored in the eleventh storage means. Next, the eleventh arithmetic means calculates the time lag between the signal stored in the tenth storage means and the signal stored in the ninth storage means by using the signal stored in the ninth storage means. Correct as a reference. Then, the correction output for the signal stored in the tenth storage means, which is the output of the eleventh calculation means, is stored in the twelfth storage means. Similarly, the twelfth computing means calculates the time lag between the signal stored in the eleventh storage means and the signal stored in the ninth storage means by subtracting the signal stored in the ninth storage means from the signal stored in the ninth storage means. Correct as a reference. And, the output of the twelfth arithmetic means,
The correction output for the signal stored in the eleventh storage means is stored in the thirteenth storage means. Next, the thirteenth calculation means calculates the spectrum of the signal stored in the ninth storage means. Similarly, the fourteenth calculation means calculates the spectrum of the signal stored in the twelfth storage means. And the second
The fifteen calculation means calculates the spectrum of the signal stored in the thirteenth storage means. And the sixteenth arithmetic means is the fourteenth
The output of the calculating means is divided by the output of the thirteenth calculating means. The output of the sixteenth operation means is stored in the fourteenth storage means. Similarly, the seventeenth computing means divides the output of the sixteenth computing means by the output of the fourteenth computing means. The output of the seventeenth operation means is stored in the fifteenth storage means. Next, the eighteenth operation means divides the signal stored in the fifteenth storage means by the signal stored in the fourteenth storage means. And
The output is stored in the sixteenth storage means. And the nineteenth
The calculating means converts the spectrum signal stored in the eighth storage means from the frequency domain to the time axis domain. Then, the output of the nineteenth calculation means is output. That is, the spectrum of the output signal of the device under test with respect to the signal for measurement is divided by the spectrum of the signal for measurement in the frequency domain, and the result of the division is converted from the frequency domain to the time domain to calculate and output an impulse response. ing.

[0020]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of an impulse response measuring device according to a first embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an input terminal for inputting a digital signal read from a digital source or the like, 2 denotes a memory for storing a digital signal input to the input terminal 1, and 3 denotes a digital signal input from the input terminal 1. A signal generator for generating a reference signal, and 4 an input terminal for inputting a response output signal of the device under test with respect to a signal obtained by converting a digital signal to an analog signal, and 5 a digital signal for converting the analog signal input to the input terminal 4 into a digital signal. A / D converter for converting to A
A memory for storing the output of the / D converter 5; and 7 for correcting the time lag between the signal stored in the memory 6 and the signal stored in the memory 2 with reference to the signal stored in the memory 2. 8 is a memory for storing the output of the arithmetic unit 7, 9 is an arithmetic unit for calculating the spectrum of the signal stored in the memory 2, and 10 is an arithmetic for calculating the spectrum of the signal stored in the memory 8. , An arithmetic unit for dividing an output of the arithmetic unit by an output of the arithmetic unit, a memory for storing an output of the arithmetic unit, and a conversion of a spectrum signal stored in the memory into a time axis signal Computing unit, 14 is a computing unit
This is an output terminal for outputting the 13 output signals.

FIG. 2 is an explanatory diagram for explaining digital signals and analog signals input to the input terminals 1 and 4 of the impulse response measuring device according to the first embodiment. Reference numeral 21 denotes a compact disc (CD); Is C to play CD21
D player, 23 is an analog signal output terminal of the CD player 22, 24 is a digital signal output terminal of the CD player 22, 25
Is an object to be measured. 3 and 4 are explanatory diagrams of the operation of the calculator 7 in the impulse response measuring device according to the first embodiment.

The operation of the thus configured impulse response measuring device of the first embodiment of the present invention will be described below. For example, a predetermined track of the CD 21 on which white noise is recorded is reproduced by the CD player 22. From the digital signal output terminal 24, the CD player 22
Output a digital signal read from the CD 21.
When the digital signal output terminal 24 is connected to the input terminal 1, the input digital signal is stored in the memory 2. At the same time, the signal generator 3 generates a reference signal synchronized with the digital signal input from the input terminal 1 and supplies the output signal to the A / D converter 5.

At the same time, a signal obtained by converting a digital signal input to the input terminal 1 into an analog signal is output from the analog signal output terminal 23 of the CD player 22 and supplied to the device under test 25. Then, the device under test 25 outputs a response output signal to the input analog signal, and this output signal is input to the input terminal 4. The analog signal input from the input terminal 4 is input to the A / D converter 5. The A / D converter 5 converts the input analog signal into a digital signal using the output signal of the signal generator 3 as an operation reference. Then, a signal obtained by converting the analog signal input from the input terminal 4 into a digital signal by the A / D converter 5 is stored in the memory 6. That is, the analog signal input to the input terminal 4 is converted into a digital signal in synchronization with the digital signal input to the input terminal 1 and stored in the memory 6.

By the way, there is a time lag T ₀ between the signals stored in the memories 2 and 6 as shown in FIG. That is, since the A / D converter 5 operates in synchronization with the digital signal input to the input terminal 1, there is no time lag between the signals originally stored in the memories 2 and 6. However, there is a limit in the operating speed of the actual element, so that a time lag occurs. However, the deviation is constant. That is, the time shift ΔT (n) of the n-th sample can be expressed by (Equation 3). ΔT (n) is shown in FIG.

[0025]

(Equation 3)

The arithmetic unit 7 notes this time lag.
The signal stored in the memory 2 is removed based on the signal. here
The operation of the arithmetic unit 7 is performed when the time lag is detected and detected.
It consists of two stages of correction of the shift. This operation will be described.
First, the time between the signals stored in the memory 2 and the memory 6
The detection of the time lag is performed by detecting the time lag from the memory 2.
Data of a predetermined number of samples is extracted mainly from the data. next,
The data corresponding to the data extracted from the memory 2 is stored in the memory
6 is also extracted. And extracted from this memory 6
K / N samples from the time the data was sampled
(K = 0, 1, 2, ..., N-1) N sets of data delayed
Generate data. One of the methods for generating this N sets of data
An example is described below. Set the sampling period to T_s, Sampling
Let the function be S (m) (m = -N₀, ..., 0, ..., N₀)
And the time t corresponding to k / N samples _d(k) is (Equation 4)
Become.

[0027]

(Equation 4)

The data extracted from the memory 6 is represented by x
(i) If (i = 1, 2,..., M), data x _c (i, k) delayed by k / N sample times from x (i) becomes (Equation 5). This x _c (i, k) is shown in FIG.

[0029]

(Equation 5)

The N sets of data x _c (i, k) generated by the above processing and the data y (i) (i
= 1, 2,..., M) based on (Equation 6).

[0031]

(Equation 6)

[0032] When the correlation coefficient calculated in this way becomes the maximum, the time lag t _d (k ₀₎ of the (k = k ₀₎ is the memory 2 and memory 6
Is a time lag between the signals stored in the. This C (k)
Is shown in FIG. 4 (b). Here, if N is increased, the accuracy of detecting the time lag is improved.

Next, the detected time lag is corrected for the signal stored in the memory 6 using (Equation 5). Then, the corrected signal is stored in the memory 8. By the above processing, the time lag between the signal stored in the memory 2 and the signal stored in the memory 8 is removed, and the signal stored in the memory 8 is read by the CD player 22 of the device under test 25 by the CD 21 Is a signal obtained by converting a response signal to an analog reproduction signal obtained by reproducing the same signal as the signal stored in the memory 2 into a digital signal.

Signal processing is performed on the data stored in the memory 2 and the memory 8 to measure the impulse response of the device under test 25. Here, the principle of the measurement will be described first. The signals stored in the memory 2 and the memory 8 are x (i) and y (i), respectively, and the impulse response of the device under test 25 is h (i) (i = 0, 1,..., N−
Assuming 1), (Equation 7) holds.

[0035]

(Equation 7)

Further, when Expression 7 is described in the frequency domain, Expression 8 is obtained.

[0037]

(Equation 8)

Here, the spectra of x (i), y (i) and h (i) are X (k), Y (k) and H (k). (Equation 8) to H
(k) can be calculated by (Equation 9).

[0039]

(Equation 9)

Therefore, h (i) can be calculated by converting H (k) from the frequency domain to the time axis domain. Next, the operation of each unit will be described. Arithmetic units 9 and 10 determine the spectra of the signals stored in memories 2 and 8, respectively. Here, DFT is used as an example of a method of calculating a spectrum from a time discrete signal. The signals stored in the memory 2 and the memory 8 are respectively expressed as x (i) and y
Assuming (i), X (k) and Y (k) of those spectra can be expressed by (Equation 10) and (Equation 11).

[0041]

[Equation 10]

[0042]

[Equation 11]

Next, the arithmetic unit 11 calculates the ratio H (k) of the spectrum of the signal stored in the memories 2 and 8 thus calculated based on (Equation 9). Then, the calculated ratio is stored in the memory 12. Next, the spectrum signal stored in the memory 12 is converted again into a time axis signal h (i) by the calculator 13 based on (Equation 12).

[0044]

(Equation 12)

The converted signal h (i) is output from the output terminal 14. Therefore, in the first embodiment of the present invention,
A digital signal read from a digital source or the like and an analog signal that is the response output of the DUT to a signal obtained by converting the read digital signal to an analog signal are converted into digital signals in a form synchronized with the digital signal recorded in the source. After converting and removing the time lag between the two, the spectra of both signals are calculated. Then, the ratio between the two is obtained in the frequency domain, and is converted again into a time axis signal. Through the above processing, the impulse response of the device under test can be measured.

In the first embodiment, when calculating the time lag between the signals stored in the memories 2 and 6 in the arithmetic unit 7, a signal having a k / N sample time difference is generated. The sampling function is used for this generation, but this can also be performed using the following method. That is, the signal extracted from the memory 6 is subjected to DFT, and the transfer function G (k) (Expression 1) having an amplitude of 1 and the phase _Ph (k) expressed by (Expression 13) is obtained.
By multiplying by 4) and IDFT of the multiplication result, data having a k / N sample time delay can be generated.

[0047]

(Equation 13)

[0048]

[Equation 14]

In the first embodiment, when the arithmetic unit 7 detects a time lag between the signal stored in the memory 2 and the signal stored in the memory 6, the signal is stored in each memory. Although the signal processing is performed by extracting data centered on one point of the signal, a time lag may be detected and corrected for a plurality of points.

Further, in the first embodiment, the impulse response is measured only from one measurement data. However, the measurement is performed a plurality of times in order to remove external noise mixed in at the time of the measurement, and the obtained result is obtained. The averaging may be performed. In the first embodiment, a time lag such as an A / D conversion latch timing generated at the time of A / D conversion is removed based on a digital signal recorded in a digital source. The quality of the measurement data does not deteriorate due to the addition and averaging of the data. FIG. 5 is a block diagram of an impulse response measuring device according to a second embodiment of the present invention. 5, reference numeral 51 denotes an input terminal for inputting a digital signal read from a digital source or the like; 52, a memory for storing the digital signal input to the input terminal 51; 53, a signal generator for generating a reference signal; A D / A converter for converting a digital signal input to the input terminal 51 into an analog signal; 55, an output terminal for outputting the output of the D / A converter 54;
Is an input terminal for inputting a response output of the device under test to an analog signal output from the output terminal 55, 57 is an A / D converter for converting an analog signal input from the input terminal 56 into a digital signal, and 58 is an A / D converter. A memory for storing the output of the D converter 57. A memory 59 corrects the time lag between the signal stored in the memory 58 and the signal stored in the memory 52 with reference to the signal stored in the memory 52. An arithmetic unit, 510 is a memory for storing the output of the arithmetic unit 59, 511 is an arithmetic unit for calculating the spectrum of the signal stored in the memory 52, and 512 is an arithmetic unit for calculating the spectrum of the signal stored in the memory 510. , 513 are arithmetic units for dividing the output of the arithmetic unit 512 by the output of the arithmetic unit 511, 514 is a memory for storing the output of the arithmetic unit 513, and 515 is for converting the spectrum signal stored in the memory 514 into a time axis signal. The computing unit, 516 Output terminal for outputting the output signal of the calculator 515.

The operation of the thus configured impulse response measuring device of the second embodiment of the present invention will be described below. First, a digital signal read from a digital source or the like is input to the input terminal 51, and is stored in the memory.
Stored in 52. Here, for example, the digital signal input to the input terminal 51 is a digital signal output from the digital output terminal 24 of the CD player 22 as in the first embodiment or a digital signal stored in a certain memory. May be. The signal generator 53 is a D / A converter 54.
And a signal (sampling clock) serving as an operation reference of the A / D converter 57 is supplied to the D / A converter 54 and the A / D converter 57.

The D / A converter 54 has an input terminal 51 according to the timing of the sampling signal output from the signal generator 53.
Is converted to an analog signal and output from an output terminal 55. When the analog signal output from the output terminal 55 is supplied to the device under test, the device under test outputs a response output signal to the input signal. This response output signal is input via the input terminal 56. Then A
The / D converter 57 converts the analog signal input from the input terminal 56 into a digital signal according to the timing of the sampling clock output from the signal generator 53. The converted digital signal is stored in the memory 58. That is, in principle, there is no time lag between the digital signals stored in the memory 52 and the memory 58, but only a time lag due to the operating speed of the existing electronic element.

Hereinafter, the memory 52, the memory 58, the computing unit 59, the memory 510, the computing unit 511, the computing unit 512, the computing unit 513, the memory 514, the computing unit 515, and the output terminal 516 are respectively the memories of the first embodiment. 2. The operations are exactly the same as those of the memory 6, the arithmetic unit 7, the memory 8, the arithmetic unit 9, the arithmetic unit 10, the arithmetic unit 11, the memory 12, the arithmetic unit 13, and the output terminal 14, and the description of the operation is omitted.

Therefore, in the second embodiment of the present invention,
A digital signal read from a digital source or the like and the read digital signal are converted into an analog signal based on a reference signal generated by a signal generator. After converting the signals into digital signals based on the signals and removing the time lag between them, the spectra of both signals are calculated.
Then, the ratio between the two is obtained in the frequency domain, and is converted again into a time axis signal. Through the above processing, the impulse response of the device under test can be measured.

In the second embodiment, the D / A converter 54 converts the digital signal input from the input terminal 51 into an analog signal, but converts the digital signal stored in the memory 52 into an analog signal. And output from the output terminal 55.

FIG. 6 is a block diagram showing an impulse response measuring device according to a third embodiment of the present invention. 6, reference numeral 61 denotes an input terminal for inputting a digital signal read from a digital source or the like, 62 denotes a memory for storing the digital signal input to the input terminal 61, 63 denotes a signal generator for generating a reference signal, and 64 denotes a signal generator for generating a reference signal. An input terminal for inputting a signal obtained by converting a digital signal input to the input terminal 61 into an analog signal, an input terminal 65 for inputting an output response signal of the device under test with respect to an analog signal input to the input terminal 64, and an input terminal 66. A signal switch for selecting and switching a signal input from the terminal 64 and the input terminal 65; 67, an A / D converter for converting the output of the signal switch 66 into a digital signal;
A signal switch for switching the output of the D converter 67 in synchronization with the signal switch 66. 69 is an input terminal of the signal switch 66.
A memory for storing the output of the signal switch 68 in which the output of the A / D converter 67 is selected and switched when the signal input to 64 is selected. A memory for storing the output of the signal switch 68 which selectively switches the output of the A / D converter 67 when selected, and 611 is a signal stored in the memory 69 and a memory 62
612 is a memory that stores the output of the calculator 611, and 613 is a memory that stores the output of the calculator 611. An arithmetic unit that corrects the time lag between the signal and the signal stored in the memory 62 based on the signal stored in the memory 62, 614 is a memory that stores the output of the arithmetic unit 613, and 615 is a memory that stores the output of the arithmetic unit 613. A calculator for calculating the spectrum of the stored signal, 616 is a calculator for calculating the spectrum of the signal stored in the memory 612, 617 is a calculator for calculating the spectrum of the signal stored in the memory 614, 618 Is a calculator that divides the output of the calculator 616 by the output of the calculator 615, 619 is a calculator that divides the output of the calculator 617 by the output of the calculator 615, and 620 is the output of the calculator 618 that is the output of the calculator 619. 621 is the operation unit of the operation unit 620. Memory for storing the force, 622 calculator for converting the spectrum signals stored in the memory 621 in the time axis signal, 623
Is an output terminal for outputting the output signal of the arithmetic unit 622. FIG. 7 is an explanatory diagram for explaining the operation concept of the third embodiment.

The operation of the thus configured impulse response measuring apparatus according to the third embodiment of the present invention will be described below. First, a digital signal read from a digital source or the like is input to the input terminal 61, and is stored in the memory.
Stored in 62. Here, for example, the digital signal input to the input terminal 61 is a digital signal output from the digital output terminal 24 of the CD player 22 as in the first embodiment. The signal generator 63 generates a signal (sampling clock) serving as an operation reference of the A / D converter 67 in synchronization with the digital signal input from the input terminal 61.
The sampling clock is supplied to the A / D converter 67.

A signal obtained by converting a digital signal input from the input terminal 61 into an analog signal, for example, an analog signal output from the analog output terminal 23 of the CD player 22 is input to the input terminal 64. This analog signal is selected by the signal switch 66 and input to the A / D converter 67. The analog signal input from the input terminal 64 is converted into a digital signal in synchronization with the clock output from the signal generator 63. The signal switch 68 is switched in synchronization with the signal switch 66, and the output of the A / D converter 67 is stored in the memory 69. Similarly, a response output of the device under test to an analog signal input from the input terminal 64, for example, an output signal of the device under test 25 is input to the input terminal 65. Then, the analog signal is converted into a digital signal by using the output clock of the signal generator 63 by the A / D converter 67 and selected by the signal switch 66, and is selectively switched by the signal switch 68 and stored in the memory 610. .

In principle, there is no time lag between the digital signals stored in the memory 62, the memory 69 and the memory 610, but only the time lag caused by the operating speed of the existing electronic element. I do. Based on the signal stored in the memory 62,
In 1, the time lag between the signals stored in the memory 69 and the memory 62 is detected, the time lag is corrected for the signal stored in the memory 69, and the output is stored in the memory 612. Similarly, the arithmetic unit 613 detects the time lag between the signals stored in the memory 610 and the memory 62 based on the time lag based on the signal stored in the memory 62 and stores the time lag in the memory 610. The signal is corrected for its time lag and its output is stored in memory 613. The operation of the computing units 611 and 613 is the same as that of the computing unit 7 in the first embodiment.

Next, the spectrums of the signals stored in the memories 62, 612, 614 are calculated by the computing units 615, 616, 61, respectively.
Calculated by 7. The operation units 615, 616, and 617 perform the same operation as the operation unit 10 in the first embodiment. And
The computing unit 618 divides the output of the computing unit 616 by the output of the computing unit 615. The computing unit 619 outputs the output of the computing unit 617 to the computing unit.
Divide by 615 output. The operation units 618 and 619 operate in the same manner as the operation unit 11 of the first embodiment. Next, the computing unit 620 divides the output of the computing unit 619 by the output of the computing unit 618. The result is stored in the memory 621. Then, the calculator 622 converts the spectrum signal stored in the memory 621 into a time axis signal. The operation unit 622 performs the same operation as the operation unit 13 in the first embodiment. Then, the output of the arithmetic unit 622 is output from the output terminal 623.

Next, the principle of operation of the arithmetic units 618, 619 and 622 will be described with reference to FIG. For example, the transfer function 71 of the analog signal output portion of the CD player 22 is H ₁ (W), the transfer function 72 of the A / D converter 67 is H ₂ (w), and the transfer function of the DUT 25 is
If 73 is H ₃ (w), the transfer function of the signal input from the input terminal 64 to the signal input from the input terminal 61 is G
_{If the} transfer function of the signal input from the input terminal 65 with respect to the signal input from the input terminal 61 is G ₂ (w), and the transfer function is selectively switched by the signal switches 74 and 75, Each relationship can be expressed by (Equation 15) and (Equation 16).

[0062]

(Equation 15)

[0063]

(Equation 16)

However, the transfer function to be measured is H
_Since it is ₃ (w), H ₃ (w) can be calculated by using (Equation 17).

[0065]

[Equation 17]

By converting this H ₃ (w) into a time axis signal, the impulse response of the device under test can be calculated. Therefore, in the third embodiment of the present invention, the digital signal read from a digital source or the like and the read digital signal are converted into an analog signal based on the generated reference signal, and the response of the device under test to this signal is converted. The output analog signal is converted into a digital signal based on the above-mentioned reference signal, and after removing the time lag between the two, the spectra of both signals are calculated. Convert to axis signal. Through the above processing, the impulse response of the device under test can be measured.

That is, in the third embodiment of the present invention, a digital signal read from a digital source or the like, a signal obtained by converting the read digital signal into an analog signal, and a response output of the device under test to the analog signal are shown. The analog signal is converted into a digital signal in synchronization with the digital signal recorded in the source, and after removing the time lag between the three, the spectrum of the three signals is calculated. Then, in the frequency domain, the ratio between the digital signal read from a digital source or the like and the signal obtained by converting the signal into an analog signal, and the ratio of the digital signal read from a digital source or the like and the signal obtained by converting the signal to an analog signal are obtained. The ratio to the response output of the measured object is calculated, the ratio between the two is calculated, and the ratio is converted back to the time axis signal. Through the above processing, the impulse response of the device under test can be measured without being affected by the characteristics of the measurement system.

[0068]

As described above, according to the present invention, a response signal of a device under test to a signal obtained by converting a digital signal read from a digital source or the like into an analog signal and a digital signal read from the digital source or the like are output. Input synchronously and convert to digital signal. The time lag between the converted input signal and the digital signal is corrected based on the digital signal, the ratio between the corrected signal and the digital signal is calculated in the frequency domain, and the ratio is converted back to a time axis signal, thereby obtaining an impulse of the DUT. Calculate the response.

Therefore, in the present invention, since it is not necessary to use an impulse for the measurement signal, the average power in the time axis direction of the signal is large, and the signal has a wide frequency range, for example, a white noise. The effect that it becomes possible to measure the impulse response from the time when the vibration amplitude of the diaphragm of the speaker is a small amplitude to the time when the vibration amplitude of the diaphragm of the speaker is large for an object to be measured such as a speaker. Also,
Since it is not necessary to use an impulse for the measurement signal and a signal recorded in a digital source is used, high-precision measurement can be performed by using an A / D converter having characteristics equivalent to the sampling frequency and quantization number of the digital source. A possible effect is obtained. Furthermore, it is possible to remove the influence on the reproducibility of the measurement data by removing the irregularity of the sampling start points generated at the time of A / D conversion with reference to the digital signal recorded in the digital source. Is obtained. In addition, the transfer function of the analog signal input to the device under test, that is, the digital signal read from a digital source or the like, converted to an analog signal for the digital signal read from the digital source or the like and the read function from the digital source of the device under test or the like are read. By calculating the transfer function for the obtained digital signal and calculating the ratio of the two, the part that converts the digital signal read from a digital source or the like into an analog signal and the part that converts the input analog signal into a digital signal can be used. The effect of removing the influence on the measurement signal and measuring the impulse response of the device under test is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram of an impulse response measuring device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram illustrating a digital signal and an analog signal input to the impulse response measuring device according to the first embodiment of the present invention.

FIG. 3 is an explanatory diagram for explaining a time lag in the impulse response measuring device according to the first embodiment of the present invention.

FIG. 4 is an explanatory diagram illustrating an operation of a calculator in the impulse response measurement device according to the first embodiment of the present invention.

FIG. 5 is a block diagram of an impulse response measuring device according to a second embodiment of the present invention.

FIG. 6 is a block diagram of an impulse response measuring device according to a third embodiment of the present invention.

FIG. 7 is an explanatory diagram illustrating an operation of a third example of the present invention.

FIG. 8 shows a conventional impulse response measuring device.

FIG. 9 is an explanatory diagram of an operation of a signal generator in the conventional impulse response measuring device.

FIG. 10 shows A / A in the conventional impulse response measurement device.
It is operation | movement explanatory drawing of a D converter.

FIG. 11 is a diagram illustrating the operation of a computing unit in the conventional impulse response measurement device.

FIG. 12 is an operation flowchart of an arithmetic unit in the conventional impulse response measurement device.

[Explanation of symbols]

 1 input terminal 2 memory 3 input terminal 4 A / D converter 5 signal generator 6 memory 7 computing unit 8 memory 9 computing unit 10 computing unit 11 computing unit 12 memory 13 computing unit 14 output terminal

Claims (3)

(57) [Claims] 1. A first input terminal for inputting a digital signal read from a digital source or the like, first storage means for storing a digital signal input to the first input terminal, and the first input terminal First signal generating means for generating a reference signal synchronized with a digital signal input to a terminal, and a second input terminal for inputting a response output signal of the device under test with respect to the analog signal obtained by converting the digital signal into an analog signal And a reference signal output from the first signal generation means for converting an analog signal input to the second input terminal.
First converting means for converting a signal stored in the second converting means into a digital signal based on the signal, a second storing means for storing an output of the first converting means, A first means for detecting a time lag between signals stored in the storage means with reference to the signal stored in the first storage means and correcting the signal stored in the second storage means; Calculating means, third storing means for storing the output of the first calculating means, second calculating means for calculating the spectrum of the signal stored in the first storing means, A third calculating means for calculating a spectrum of the signal stored in the storage means, a fourth calculating means for dividing an output of the third calculating means by an output of the second calculating means, The fourth storing the output of the arithmetic means
And a fifth calculating means for converting a signal stored in the fourth storing means into a time axis signal, and outputting an output of the fifth calculating means. Response measuring device. 2. It is recorded on a digital source or the like.
A third input terminal for inputting a digital signal;
Of the digital signal input to the input terminal
Storage means, and second signal generation means for generating a reference signal
And the second signal generating means outputs the digital signal.
A second method of converting an analog signal based on the input reference signal
Converting means for outputting an output signal of the second converting means;
An output terminal and an analog signal output from the output terminal
Fourth input for inputting a response output signal of the device under test to
Terminal and an analog signal input to the fourth input terminal
Based on the reference signal output by the second signal generation means.
A third converting means for converting into a digital signal;
A sixth storage unit for storing the output of the conversion unit,
The signal stored in the storage means and the fifth storage means.
The fifth memory of the time difference between the signals that have been stored in the stage
Means based on the signal stored in the
6th correction for the signal stored in the storage means
Calculating means for storing the output of the sixth calculating means.
7 and the fifth storage means.
A seventh calculating means for calculating a spectrum of the signal;
7 calculates the spectrum of the signal stored in the storage means
And an output of the eighth calculating means.
Ninth operation means for dividing by an output of the seventh operation means,
Eighth storage means for storing the output of the ninth operation means
And a signal stored in the eighth storage means on a time axis.
And a tenth operation means for converting the signal into a signal.
An impulse response measuring device, which outputs the output of the calculating means . 3. Data read from a digital source or the like.
A fifth input terminal for inputting a digital signal;
A ninth memory for storing a digital signal input to the input terminal
Storage means, and a digital signal input to the fifth input terminal
Signal generating means for generating a reference signal synchronized with the base signal
A digital signal converting the digital signal into an analog signal.
A sixth input terminal for inputting a analog signal;
To the analog signal converted from the analog signal to the analog signal.
A seventh input terminal for inputting a response output signal of the device under test;
Input to the sixth input terminal and the seventh input terminal.
Signal switching for selectively switching the analog signal to be output
Output means and the output of the first signal switching means.
3 based on the reference signal output by the signal generating means.
A fourth converting means for converting the signal into a signal,
The output of the stage is switched off in synchronization with the first signal switching means.
A second signal switching means for switching and outputting the first signal;
Signal switching means is provided for the analog signal input to the sixth input terminal.
The second signal switching means when a log signal is selected
The tenth storing the output of the fourth converter output by the
Storage means, and the first signal switching means comprises the seventh signal switching means.
When the analog signal input to the
The fourth conversion output by the second signal switching means
An eleventh storage means for storing an output of the means,
Signal stored in the storage means and the ninth storage means
The time lag between the signals stored in the ninth storage means.
Detecting the signal based on the signal stored in the
The first method for correcting the signal stored in the storage means
The first arithmetic means and the output of the eleventh arithmetic means are stored.
Storage of the first 12 and storage means, the eleventh memorize means that
And the signal stored in the ninth storage means.
The time lag between signals is stored in the ninth storage means.
The signal is detected on the basis of the signal and stored in the eleventh storage means.
Twelfth computing means for correcting the signal
Thirteenth storage means for storing the output of the twelfth arithmetic means
And the spectrum of the signal stored in the ninth storage means.
A thirteenth calculating means for calculating the torque, and the twelfth memory
Calculating the spectrum of the signal stored in the means;
And the storage means stored in the thirteenth storage means.
A fifteenth calculating means for calculating the spectrum of the signal
The output of the fourteenth arithmetic means is output from the thirteenth arithmetic means.
Sixteenth computing means for dividing by force, and the sixteenth computing means
A fourteenth storage means for storing the output of the stage;
The output of the calculating means is divided by the output of the thirteenth calculating means.
A seventeenth computing means, and an output of the seventeenth computing means.
A fifteenth storage means for storing, and the fifteenth storage means
The stored signal is stored in the fourteenth storage means.
An eighteenth operation means for dividing by the signal
A sixteenth storage unit for storing the output of the arithmetic unit;
The signal stored in the sixteenth storage means is converted to a time axis signal.
A nineteenth operation means for converting, the nineteenth operation
An impulse response measuring device for outputting an output of the means .