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JP3295862B2 - Radio wave countermeasure pattern of multilayer printed circuit board - Google Patents

Radio wave countermeasure pattern of multilayer printed circuit board

Info

Publication number
JP3295862B2
JP3295862B2 JP18566993A JP18566993A JP3295862B2 JP 3295862 B2 JP3295862 B2 JP 3295862B2 JP 18566993 A JP18566993 A JP 18566993A JP 18566993 A JP18566993 A JP 18566993A JP 3295862 B2 JP3295862 B2 JP 3295862B2
Authority
JP
Japan
Prior art keywords
layer
pattern
multilayer printed
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP18566993A
Other languages
Japanese (ja)
Other versions
JPH0745962A (en
Inventor
桂祐 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18566993A priority Critical patent/JP3295862B2/en
Publication of JPH0745962A publication Critical patent/JPH0745962A/en
Application granted granted Critical
Publication of JP3295862B2 publication Critical patent/JP3295862B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、多層プリント板の電波
対策パターンに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio wave countermeasure pattern for a multilayer printed board.

【0002】[0002]

【従来の技術】図4は従来の多層プリント板1の構造概
要説明図で、図4(A)は全体図、図4(B)は要部
(スルーホール形成部分)の断面図である。多層プリン
ト板1は、第1層(表面層)L1と第2層(内層)L2
と第3層(内層)L3と第4層(表面層)L4とを積層
して成り、各層のパターンはスルーホール2を介し接続
している。図4(B)の左側はL1〜L4の全層を接続
した例を示し、同右側は第1層L1と第3層L3を接続
した例を示している。
2. Description of the Related Art FIG. 4 is a schematic diagram for explaining the structure of a conventional multilayer printed board 1. FIG. 4 (A) is an overall view, and FIG. 4 (B) is a cross-sectional view of a main part (portion where a through hole is formed). The multilayer printed board 1 has a first layer (surface layer) L1 and a second layer (inner layer) L2.
And a third layer (inner layer) L3 and a fourth layer (surface layer) L4. The pattern of each layer is connected via a through hole 2. 4B shows an example in which all layers L1 to L4 are connected, and the right side shows an example in which the first layer L1 and the third layer L3 are connected.

【0003】一般的な各層のパターンの例は次の通りで
ある。 第4層L4:信号線のパターン(主に横方向のパター
ン) 第3層L3:5V電源の層 第2層L2:SG(グランド)の層 第1層L1:信号線のパターン(主に縦方向のパター
ン) 図5に各層パターンの具体例を示す。
Examples of general patterns of each layer are as follows. Fourth layer L4: Signal line pattern (mainly horizontal pattern) Third layer L3: 5V power supply layer Second layer L2: SG (ground) layer First layer L1: Signal line pattern (mainly vertical) FIG. 5 shows a specific example of each layer pattern.

【0004】図5(A)は第1層L1のパターンの例を
示し、図5(B)は第2層L2の例(SGべたパター
ン)を示し、図5(C)は第3層L3の例(5Vべたパ
ターン)を示し、図5(D)は第4層L4のパターンの
例を示す。図中白丸のスルーホールはその層と接続して
いないことを表し、黒丸のスルーホールはその層と接続
していることを表している。第4層L4には、IC3と
LSI4とが搭載されている。図6にLSI4の回路図
を示す。図中、5はバイパスコンデンサで、第4層L4
上に搭載されている。
FIG. 5A shows an example of a pattern of the first layer L1, FIG. 5B shows an example of the second layer L2 (SG solid pattern), and FIG. 5C shows a pattern of the third layer L3. (5V solid pattern), and FIG. 5D shows an example of a pattern of the fourth layer L4. In the figure, a white circled through hole indicates that the layer is not connected, and a black circled through hole indicates that the layer is connected. An IC 3 and an LSI 4 are mounted on the fourth layer L4. FIG. 6 shows a circuit diagram of the LSI 4. In the figure, reference numeral 5 denotes a bypass capacitor, and the fourth layer L4
Mounted on top.

【0005】[0005]

【発明が解決しようとする課題】この種の多層プリント
板を使用するデジタル機器等の各種電波規格をクリアす
るに当たり、従来は以下のような問題点があった。すな
わち、プリント板から発生した高周波ノイズが接続され
たケーブル等に伝わり、あるいはプリント板に近接する
ケーブル等に容量性結合を起こして伝わり、最終的には
ケーブル類がアンテナになってノイズを放射する。
In meeting various radio standards for digital equipment and the like using this kind of multilayer printed board, there have been the following problems conventionally. That is, high-frequency noise generated from the printed board is transmitted to the connected cable or the like, or is transmitted by causing capacitive coupling to the cable or the like close to the printed board, and finally the cables become antennas and emit noise. .

【0006】これを防止するため、ケーブルにフェライ
トコアを追加したり、ケーブルをシールドしたりする対
策が行われたが、いずれもコスト高や製造性の問題点を
含んでいる。また、プリント板自体のノイズ低減対策と
して、ノイズ源の信号線にフィルタ部品を追加したり、
プリント板のグランド(SG)と装置グランド(FG)
をショートするかあるいはコンデンサによる高周波接続
の対策をとっていたが、いずれも根本的な解決策ではな
かった。
In order to prevent this, measures have been taken to add a ferrite core to the cable or shield the cable, but all of these have problems of high cost and manufacturability. Also, as a measure to reduce the noise of the printed circuit board itself, add filter components to the signal line of the noise source,
Printed board ground (SG) and equipment ground (FG)
Or short-circuiting the capacitor or taking measures to prevent high-frequency connection using a capacitor, but neither was a fundamental solution.

【0007】本発明は、高周波ノイズを発生する搭載部
品から周囲にノイズをまき散らすのを防ぐことのできる
多層プリント板の電波対策パターンを提供することを目
的としている。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a radio wave countermeasure pattern for a multilayer printed circuit board which can prevent noise from being scattered from a mounted component generating high frequency noise to the surroundings.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するた
め、本発明では、電源層,グランド層を内層とし、高周
波ノイズを発生する部品を表面に搭載した多層プリント
板において、前記電源層及びクランド層の前記部品接続
部分を、周囲にノイズをまき散らさないようにそれぞれ
同一層中で独立,分離するとともに、分離したグランド
層同士及び分離した電源層同士をそれぞれフィルタを介
して接続したことを特徴とする構成とする。
In order to achieve the above object, the present invention provides a multilayer printed circuit board having a power supply layer and a ground layer as inner layers, and a component for generating high frequency noise mounted on a surface thereof. Each of the component connection parts of the layer should be separated so that noise is not
Independent and separate in the same layer and separate ground
Layers and separated power layers are separated by filters.
And a connection .

【0009】[0009]

【作用】ノイズを発生する搭載部品を他と分離すること
により、プリント板自体から発生する高周波ノイズを根
本的に低減し、その結果装置全体から放射される高周波
ノイズを低減できるため、従来必要としていたフェライ
トコアやケーブルシールド等のコスト高な対策をとらず
に済む。
By separating mounted components that generate noise from others, high-frequency noise generated from the printed board itself can be fundamentally reduced, and as a result high-frequency noise radiated from the entire apparatus can be reduced. This eliminates the need for expensive ferrite cores and cable shields.

【0010】[0010]

【実施例】以下、図1乃至図3に関連して本発明の実施
例を説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

【0011】本例の多層プリント板11は、図2に示す
ように、表面層101,104と内層のグランド層10
2,電源層103とを積層して成る。各層のパターンは
図1の平面図に示す通りで、図1(A)は表面層101
のパターンを、図1(B)はグランド層102のパター
ン(SGべたパターン)を、図1(C)は電源層103
のパターン(5Vべたパターン)を、図1(D)は表面
層104のパターンを、それぞれ例示している。表面層
104には従来と同様のIC3,LSI4,バイパスコ
ンデンサ5と、5V用フィルタ12と、SG用フィルタ
13と、が搭載されている。
As shown in FIG. 2, the multilayer printed board 11 of this embodiment has surface layers 101 and 104 and an inner ground layer 10.
2, and a power supply layer 103. The pattern of each layer is as shown in the plan view of FIG. 1, and FIG.
1B shows the pattern of the ground layer 102 (solid pattern of SG), and FIG.
1 (D), and FIG. 1 (D) illustrates the pattern of the surface layer 104, respectively. On the surface layer 104, the same IC3, LSI4, bypass capacitor 5, 5V filter 12, and SG filter 13 as those of the related art are mounted.

【0012】これらの各層のパターンは従来と同様にス
ルーホールを介し接続しているが、白丸のスルーホール
はその層と接続していないことを表し、黒丸のスルーホ
ールはその層と接続していることを表わしている。
The pattern of each of these layers is connected via a through hole as in the prior art, however, a white circle through hole indicates that it is not connected to that layer, and a black circle through hole indicates that it is connected to that layer. It means that there is.

【0013】このような構成の多層プリント板11の電
波対策として、本発明では、高周波ノイズを発生する部
品のみを他と分離するために、内層のべたパターンに電
源(5V)及びグランド(SG)の島を作り、その層に
おいて独立させる。他の5VまたはSGとの間には必要
に応じてフィルタ部品を挿入する。このことを更に具体
的に説明すると次の通りである。
As a countermeasure against radio waves of the multilayer printed board 11 having such a configuration, according to the present invention, in order to isolate only components that generate high-frequency noise from others, a solid pattern of an inner layer includes a power supply (5 V) and a ground (SG). Islands and make them independent in that layer. A filter component is inserted between the other 5 V or SG as needed. This will be described more specifically below.

【0014】表面層において、ノイズ発生部品であるL
SI4の内側にスルーホールを設けて5V及びSGをそ
れぞれの内層に接続する。内層の該接続部分は島状にな
って他から独立分離している。グランド層102では、
図1(B)に示すように、パターン削除部分14を設け
ることによって島15が形成され、電源層103では、
図1(C)に示すように、パターン削除部分16を設け
ることによって島17が形成されている。
In the surface layer, the noise generating component L
A through hole is provided inside SI4, and 5V and SG are connected to respective inner layers. The connection portion of the inner layer is island-shaped and is independently separated from the others. In the ground layer 102,
As shown in FIG. 1B, the island 15 is formed by providing the pattern deleted portion 14, and the island 15 is formed in the power supply layer 103.
As shown in FIG. 1C, the island 17 is formed by providing the pattern deleted portion 16.

【0015】5V用フィルタ12とSG用フィルタ13
は、図1及び図3のLSIの回路図に示すように、内層
の島15,17と他の5V,SGパターンの間に挿入さ
れる。
5V filter 12 and SG filter 13
Are inserted between the inner layer islands 15, 17 and the other 5V, SG patterns, as shown in the LSI circuit diagrams of FIGS.

【0016】[0016]

【発明の効果】以上述べたように、本発明によれば、内
層パターンの内のノイズ発生部品接続部分を他と独立分
離させているため、該ノイズ発生部品が周囲にノイズを
まき散らすのを防ぐことができる。
As described above, according to the present invention, since the connection portion of the noise generating component in the inner layer pattern is separated independently from the others, the noise generating component is prevented from scattering the noise around. be able to.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例の多層プリント板の各層のパタ
ーン説明図で、図1(A)は表面層101のパターン
を、図1(B)はグランド層102のパターンを、図1
(C)は電源層103のパターンを、図1(D)は表面
層104のパターンを、それぞれ示している。
1A and 1B are explanatory diagrams of a pattern of each layer of a multilayer printed board according to an embodiment of the present invention. FIG. 1A shows a pattern of a surface layer 101, FIG.
1C shows a pattern of the power supply layer 103, and FIG. 1D shows a pattern of the surface layer 104.

【図2】本発明の実施例の多層プリント板の断面図であ
る。
FIG. 2 is a sectional view of a multilayer printed board according to an embodiment of the present invention.

【図3】本発明の実施例の多層プリント板のLSIの回
路図である。
FIG. 3 is a circuit diagram of an LSI of a multilayer printed board according to an embodiment of the present invention.

【図4】従来の多層プリント板の構造概要説明図であ
る。
FIG. 4 is a schematic diagram illustrating the structure of a conventional multilayer printed board.

【図5】従来の多層プリント板の各層のパターン説明図
で、図5(A)は第1層L1のパターンを、図5(B)
は第2層L2のパターンを、図5(C)は第3層L3の
パターンを、図5(D)は第4層L4のパターンを、そ
れぞれ示している。
5A and 5B are explanatory diagrams of a pattern of each layer of a conventional multilayer printed board. FIG. 5A shows a pattern of a first layer L1, and FIG.
5 shows a pattern of the second layer L2, FIG. 5C shows a pattern of the third layer L3, and FIG. 5D shows a pattern of the fourth layer L4.

【図6】従来の多層プリント板のLSIの回路図であ
る。
FIG. 6 is a circuit diagram of a conventional LSI of a multilayer printed board.

【符号の説明】[Explanation of symbols]

4 高周波ノイズを発生する部品(LSI) 11 多層プリント板 12 5V用フィルタ 13 SG用フィルタ 15,17 島 101,104 表面層 102 グランド層 103 電源層 4 Components for Generating High Frequency Noise (LSI) 11 Multilayer Printed Board 12 5V Filter 13 SG Filter 15, 17 Island 101, 104 Surface Layer 102 Ground Layer 103 Power Supply Layer

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H05K 3/46 H05K 1/02 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 3/46 H05K 1/02

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 電源層,グランド層を内層とし、高周波
ノイズを発生する部品を表面に搭載した多層プリント板
において、 前記電源層及びクランド層の前記部品接続部分を、周囲
にノイズをまき散らさないようにそれぞれ同一層中で
立,分離するとともに、分離したグランド層同士及び分
離した電源層同士をそれぞれフィルタを介して接続した
ことを特徴とする多層プリント板の電波対策パターン。
1. A multilayer printed circuit board having a power supply layer and a ground layer as inner layers, and a component generating high-frequency noise mounted on a surface thereof, wherein the component connection portions of the power supply layer and the ground layer do not disperse noise around. In the same layer , separate and separate , and separate and separate ground layers.
A radio wave countermeasure pattern for a multilayer printed circuit board, wherein separated power layers are connected to each other via a filter .
JP18566993A 1993-07-28 1993-07-28 Radio wave countermeasure pattern of multilayer printed circuit board Expired - Fee Related JP3295862B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18566993A JP3295862B2 (en) 1993-07-28 1993-07-28 Radio wave countermeasure pattern of multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18566993A JP3295862B2 (en) 1993-07-28 1993-07-28 Radio wave countermeasure pattern of multilayer printed circuit board

Publications (2)

Publication Number Publication Date
JPH0745962A JPH0745962A (en) 1995-02-14
JP3295862B2 true JP3295862B2 (en) 2002-06-24

Family

ID=16174806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18566993A Expired - Fee Related JP3295862B2 (en) 1993-07-28 1993-07-28 Radio wave countermeasure pattern of multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JP3295862B2 (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09283875A (en) * 1996-04-19 1997-10-31 Nec Corp Printed wiring substrate for mcm
DE19639369A1 (en) * 1996-09-25 1998-03-26 Philips Patentverwaltung Circuit board
JP3925032B2 (en) 2000-03-14 2007-06-06 富士ゼロックス株式会社 Printed wiring board
JP4079699B2 (en) * 2001-09-28 2008-04-23 富士通株式会社 Multilayer wiring circuit board
JP2003219291A (en) * 2002-01-22 2003-07-31 Alps Electric Co Ltd Integrated circuit for tuner and television tuner employing the same
JP3646098B2 (en) * 2002-03-27 2005-05-11 コニカミノルタビジネステクノロジーズ株式会社 Circuit board
JP4671333B2 (en) * 2005-03-18 2011-04-13 株式会社リコー Multilayer printed circuit board and electronic equipment
JP5084153B2 (en) * 2005-08-15 2012-11-28 キヤノン株式会社 Printed board
US8063480B2 (en) 2006-02-28 2011-11-22 Canon Kabushiki Kaisha Printed board and semiconductor integrated circuit
JP5932611B2 (en) * 2012-11-15 2016-06-08 本田技研工業株式会社 Control device including a circuit board having a plurality of ground patterns
JP6687372B2 (en) * 2015-11-26 2020-04-22 株式会社藤商事 Amusement machine
CN108738227A (en) * 2018-06-08 2018-11-02 山东超越数控电子股份有限公司 A kind of method of signal isolation in PCB design
WO2020039625A1 (en) 2018-08-20 2020-02-27 株式会社村田製作所 Power conversion circuit module

Also Published As

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