JP3305906B2 - Display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device such as a liquid crystal display in which display pixels are arranged in a matrix.

[0002]

2. Description of the Related Art In recent years, the resolution of liquid crystal displays has been increased (the number of pixels has been increased), and the driving frequency has been increasingly increased. Under such circumstances, a multi-field driving method (MF driving method) for lowering power consumption by lowering the driving frequency.
Has been proposed.

FIG. 8 is a conceptual diagram of the MF driving method, and the driving method at the time of displaying the m-th frame will be described. In the first Tf / 3 period, as shown in FIG.
The gate lines of 3, N + 6,... Are driven, and signal line inversion driving is performed such that an odd-numbered signal line has a positive polarity and an even-numbered signal line has a negative polarity. In the next Tf / 3 period, as shown in FIG.
..., N + 1, N + 4, N + 7, ... line, next Tf / 3
During the period, as shown in FIG.
2, N + 5, N + 8,... Lines are driven. Next Tf /
In the third period, the line to be driven returns to the original state, and FIG.
, N, N + 3, N + 6,... Lines are driven as shown in FIG. After that, (b) (c)
Are simply reversed, so that the description is omitted.

[0004] When the above-described driving is performed, the state of the flicker component is analyzed. First, as causes of flicker, (1) shortage of ON current, (2) penetration voltage of TFT, (3) OFF current of TFT can be considered. (1) can be dealt with by the array structure, but (2) (3) Considering that the gate drive waveform is different between the left and right screens and that the MF drive makes the holding time of the TFT longer than the normal drive in principle,
It is considered that these characteristics mainly affect the flicker characteristics. Therefore, the analysis is performed focusing on the factors (2) and (3).

[0005] A potential fluctuation waveform of a pixel is approximated as shown in FIG. In other words, when driving is performed with a positive polarity, a change in Vp is caused by good holding, and when driving with a negative polarity, the holding is bad, so that a potential change occurs by Vn (> Vp) during one field. I do. At this time, the potential i (t)
When 0 ≦ t <π, i (t) = Vs + Vn− (2Vnt / π) −ΔVcom (1) When −π ≦ t <0, i (t) = Vs + Vn− (2Vpt / π) + ΔVcom (1) '.

The actual change in transmittance requires multiplying the response characteristic of the liquid crystal by the above variation on the frequency axis. However, since the response characteristic is a complicated characteristic dependent on the potential level, only the potential variation of the pixel is used here. Is analyzed as a change in luminance.

When this is Fourier-expanded, i (t) = Vs + (1 / π) ｋ (2 / k ² π) ｛1-(-1) ^k ｝ × (Vn-Vp) cos kt + (1 / k) ｛1 + (-1) ^k ｝ × (Vn + Vp) sin kt + (2 / k) ｛1 + (-1) ^k ｝ × ΔVcom sin kt (2) (where k = 1 → ∞) Here, a fundamental wave component important as flicker (30 Hz)
Considering only k = 1, F30 = (4 / π) {(1 / π ² ) (Vn−Vp) ² + ΔVcom ² ｝ ^1/2 (3) That is, each pixel is a flicker component as shown in FIG. It has a spectrum of F30 as shown in b). As a method of removing this flicker component, (a) the luminance change i (t) itself is set to a high frequency.

(B) Compensation is performed using adjacent pixels. Usually, the method (a) is not often used because the image signal speeds up. The line inversion (common inversion) and the signal line inversion are performed by two pixels in the method (b). This case will be described in detail.

First, since signals of opposite polarities are inputted to adjacent pixels in any system, the average luminance ia (t) of two pixels is obtained.
Is represented by the following equation. ia (t) = i (t) + i (t−π / ωo) (4) (however, ωo = π / Tf) This is Fourier-transformed and Ia (ω) = Ia (ω) ｛1-exp (Jωπ / ωo)｝ (5) Therefore, Ia (ωo) = 0, and the flicker component can be completely removed.

The above is a case where the number of compensation pixels is two.
In the MF drive proposed here, the compensation pixels are expanded to N pixels.
(T) and the Fourier transform Ia (ω) are as follows: Ia (t) = {i ｛t + (n / N) π / ωo｝ (6) Ia (ω) = ΣI (ω) exp ｛j (n / N) ωπ / ωo｝ (7) (where Σ is n = 0 → N).

The case where the flicker component is compensated by three pixels will be described below as an example. FIG. 10 shows the transmittance change i (t) of each of the three pixels obtained from Equations (1) and (1) 'by a solid line, a dashed line, and a dotted line, and the overall transmittance change at this time is ia.
(T). The frequency spectrum is shown in FIG.
Shown in As is apparent from FIG. 10, if the transmittance changes i (t) of the pixels compensated for each other are the same, 2
The flicker component having been Tf (Tf: field period = 1/60 second) is changed to 2Tf / 3, that is, 1
Since the period can be set to 1/90 seconds, which is a / 3 cycle, it is not visually recognized as flicker.

This can be expressed by the following equation in terms of the frequency spectrum.
As is clear from (6), since the phases of the spectra of the respective pixels are shifted by 120 degrees, vector-wise addition is performed, which means that the components disappear. When this principle is used, compensation can be similarly performed with 3, 5, 7,..., 2N + 1,... Pixels, that is, odd-numbered pixels. it can.

As described above, the MF driving method is a very effective method for surface flicker, but generates surface flicker on a three-dimensional spectrum including the vertical and horizontal frequencies of the screen and the frequency in the time axis direction. As the number of carriers to be eliminated disappears, carriers that cause line flicker are separately generated, which causes line-shaped interference and deteriorates image quality.
Due to the newly generated carrier, horizontal stripes generated for each field are visually recognized, and the image quality of a still image is deteriorated.

[0014]

As described above, in the conventional liquid crystal display device, the feed-through characteristic generated when the switching element attached to each pixel is turned off differs depending on the screen position (left / right position). If a driving method that makes surface flicker invisible by converting into flicker is used, there is a problem in that the line flicker becomes a line-shaped disturbance and deteriorates image quality.

In the MF driving method capable of reducing the power consumption, the holding time of a still image is further increased, and this line flicker occurs in a low-frequency portion, so that line disturbance is more easily recognized.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a display device capable of reproducing an image with low power consumption and low line flicker.

[0017]

In order to solve the above problems, the present invention employs the following configuration. That is, the present invention provides a display device in which pixels are arranged in a matrix such as a liquid crystal display, a plurality of address lines extending in a horizontal direction, a plurality of signal lines extending in a vertical direction, and the address lines and the signal lines. A pixel electrode provided at a position corresponding to each of the intersections, interlaced scanning means for scanning the address line by dividing the address line into N sub-address groups, and rising and falling edges of a pulse for driving the address line. Means for dulling at least one of them.

Here, the following are conceivable as desirable embodiments of the present invention. (1) The display material is a liquid crystal display device made of liquid crystal. (2) An active matrix type in which a switching element is provided between a signal line and a pixel electrode. (3) Provide a filter that limits the band of the signal for scanning the address line. (4) The pulse width of the drive signal delayed by the filter is longer than the interval for scanning one scan line before being divided into N sub-address groups. (5) Changing the characteristics of the filter according to the number N of the sub-address groups or the scanning interval. (6) To change the characteristics of the filter so as to have a low-pass filter characteristic in which the cutoff frequency decreases as the number N of the sub-address groups increases and the scanning interval increases.

[0019]

When a rectangular wave is input as an address signal, a large difference occurs between the address signal at the input terminal (right side) and the terminal terminal (left side) of the display panel due to the resistance of the address line and the capacitance connected thereto. By slowing down at least one of the rise and fall of the pulse for driving the address line, the difference between the address signals on the left and right sides of the screen can be reduced. Therefore, variations in feedthrough on the left and right of the screen can be reduced without increasing power consumption, so that the common level on the left and right of the screen becomes equal, and deterioration due to application of a DC component to a display material layer (for example, liquid crystal) is reduced. In addition to preventing the occurrence of flicker, line flicker can be reduced.

In a driving method in which power consumption can be reduced by lengthening the holding time (lowering the driving frequency), the driving time can be increased together with the holding time. By letting
Since the lower line flicker can be more easily visually recognized, a stronger correction can be made, so that deterioration of the image quality can be suppressed even if the holding time is lengthened.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing the embodiments, the basic principle of the present invention will be described. Here, the liquid crystal is described as an example of the display material layer, but the case where another material is used can be similarly considered.

The cause of the occurrence of ΔVcom described in the conventional example will be clarified. The main causes are as follows:
One can think. (1) Difference in feedthrough between left and right of the screen due to gate line time constant (2) Difference in feedthrough due to voltage level due to non-linearity of liquid crystal capacitance (3) Difference in pixel potential fluctuation above and below the screen due to difference in leak current Among them, (1) is a major factor, and will be described in further detail. The factor of (1) is that the LPF depends on the resistance of the gate line (address line) and the capacitance attached to it.
Is formed, and when a gate signal is input from the right side of the panel, a difference occurs in the gate signal between the input end (right side) and the terminal end (left side), and as a result, the feedthrough amount also differs. To solve this problem, a method of dulling the gate input itself by applying an LPF is effective. However, since the driving time is short in the past, the actual driving time is reduced by applying the LPF, and the ON characteristic is reduced. Is degraded.

Therefore, in the present invention, in order to solve this problem, one field image is divided into N subfields so that the driving time itself can be increased, the driving frequency is lowered, and the driving time is increased. It is characterized by applying LPF to dull the waveform.

Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. (Embodiment 1) FIG. 1 shows a basic configuration of an active matrix type liquid crystal display device according to a first embodiment of the present invention. (A) is a cross-sectional view of the element structure, and (b) is a circuit configuration diagram.

Pixel electrodes 11 are arranged in a matrix on a first substrate (array substrate) 10 made of glass or the like, and gate lines (address lines) 12 are arranged between the pixel electrodes 11 in the horizontal direction on the paper. The signal lines 13 are arranged in the directions. A switching element (TFT) driven by the gate line 12 is provided between the pixel electrode 11 and the signal line 13.
14 are provided.

A second substrate (opposite substrate) 20 made of glass or the like is opposed to the substrate 10 at a predetermined distance, and an opposing electrode 21 is formed on the opposing surface of the substrate 20 on the substrate 10 side. I have. A liquid crystal layer 30 is sealed between the substrates 10 and 20 as a display material layer. In the figure, reference numeral 15 denotes a gate line driver, and 16 denotes a signal line driver. The above basic configuration is the same as the conventionally known one.

FIGS. 2 and 3 are views for explaining the characteristic portions of the present embodiment. FIG. 2 is a diagram showing a state of subfield division, and FIG. 3 is a diagram showing a gate drive pulse. In the present embodiment, a case is shown in which the subfield is divided into 3: 1 and the driving pulse is duplied three times correspondingly.

More specifically, 3
One frame is composed of fields, and lines 1, 4, and 7 are scanned in the first field, lines 2, 5, and 8 are scanned in the second field, and lines 3, 6, and 9 are scanned in the third field. At this time, the gate drive pulse is about 3 times the time T required for scanning one line without subfield division.
The rise and fall of the waveform are blunted.

In the case of the normal driving, as shown in FIG.
PF cannot be applied. On the other hand, in the present embodiment, assuming that the pulse needs to rise up to 95% assuming that it changes exponentially with a simple RC LPF, as shown in FIG. Therefore, 3τ × 2 = 3T τ = T / 2 Normally, T = 30 μS in a VGA, so that an LPF having a time constant of τ = T / 2 = 15 μS can be applied.

FIG. 4 shows the results of actually measuring the common voltage difference between the left and right sides of the screen with respect to the time constant of the gate. As a result, the common voltage difference, which was 200 mV in the past, can be reduced to 40 mV and 1/5 or less.

As described above, according to the present embodiment, the gate drive time can be made longer than before, and the gate signal can be made more dull (the high frequency region can be cut). It is possible to reduce variations in feedthrough between the left and right sides. In addition, the longer the driving time (the longer the holding time), the greater the amount of high-frequency cut can be made. It is possible to do.

In designing the device, the design specifications for the feedthrough can be relaxed. Therefore, it is possible to design the storage capacity to be small and the aperture ratio to be high. Can be optimized. (Embodiment 2) FIGS. 5 and 6 are for explaining the characteristic portions of the present embodiment. FIG. 5 is a diagram showing a state of subfield division, and FIG. 6 is a diagram showing a gate drive pulse.

In this embodiment, a case is shown in which the subfield is divided into 5: 1 and the driving pulse is duplied by 5 times. In this case, the common voltage difference is about 30
mV, which is about 1/7 of the conventional value.

When driving is performed by dividing into several subfields as described above, the optimum LPF characteristic differs depending on the number of subfields. Therefore, as shown in FIG. 7A, it is preferable that the driving waveform (ON waveform) of the gate driver be changed according to the number of subfields. In other words, the input signal is driven by thinning it to N: 1, and the filter optimized according to N is switched and selected. In addition,
In the figure, 40 is a liquid crystal display panel, 41 is an N: 1 processing circuit,
Reference numeral 42 denotes an N: 1 switching circuit, and reference numeral 43 denotes an ON waveform control circuit.

FIG. 7 shows a method for changing the filter characteristics.
As shown in (b), it can be easily realized by a configuration in which the time constant of CR is changed by changing a switch (the value of C or R is changed).

The present invention is not limited to the above embodiments. In the embodiment, all of the longer scanning time is allocated to the time constant of the LPF, but not all of the time is allocated to the scanning time, and the remaining time is used for correction, pen input, and other processing periods. A method of maximally cutting high frequencies in a period may be used. Also, the display panel is not necessarily limited to the active matrix,
It can also be applied to simple matrices. Further, the present invention is not limited to the liquid crystal, but can be applied to other display devices such as an EL and a plasma display. In the embodiment, both the rise and fall of the drive pulse are blunted, but only one of them may be blunted. In addition, various modifications can be made without departing from the scope of the present invention.

[0037]

As described above in detail, according to the present invention, at least one of the rising edge and the falling edge of a pulse for driving an address line is blunted, thereby increasing the power consumption due to the variation in feedthrough between the left and right sides of the screen. Therefore, it is possible to reproduce an image with low power consumption and little line flicker.

Further, since the application of the direct current component due to the field-through variation can be reduced, the life of the liquid crystal can be improved and the burn-in can be reduced. Furthermore, since the ratio of the period during which the gate is ON to the period during which the gate is OFF becomes small,
The Vth shift of the TFT can be reduced, leading to an improvement in reliability.

[Brief description of the drawings]

FIG. 1 is a sectional view of an element structure and a circuit configuration diagram showing a basic configuration of an active matrix liquid crystal display device according to a first embodiment.

FIG. 2 is a diagram showing a state of subfield division in the first embodiment.

FIG. 3 is a diagram showing a gate drive pulse in the first embodiment.

FIG. 4 is a view showing the gate waveform dependency of a common voltage difference on the left and right sides of the screen.

FIG. 5 is a diagram showing a state of subfield division in a second embodiment.

FIG. 6 is a diagram showing a gate drive pulse in the second embodiment.

FIG. 7 is a diagram showing a configuration in which a driving waveform of a gate driver is changed according to the number of subfields.

FIG. 8 is a view showing the concept of a conventional MF driving method.

FIG. 9 is a diagram showing a potential fluctuation waveform and a flicker component of a pixel.

FIG. 10 is a diagram illustrating a flicker component during MF driving.

FIG. 11 is a diagram showing a frequency spectrum of a luminance change.

[Explanation of symbols]

 Reference Signs List 10 array substrate 11 pixel electrode 12 gate line (address line) 13 signal line 14 switching element 15 gate line driver 16 signal line driver 20 counter substrate 21 counter electrode 30 liquid crystal layer 40 liquid crystal display Panel 41 N: 1 processing circuit 42 N: 1 switching circuit 43 ON waveform control circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-1-219827 (JP, A) JP-A-3-271795 (JP, A) JP-A-63-198022 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) G02F 1/133 550 G09G 3/36

Claims (2)

(57) [Claims] A plurality of address lines extending in a horizontal direction, a plurality of signal lines extending in a vertical direction, and pixel electrodes provided at positions corresponding to respective intersections of the address lines and the signal lines. When the interlaced scanning means for scanning by dividing the address lines into N sub-address group, Ri Na and and means dampening at least one of rising and falling of a pulse for driving the address lines, wherein Blunt
The pulse width of the input pulse corresponds to the N sub-addresses.
Longer than the scanning interval of one scan line before being divided into address groups
Display device characterized by decoction. A plurality of address lines extending in a horizontal direction;
A plurality of signal lines along the direct direction, the address lines and
Provided at the position corresponding to each intersection with the signal line
Pixel electrodes and the address lines are connected to N sub-address groups.
Interlaced scanning means for scanning the image data separately;
Low rise and fall of the pulse that drives the
Means for dulling at least one of them, and
Filter characteristics according to the number N of the sub-address groups
And a display device.