JP3323692B2 - Flip-chip type liquid crystal display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip type liquid crystal display device in which a driving IC is directly mounted on one of two superposed transparent insulating substrates.

[0002]

2. Description of the Related Art For example, in order to mount a driving IC on one transparent insulating substrate constituting a liquid crystal display element (ie, a liquid crystal display panel), an outer lead of a tape carrier package (TCP) mounting the driving IC is used. And a wiring pattern formed on a transparent insulating substrate are electrically connected using an anisotropic conductive film. This anisotropic conductive film is a film-like thermosetting adhesive in which fine conductive particles are uniformly dispersed, and connects the outer lead and the wiring pattern facing each other by being heated and pressurized.
The component can be fixed to the transparent insulating substrate.

However, in recent years, demands for higher density of liquid crystal display elements and a demand for minimizing the outer shape of the liquid crystal display module have made it difficult to use a bump (protruding electrode) of a driving IC and a liquid crystal without using TCP parts. A method of directly connecting a wiring pattern on one transparent insulating substrate of a display element has been considered. Such a mounting method is referred to as a flip-chip method or a chip-on-glass (COG) mounting method since a driving IC is directly mounted on a transparent insulating substrate.

FIG. 1 shows a connection method of the flip chip system.
3 will be described. As shown in FIG. 13A, a bump (projection electrode) BUMP is formed on the lower surface of the driving IC.
The EAD is held on the pressing surface by vacuum suction or the like. on the other hand,
For example, on a transparent insulating substrate SUB1 made of glass, a wiring pattern DTM (in the case of a video signal line; in the case of a scanning signal line, GTM) to be joined to the bump BUMP is formed. Further, an anisotropic conductive film ACF is pasted on the wiring pattern DTM in advance.

Next, an imaging camera CAM in which the imaging surface FACE is arranged below the transparent insulating substrate SUB1.
Based on the signal from the ERA, the transparent insulating substrate SUB1 is driven in the XY directions, and the bump BUMP and the wiring pattern DT are driven.
Align with M.

Next, as shown in FIG. 13B, the bonding head HEAD is driven downward, the bumps BUMP of the driving IC are brought into contact with the upper surface of the anisotropic conductive film ACF, and are temporarily attached. It is confirmed by the imaging camera CAMERA whether or not the positioning is secure. If the positioning is good, the thermocompression bonding is performed by the bonding head HEAD.

[0007] In this way, the conductive particles in the anisotropic conductive film ACF are crushed between the bump BUMP and the wiring pattern DTM, and electrical connection is possible.

Further, although not shown in FIG. 13, a flexible substrate (FPC) electrically connected to an input wiring pattern to a driving IC and transmitting an external signal is also formed by a similar bonding method. The upper wiring pattern (usually gold-plated on the copper pattern) and the wiring pattern on the transparent insulating substrate SUB1 (input wiring T
d) can be electrically connected using the anisotropic conductive film ACF.

[0009]

Conventionally, input wiring to a driving IC on a transparent insulating substrate electrically connected to an output terminal of a flexible substrate for supplying a signal and a power supply voltage to the driving IC from the outside is conventionally used. It is formed of a single layer of a transparent conductive film.
This configuration has a problem of high resistance.

The input wiring of another configuration to the driving IC is formed by laminating an Al film or an Al alloy film for lowering the resistance on the transparent conductive film. But,
The contact resistance between the transparent conductive film and the Al film or the Al alloy film is high, and the Al film or the Al alloy film is liable to be contaminated and oxidized. That is, when an electric field is applied between the metal terminals (that is, the input wirings in this case), the metal is electrolyzed due to moisture containing impurities such as chlorine, and the terminals are corroded. In recent years, as the definition of liquid crystal display elements has become higher and the pitch of input wiring to a driving IC has been reduced, the problem of electrolytic corrosion of terminals has become a level that cannot be ignored.

An object of the present invention is to provide a flip-chip type liquid crystal display element which can achieve both a low resistance between a flexible substrate and a driving IC and an improvement in electric corrosion resistance of an input wiring to the driving IC. .

[0012]

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention has the features described in the claims.
Configuration. That is, the liquid crystal display device according to claim 1.
It is on one of the substrate surfaces of two transparent insulating substrates superimposed through the liquid crystal layer, mounted drive IC, and implementing the flexible substrate for input to at least one end portion of the substrate Flip In chip type liquid crystal display elements,
The input wiring to the driving IC provided on the one substrate surface may be a low-resistance metal from a lower layer to a layer lower than the transparent conductive film.
Film, wherein the transparent conductive film, the transparent Akirashirube film than comprise a layer of low-resistance metal film, wherein the top of the upper layer of the low-resistance metal film of a transparent conductive film is covered a protective film, and, before Symbol drive IC in portions where the bumps are connected, the part of the transparent conductive film from the upper layer of the low-resistance metal film and the protective film is removed to expose said transparent conductive film, the transparent conductive film from the lower low resistance
The metal film and the low-resistance metal film above the transparent conductive film
Connected through a through hole provided in the transparent conductive film
And said that you are. A liquid crystal display according to claim 2.
The device is a flip-chip type liquid crystal display according to claim 1.
In the device, the input flexible board is
It is provided for each driving IC, and is used for input wiring to the driving IC.
The output terminal of the flexible substrate is connected to the
The transparent conductive material is used at the portion where the output terminal of the
The low-resistance metal film above the film and part of the protective film are removed.
The transparent conductive film is exposed after being removed.
You. Further, the liquid crystal display device according to the third aspect provides the liquid crystal display device according to the first aspect.
The flip-chip type liquid crystal display element described above,
A low-resistance metal layer above the transparent conductive film from which a part has been removed
The feature is that the planar shape of the membrane is comb-shaped or ladder-shaped
And In addition, the liquid crystal display device according to the fourth aspect has the following features.
4. The flip-chip type liquid according to any one of 1 to 3 above.
In the crystal display element, the protective film is formed along the upper conductive film.
Characterized by being formed larger than the conductive film.
I do. The liquid crystal display device according to the fifth aspect is the first aspect.
5. The flip-chip type liquid crystal according to any one of items 1 to 4,
In the display element, the driving I in the input wiring
The portion to which the bump of C is connected is the transparent conductive film single layer.
It is characterized by being formed. Claim 6
5. The flip-chip according to claim 3, wherein
In the liquid crystal display device of the step-up type,
In the low-resistance metal film above the transparent conductive film
Or the transparent conductive film is exposed at a part of the ladder where the interval is wide.
A pad on a portion where the transparent conductive film is exposed
Is constituted. Claim 7
7. The flip-chip liquid crystal display device according to claim 6, wherein
In the liquid crystal display device of the formula, the pad is
The bump is a portion to be connected. Ma
The liquid crystal display device according to claim 8 is a liquid crystal display device according to claim 6.
In the lip-chip type liquid crystal display element, the pad
Is a lighting inspection pad. Also,
The liquid crystal display device according to the ninth aspect is the liquid crystal display device according to the first to eighth aspects.
The flip-chip type liquid crystal display element described in
And the low-resistance metal film below the transparent conductive film is a gate.
The line and the low-resistance metal film above the transparent conductive film are thin film transistors.
Formed in the same layer as the source / drain electrodes of the transistor
It is characterized by being. A liquid crystal table according to claim 10.
The display device is a flip-chip type liquid crystal display according to claim 9.
In the display device, the transparent conductive film is formed in the same layer as the pixel electrode.
It is characterized by having been done. Claim 11
The liquid crystal display device according to any one of claims 1 to 10.
The flip-chip type liquid crystal display element described above,
The low-resistance metal film may be an Al film, a Cr film, or a combination thereof.
Gold or Al-Ta, Al-Ti-Ta, Al-P
d, comprising at least one layer of Al-Si.
I do.

[0013]

[0014]

[0015]

[0016]

[0017]

[0018]

[0019]

[0020]

[0021]

[0022]

According to the present invention, the input wiring for connecting the flexible substrate and the driving IC includes a low resistance metal film,
In addition, by connecting the first low-resistance metal film and the second low-resistance metal film via a transparent conductive film having a high contact resistance to the low-resistance metal via through holes, the input wiring is reduced in resistance. The resistance between the flexible substrate and the driving IC can be reduced.

Further, the second low-resistance film is formed in a comb shape or a ladder shape, and a transparent conductive film having high stability, being less likely to be contaminated and oxidized and less likely to cause electrolytic corrosion is exposed between the combs or the ladder. By connecting the output terminal of the flexible substrate to the exposed portion of the transparent conductive film having a large area, the contact resistance with the terminal of the flexible substrate can be reduced, and the resistance can be reduced. A stable resistance can be obtained even when a displacement occurs in the directional or lateral direction.

Further, the upper surface of the comb-shaped or ladder-shaped second low-resistance film for lowering resistance, in which electrolytic corrosion easily proceeds, is covered with a protective film to prevent electrolytic corrosion, and is connected to a terminal of a flexible substrate. By exposing the transparent conductive film, which has high stability, is hardly contaminated and oxidized, and hardly causes electrolytic corrosion, the electrolytic corrosion resistance of the input wiring connecting the flexible substrate and the driving IC can be improved. As a result, the reliability of the product can be improved.

Further, the second low-resistance film in the portion of the input wiring connected to the output terminal of the flexible substrate is partially removed to form a comb or ladder shape, and a transparent conductive film is provided between the comb and the ladder. After being exposed, after mounting the driving IC,
Before mounting the flexible substrate, the inspection probe is applied to the exposed portion of the transparent conductive film, and a lighting inspection is performed to determine the quality of the driving IC.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to embodiments.

FIG. 5 is a plan view showing a state where a driving IC is mounted on a transparent insulating substrate SUB1 made of, for example, glass. FIG. 6 is a cross-sectional view taken along the line AA. One transparent insulating substrate SUB2 is indicated by a dashed line, but is located above the transparent insulating substrate SUB1, and includes a liquid crystal LC including an effective display portion (effective screen area) AR by a seal pattern SL (see FIG. 5). are doing. The electrode COM on the transparent insulating substrate SUB1 is a wiring that is electrically connected to the common electrode pattern on the transparent insulating substrate SUB2 side through conductive beads, silver paste, or the like. The wiring DTM (or GTM) supplies an output signal from the driving IC to a wiring in the effective display unit AR. Input wiring Td
Supplies an input signal to the driving IC. The anisotropic conductive film ACF has an elongated shape common to a plurality of driving IC portions arranged in a line. The anisotropic conductive film ACF has an elongated shape common to an input wiring pattern portion to the plurality of driving ICs. ACF1 is separately attached.
Although a passivation film (protective film) PSV1 is also shown in FIG. 5, the wiring portion is covered as much as possible to prevent electrolytic corrosion.
The exposed portion is covered with the anisotropic conductive film ACF1.

Further, the periphery of the side surface of the driving IC is filled with silicone resin SIL (see FIG. 6), and protection is multiplexed.

FIG. 11 is a completed assembly view of the liquid crystal display module MDL, and is a perspective view seen from the front side of the liquid crystal display element.

The liquid crystal display module MDL has two kinds of storage / hold members, a shield case SHD and a lower case.

The HLD has four mounting holes provided for mounting the module MDL as a display unit on an information processing device such as a personal computer or a word processor, and is fixed and mounted on the information processing device through screws or the like. The module MDL is provided with a volume VR for adjusting brightness, an inverter for backlight is arranged in the MI section, and power is supplied to the backlight via the connector LCT and the lamp cable LPC. Signals from the main computer (host) and necessary power are supplied to the controller and the power supply of the liquid crystal display module MDL via the interface connector CT located on the back of the module.

FIG. 12 shows an example of the TFT shown in FIG.
FIG. 3 is a block diagram showing a TFT liquid crystal display element of a liquid crystal display module (active matrix type liquid crystal display module using a thin film transistor TFT as a switching element) and circuits arranged on the outer periphery thereof. In this example,
Drain driver IC _{1 to} IC _M and gate driver I
As shown in FIG. 6, C _{1 to} IC _N are a drain-side lead line DTM and a gate-side lead line GTM formed on one transparent insulating substrate SUB1 of the liquid crystal display element, and an anisotropic conductive film or an ultraviolet curable resin. It is mounted on chip-on-glass (COG mounting). In this example, the present invention is applied to a liquid crystal display element having 1024 × 3 × 768 effective dots of the XGA specification. Therefore, a 192 output drain driver I is provided on the transparent insulating substrate of the liquid crystal display element.
Eight (M = 16) on each of the opposing long sides, and 1
Eight output gate driver ICs on the short side (N = 8)
And COG mounting. A drain driver section 103 is arranged above and below the liquid crystal display element, a gate driver section 104 is arranged on a side face, and a controller section 101 and a power supply section 102 are arranged on the other side face. The controller section 101, the power supply section 102, the drain driver section 103, and the gate driver section 104 are interconnected by electrical connection means JN1 to JN4, respectively.

In this example, the XGA panel is 1024 ×
A TFT liquid crystal display module with a screen size of 10 inches and 3 × 768 dots was designed. Therefore, the size of each of the red (R), green (G), and blue (B) dots is 207 μm.
(Gate line pitch) × 69 μm (drain line pitch), and one pixel has a 207 μm square with a combination of three dots of red (R), green (G), and blue (B). For this reason, the drain line lead-out DTM should be
If 24 × 3 lines are used, the lead line pitch will be 69 μm or less, which is below the connection pitch limit of currently available tape carrier package (TCP) mounting. CO
In the G mounting, although it depends on the material of the anisotropic conductive film or the like to be used, the pitch of the bump BUMP of the driving IC chip is about 70 μm and the crossing area with the underlying wiring is about 50 μm.
The μm square can be said to be the minimum value currently available. For this reason, in this example, the drain driver ICs are arranged in a line on the two long sides of the liquid crystal panel facing each other, the drain lines are alternately drawn on the two long sides, and the pitch of the drain line drawing DTM is 69. × 2 μm. Therefore, the bump BUMP (see FIG. 6) pitch of the driving IC chip is set to about 100 μm.
In addition, the crossing area with the underlying wiring can be designed to be about 70 μm square, and it has become possible to connect with the underlying wiring with higher reliability. Since the gate line pitch is sufficiently large at 207 μm,
The gate line lead GTM is drawn on one short side, but when the definition is further increased, the gate line lead GTM can be drawn alternately on the two opposite short sides like the drain line. is there.

In the method in which the drain lines or the gate lines are alternately drawn, as described above, the connection between the lead lines DTM or GTM and the output side BUMP of the driving IC is facilitated, but the peripheral circuit board is opposed to the liquid crystal panel PNL. Therefore, it is necessary to dispose them on the outer periphery of the two long sides, so that there is a problem that the external dimensions are larger than in the case of one-side drawing. In particular, when the number of display colors increases, the number of data lines of display data increases, and the outermost shape of the information processing device increases.
For this reason, in this example, the conventional problem is solved by using a multilayer flexible substrate. When the screen size of the XGA panel becomes 10 inches or more, the pitch of the drain line lead-out DTM becomes as large as about 100 μm or more, and the drain driver IC is mounted on one long side by the COG.
Can be arranged on one side by mounting.

The driving IC employed in this embodiment has a rough appearance as shown in FIG. 5. However, in order to make the module outer shape as small as possible, the driving IC has a very elongated shape. Is about 10 to 11 mm, the short side dimension is about 1.5 to 2 mm, and in the drive IC on the drain side, the long side dimension is about 15 to 16 mm and the short side dimension is about 1.5 to 2 mm. Further, in this example, the effective display unit A
The output wiring pattern between R and the output-side bump BUMP portion of the driving IC extends in three directions, that is, the long side direction and the short side direction of the driving IC.

For example, in this example, in the gate-side drive IC, 11 out of 100 outputs are output from the two short sides, and the remaining 78 are output from the one long side. In the drive IC on the drain side, about 16 of the 192 outputs are output from the two short sides.
The remaining 160 wires are output from the long side. Note that the drive IC can be designed to be even more elongated, and output wiring can be provided only in the long side direction. In this case, the present invention can be applied.

The output bump BUMP of the driving IC
The distance from to the effective display area AR on the gate side is
The length is about 5.5 mm near the DD output wiring and about 10 mm near the BB output wiring. Further, on the drain side, the length is about 4.3 mm near the DD output wiring and about 8.5 mm near the BB output wiring. Therefore, for example, assuming that the wiring is made only of the transparent conductive film ITO having a resistivity of about 20Ω / □ and a width of 30 μm at a thickness of 1400 ° in this portion and a wiring length of 1 mm, a resistance difference of about 667Ω occurs. Become. Therefore, on the gate side, about 3k
On the drain side, a resistance difference of about 2.8 kΩ is generated, and the amount of distortion of the output waveform of the driving IC is different for each wiring.
This causes display unevenness.

<< Method of Manufacturing Transparent Insulating Substrate SUB1 >> Next, the first transparent insulating substrate SUB of the liquid crystal display device described above.
The manufacturing method on one side will be described with reference to FIGS. In the figure, the middle letters are the abbreviations of the process names, the left side shows the pixel portion, and the right side shows the processing flow as seen in the cross-sectional shape near the gate terminal. Except for steps B and D,
The processes A to G are classified according to the respective photo (photo) processes, and all the cross-sectional views of each process show the stage where the processing after the photo process is completed and the photoresist is removed. In the present description, the photo (photo) processing refers to a series of operations from application of a photoresist, through selective exposure using a mask, to development thereof, and a repeated description thereof will be omitted. A description will be given below according to the divided steps.

Step A, FIG. 8 After a silicon oxide film SIO is provided on both surfaces of a first transparent insulating substrate SUB1 made of 7059 glass (trade name) by dipping, baking is performed at 500 ° C. for 60 minutes.
Note that this SIO film is formed to alleviate the surface irregularities of the transparent insulating substrate SUB1, but can be omitted if the irregularities are small. Al-Ta, A having a thickness of 2800 °
First conductive film g1 made of l-Ti-Ta, Al-Pd, or the like
Is provided by sputtering. After the photo-treatment, the first conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, nitric acid and glacial acetic acid.

Step B, FIG. 8 After the resist is directly drawn (after the above-described anodic oxidation pattern is formed),
PH 6.25 ± 0.05 3% tartaric acid by ammonia
The substrate SUB1 is immersed in an anodizing solution consisting of a solution prepared by diluting the solution adjusted to 1: 9 with an ethylene glycol solution,
The formation current density is adjusted to 0.5 mA / cm ² (constant current formation). Next, anodic oxidation (anodization) is performed until the formation voltage 125 V necessary for obtaining a predetermined Al ₂ O ₃ film thickness is reached. Thereafter, it is desirable to maintain this state for several tens of minutes (constant voltage formation). This is a uniform Al
_This is important for obtaining a ₂ O ₃ film. Thereby, the conductive film g1 is anodized, and the scanning signal line (gate line) is formed.
An anodic oxide film AOF having a thickness of 1800.degree. Is formed in a self-aligned manner on the GL and on the side surfaces, and becomes a part of the gate insulating film of the thin film transistor TFT.

Step C, FIG. 8 A conductive film d1 made of an ITO film having a thickness of 1400 ° is provided by sputtering. After the photo-treatment, the conductive film d1 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etchant, thereby forming the gate terminal GTM, the uppermost layer of the drain terminal DTM, and the transparent pixel electrode ITO1.

Step D, FIG. 9 Ammonia gas, silane gas, and nitrogen gas are introduced into a plasma CVD apparatus to provide a 2000-nm thick Si nitride film, and silane gas and hydrogen gas are introduced into the plasma CVD apparatus to form a film. After providing a 2000 ° i-type amorphous Si film, hydrogen gas and phosphine gas are introduced into a plasma CVD apparatus to form a 300 ° -thick N ⁺ type amorphous Si film. This film formation is performed continuously by changing the reaction chamber in the same CVD apparatus.

Step E, FIG. 9 After photo processing, SF ₆ , CC is used as a dry etching gas.
The n ⁺ -type amorphous Si film and the i-type amorphous Si film are etched using l ₄ . Subsequently, the Si nitride film is etched using SF ₆ . Of course, the N ⁺ -type amorphous Si film, the i-type amorphous Si film, and the silicon nitride film may be successively etched with SF ₆ gas.

The feature of the manufacturing process of this embodiment is that the three-layer CVD film is continuously etched with a gas containing SF ₆ as a main component. That is, the etching rate for SF ₆ gas is N ⁺ type amorphous Si film, i type amorphous Si film.
The size is larger in the order of the film and the Si nitride film. Therefore, when the etching of the N ⁺ -type amorphous Si film is completed and the etching of the i-type amorphous Si film is started, the upper N ⁺ -type amorphous Si film is side-etched, and consequently the i-type amorphous Si film is etched. The film is about 70 degrees
Processed into pa. When the etching of the i-type amorphous Si film is completed and the etching of the silicon nitride film starts, the upper N ⁺ -type amorphous Si film and the i-type amorphous Si film are side-etched in this order. Then, the i-type amorphous Si film is taped to about 50 degrees, and the silicon nitride film is taped to 20 degrees. Due to the taper shape, the probability of disconnection is significantly reduced even when the source electrode SD1 is formed thereon. N ⁺ type amorphous S
Although the taper angle of the i-film is close to 90 degrees, the probability of disconnection at this step is very small because the thickness is as thin as 300 °.
Therefore, an N ⁺ type amorphous Si film, an i type amorphous Si film,
Si nitride film plane pattern of - down is strictly identical pattern - not the emission cross-section Junte - for a path shape, N ⁺ -type amorphous S
The pattern becomes larger in the order of the i film, the i-type amorphous Si film, and the Si nitride film.

Step F, FIG. 10 A second conductive film d2 made of Cr having a thickness of 600 ° is provided by sputtering, and a second conductive film d2 having a thickness of 4000 ° is further formed.
A third conductive film d3 made of Pd, Al-Si, Al-Ta, Al-Ti-Ta, or the like is provided by sputtering.
After the photo-treatment, the third conductive film d3 is etched with the same liquid as in the step A, the second conductive film d2 is etched with a ceric ammonium nitrate solution, and the video signal line DL, the source electrode SD1, and the drain electrode SD2 are formed. To form

Here, in this example, as shown in step E, N
^{Since the +} -type amorphous Si film, the i-type amorphous Si film, and the Si nitride film are tapered in a forward direction, the second conductive film d2 is used in a liquid crystal display device having a large tolerance of the resistance of the video signal line DL. It is also possible to form with only.

Next, SF ₆ ,
By introducing CCl ₄ and etching the N ⁺ type amorphous Si film, the N ⁺ type semiconductor layer d between the source and the drain is etched.
0 is selectively removed.

Step G, FIG. 10 An ammonia gas, a silane gas and a nitrogen gas are introduced into a plasma CVD apparatus to form a 1 μm-thick Si nitride film. After the photo-processing, the protective film PSV1 is formed by etching using SF ₆ as a dry etching gas. As the protective film, not only a SiN film formed by CVD but also a film using an organic material can be used.

<< Production Flow from TFT Substrate Production to Flexible Substrate Mounting >> Next, a production flow of a substrate (hereinafter abbreviated as a TFT substrate) SUB1 on which a thin film transistor is formed will be described with reference to FIG.

First, the TFT substrate SUB1 is manufactured (protective film PSV1) as described in the above-mentioned "Method for manufacturing transparent insulating substrate SUB1" with reference to FIGS.
Until).

Next, a protective film (reference P in FIG. 10G)
After printing an alignment film on SV1), the alignment film is subjected to a rubbing treatment.

Next, the transparent insulating substrates SUB1, SUB
After printing a sealant around the edge of one of the two substrate surfaces, and spraying a large number of spacers made of small spherical beads or the like defining the distance between the two substrates on one of the substrate surfaces Then, the two substrates SUB1 and SUB2 are superimposed and attached with a sealant to assemble. Then, the substrate S
Cut the periphery of UB1.

Next, after the liquid crystal is sealed from the liquid crystal charging port where no sealing material is provided between the two substrates SUB1 and SUB2 in the region surrounded by the sealing material, the sealing port is made of a sealing material made of resin or the like. Seal with.

Next, a lighting test is performed by using a test probe, and repairs are performed for those having a defect such as disconnection or short circuit of the gate line and the drain line.

As a result of the lighting inspection, an anisotropic conductive film (ACF2 in FIG. 6) is affixed to those determined to be non-defective.

Next, after a driving IC is temporarily mounted on the transparent insulating substrate SUB1 via an anisotropic conductive film, the IC is heated and pressed and mounted (see FIGS. 5, 6, and 13).

Next, with the driving IC mounted,
The lighting inspection is performed using the inspection probe, and the defective driving IC is replaced and mounted again.

As a result of the lighting inspection, an anisotropic conductive film (ACF1 in FIG. 6) is affixed to those determined to be non-defective.

Next, a flexible substrate (FP in FIG. 6) is placed on the transparent insulating substrate SUB1 via an anisotropic conductive film.
Implement C).

<< Input Wiring Td to Driving IC >> First Embodiment FIG. 1 is an enlarged plan view (an enlarged view of a portion B in FIG. 5) of an input wiring to a driving IC according to a first embodiment of the present invention. 4A is a cross-sectional view taken along the line DD in FIG. 1, and FIG. 4B is a cross-sectional view taken along the line EE in FIG.

The input wiring Td to the driving IC of this embodiment
Is formed on the transparent insulating substrate SUB1 from the lower layer in the same step as the gate electrode and the gate line, as shown in FIGS. 1, 4A and 4B, and is formed of Al-Ta, Al-Ti-Ta. ,
A first conductive film g1 made of a low-resistance metal such as Al-Pd, a conductive film d1 formed of an ITO (indium tin oxide) film formed in the same step as the transparent pixel electrode of the display portion, and the same as the source / drain electrodes of the thin film transistor A second conductive film d2 formed in a process and made of a low-resistance metal such as Cr;
Al-Pd, Al-Si, Al-Ta, Al-Ti-T
a protection film (passivation film) PSV1 made of SiN or the like is provided on the third conductive film d3 made of a low-resistance metal such as a to prevent electrolytic corrosion.

In FIG. 1, the position where the driving IC is mounted is indicated by a broken line with the reference numeral IC. Reference numeral BP denotes a bump connection portion to which a bump (see reference numeral BUMP in FIG. 6) of the driving IC is bonded. Further, a position (one end) where a flexible substrate (reference numeral FPC in FIG. 6) for supplying a signal and a power supply voltage from the outside to the driving IC is connected and mounted is indicated by a broken line with reference numeral FPC. The portion of the input wiring Td connected to the output terminal of the flexible substrate is shown in FIG.
On the left side (opposite to the display unit) of the broken line FPC.

In the portion of the input wiring Td connected to the output terminal of the flexible substrate, the second conductive film d2 and the third conductive film d3 are formed in a so-called comb shape as shown in FIG. The protective film PSV1 is also formed in a comb shape slightly larger than the second and third conductive films d2 and d3. That is, as shown in FIGS. 1 and 4B, the transparent conductive film d1 is exposed between the combs of the comb-shaped protective film PSV1 exposed on the surface, and the exposed transparent conductive film d1 is The terminal becomes an inspection terminal, and the exposed transparent conductive film d1 is directly connected to the output terminal of the flexible substrate. In FIG. 4B, reference numeral CNT indicates a connection portion with the output terminal of the flexible substrate. As is clear from FIG. 1, regarding the dimensions of each conductive film forming the input wiring Td, the lower first conductive film g1 is formed to have the smallest size, that is, the innermost conductive film g1. The second and third conductive films d2 and d3 are formed in the second dimension (excluding the space between the combs), and the transparent conductive film d1 is formed in the largest dimension, that is, outside. The bump connection portion BP in FIG. 1 is configured by a single layer of the transparent conductive film d1 whose surface is exposed.

The first conductive film g1 and the second conductive film d2 are connected via through holes TH1 and TH2.

In FIG. 1, reference symbol P denotes a terminal (input wiring Td) pitch, and reference symbol G denotes a terminal gap (interval).

In this embodiment, the input wiring Td for connecting the flexible substrate and the driving IC includes the first conductive film g1, the second and third conductive films d2 and d3 made of a low-resistance metal, In addition, since the first conductive film g1 and the second conductive film d2, which interpose the transparent conductive film d1 having a high contact resistance with the low-resistance metal, are connected through the through holes TH1 and TH2, the input wiring Td has a low resistance. The resistance between the flexible substrate and the driving IC can be reduced.

Further, the second conductive film d2 and the third conductive film d3 are formed in a comb shape, and a transparent conductive film d1 having high stability, being less likely to be contaminated and oxidized and less likely to cause electrolytic corrosion is formed between the combs. Since the output terminal of the flexible substrate is connected to the exposed portion of the exposed transparent conductive film d1 having a large area, the contact resistance with the terminal of the flexible substrate can be reduced, and a low resistance can be realized. Even when the substrate is displaced in the vertical or horizontal direction, a stable resistance can be obtained.

Further, the upper surfaces of the comb-shaped second and third conductive films d2 and d3 for lowering the resistance at which the electrolytic corrosion easily proceeds are covered with a protective film PSV1 to prevent the electrolytic corrosion, and the terminals of the flexible substrate are connected to each other. The connecting portion is configured by exposing the transparent conductive film d1 which has high stability, is hardly contaminated, oxidized, and hardly generates electrolytic corrosion, so that the input wiring Td for connecting the flexible substrate and the driving IC has high corrosion resistance. Can be improved. As a result, the reliability of the product can be improved.

Further, the second and third conductive films d2, in the portion of the input wiring Td connected to the output terminal of the flexible substrate,
Since d3 was partially removed to form a comb shape and the transparent conductive film d1 was exposed between the combs, as described in the << Production Flow >> of FIG. 7, after mounting the driving IC, mounting the flexible substrate Before that, the inspection probe is applied to the exposed portion of the transparent conductive film d1 to perform a lighting inspection, and it is possible to determine the quality of the driving IC. Note that the interval between the combs may be increased by one place to increase the area of one exposed transparent conductive film d1 to facilitate the inspection.

Embodiment 2 FIG. 2 is an enlarged plan view of an input wiring Td to a driving IC according to Embodiment 2 of the present invention.

This embodiment has the same basic configuration as the first embodiment shown in FIG. The difference from the first embodiment is that the first embodiment
In the first embodiment, the second and third conductive films d2 and d3 are formed in a comb shape, whereas in the present embodiment, the second and third conductive films d2 and d3 are formed.
2 and d3 were formed in a ladder shape as shown in FIG. 2 and the through holes connecting the first conductive film g1 and the second conductive film d2 were only TH1 and TH2 in the first embodiment. On the other hand, TH3 and TH4 are additionally provided.

With such a structure, the same effect as that of the first embodiment can be obtained. In addition, the area ratio between the second and third conductive films d2 and d3 made of a low resistance metal, the first conductive film g1 and the second conductive film Since the connection area with the film is large, the resistance can be made lower than in the first embodiment. In this embodiment, the second and third conductive films d2 and d3 have a ladder shape, and the ladder has two support portions per terminal, and the second and third conductive films d2 and d3 have a large area for the adjacent terminal (input wiring Td).
While the third conductive films d2 and d3 are adjacent to each other, the first embodiment has a comb shape, and the number of support portions of the comb is one per terminal. Therefore, the first embodiment has higher electrolytic corrosion resistance.

Third Embodiment FIG. 3 is an enlarged plan view of an input wiring Td to a driving IC according to a third embodiment of the present invention, and FIG. 4C is a sectional view taken along the line FF in FIG.

In FIG. 3 and FIG.
Denotes a lighting inspection pad (refer to the << Production Flow >> of FIG. 7). In the present embodiment, the interval between the ladders is increased by one place, the area of one exposed transparent conductive film d1 is increased, and the lighting test pad TEST is used to facilitate the test. Other configurations, operations, and effects are the same as those of the second embodiment shown in FIG.

Although the present invention has been described in detail with reference to the embodiments, the present invention is not limited to the above-described embodiments, and it is needless to say that various modifications can be made without departing from the scope of the invention. is there. For example, the structure of the input wiring Td (that is, the terminal) shown in the first to third embodiments may be applied to some of the terminals. For example, even when applied to some terminals such as a terminal where electric erosion easily proceeds, that is, a terminal having a high potential difference between adjacent terminals, a terminal to which a DC potential is applied, for example, a terminal to which a low AC potential having a frequency of 90 Hz or less is applied. Good. Further, the comb shapes of the second and third conductive films d2 and d3 of the first embodiment shown in FIG. 1 and the ladder shape shown in FIGS. 2 and 3 are merely examples, and other shapes may be adopted. Often, the second and third conductive films d except for a part of the transparent conductive film d1
The above effect can be obtained by adopting a configuration of covering with 2, d3. In addition, the first conductive film g1, the second and third conductive films g1,
The above-mentioned materials of the conductive films d2 and d3 are merely examples,
Further, the second and third conductive films d2 and d3 may be composed of only one layer. Further, the first conductive film g1 may not be provided.
Further, in the above embodiment, the present invention is applied to an active matrix type liquid crystal display device using a thin film transistor TFT or the like as a switching element. However, it is needless to say that the present invention can be applied to a simple matrix type liquid crystal display device.

[0076]

As described above, according to the present invention,
In a flip-chip type liquid crystal display device, it is possible to provide both a low resistance between the flexible substrate and the driving IC and an improvement in the corrosion resistance of the input wiring to the driving IC, thereby providing a highly reliable product.

[Brief description of the drawings]

FIG. 1 is an enlarged plan view (an enlarged view of a portion B in FIG. 5) of an input wiring Td to a driving IC according to a first embodiment of the present invention.

FIG. 2 is an enlarged plan view of an input wiring Td to a driving IC according to a second embodiment of the present invention.

FIG. 3 is an enlarged plan view of an input wiring Td to a driving IC according to a third embodiment of the present invention.

FIG. 4A is a cross-sectional view taken along the line DD in FIG. 1;
3B is a cross-sectional view taken along line EE in FIG. 1, and FIG. 3C is a cross-sectional view taken along line FF in FIG. 3.

FIG. 5 is a plan view showing a state where a driving IC is mounted on a transparent insulating substrate SUB1 of the liquid crystal display element.

FIG. 6 is a sectional view taken along the line AA of FIG. 5;

FIG. 7 is a view showing a manufacturing flow of the TFT substrate SUB1.

FIG. 8 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of processes A to C on the substrate SUB1 side.

FIG. 9 is a flow chart of a cross-sectional view of a pixel portion and a gate terminal portion showing manufacturing steps D to E on the substrate SUB1 side.

FIG. 10 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of processes FG on the substrate SUB1 side.

FIG. 11 is a perspective view of the liquid crystal display module MDL viewed from the front side after assembly is completed.

FIG. 12 is a block diagram showing a liquid crystal display panel of a liquid crystal display module and circuits arranged around the liquid crystal display panel.

FIG. 13 is a diagram illustrating a part of the manufacturing process of mounting the driving IC on the transparent insulating substrate SUB1.

[Explanation of symbols]

SUB1: transparent insulating substrate, g1: first conductive film, d1: transparent conductive film, d2: second conductive film, d3: third conductive film, PS
V1: protective film, TH1-4: through hole, IC: driving IC, FPC: flexible board, BP: bump connection section, P: terminal pitch, G: terminal gap, CNT: connection section with output terminal of flexible board , TEST ... Lighting inspection pad.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Kimitoshi Ogiichi 3300 Hayano Mobara City Chiba Pref.Electronic Device Division (72) Inventor Kuniyuki Matsunaga 3300 Hayano Mobara City Chiba Pref. In Electronic Device Division (72) Inventor Junichi Owada 3300 Hayano, Mobara City, Chiba Pref. Electronic Device Division, Hitachi, Ltd. (56) References JP-A-3-64737 (JP, A) JP-A-7-159804 ( JP, A) JP-A-2-223925 (JP, A) JP-A-6-27477 (JP, A) JP-A-5-173164 (JP, A) JP-A-2-242232 (JP, A) 60-60725 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) G02F 1/1345 G02F 1/1362

Claims (11)

(57) [Claims] 1. A driving IC is mounted on one of two transparent insulating substrates which are superposed via a liquid crystal layer, on a surface of the substrate.
A flip-chip type liquid crystal display device having a flexible substrate for input mounted on at least one end of the substrate;
The input wiring to C is from the lower layer to the lower layer below the transparent conductive film.
Anti metal film, the transparent conductive film, comprise a layer of low-resistance metal film from the transparent Akirashirube film, the protective film on the low-resistance metal film of the upper layer from the transparent conductive film is coated, and prior SL drive In the portion where the bumps of the IC are connected, a part of the low-resistance metal film and the protective film above the transparent conductive film are removed to expose the transparent conductive film, and the lower conductive metal film below the transparent conductive film is exposed .
Low resistance metal film and low resistance metal film above the transparent conductive film
Are connected via through holes provided in the transparent conductive film.
The liquid crystal display device of the flip chip method, characterized in that it is. 2. The input flexible substrate is provided for each of the driving ICs, an input wiring to the driving IC is connected to an output terminal of the flexible substrate, and an output terminal of the flexible substrate is connected. 2. A flip-chip type liquid crystal display according to claim 1, wherein the low-resistance metal film above the transparent conductive film and a part of the protective film are removed from the transparent conductive film to expose the transparent conductive film. element. 3. The flip-chip type liquid crystal according to claim 1, wherein a plane shape of the low-resistance metal film above the transparent conductive film from which the part has been removed is a comb shape or a ladder shape. Display element. 4. A flip-chip type liquid crystal display device according to claim 1, wherein said protective film is formed along the upper conductive film so as to be larger than said conductive film. . 5. The flip according to claim 1, wherein a portion of the input wiring to which the bump of the driving IC is connected is formed of the single layer of the transparent conductive film. Chip type liquid crystal display device. 6. A low-resistance metal film above the comb-shaped or ladder-shaped transparent conductive film, wherein the transparent conductive film is exposed at a portion where the interval between the combs or the ladder is large. 5. The flip-chip type liquid crystal display device according to claim 3, wherein a pad is formed in a portion where the liquid crystal is exposed. 7. The flip-chip type liquid crystal display device according to claim 6, wherein said pad is a portion to which a bump of a driving IC is connected. 8. The flip-chip type liquid crystal display device according to claim 6, wherein said pad is a lighting inspection pad. 9. A low-resistance metal film below the transparent conductive film is formed in the same layer as a gate line, and a low-resistance metal film above the transparent conductive film is formed in the same layer as source / drain electrodes of a thin film transistor. The flip-chip type liquid crystal display device according to any one of claims 1 to 8, wherein 10. The flip-chip type liquid crystal display device according to claim 9, wherein said transparent conductive film is formed in the same layer as a pixel electrode. 11. The low-resistance metal film may be an Al film, a Cr film, an alloy thereof, Al-Ta, Al-Ti.
11. The flip-chip type liquid crystal display device according to claim 1, comprising at least one layer of -Ta, Al-Pd, and Al-Si.