JP3440861B2 - Method for manufacturing field effect transistor - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field effect transistor and a method for manufacturing the same. 2. Description of the Related Art With the advancement of wireless communication technologies such as mobile phones, expectations for power devices and high-frequency devices operating in the gigahertz order have been increasing. 2. Description of the Related Art Conventionally, a solid-state amplifying element used for wireless communication has a GaAs having a higher saturation electron drift velocity in a low electric field than a semiconductor such as Si.
MESFETs and HEMTs using materials such as s have been actively developed and put into practical use. However, in recent years, high-frequency and high-power devices exceeding 10 W to 100 W have been required, and a problem has arisen due to the material characteristics of GaAs devices. First, GaAs has a thermal conductivity of 0.5 W / K.
cm, the calorific value of the GaAs device is large.
Therefore, when the output power of the GaAs device is increased, the amount of heat generated further increases, so that the heat is not sufficiently released,
The temperature of the GaAs device rises. as a result,
The carrier mobility decreases, the operating speed of the GaAs device decreases, and the junction leakage current increases, causing current runaway and eventually destroying the GaAs device. Further, the breakdown electric field of the GaAs material is 4 ×.
Since it is as small as 10 ⁵ (V / cm), the gate breakdown voltage is small, and if a power supply voltage exceeding several tens of volts is applied to the GaAs device, the GaAs device will be destroyed. Therefore, SiC and GaN-based materials are known as semiconductor materials for solving these problems. The thermal conductivity of the SiC semiconductor is 4.9 W / Kcm, and the dielectric breakdown electric field is 3.5 × 10 ⁶ (V / cm).
Respectively, which is about one digit larger than GaAs. Further S
iC has a saturated electron drift velocity of 2 × in a high electric field.
Since it is as fast as 10 ⁷ (cm / s), it is expected as a semiconductor material for next-generation high-power and high-frequency devices replacing GaAs. Further, since SiC is a very stable material, it has been difficult to grow a substrate or obtain a good semiconductor epitaxial film. Researches have been conducted on high power and high frequency devices. Next, a conventional field effect transistor using a SiC material will be described with reference to the drawings. FIG. 11 shows a cross section of a conventional MES type field effect transistor. In FIG. 11, high resistance S
An n-type SiC layer 2 is formed on an iC substrate 1, and a source electrode 3, a drain electrode 4 and a gate electrode 5 are formed on the n-type SiC layer 2. [0010] However, the surface of the n-type SiC layer 2 of the conventional field-effect transistor has very poor crystallinity. The reason will be described below. Since SiC is a very stable material,
Heat treatment at a higher temperature than in a normal semiconductor process is required. For example, a sintering temperature for making ohmic contact with the gate electrode 5 is 1000 ° C. or more, and an annealing temperature for activating carriers after ion implantation into the n-type SiC layer 2 is 1500 ° C. or more. Due to these heat treatments, the surface of the n-type SiC layer 2 has poor crystallinity. When a recess etching process is performed on a field-effect transistor, SiC is a very stable material. Therefore, dry etching in which O ₂ is mixed in a gas such as SF ₆ or CF _4, which easily deteriorates crystallinity, is performed. Etching method, molten KOH
Must be used. These etching processes also deteriorate the crystallinity of the surface of the n-type SiC layer 2. On the surface of the n-type SiC layer 2, SiC having poor crystallinity, which is considered to be grown by the residual gas in the film forming apparatus piping, grows during the cooling process after the growth. In order to remove the SiC having poor crystallinity, it is necessary to oxidize the surface of the SiC and then remove the surface of the n-type SiC layer 2 together with the surface oxide film by wet etching to clean the surface. In general, in a Schottky junction between a metal and a semiconductor, the semiconductor is easily deteriorated by heat.
Since the C layer 2 is in direct contact with the gate electrode 5, the n-type S
The iC layer 2 is deteriorated by heat. As described above, crystal defects are likely to occur on the surface of the n-type SiC layer 2, and when the gate electrode 5 is formed on these defects, the gate breakdown voltage is deteriorated and the high-frequency characteristics of the field effect transistor are reduced. It may cause significant deterioration. An object of the present invention is to provide a field effect transistor which operates properly at high output, high frequency and high temperature. According to the method of manufacturing a field effect transistor of the present invention , an n-type SiC layer is formed on a substrate.
Forming an oxide film on the n-type SiC layer by oxidation treatment
By removing a part of the oxide film, the n-type S
The surface of the iC layer is exposed, and the exposed n-type SiC layer
Forming an AlGaN layer on the surface, and forming an AlGaN layer on the AlGaN layer;
Forming a gate electrode and oxidizing near the AlGaN layer;
By removing two portions of the film, the surface of the n-type SiC layer is removed.
Two exposed parts are formed on the surface, and the source
A pole is formed, and a drain electrode is formed on the other exposed portion . Method for manufacturing field effect transistor of the present invention
Since the n-type SiC layer in the method is in contact with the AlGaN layer, the n-type SiC
The crystallinity of the C layer surface is maintained. Next, a field effect transistor according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a field effect transistor according to the embodiment. In FIG. 1, the high resistance S
An n-type SiC layer 2 is formed on a substrate 1 made of iC. On the n-type SiC layer 2, a drain electrode 3,
A source electrode 4 is formed, and an AlGaN layer 6 is formed between the drain electrode 3 and the source electrode 4. Further, a gate electrode 5 is formed on the AlGaN layer 6. The field-effect transistor according to the embodiment of the present invention is different from a conventional field-effect transistor in that the surface of the n-type SiC layer 2 is made of a semiconductor (n-type SiC).
Since the junction is formed by joining the layer 2 and the AlGaN layer 6), deterioration due to heat at the joining surface hardly occurs, and the characteristics do not deteriorate even at a high temperature operation. The field-effect transistor according to the present invention, as another embodiment, has a substrate 1 as shown in FIG.
Having a p-type SiC layer 9 between the n-type SiC layer 2 and the n-type SiC layer 2, as shown in FIG.
A recessed gate structure having an n-type SiC cap layer 10 having a higher carrier density than the n-type SiC layer 2 between the n-type SiC layer 2 and the drain electrode 4, p-type SiC layer 9 and n-type Si
Those having both of the C cap layers 10 can be similarly implemented. Even in these cases, the surface of the n-type SiC layer 2 is made of AlG
Since it is protected by the aN layer 6, the crystallinity does not deteriorate. Next, a method of manufacturing the field effect transistor according to the embodiment will be described with reference to FIGS. First, as shown in FIG. 4, an n-type SiC layer 2 is formed on a substrate 1 by epitaxial growth. Next, as shown in FIG. 5, an oxide film 7 is formed on the n-type SiC layer 2 using dry oxygen. Then, as shown in FIG. 6, using the photoresist film 8 as a mask, a mixed solution of hydrogen fluoride and ammonium fluoride as an etching solution, a part of the oxide film 7 is removed, and the surface of the n-type SiC layer 2 is removed. Expose. Next, as shown in FIG. 7, an AlGaN layer 6 is selectively grown on the exposed portion 2a by vapor phase growth such as a CVD method. Next, as shown in FIG.
By removing two portions of the oxide film 7 in the vicinity using a mixed solution of hydrogen fluoride and ammonium fluoride, the n-type SiC layer 6 is removed.
The exposed portion 2b and the exposed portion 2c are formed on the surface of the substrate. Thereafter, an ohmic metal such as Ni is vapor-deposited on these exposed portions 2b and 2c, lift-off is performed, and then ohmic sintering is performed, thereby forming the source electrode 3 and the drain electrode 4 having ohmic contacts as shown in FIG. To form At this time, the surface of the n-type SiC layer 2 is A
Since it is protected by the lGaN layer 6, even if a heat treatment such as an ohmic sinter is applied, the crystallinity of the surface of the n-type SiC layer 2 does not deteriorate. Next, as shown in FIG.
A gate electrode 5 made of a material such as Pd is formed thereon. Finally, the field effect transistor is completed by removing the oxide film 7. The field-effect transistor according to the present embodiment has very few crystal defects on the surface of the n-type SiC layer 2 and very few traps and the like due to the crystal defects. Therefore, it has good high-output and high-frequency characteristics. As described above, in the field-effect transistor of the present invention, the Al is located between the gate electrode and the n-type SiC layer.
Since the GaN layer is formed, the number of traps or the like caused by damage or crystal defects on the surface of the n-type SiC layer below the gate electrode is extremely reduced. Further, the n-type SiC layer and the AlGaN layer are
Since it has a junction mode formed by joining semiconductors, deterioration of the n-type SiC layer due to heat does not easily occur, and deterioration of transistor characteristics does not occur even during high-temperature operation. Therefore, it is possible to manufacture a field-effect transistor that operates stably at high output, high frequency, and high temperature.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of a field-effect transistor according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of a field-effect transistor according to another embodiment of the present invention. FIG. 4 is a cross-sectional view of a field-effect transistor according to another embodiment of the present invention. FIG. 4 is a view illustrating a manufacturing process of the field-effect transistor according to the embodiment of the present invention. FIG. 6 is a diagram showing a manufacturing process of the same field-effect transistor. FIG. 7 is a diagram showing a manufacturing process of the same field-effect transistor. FIG. 8 is a diagram showing a manufacturing process of the same field-effect transistor. FIG. 10 shows a manufacturing process of the same field-effect transistor. FIG. 10 shows a manufacturing process of the same field-effect transistor. FIG. 11 is a cross-sectional view of a conventional field-effect transistor. n-type SiC layers 2a, 2b, 2c exposed portion 3 source electrode 4 drain electrode 5 gate electrode 6 AlGaN layer 7 oxide film 8 photoresist 9 p-type SiC layer 10 n-type SiC cap layer

Continuation of front page (56) References JP-A-10-284507 (JP, A) JP-A-1-65870 (JP, A) JP-A-60-142568 (JP, A) JP-A-61-84873 (JP, A) JP-A-2000-150875 (JP, A) JP-A-10-510952 (JP, A) Moore et. al. , Bias dependency of RF power characteristics of 4H-SiC ME SFETs, IEEE / Crnell Conference on Advances, Concepts, Recommendations, High Speed Discipline, 40-46 S.R. T. Allen et. al. , 4H-Sic MESFET's on High Resistance Substrates with 30 GHz fmax, Device Research Research, 1995. Digest. 1995 53rd Annual, 1995, p. 102-103 (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/338 H01L 29/778 H01L 29/812

Claims (1)

(57) Claims 1. An n-type SiC layer is formed on a substrate, an oxide film is formed on the n-type SiC layer by an oxidation treatment, and a part of the oxide film is removed. Thus, the surface of the n-type SiC layer is exposed, and A is formed on the exposed surface of the n-type SiC layer.
forming an lGaN layer, forming a gate electrode on the AlGaN layer, and removing two portions of the oxide film near the AlGaN layer to form two exposed portions on the surface of the n-type SiC layer; A method for manufacturing a field effect transistor, comprising: forming a source electrode on one exposed portion; and forming a drain electrode on the other exposed portion.