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JP4140238B2 - Semiconductor module bonding structure - Google Patents

Semiconductor module bonding structure Download PDF

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Publication number
JP4140238B2
JP4140238B2 JP2001394883A JP2001394883A JP4140238B2 JP 4140238 B2 JP4140238 B2 JP 4140238B2 JP 2001394883 A JP2001394883 A JP 2001394883A JP 2001394883 A JP2001394883 A JP 2001394883A JP 4140238 B2 JP4140238 B2 JP 4140238B2
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electrode
electrode plate
semiconductor module
transistor element
semiconductor
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JP2003197859A (en
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敏之 中田
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Toyota Motor Corp
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Description

【０００１】
【発明の属する技術分野】
本発明は、半導体モジュールの接続構造に関し、詳しくは絶縁基板上に導電性部材を介して実装された第１の半導体素子に第２の半導体素子を積層して両素子を並列接続してなる半導体モジュールの接合構造に関する。
【０００２】
【従来の技術】
この種の半導体モジュールとしては、モジュールの横方向の面積を縮小するため、絶縁基板上に実装されたトランジスタ素子の上方に導電性樹脂を介してダイオード素子を積層したものが提案されている（特開２０００−１６４８００号公報など）。このモジュールでは、トランジスタ素子の下面にはコレクタ電極が形成され、トランジスタ素子の上面にはエミッタ電極とゲート電極とが形成されている。そして、ダイオード素子の下面にはアノード電極が形成され、ダイオード素子の上面にはカソード電極が形成されている。このため、トランジスタ素子の下面（コレクタ電極）に接触する絶縁基板上の金属パターンとダイオード素子の上面（カソード電極）と外部電極とをアルミワイヤにより接続すると共に、トランジスタ素子の上面（エミッタ電極）とダイオード素子の下面（アノード電極）との間に介在する導電性樹脂と外部電極とをアルミワイヤにより接続すれば、トランジスタ素子とダイオード素子とを逆並列接続することができ、例えば、これを複数個用いて構成されるインバータ回路の小型化を実現することができる。
【０００３】
【発明が解決しようとする課題】
しかしながら、これらの素子に大きな電流が流れる場合、例えば、これらの素子が自動車の走行モータを駆動するインバータ回路を構成する場合では、電気抵抗を抑制するため、接続するワイヤの本数を多くしなければならず、部品数が多くなるという問題があった。また、通常、これらの素子は封止用のゲルに覆われるから、従来のアルミワイヤによる接続においては素子に発生する熱は絶縁基板の下部の取り付けられる放熱板に頼らなければならない。このため、素子の駆動条件によっては、半導体モジュールの十分な放熱が確保できなくなるという問題があった。
【０００４】
本発明の半導体モジュールは、こうした問題を解決し、モジュールの小型化を図りつつより簡易に半導体素子を並列接続した半導体モジュールを提供することを目的の一つとする。また、本発明の半導体モジュールは、モジュールの小型化を図りつつ素子の放熱性をより向上させた半導体モジュールを提供することを目的の一つとする。
【０００５】
【課題を解決するための手段およびその作用・効果】
本発明の半導体モジュールは、上述の目的の少なくとも一部を達成するために以下の手段を採った。
【０００６】
本発明の半導体モジュールは、
絶縁基板上に導電性部材を介して実装されたトランジスタ素子にダイオード素子を積層して両素子を並列接続してなる半導体モジュールの接合構造であって、
前記トランジスタ素子の上面側のエミッタ電極と前記ダイオード素子の下面側のアノード電極との間に介在すると共に外部へ延伸した第１の電極板と、
前記ダイオード素子の上面側のカソード電極と、前記トランジスタ素子の下面に形成されたコレクタ電極に接触している前記導電性部材とに接続されると共に前記第１の電極板と直角をなす方向へ延伸した第２の電極板と
を備え、
前記トランジスタ素子は、前記第１の電極板に接続されるエミッタ電極と前記第２の電極板に接続されるコレクタ電極とは別にゲート電極を有し、
前記ゲート電極は、相互に直角をなす方向に延伸する前記第１の電極板と前記第２の電極板とが前記積層方向で重ならない位置の前記半導体素子の上面に設けられる。
また、
絶縁基板上に導電性部材を介して実装されたダイオード素子にトランジスタ素子を積層して両素子を並列接続してなる半導体モジュールの接合構造であって、
前記ダイオード素子の上面側のカソード電極と前記トランジスタ素子の下面側のコレクタ電極との間に介在すると共に外部へ延伸した第１の電極板と、
前記トランジスタ素子の上面側のエミッタ電極と、前記ダイオード素子の下面に形成されたアノード電極に接触している前記導電性部材とに接続されると共に前記第１の電極板と直角をなす方向へ延伸した第２の電極板と
を備え、
前記トランジスタ素子は、前記第１の電極板に接続されるコレクタ電極と前記第２の電極板に接続されるエミッタ電極とは別にゲート電極を有し、
前記ゲート電極は、相互に直角をなす方向に延伸する前記第１の電極板と前記第２の電極板とが前記積層方向で重ならない位置の前記半導体素子の上面に設けられる。
【０００７】
この本発明の半導体モジュールでは、絶縁基板上に導電性部材を介して実装された第１の半導体素子の上面側の電極とこの第１の半導体素子に積層した第２の半導体素子の下面側の電極との間を介在すると共に外部へ延伸した第１の電極板と、第２の半導体素子の上面と導電性部材とに接続されると共に第１の電極板とは異なる方向へ延伸した第２の電極板とを備える。これにより、第１の半導体素子と第２の半導体素子との積層によるモジュール全体の小型化を図りつつ、より簡易に第１の半導体素子と第２の半導体素子とを並列接続することができる。第１の半導体素子をトランジスタ、第２の半導体素子をダイオードとしてもよく、第１の半導体素子をダイオード、第２の半導体素子をトランジスタとしてもよい。
【０００９】
また、本発明の半導体モジュールにおいて、前記第１の電極板および前記第２の電極板は、金属材料により形成されてなるものとすることもできる。こうすれば、第１の電極板および第２の電極板を放熱板として機能させることができ、半導体モジュールの放熱性をより向上させることができる。
【００１０】
更に、本発明の半導体モジュールにおいて、前記トランジスタ素子と前記ダイオード素子とを逆並列接続してなるものとすることもできる。
【００１１】
【発明の実施の形態】
次に、本発明の実施の形態について実施例を用いて説明する。図１は、本発明の一実施例である半導体モジュール２０の構成の概略を示す構成図であり、図２は、図１に例示する半導体モジュール２０のＡ−Ａ断面を示す断面図である。実施例の半導体モジュール２０は、図１および図２に示すように、絶縁基板２２上に導電板２４を介して実装されたトランジスタ素子２６とトランジスタ素子２６の上方に配置されたダイオード素子２８との間に介在する帯状の第１の電極板３０と、ダイオード素子２８の上面と導電板２４とに掛け渡すように接合された帯状の第２の電極板３２とを備えている。具体的には、第１の電極板３０は、トランジスタ素子２６の上面に形成されたエミッタ電極４２とダイオード素子２８の下面に形成されたアノード電極４６とを電気的に接続しており、第２の電極板３２は、トランジスタ素子２６の下面に形成されたコレクタ電極４０に接触している導電板２４とダイオード素子２８の上面に形成されたカソード電極４８とを電気的に接続している。この第１の電極板３０と第２の電極板３２とは、互いに接触しないように略直角の方向に延伸しており、その延伸端はトランジスタ素子２６，ダイオード素子２８に電力を入出力する図示しない外部電極に接続されている。また、トランジスタ素子２６の上面にエミッタ電極４２と共に形成されたゲート電極４４は図示しない金属ワイヤを介して外部電極と接続されている。こうして構成された実施例の半導体モジュール２０は、例えば、図３に示すように６つの半導体モジュール２０で構成されたインバータ装置などに用いることができる。なお、実施例では、絶縁基板２２上に導電板２４を配置しその上にトランジスタ素子２６を実装するものとしたが、絶縁基板２２に金属パターンを形成しその上にトランジスタ素子２６を実装するものとしても構わない。
【００１２】
トランジスタ素子２６は、例えば、ＩＧＢＴ（Insulated Gate Bipolar Transistor）やパワーＭＯＳ（Metal Oxide Semiconductor）、パワートランジスタなどのトランジスタが該当する。
【００１３】
絶縁基板２２の下部には、図示しないが、熱伝導性の高い材料（例えば、ＣｕやＣｕＭｏ合金などの金属やＡｌＳｉＣなどの複合材料など）により形成された放熱板と、放熱板の下部に取り付けられ冷却媒体（例えば、水や空気など）との熱交換によりトランジスタ素子２６やダイオード素子２８からの熱を放熱可能な流路が形成された冷却板とを備えている。
【００１４】
第１の電極板３０と第２の電極板３２は、熱伝導性の高い材料（例えば、Ｍｏ，Ａｌなどの金属）により形成されている。したがって、トランジスタ素子２６，ダイオード素子２８の動作に伴う熱は、前述の絶縁基板２２の下部に取り付けられた放熱板，冷却板によって放熱される他、第１の電極板３０と第２の電極板３２とによっても放熱することができる。
【００１５】
以上説明した実施例の半導体モジュール２０によれば、トランジスタ素子２６の上面（エミッタ電極４２）とダイオード素子２８の下面（アノード電極４６）とに介在する帯状の第１の電極板３０と、ダイオード素子２８の上面（カソード電極４８）とトランジスタ素子２６の下面（コレクタ電極４０）に接触している導電板２４とに接続される帯状の第２の電極板３２とを備えるから、ワイヤボンディングの必要がなく、トランジスタ素子２６とダイオード素子２８とをより簡易に逆並列接続することができる。しかも、第１の電極板３０と第２の電極板３２とを熱伝導性の高い材料により形成したから、絶縁基板２２の下部に設けられる放熱板（冷却板）による放熱のみならず、第１の電極板３０と第２の電極板３２とによりトランジスタ素子２６，ダイオード素子２８からの熱を放熱することができ、実施例の半導体モジュール２０の放熱性をより向上させることができる。
【００１６】
実施例の半導体モジュール２０では、第１の電極板３０と第２の電極板３２とを略直角方向に延伸させた帯状の電極として形成するものとしたが、両電極板の短絡を防止できる方向であれば、必ずしも略直角方向に延伸しないものであってもよい。
【００１７】
実施例の半導体モジュール２０では、トランジスタ素子２６の下面にコレクタ電極４０を形成すると共に上面にエミッタ電極４２を形成し、ダイオード素子２８の下面にアノード電極４６を形成すると共に上面にカソード電極４８を形成するものとしたが、トランジスタ素子の下面にエミッタ電極を形成すると共に上面にコレクタ電極を形成し、ダイオード素子の下面にカソード電極を形成すると共に上面にアノード電極を形成するものとしても構わない。このとき、第１の電極板は、実施例の半導体モジュール２０の第２の電極板３２に対応し、第２の電極板は、実施例の半導体モジュール２０の第１の電極板３０に対応する。
【００１８】
実施例の半導体モジュール２０では、絶縁基板２２上にトランジスタ素子２６を実装すると共にトランジスタ素子２６の上方にダイオード素子２８を配置するものとしたが、絶縁基板上にダイオード素子を実装すると共にダイオード素子の上方にトランジスタ素子を配置するものとしても構わない。図４は、変形例の半導体モジュール１２０の断面構成の概略を示す断面図である。なお、この変形例の半導体モジュール１２０の構成のうち実施例の半導体モジュール２０の構成と同一構成については１００を加えて符号を付し、その詳細な説明は重複するから省略する。変形例の半導体モジュール１２０は、図示するように、絶縁基板１２２上に導電板１２４を介して実装されたダイオード素子１２８とダイオード素子１２８の上方に配置されたトランジスタ素子１２６との間に介在する帯状の第１の電極板１３０と、トランジスタ素子１２６の上面と導電板１２４とを掛け渡すように接続された帯状の第２の電極１３２とを備えている。具体的には、第１の電極板１３０は、ダイオード素子１２８の上面に形成されたカソード電極１４８とトランジスタ素子１２６の下面に形成されたコレクタ電極１４０とを電気的に接続すると共に図示しない外部電極と接続されている。また、第２の電極板１３２は、ダイオード素子１２８の下面に形成されたアノード電極１４６に接触する導電板１２４とトランジスタ素子１２６の上面に形成されたエミッタ電極１４２とを電気的に接続すると共に図示しない外部電極と接続されている。したがって、変形例の半導体モジュール１２０によっても、実施例の半導体モジュール２０と同様に、トランジスタ素子１２６とダイオード素子１２８とを逆並列接続することができる。なお、一般的に発熱量が多いトランジスタ素子を絶縁基板上に実装されたダイオード素子の上方に配置することは放熱性を悪化させることになるが、第１の導電板１３０，第２の導電板１３２を放熱板として機能させることにより、トランジスタ素子を絶縁基板上に実装するものと同様に良好な放熱性を維持することができる。
【００１９】
変形例の半導体モジュール１２０では、トランジスタ素子１２６の下面にコレクタ電極１４０を形成すると共に上面にエミッタ電極１４２を形成し、ダイオード素子１２８の下面にアノード電極１４６を形成すると共に上面にカソード電極１４８を形成するものとしたが、トランジスタ素子の下面にエミッタ電極を形成すると共に上面にコレクタ電極を形成し、ダイオード素子の下面にカソード電極を形成すると共に上面にアノード電極を形成するものとしても構わない。このとき、第１の電極板は、変形例の半導体モジュール１２０の第２の電極板１３２に対応し、第２の電極板は、変形例の半導体モジュール１２０の第１の電極板１３０に対応することになる。
【００２０】
実施例の半導体モジュール２０やその変形例の半導体モジュール１２０では、トランジスタ素子２６，１２６とダイオード素子２８，１２８との逆並列接続に適用するものとしたが、その他の半導体素子の並列接続に適用することも可能である。
【００２１】
以上、本発明の実施の形態について実施例を用いて説明したが、本発明のこうした実施例に何ら限定されるものではなく、本発明の要旨を逸脱しない範囲内において、種々なる形態で実施し得ることは勿論である。
【図面の簡単な説明】
【図１】 本発明の一実施例である半導体モジュール２０の構成の概略を示す構成図である。
【図２】 図１に例示する半導体モジュール２０のＡ−Ａ断面を示す断面図である。
【図３】 実施例の半導体モジュール２０により構成されるインバータ装置を例示する図である。
【図４】 変形例の半導体モジュール１２０の断面を示す断面図である。
【符号の説明】
２０，１２０ 半導体モジュール、２２，１２２ 絶縁基板、２４，１２４ 導電板、２６，１２６ トランジスタ素子、２８，１２８ ダイオード素子、３０，１３０ 第１電極板、３２，１３２ 第２電極板、４０，１４０ コレクタ電極、４２，１４２ エミッタ電極、４４，１４４ ゲート電極、４６，１４６アノード電極、４８，１４８ カソード電極。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor module connection structure, and more specifically, a semiconductor in which a second semiconductor element is stacked on a first semiconductor element mounted on an insulating substrate via a conductive member, and both elements are connected in parallel. The present invention relates to a module joining structure.
[0002]
[Prior art]
As this type of semiconductor module, in order to reduce the area of the module in the lateral direction, a module in which a diode element is stacked via a conductive resin above a transistor element mounted on an insulating substrate has been proposed (special feature). Kai 2000-164800). In this module, a collector electrode is formed on the lower surface of the transistor element, and an emitter electrode and a gate electrode are formed on the upper surface of the transistor element. An anode electrode is formed on the lower surface of the diode element, and a cathode electrode is formed on the upper surface of the diode element. Therefore, the metal pattern on the insulating substrate that contacts the lower surface (collector electrode) of the transistor element, the upper surface (cathode electrode) of the diode element, and the external electrode are connected by an aluminum wire, and the upper surface (emitter electrode) of the transistor element If the conductive resin interposed between the lower surface (anode electrode) of the diode element and the external electrode are connected by an aluminum wire, the transistor element and the diode element can be connected in reverse parallel. It is possible to reduce the size of the inverter circuit configured by using the inverter circuit.
[0003]
[Problems to be solved by the invention]
However, when a large current flows through these elements, for example, when these elements constitute an inverter circuit that drives an automobile travel motor, the number of wires to be connected must be increased in order to suppress electrical resistance. There was a problem that the number of parts increased. In addition, since these elements are usually covered with a sealing gel, the heat generated in the elements must be relied on a heat sink attached to the lower part of the insulating substrate in connection with the conventional aluminum wire. For this reason, there was a problem that sufficient heat dissipation of the semiconductor module could not be secured depending on the driving conditions of the element.
[0004]
One object of the semiconductor module of the present invention is to solve such problems and provide a semiconductor module in which semiconductor elements are connected in parallel more easily while reducing the size of the module. Another object of the semiconductor module of the present invention is to provide a semiconductor module in which the heat dissipation of the element is further improved while downsizing the module.
[0005]
[Means for solving the problems and their functions and effects]
The semiconductor module of the present invention employs the following means in order to achieve at least a part of the above object.
[0006]
The semiconductor module of the present invention is
A semiconductor module bonding structure in which a diode element is stacked on a transistor element mounted on an insulating substrate via a conductive member, and both elements are connected in parallel.
A first electrode plate interposed between the emitter electrode on the upper surface side of the transistor element and the anode electrode on the lower surface side of the diode element and extending outward;
Connected to the cathode electrode on the upper surface side of the diode element and the conductive member in contact with the collector electrode formed on the lower surface of the transistor element, and extends in a direction perpendicular to the first electrode plate The second electrode plate,
The transistor element has a separate gate electrode and the collector electrode connected to the second electrode plate and the emitter electrode connected to the first electrode plate,
The gate electrode, Ru provided on the upper surface of the semiconductor element of the position where the first electrode plate extending in a direction at right angles to each other and said second electrode plate do not overlap each other in the stacking direction.
Also,
A semiconductor module junction structure in which a transistor element is stacked on a diode element mounted on an insulating substrate via a conductive member, and both elements are connected in parallel.
A first electrode plate interposed between the cathode electrode on the upper surface side of the diode element and the collector electrode on the lower surface side of the transistor element and extended outward;
Connected to the emitter electrode on the upper surface side of the transistor element and the conductive member in contact with the anode electrode formed on the lower surface of the diode element, and extends in a direction perpendicular to the first electrode plate The second electrode plate
With
The transistor element has a gate electrode separately from a collector electrode connected to the first electrode plate and an emitter electrode connected to the second electrode plate,
The gate electrode is provided on the upper surface of the semiconductor element at a position where the first electrode plate and the second electrode plate extending in a direction perpendicular to each other do not overlap in the stacking direction.
[0007]
In the semiconductor module of the present invention, the electrode on the upper surface side of the first semiconductor element mounted on the insulating substrate via the conductive member and the lower surface side of the second semiconductor element laminated on the first semiconductor element. A first electrode plate interposed between the electrodes and extended to the outside; a second electrode plate connected to the upper surface of the second semiconductor element and the conductive member and extended in a different direction from the first electrode plate; Electrode plate. Accordingly, the first semiconductor element and the second semiconductor element can be more easily connected in parallel while reducing the size of the entire module by stacking the first semiconductor element and the second semiconductor element. The first semiconductor element may be a transistor, the second semiconductor element may be a diode, the first semiconductor element may be a diode, and the second semiconductor element may be a transistor.
[0009]
In the semiconductor module of the present invention, the first electrode plate and before Symbol second electrode plate may also be composed are formed of a metal material. If it carries out like this, a 1st electrode plate and a 2nd electrode plate can be functioned as a heat sink, and the heat dissipation of a semiconductor module can be improved more.
[0010]
Further, in the semiconductor module of the present invention can also be assumed that previous SL formed by antiparallel connected to the transistor element and said diode element.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described using examples. FIG. 1 is a block diagram showing an outline of the configuration of a semiconductor module 20 according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing an AA cross section of the semiconductor module 20 illustrated in FIG. As shown in FIGS. 1 and 2, the semiconductor module 20 of the embodiment includes a transistor element 26 mounted on an insulating substrate 22 via a conductive plate 24 and a diode element 28 disposed above the transistor element 26. A strip-shaped first electrode plate 30 interposed therebetween, and a strip-shaped second electrode plate 32 joined so as to span the upper surface of the diode element 28 and the conductive plate 24 are provided. Specifically, the first electrode plate 30 electrically connects the emitter electrode 42 formed on the upper surface of the transistor element 26 and the anode electrode 46 formed on the lower surface of the diode element 28. The electrode plate 32 electrically connects the conductive plate 24 in contact with the collector electrode 40 formed on the lower surface of the transistor element 26 and the cathode electrode 48 formed on the upper surface of the diode element 28. The first electrode plate 30 and the second electrode plate 32 extend in a substantially perpendicular direction so as not to contact each other, and the extended ends thereof input and output power to the transistor element 26 and the diode element 28. Not connected to external electrode. A gate electrode 44 formed on the upper surface of the transistor element 26 together with the emitter electrode 42 is connected to an external electrode via a metal wire (not shown). The semiconductor module 20 of the embodiment configured in this way can be used for an inverter device including six semiconductor modules 20 as shown in FIG. 3, for example. In the embodiment, the conductive plate 24 is disposed on the insulating substrate 22 and the transistor element 26 is mounted thereon. However, the metal pattern is formed on the insulating substrate 22 and the transistor element 26 is mounted thereon. It does not matter.
[0012]
The transistor element 26 corresponds to a transistor such as an IGBT (Insulated Gate Bipolar Transistor), a power MOS (Metal Oxide Semiconductor), or a power transistor.
[0013]
Although not shown, a heat sink made of a material having high thermal conductivity (for example, a metal such as Cu or CuMo alloy or a composite material such as AlSiC) is attached to the lower portion of the insulating substrate 22 and attached to the lower portion of the heat sink. And a cooling plate in which a flow path capable of radiating heat from the transistor element 26 and the diode element 28 is formed by heat exchange with a cooling medium (for example, water or air).
[0014]
The first electrode plate 30 and the second electrode plate 32 are formed of a material having high thermal conductivity (for example, a metal such as Mo or Al). Therefore, the heat accompanying the operation of the transistor element 26 and the diode element 28 is dissipated by the heat radiating plate and the cooling plate attached to the lower portion of the insulating substrate 22, and the first electrode plate 30 and the second electrode plate. 32 can also dissipate heat.
[0015]
According to the semiconductor module 20 of the embodiment described above, the band-shaped first electrode plate 30 interposed between the upper surface (emitter electrode 42) of the transistor element 26 and the lower surface (anode electrode 46) of the diode element 28, the diode element 28 is provided with a belt-like second electrode plate 32 connected to the upper surface (cathode electrode 48) 28 and the conductive plate 24 in contact with the lower surface (collector electrode 40) of the transistor element 26. Thus, the transistor element 26 and the diode element 28 can be connected in reverse parallel more easily. In addition, since the first electrode plate 30 and the second electrode plate 32 are formed of a material having high thermal conductivity, not only the heat radiation by the heat radiation plate (cooling plate) provided under the insulating substrate 22 but also the first The electrode plate 30 and the second electrode plate 32 can radiate heat from the transistor element 26 and the diode element 28, and the heat dissipation of the semiconductor module 20 of the embodiment can be further improved.
[0016]
In the semiconductor module 20 of the embodiment, the first electrode plate 30 and the second electrode plate 32 are formed as belt-like electrodes extending in a substantially right angle direction, but a direction in which a short circuit between both electrode plates can be prevented. If it is, it may not necessarily extend in a substantially perpendicular direction.
[0017]
In the semiconductor module 20 of the embodiment, the collector electrode 40 is formed on the lower surface of the transistor element 26, the emitter electrode 42 is formed on the upper surface, the anode electrode 46 is formed on the lower surface of the diode element 28, and the cathode electrode 48 is formed on the upper surface. However, the emitter electrode may be formed on the lower surface of the transistor element, the collector electrode may be formed on the upper surface, the cathode electrode may be formed on the lower surface of the diode element, and the anode electrode may be formed on the upper surface. At this time, the first electrode plate corresponds to the second electrode plate 32 of the semiconductor module 20 of the embodiment, and the second electrode plate corresponds to the first electrode plate 30 of the semiconductor module 20 of the embodiment. .
[0018]
In the semiconductor module 20 of the embodiment, the transistor element 26 is mounted on the insulating substrate 22 and the diode element 28 is disposed above the transistor element 26. However, the diode element is mounted on the insulating substrate and the diode element 28 A transistor element may be disposed above. FIG. 4 is a cross-sectional view illustrating an outline of a cross-sectional configuration of a semiconductor module 120 according to a modification. In addition, about the structure same as the structure of the semiconductor module 20 of an Example among the structures of the semiconductor module 120 of this modification, 100 is attached | subjected and a code | symbol is attached | subjected and the detailed description is abbreviate | omitted. As shown in the figure, the semiconductor module 120 according to the modified example has a belt-like shape interposed between a diode element 128 mounted on an insulating substrate 122 via a conductive plate 124 and a transistor element 126 disposed above the diode element 128. The first electrode plate 130 and a strip-shaped second electrode 132 connected so as to bridge the upper surface of the transistor element 126 and the conductive plate 124 are provided. Specifically, the first electrode plate 130 electrically connects the cathode electrode 148 formed on the upper surface of the diode element 128 and the collector electrode 140 formed on the lower surface of the transistor element 126, as well as an external electrode (not shown). Connected with. The second electrode plate 132 electrically connects the conductive plate 124 in contact with the anode electrode 146 formed on the lower surface of the diode element 128 and the emitter electrode 142 formed on the upper surface of the transistor element 126 and is shown in the figure. Not connected with external electrode. Therefore, also by the semiconductor module 120 of the modified example, the transistor element 126 and the diode element 128 can be connected in reverse parallel as in the semiconductor module 20 of the embodiment. In general, disposing a transistor element that generates a large amount of heat above a diode element mounted on an insulating substrate deteriorates heat dissipation, but the first conductive plate 130 and the second conductive plate By causing 132 to function as a heat sink, good heat dissipation can be maintained as in the case where the transistor element is mounted on an insulating substrate.
[0019]
In the semiconductor module 120 of the modified example, the collector electrode 140 is formed on the lower surface of the transistor element 126, the emitter electrode 142 is formed on the upper surface, the anode electrode 146 is formed on the lower surface of the diode element 128, and the cathode electrode 148 is formed on the upper surface. However, the emitter electrode may be formed on the lower surface of the transistor element, the collector electrode may be formed on the upper surface, the cathode electrode may be formed on the lower surface of the diode element, and the anode electrode may be formed on the upper surface. At this time, the first electrode plate corresponds to the second electrode plate 132 of the semiconductor module 120 of the modified example, and the second electrode plate corresponds to the first electrode plate 130 of the semiconductor module 120 of the modified example. It will be.
[0020]
In the semiconductor module 20 of the embodiment and the semiconductor module 120 of the modified example thereof, the transistor elements 26 and 126 and the diode elements 28 and 128 are applied to the antiparallel connection. However, the semiconductor module 20 is applied to the parallel connection of other semiconductor elements. It is also possible.
[0021]
The embodiments of the present invention have been described using the embodiments. However, the present invention is not limited to these embodiments and can be implemented in various forms without departing from the gist of the present invention. Of course you get.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing an outline of a configuration of a semiconductor module 20 according to an embodiment of the present invention.
2 is a cross-sectional view showing an AA cross section of the semiconductor module 20 illustrated in FIG. 1; FIG.
FIG. 3 is a diagram illustrating an inverter device including the semiconductor module 20 according to the embodiment.
FIG. 4 is a cross-sectional view showing a cross section of a modified semiconductor module 120;
[Explanation of symbols]
20, 120 Semiconductor module, 22, 122 Insulating substrate, 24, 124 Conductive plate, 26, 126 Transistor element, 28, 128 Diode element, 30, 130 First electrode plate, 32, 132 Second electrode plate, 40, 140 Collector Electrode, 42, 142 Emitter electrode, 44, 144 Gate electrode, 46, 146 Anode electrode, 48, 148 Cathode electrode.

Claims (4)

絶縁基板上に導電性部材を介して実装されたトランジスタ素子にダイオード素子を積層して両素子を並列接続してなる半導体モジュールの接合構造であって、
前記トランジスタ素子の上面側のエミッタ電極と前記ダイオード素子の下面側のアノード電極との間に介在すると共に外部へ延伸した第１の電極板と、
前記ダイオード素子の上面側のカソード電極と、前記トランジスタ素子の下面に形成されたコレクタ電極に接触している前記導電性部材とに接続されると共に前記第１の電極板と直角をなす方向へ延伸した第２の電極板と
を備え、
前記トランジスタ素子は、前記第１の電極板に接続されるエミッタ電極と前記第２の電極板に接続されるコレクタ電極とは別にゲート電極を有し、
前記ゲート電極は、相互に直角をなす方向に延伸する前記第１の電極板と前記第２の電極板とが前記積層方向で重ならない位置の前記半導体素子の上面に設けられることを特徴とする半導体モジュールの接合構造。A semiconductor module bonding structure in which a diode element is stacked on a transistor element mounted on an insulating substrate via a conductive member, and both elements are connected in parallel.
A first electrode plate interposed between the emitter electrode on the upper surface side of the transistor element and the anode electrode on the lower surface side of the diode element and extending outward;
Connected to the cathode electrode on the upper surface side of the diode element and the conductive member in contact with the collector electrode formed on the lower surface of the transistor element, and extends in a direction perpendicular to the first electrode plate The second electrode plate,
The transistor element has a separate gate electrode and the collector electrode connected to the second electrode plate and the emitter electrode connected to the first electrode plate,
The gate electrode is provided on an upper surface of the semiconductor element at a position where the first electrode plate and the second electrode plate extending in a direction perpendicular to each other do not overlap in the stacking direction. Bonding structure for semiconductor modules. 絶縁基板上に導電性部材を介して実装されたダイオード素子にトランジスタ素子を積層して両素子を並列接続してなる半導体モジュールの接合構造であって、
前記ダイオード素子の上面側のカソード電極と前記トランジスタ素子の下面側のコレクタ電極との間に介在すると共に外部へ延伸した第１の電極板と、
前記トランジスタ素子の上面側のエミッタ電極と、前記ダイオード素子の下面に形成されたアノード電極に接触している前記導電性部材とに接続されると共に前記第１の電極板と直角をなす方向へ延伸した第２の電極板と
を備え、
前記トランジスタ素子は、前記第１の電極板に接続されるコレクタ電極と前記第２の電極板に接続されるエミッタ電極とは別にゲート電極を有し、
前記ゲート電極は、相互に直角をなす方向に延伸する前記第１の電極板と前記第２の電極板とが前記積層方向で重ならない位置の前記半導体素子の上面に設けられることを特徴とする半導体モジュールの接合構造。 A semiconductor module junction structure in which a transistor element is stacked on a diode element mounted on an insulating substrate via a conductive member, and both elements are connected in parallel.
A first electrode plate interposed between the cathode electrode on the upper surface side of the diode element and the collector electrode on the lower surface side of the transistor element and extended outward;
Connected to the emitter electrode on the upper surface side of the transistor element and the conductive member in contact with the anode electrode formed on the lower surface of the diode element, and extends in a direction perpendicular to the first electrode plate The second electrode plate
With
The transistor element has a gate electrode separately from a collector electrode connected to the first electrode plate and an emitter electrode connected to the second electrode plate,
The gate electrode is provided on an upper surface of the semiconductor element at a position where the first electrode plate and the second electrode plate extending in a direction perpendicular to each other do not overlap in the stacking direction. Semiconductor module joint structure. 請求項１または２記載の半導体モジュールの接合構造であって、
前記第１の電極板および前記第２の電極板は、金属材料により形成されてなる半導体モジュールの接合構造。It is a junction structure of a semiconductor module according to claim 1 or 2,
It said first electrode plate and before Symbol second electrode plate, the bonding structure of a semiconductor module formed by forming a metal material. 請求項１ないし３のいずれか１に記載の半導体モジュールの接合構造であって、
前記トランジスタ素子と前記ダイオード素子とを逆並列接続してなる半導体モジュールの接合構造。A junction structure for a semiconductor module according to any one of claims 1 to 3 ,
Junction structure of a semiconductor module formed by reverse parallel connection of the front Symbol transistor element and the diode element.
JP2001394883A 2001-12-26 2001-12-26 Semiconductor module bonding structure Expired - Fee Related JP4140238B2 (en)

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