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JP4448433B2 - Manufacturing method of thermal head - Google Patents

Manufacturing method of thermal head Download PDF

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Publication number
JP4448433B2
JP4448433B2 JP2004350768A JP2004350768A JP4448433B2 JP 4448433 B2 JP4448433 B2 JP 4448433B2 JP 2004350768 A JP2004350768 A JP 2004350768A JP 2004350768 A JP2004350768 A JP 2004350768A JP 4448433 B2 JP4448433 B2 JP 4448433B2
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electrode
group
thermal head
manufacturing
resistor
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JP2006159467A (en
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進矢 横山
悟 佐々木
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Alps Alpine Co Ltd
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Alps Electric Co Ltd
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Priority to US11/287,800 priority patent/US20060119666A1/en
Priority to CNB2005101289594A priority patent/CN100413692C/en
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/335Structure of thermal heads
    • B41J2/33505Constructional details
    • B41J2/3351Electrode layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/335Structure of thermal heads
    • B41J2/33555Structure of thermal heads characterised by type
    • B41J2/3357Surface type resistors

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Description

本発明は、例えば熱転写型プリンタに搭載されるサーマルヘッドの製造方法に関する。 The present invention relates to a method for manufacturing a thermal head mounted on, for example, a thermal transfer printer.

サーマルヘッドは、放熱性に優れた基板上に、例えばガラス等の高断熱材料からなる蓄熱層と、通電により発熱する複数の発熱抵抗体と、各発熱抵抗体に個別に導通接続した個別電極群と、全発熱抵抗体に共通電位を与えるコモン電極群とを備え、コモン電極及び個別電極を介して発熱させた発熱抵抗体を、インクリボンとプラテンローラに巻きつけられた状態の被印刷物に圧接させることで印刷動作する。コモン電極と個別電極は、一般に、発熱抵抗体の抵抗長方向の両端部にそれぞれ接続されて該抵抗長方向に一直線上に配置されるが、基板サイズを小さくし、且つ、発熱抵抗体を基板の端に配置するために、コモン電極を折り返す構造も提案されている。この電極折返構造では、例えば、互いの一端部が導体により接続された2つの発熱抵抗体で1つの印刷ドットを構成し、一方の発熱抵抗体の他端部に個別電極、他方の発熱抵抗体の他端部にコモン電極をそれぞれ接続している。   The thermal head has a heat storage layer made of a highly heat-insulating material such as glass, a plurality of heating resistors that generate heat when energized, and a group of individual electrodes that are individually connected to each heating resistor on a substrate with excellent heat dissipation. And a common electrode group that applies a common potential to all the heating resistors, and the heating resistor that has generated heat through the common electrode and the individual electrodes is pressed against the printed material wound around the ink ribbon and the platen roller. Printing operation. The common electrode and the individual electrode are generally connected to both ends in the resistance length direction of the heating resistor and arranged in a straight line in the resistance length direction, but the substrate size is reduced and the heating resistor is mounted on the substrate. In order to arrange it at the end of the substrate, a structure in which the common electrode is folded back has also been proposed. In this electrode folding structure, for example, one printing dot is constituted by two heating resistors whose one ends are connected by a conductor, and an individual electrode and the other heating resistor are formed at the other end of one heating resistor. A common electrode is connected to the other end of each.

このようなサーマルヘッドは、例えば下記工程により形成することができる。   Such a thermal head can be formed by, for example, the following steps.

先ず、蓄熱層を有する基板上に全面的に抵抗体膜を成膜し、抵抗体膜の上に、形成すべき発熱抵抗体の抵抗長を規定する絶縁バリア層を形成する。絶縁バリア層で覆われた抵抗体膜の領域が、後に複数の発熱抵抗体となる。絶縁バリア層を形成したら、絶縁バリア層及び抵抗体膜の上にレジスト膜を全面的に形成し、露光及び現像してレジストパターンを形成する。レジスト膜にはポジ型を用いるのが一般的であり、レジスト膜の露光された部分が現像液によって溶ける。続いて、レジストパターンから露出している抵抗体膜を例えばエッチングにより除去し、該レジストパターンを除去する。レジストパターン除去後は、露出している蓄熱層、抵抗体膜及び絶縁バリア層の上に全面的に導体層を成膜する。続いて、導体層の一部を除去し、隣接する発熱抵抗体を導通接続する導体と、複数の発熱抵抗体に共通に接続するコモン電極群と、各発熱抵抗体に個別に接続する個別電極群とを形成する。上記導体で接続された一対の発熱抵抗体が印刷ドットを構成し、この印刷ドットに対してコモン電極と個別電極は同一方向で接続する。各個別電極の一端部(発熱抵抗体との接続側とは反対側の端部)には、さらに、複数の発熱抵抗体への通電制御を行う複数の駆動ICをボンディング接続するための電極パッドを形成する。コモン電極群及び個別電極群は複数の小グループ電極群毎に間隔をおいて配列され、駆動ICは、分割された小グループ電極群毎に備えられて、該小グループ電極群に属する各個別電極を選択的に通電する。
特開平8−127144号公報 特開平10−188395号公報
First, a resistor film is entirely formed on a substrate having a heat storage layer, and an insulating barrier layer that defines the resistance length of the heating resistor to be formed is formed on the resistor film. The region of the resistor film covered with the insulating barrier layer later becomes a plurality of heating resistors. When the insulating barrier layer is formed, a resist film is formed on the entire surface of the insulating barrier layer and the resistor film, and exposed and developed to form a resist pattern. As the resist film, a positive type is generally used, and the exposed portion of the resist film is dissolved by the developer. Subsequently, the resistor film exposed from the resist pattern is removed by, for example, etching, and the resist pattern is removed. After the resist pattern is removed, a conductor layer is formed on the entire surface of the exposed heat storage layer, resistor film, and insulating barrier layer. Subsequently, a part of the conductor layer is removed, a conductor for conductively connecting adjacent heating resistors, a common electrode group commonly connected to a plurality of heating resistors, and an individual electrode individually connected to each heating resistor Form a group. A pair of heating resistors connected by the conductor constitutes a printing dot, and the common electrode and the individual electrode are connected to the printing dot in the same direction. An electrode pad for bonding and connecting a plurality of drive ICs for controlling energization to the plurality of heating resistors on one end of each individual electrode (the end opposite to the side connected to the heating resistors) Form. The common electrode group and the individual electrode group are arranged at intervals for each of the plurality of small group electrode groups, and the drive IC is provided for each of the divided small group electrode groups, and each individual electrode belonging to the small group electrode group Selectively energize.
JP-A-8-127144 Japanese Patent Laid-Open No. 10-188395

上記従来構造では、隣接する小グループ電極群によって挟まれた、コモン電極、個別電極及び電極パッドが存在しないダミー領域には、抵抗体膜がベタ状に残されていた。このため、レジスト現像時に、所定のピッチ間隔でレジストパターンが形成される実領域とレジスト膜をベタ状のまま残すダミー領域との境界付近で現像液の濡れ性が異なり、ダミー領域近傍に形成されるレジストパターンが乱れてしまう虞がある。レジストパターンの乱れにより形成される発熱抵抗体の形状及び大きさがずれると、発熱抵抗体の発熱量がばらついて印刷濃度にムラができ、印刷品質が劣化する。   In the conventional structure described above, the resistor film is left in a solid shape in the dummy region sandwiched between adjacent small group electrode groups where the common electrode, the individual electrode, and the electrode pad do not exist. For this reason, during resist development, the developer wettability differs near the boundary between the actual area where the resist pattern is formed at a predetermined pitch interval and the dummy area where the resist film remains solid, and is formed near the dummy area. The resist pattern may be disturbed. If the shape and size of the heat generating resistor formed due to the disturbance of the resist pattern are deviated, the amount of heat generated by the heat generating resistor varies, resulting in uneven printing density, and the print quality deteriorates.

本発明は、上記課題に鑑みてなされたものであり、抵抗体パターン形状が高精度に規定され、印刷濃度ムラを抑制できるサーマルヘッドの製造方法を得ることを目的とする。 The present invention has been made in view of the above problems, and an object of the present invention is to obtain a method for manufacturing a thermal head in which a resistor pattern shape is defined with high accuracy and print density unevenness can be suppressed.

本発明は、発熱抵抗体(抵抗体パターン)を形成する際のレジスト露光現像時に現像液の濡れ性が一様であれば、発熱抵抗体を高精度に規定できることに着目してなされたものである。   The present invention has been made in view of the fact that the heating resistor can be defined with high precision if the developer wettability is uniform during resist exposure and development when forming the heating resistor (resistor pattern). is there.

すなわち、本発明は、所定ピッチで配置した印刷ドット群と、全印刷ドットに共通電位を与えるコモン電極群と、各印刷ドットに個別に接続された個別電極群と、各個別電極を介して印刷ドットを選択的に通電する駆動ICとを備え、コモン電極群及び個別電極群は複数の小グループ電極群毎に間隔をおいて配列され駆動ICは、分割された小グループ電極群毎に備えられていて隣接する小グループ電極群によって挟まれた領域には、所定のピッチ間隔で、印刷ドット及び前記駆動ICの両方に非接続のダミー抵抗体パターンを有するサーマルヘッドを製造する方法であって、フォトリソグラフィ技術を用いて、印刷ドットを構成する抵抗体パターンと同時に、ダミー抵抗体パターンを形成することを特徴としている。 That is, the present invention prints via a print dot group arranged at a predetermined pitch, a common electrode group that applies a common potential to all print dots, an individual electrode group that is individually connected to each print dot, and each individual electrode. A drive IC for selectively energizing dots, the common electrode group and the individual electrode group are arranged at intervals for each of the plurality of small group electrode groups , and the drive IC is provided for each of the divided small group electrode groups. have been, the sandwiched by adjacent small group electrode group region, there a method of manufacturing a thermal head having a predetermined at a pitch interval, printing dots and the dummy resistor pattern of the non-connected to both of the drive IC Thus, a dummy resistor pattern is formed at the same time as the resistor pattern constituting the printing dots by using a photolithography technique .

コモン電極群及び個別電極群は、抵抗体パターンの上に積層形成することが実際的である。そして、ダミー抵抗体パターンは、小グループ電極群に属するコモン電極及び個別電極の最小ピッチ間隔と同一のピッチ間隔で形成されていることが好ましい。例えば小グループ電極群でコモン電極と個別電極が交互に配置されている場合には、コモン電極と個別電極のピッチ間隔が最小ピッチ間隔となる。 It is practical that the common electrode group and the individual electrode group are stacked on the resistor pattern. The dummy resistor patterns are preferably formed at the same pitch interval as the minimum pitch interval of the common electrodes and individual electrodes belonging to the small group electrode group. For example, when the common electrode and the individual electrode are alternately arranged in the small group electrode group, the pitch interval between the common electrode and the individual electrode is the minimum pitch interval.

またダミー抵抗体パターンは、上記コモン電極及び個別電極と平行に配列されることが好ましく、隣接する小グループ電極群の間の中央位置に関して対称形状をなすように配置することができる。   The dummy resistor patterns are preferably arranged in parallel with the common electrodes and the individual electrodes, and can be arranged so as to have a symmetrical shape with respect to the center position between adjacent small group electrode groups.

印刷ドットは、導体により互いの一端側が接続された2つの発熱抵抗体を有し、この一方の発熱抵抗体の他端側に個別電極が接続され、他方の発熱抵抗体の他端側にコモン電極が接続されていることが実際的である。   The printed dot has two heating resistors whose one ends are connected to each other by a conductor, and an individual electrode is connected to the other end of this one heating resistor, and the other end of the other heating resistor is common. It is practical that the electrodes are connected.

本発明によれば、抵抗体パターン形状が高精度に規定され、印刷濃度ムラを抑制できるサーマルヘッドの製造方法を得ることができる。 ADVANTAGE OF THE INVENTION According to this invention, the resistor pattern shape can be prescribed | regulated with high precision and the manufacturing method of the thermal head which can suppress printing density nonuniformity can be obtained.

図1は本発明を適用したサーマルヘッドの全体構成を示す概略構成図であり、図2及び図3は同サーマルヘッド(保護層を除く)の構成を示す模式平面図及び模式断面図である。   FIG. 1 is a schematic configuration diagram showing an overall configuration of a thermal head to which the present invention is applied, and FIGS. 2 and 3 are a schematic plan view and a schematic sectional view showing the configuration of the thermal head (excluding a protective layer).

サーマルヘッド1は、Siやセラミック材料、金属材料等からなる放熱性に優れた基板2上に例えばガラス等の断熱材料からなる蓄熱層3を有し、この蓄熱層3の上に、図1及び図2の左右方向に微小間隔をあけて一列に配置された複数の発熱抵抗体4を備えている。各発熱抵抗体4は、Ta2N又はTa−SiO2等のサーメット材料を用いて蓄熱層3の上に部分的に形成された抵抗体パターン40の一部であり、該表面が絶縁バリア層5により覆われている。抵抗体パターン40は、発熱抵抗体4となる領域外では、導体(コンタクト導体6、個別電極7、コモン電極8及びコモンライン9)の形成領域に存在し(図4参照)、該導体と蓄熱層3との密着性を高める密着層として機能している。絶縁バリア層5は、例えばSiO2、SiON、SiAlON等の絶縁材料により形成されていて、各発熱抵抗体4の平面的な大きさ(長さ寸法L、幅寸法W)を規定している。隣接する発熱抵抗体4の間には、蓄熱層3が露出するギャップ領域αが存在している。本実施形態では、隣接する一対の発熱抵抗体4(4a、4b)により1つの印刷ドットDが形成され、複数の印刷ドットDは、発熱抵抗体4の通電方向と直交する方向(図1の左右方向)に配列されている。 The thermal head 1 has a heat storage layer 3 made of a heat insulating material such as glass on a substrate 2 made of Si, a ceramic material, a metal material or the like and excellent in heat dissipation, and on the heat storage layer 3, FIG. A plurality of heating resistors 4 arranged in a line at a minute interval in the left-right direction in FIG. 2 are provided. Each heating resistor 4 is a part of a resistor pattern 40 partially formed on the heat storage layer 3 using a cermet material such as Ta 2 N or Ta—SiO 2 , and the surface thereof is an insulating barrier layer. 5 is covered. The resistor pattern 40 exists in a region where a conductor (contact conductor 6, individual electrode 7, common electrode 8, and common line 9) is formed outside the region to be the heating resistor 4 (see FIG. 4). It functions as an adhesion layer that improves adhesion with the layer 3. The insulating barrier layer 5 is made of an insulating material such as SiO 2 , SiON, or SiAlON, for example, and defines the planar size (length dimension L, width dimension W) of each heating resistor 4. Between adjacent heating resistors 4, there is a gap region α where the heat storage layer 3 is exposed. In the present embodiment, one printing dot D is formed by a pair of adjacent heating resistors 4 (4a, 4b), and the plurality of printing dots D are in a direction orthogonal to the energization direction of the heating resistor 4 (in FIG. 1). Arranged in the horizontal direction).

一対の発熱抵抗体4a、4bは、図2に示すように、互いの抵抗長方向の一端部及びその隙間が矩形状のコンタクト導体6により覆われており、一方の発熱抵抗体4aの抵抗長方向の他端部には個別電極7が接続され、他方の発熱抵抗体4bの他端部にはコモン電極8が接続されている。この個別電極7とコモン電極8は、印刷ドットDに対して同一方向で接続され、ドット配列方向に交互に整列されている。個別電極7及びコモン電極8の間にはギャップ領域αが存在している。   As shown in FIG. 2, the pair of heating resistors 4a and 4b have one end in the resistance length direction and a gap between them covered with a rectangular contact conductor 6, and the resistance length of one heating resistor 4a. The individual electrode 7 is connected to the other end portion in the direction, and the common electrode 8 is connected to the other end portion of the other heating resistor 4b. The individual electrode 7 and the common electrode 8 are connected to the printing dot D in the same direction and are alternately arranged in the dot arrangement direction. A gap region α exists between the individual electrode 7 and the common electrode 8.

コモン電極8は、隣接する2つの印刷ドットD毎に設けられ、隣接する2つの発熱抵抗体4bに接続したU字形状部と、該U字形状部から発熱抵抗体4bの抵抗長方向に平行な方向に長く延びる直線部とを有する略Y字形をなしている。各コモン電極8は、発熱抵抗体4b側とは反対側の端部でコモンライン9に接続されている。コモンライン9は、ドット配列方向に延びて複数のコモン電極8に共通に接続され、その長手方向(図1の左右方向)の両端から給電される。基板2とは別に設けた外部電源からの電力は、コモンライン9及び各コモン電極8を介して、全ての印刷ドットDに供給される。本実施形態のコンタクト導体6、個別電極7及びコモン電極8は、各発熱抵抗体4側の端部が絶縁バリア層5上にオーバーレイして形成されている。なお、図1においてコモン電極8及びコモンライン9は図示省略されている。   The common electrode 8 is provided for every two adjacent printing dots D, and is connected to two adjacent heating resistors 4b, and is parallel to the resistance length direction of the heating resistor 4b from the U-shaped portion. It has a substantially Y-shape having a straight portion extending in a long direction. Each common electrode 8 is connected to the common line 9 at the end opposite to the heating resistor 4b side. The common line 9 extends in the dot arrangement direction and is commonly connected to the plurality of common electrodes 8, and is fed from both ends in the longitudinal direction (left and right direction in FIG. 1). Electric power from an external power source provided separately from the substrate 2 is supplied to all the printing dots D via the common line 9 and each common electrode 8. The contact conductor 6, the individual electrode 7, and the common electrode 8 of the present embodiment are formed by overlaying the end portions on the side of each heating resistor 4 on the insulating barrier layer 5. In FIG. 1, the common electrode 8 and the common line 9 are not shown.

個別電極7は、各印刷ドットD毎に設けられており、その発熱抵抗体4a側とは反対側の端部に、駆動IC21をワイヤーボンディングするための電極パッド10が、印刷ドットDの配列方向と平行な方向に、発熱抵抗体4のピッチ間隔よりも広いピッチ間隔で千鳥状に互い違いに配置されている。この個別電極7及びコモン電極8は、複数の小グループ電極群A(A1〜A4)毎に、間隔をおいて配列されている。   The individual electrode 7 is provided for each printing dot D, and an electrode pad 10 for wire bonding the drive IC 21 to the end opposite to the heating resistor 4a side is arranged in the arrangement direction of the printing dots D. Are alternately arranged in a staggered manner at a pitch interval wider than the pitch interval of the heat generating resistors 4 in a direction parallel to. The individual electrode 7 and the common electrode 8 are arranged at intervals for each of the plurality of small group electrode groups A (A1 to A4).

駆動IC21は、複数の発熱抵抗体4への通電/非通電を切り替えるスイッチング素子である。この駆動IC21は、基板2とは別体の駆動ユニット20に、分割された小グループ電極群A1〜A4毎に備えられており、該小グループ電極群A1〜A4に属する各個別電極7を選択的に通電する。駆動IC21のピッチ間隔は、小グループ電極群A1〜A4のピッチ間隔に対応している。なお、図1はサーマルヘッド1の構造を簡略的に示したものであり、実際の電極パッドと駆動ICを結ぶワイヤーは約50μm程度と非常に微小間隔で設けられている。   The drive IC 21 is a switching element that switches between energization / non-energization of the plurality of heating resistors 4. The drive IC 21 is provided for each of the divided small group electrode groups A1 to A4 in a separate drive unit 20 from the substrate 2, and selects each individual electrode 7 belonging to the small group electrode groups A1 to A4. Energized. The pitch interval of the drive IC 21 corresponds to the pitch interval of the small group electrode groups A1 to A4. FIG. 1 shows the structure of the thermal head 1 in a simplified manner, and the wires connecting the actual electrode pads and the drive IC are provided at a very small interval of about 50 μm.

上記コンタクト導体6、個別電極7、コモン電極8及びコモンライン9は、抵抗体パターン40上に、例えばAl、Cr、Ti、Ni、W等の導電材料により形成されている。図示されていないが、絶縁バリア層5、コンタクト導体6、個別電極7、コモン電極8及びコモンライン9の上には、プラテンローラとの接触等から保護する耐磨耗保護層が形成されている。   The contact conductor 6, the individual electrode 7, the common electrode 8, and the common line 9 are formed on the resistor pattern 40 by a conductive material such as Al, Cr, Ti, Ni, and W, for example. Although not shown, a wear-resistant protective layer is formed on the insulating barrier layer 5, the contact conductor 6, the individual electrode 7, the common electrode 8, and the common line 9 to protect against contact with the platen roller. .

上記構成のサーマルヘッド1では、一対の発熱抵抗体4a、4bからなる印刷ドットDのドット配列方向のピッチ間隔に比して駆動IC21のピッチ間隔が狭いので、隣接する小グループ電極群A(該小グループ電極群Aに属する個別電極7及びコモン電極8の下に形成されている抵抗体パターン40)によって挟まれた領域が生ずる。この隣接する小グループ電極群Aによって挟まれた領域には、ドット配列方向に直交する方向において発熱抵抗体から電極パッドまでの間に位置させて、印刷ドットD及び電極パッド10の両方に非接続のダミー抵抗体パターン41が形成されている。図2、4では、ダミー抵抗体パターン41を塗りつぶして示してある。   In the thermal head 1 configured as described above, the pitch interval of the drive ICs 21 is narrower than the pitch interval in the dot arrangement direction of the print dots D composed of the pair of heating resistors 4a and 4b. A region sandwiched between the individual electrode 7 belonging to the small group electrode group A and the resistor pattern 40 formed under the common electrode 8 is generated. The region sandwiched between the adjacent small group electrode groups A is positioned between the heating resistor and the electrode pad in a direction orthogonal to the dot arrangement direction, and is not connected to both the printing dot D and the electrode pad 10. The dummy resistor pattern 41 is formed. 2 and 4, the dummy resistor pattern 41 is shown in a solid color.

図4は、抵抗体パターン40及びダミー抵抗体パターン41を示す平面図である。ダミー抵抗体パターン41は、蓄熱層3の上に全面的に形成した抵抗体膜をフォトリソグラフィによりパターニングして抵抗体パターン40と同時に形成されるもので、該形成時に抵抗体パターン40のパターン精度を高める機能を有している。具体的にダミー抵抗体パターン41は、抵抗体パターン40と平行に且つ抵抗体パターン40と同一のピッチ間隔で配列され、隣接する小グループ電極群Aの間の中央位置Cに関して対称形状をなしている。以下では、抵抗体パターン40が形成されている領域を「実領域(=小グループ電極群A)」といい、ダミー抵抗体パターン41が形成されている領域を「ダミー領域」ということにする。   FIG. 4 is a plan view showing the resistor pattern 40 and the dummy resistor pattern 41. The dummy resistor pattern 41 is formed simultaneously with the resistor pattern 40 by patterning the resistor film formed on the entire surface of the heat storage layer 3 by photolithography, and the pattern accuracy of the resistor pattern 40 at the time of the formation. It has a function to improve. Specifically, the dummy resistor pattern 41 is arranged in parallel with the resistor pattern 40 and at the same pitch interval as the resistor pattern 40, and has a symmetrical shape with respect to the central position C between the adjacent small group electrode groups A. Yes. Hereinafter, the region where the resistor pattern 40 is formed is referred to as “real region (= small group electrode group A)”, and the region where the dummy resistor pattern 41 is formed is referred to as “dummy region”.

次に、図5及び図6を参照し、本実施形態によるサーマルヘッド1の製造方法、特にダミー抵抗体パターン41の製造工程について説明する。   Next, with reference to FIGS. 5 and 6, the manufacturing method of the thermal head 1 according to the present embodiment, particularly, the manufacturing process of the dummy resistor pattern 41 will be described.

先ず、図5に示すように、蓄熱層3を有する基板2の上にTa2N又はTa−SiO2等のサーメット材料からなる抵抗体膜4’を全面的に成膜し、抵抗体膜4’の上に、形成すべき発熱抵抗体の抵抗長Lを規定する絶縁バリア層5を形成する。絶縁バリア層5で覆われた抵抗体膜4’の領域は、後に複数の発熱抵抗体4となる。 First, as shown in FIG. 5, a resistor film 4 ′ made of a cermet material such as Ta 2 N or Ta—SiO 2 is formed on the entire surface of the substrate 2 having the heat storage layer 3. An insulating barrier layer 5 that defines the resistance length L of the heat generating resistor to be formed is formed on '. The region of the resistor film 4 ′ covered with the insulating barrier layer 5 later becomes a plurality of heating resistors 4.

次に、図6に示すように、絶縁バリア層5を含む抵抗体膜4’の表面に全面的にレジスト膜を成膜し、露光及び現像してレジストパターンRを形成する。レジスト膜にはポジ型を用いることが一般的であり、レジスト膜の露光された部分が現像液によって溶ける。レジストパターンRには、隣り合う発熱抵抗体間、コモン電極及び個別電極間のギャップ領域αに対応する実領域形成スリット群S1を設け、その隣接する実領域形成スリット群S1の間に、該実領域形成スリット群S1の端のスリットに平行で且つ同一のピッチ間隔を有するダミー領域形成スリット群S2を設ける。形成すべき発熱抵抗体の抵抗幅Wは、実領域形成スリット群S1により規定される。この実領域形成スリット群S1とダミー領域形成スリット群S2を設けることにより、レジスト膜全体にスリットが一様に形成されるので、レジスト膜を溶かす現像液の濡れ性もレジスト膜全体でほぼ一様となり、サイズムラのない良好なレジストパターンRが得られる。   Next, as shown in FIG. 6, a resist film is formed on the entire surface of the resistor film 4 ′ including the insulating barrier layer 5, exposed and developed to form a resist pattern R. A positive type is generally used for the resist film, and the exposed portion of the resist film is dissolved by the developer. The resist pattern R is provided with an actual region forming slit group S1 corresponding to the gap region α between the adjacent heating resistors and between the common electrode and the individual electrode, and between the adjacent actual region forming slit group S1, the actual region forming slit group S1 is provided. A dummy region forming slit group S2 is provided which is parallel to the end slits of the region forming slit group S1 and has the same pitch interval. The resistance width W of the heating resistor to be formed is defined by the real region forming slit group S1. By providing the actual region forming slit group S1 and the dummy region forming slit group S2, the slits are uniformly formed in the entire resist film, so that the wettability of the developer for dissolving the resist film is substantially uniform throughout the resist film. Thus, a good resist pattern R with no size unevenness can be obtained.

続いて、レジストパターンRから露出している抵抗体膜を例えばエッチングにより除去し、さらにレジストパターンRを除去する。これにより、図4に示すように、実領域には抵抗体パターン40が残り、この実領域に挟まれたダミー領域にはダミー抵抗体パターン41が残る。上述したように、エッチング時のマスクとなるレジストパターンRにはサイズムラが生じていないので、抵抗体パターン40を高精度に形成することができる。ここまでの工程により、絶縁バリア層5で覆われて平面的大きさ(抵抗長L、抵抗幅W)が規定された複数の発熱抵抗体4が得られる。   Subsequently, the resistor film exposed from the resist pattern R is removed by, for example, etching, and the resist pattern R is further removed. As a result, as shown in FIG. 4, the resistor pattern 40 remains in the real region, and the dummy resistor pattern 41 remains in the dummy region sandwiched between the real regions. As described above, since the resist pattern R serving as a mask at the time of etching has no size unevenness, the resistor pattern 40 can be formed with high accuracy. Through the steps so far, a plurality of heating resistors 4 covered with the insulating barrier layer 5 and having a predetermined planar size (resistance length L, resistance width W) are obtained.

抵抗体パターン40を形成したら、露出している蓄熱層3、絶縁バリア層5、抵抗体パターン40及びダミー抵抗体パターン41の上に全面的に導体膜を成膜した後、導体膜の一部をエッチング等により除去し、抵抗体パターン40の上に位置する導体膜のみを残す。これにより、隣接する発熱抵抗体4を導通接続するコンタクト導体6と、各発熱抵抗体4に個別に接続する個別電極7と、複数の発熱抵抗体4に共通に接続するコモン電極8と、コモン電極8に接続するコモンライン9とが得られる。   After the resistor pattern 40 is formed, a conductor film is entirely formed on the exposed heat storage layer 3, insulating barrier layer 5, resistor pattern 40, and dummy resistor pattern 41, and then a part of the conductor film is formed. Is removed by etching or the like, leaving only the conductor film positioned on the resistor pattern 40. As a result, the contact conductor 6 that conducts and connects adjacent heating resistors 4, the individual electrode 7 that is individually connected to each heating resistor 4, the common electrode 8 that is commonly connected to the plurality of heating resistors 4, and the common A common line 9 connected to the electrode 8 is obtained.

続いて、各個別電極7の発熱抵抗体4との接続側とは反対側の端部に電極パッド10をそれぞれ形成し、この電極パッド10を除く基板表面(露出している蓄熱層3、絶縁バリア層5、コンタクト導体6、個別電極7、コモン電極8及びコモンライン9)を覆う耐磨耗保護層を形成する。そして、耐磨耗保護層から露出している電極パッド10と該電極パッド10に対応する駆動IC21とをワイヤーボンディング接続することで、図1〜図3に示すサーマルヘッド1が得られる。   Subsequently, an electrode pad 10 is formed at the end of each individual electrode 7 opposite to the side connected to the heating resistor 4, and the substrate surface excluding the electrode pad 10 (exposed heat storage layer 3, insulation) A wear-resistant protective layer that covers the barrier layer 5, the contact conductor 6, the individual electrode 7, the common electrode 8, and the common line 9) is formed. And the thermal head 1 shown in FIGS. 1-3 is obtained by wire-bonding the electrode pad 10 exposed from the wear-resistant protective layer and the drive IC 21 corresponding to the electrode pad 10.

以上のように本実施形態では、隣接する小グループ電極群A(より具体的には、小グループ電極群Aに属する個別電極7及びコモン電極8の上に積層される抵抗体パターン40の存在する実領域)によって挟まれたダミー領域に、個別電極7(抵抗体パターン40)と同一のピッチ間隔でダミー抵抗体パターン41を設ける。したがって、抵抗体パターン40を形成する際のレジスト露光現像時に、実領域とダミー領域の境界近傍で現像液の濡れ性に違いが生じることはなく、レジストパターンR、延いては抵抗体パターン40を規定形状・サイズで精度良く形成することができる。これにより、各印刷ドットDでの発熱量(発熱抵抗値)は略均一となるから、印刷濃度ムラは良好に抑制され、優れた印刷品質が得られる。   As described above, in the present embodiment, the resistor pattern 40 stacked on the adjacent small group electrode group A (more specifically, the individual electrode 7 and the common electrode 8 belonging to the small group electrode group A exists). Dummy resistor patterns 41 are provided at the same pitch intervals as the individual electrodes 7 (resistor patterns 40) in the dummy region sandwiched between the actual regions. Therefore, there is no difference in the wettability of the developer near the boundary between the real region and the dummy region during resist exposure and development when forming the resistor pattern 40, and the resist pattern R, and thus the resistor pattern 40 is It can be formed with a specified shape and size with high accuracy. As a result, the amount of heat generation (heat generation resistance value) at each printing dot D becomes substantially uniform, so that unevenness in printing density is suppressed satisfactorily and excellent printing quality is obtained.

上記ダミー抵抗体パターン41は、本実施形態のように抵抗体パターン40と同一のピッチ間隔でダミー領域全体に形成されていることが望ましいが、実領域とダミー領域の境界近傍に少なくとも形成されていればよく、また、そのピッチ間隔は抵抗体パターン40のピッチ間隔の2倍程度であれば許容範囲内である。具体的に例えば、実領域とダミー領域の境界近傍は抵抗体パターン40と同一のピッチ間隔で設け、ダミー領域の中央側ではピッチ間隔を広げる態様としてもよい。   The dummy resistor pattern 41 is preferably formed in the entire dummy region at the same pitch interval as the resistor pattern 40 as in the present embodiment, but is formed at least near the boundary between the real region and the dummy region. The pitch interval may be within the allowable range if it is about twice the pitch interval of the resistor pattern 40. Specifically, for example, the vicinity of the boundary between the real region and the dummy region may be provided at the same pitch interval as the resistor pattern 40, and the pitch interval may be increased at the center side of the dummy region.

本実施形態では、電極パッド10にワイヤーボンディングされる駆動IC21が基板2とは別体の駆動ユニット20に搭載されているが、該電極パッド10と駆動IC21は同一基板上に設けられていてもよい。   In this embodiment, the drive IC 21 that is wire-bonded to the electrode pad 10 is mounted on the drive unit 20 that is separate from the substrate 2, but the electrode pad 10 and the drive IC 21 may be provided on the same substrate. Good.

以上では、個別電極7及びコモン電極8が印刷ドットDに対して同一方向で接続した折り返し構造のサーマルヘッド1について説明したが、本発明は、個別電極とコモン電極が発熱抵抗体の抵抗長方向に一直線状に配置される直線構造タイプのサーマルヘッドにも適用可能である。   In the above description, the thermal head 1 having the folded structure in which the individual electrode 7 and the common electrode 8 are connected to the printing dot D in the same direction has been described. However, in the present invention, the individual electrode and the common electrode are in the resistance length direction of the heating resistor. It is also applicable to a linear structure type thermal head arranged in a straight line.

本発明によるサーマルヘッドの全体構成を示す概略構成図である。It is a schematic block diagram which shows the whole structure of the thermal head by this invention. 同サーマルヘッド(保護層を除く)の構成を示す模式平面図である。It is a schematic plan view which shows the structure of the thermal head (except a protective layer). 同サーマルヘッド(保護層を除く)の個別電極側の構成を示す模式断面図である。It is a schematic cross section which shows the structure by the side of the separate electrode of the thermal head (except a protective layer). 抵抗体パターン及びダミー抵抗体パターンを示す平面図である。It is a top view which shows a resistor pattern and a dummy resistor pattern. 同サーマルヘッドの製造工程の一工程を示す平面図である。It is a top view which shows 1 process of the manufacturing process of the thermal head. 同サーマルヘッドの製造工程の一工程を示す断面図である。It is sectional drawing which shows 1 process of the manufacturing process of the thermal head.

符号の説明Explanation of symbols

1 サーマルヘッド
2 基板
3 蓄熱層
4 発熱抵抗体
4’ 抵抗体膜
5 絶縁バリア層
6 コンタクト導体
7 個別電極
8 コモン電極
9 コモンライン
10 電極パッド
20 駆動ユニット
21 駆動IC
40 抵抗体パターン
41 ダミー抵抗体パターン
A(A1〜A4) 小グループ電極群
C 小グループ電極群の間の中央位置
D 印刷ドット
L 抵抗長
R レジストパターン
S1 実領域形成スリット群
S2 ダミー領域形成スリット群
W 抵抗幅
α ギャップ領域
1 Thermal Head 2 Substrate 3 Heat Storage Layer 4 Heating Resistor 4 ′ Resistor Film 5 Insulating Barrier Layer 6 Contact Conductor 7 Individual Electrode 8 Common Electrode 9 Common Line 10 Electrode Pad 20 Drive Unit 21 Drive IC
40 resistor pattern 41 dummy resistor pattern A (A1 to A4) small group electrode group C center position D between small group electrode groups print dot L resistance length R resist pattern S1 real area forming slit group S2 dummy area forming slit group W Resistance width α Gap region

Claims (6)

所定ピッチで配置した印刷ドット群と、全印刷ドットに共通電位を与えるコモン電極群と、各印刷ドットに個別に接続された個別電極群と、各個別電極を介して前記印刷ドットを選択的に通電する駆動ICとを備え、A group of printed dots arranged at a predetermined pitch, a group of common electrodes for applying a common potential to all the printed dots, a group of individual electrodes individually connected to each printed dot, and the print dots selectively through each individual electrode A drive IC that energizes,
前記コモン電極群及び前記個別電極群は複数の小グループ電極群毎に間隔をおいて配列され、前記駆動ICは分割された小グループ電極群毎に備えられていて、隣接する小グループ電極群によって挟まれた領域には、所定のピッチ間隔で、前記印刷ドット及び前記駆動ICの両方に非接続のダミー抵抗体パターンを有するサーマルヘッドを製造する方法であって、  The common electrode group and the individual electrode group are arranged at intervals for each of a plurality of small group electrode groups, and the driving IC is provided for each of the divided small group electrode groups. In the sandwiched area, a method of manufacturing a thermal head having a dummy resistor pattern that is not connected to both the printing dot and the driving IC at a predetermined pitch interval,
フォトリソグラフィ技術を用いて、前記印刷ドットを構成する抵抗体パターンと同時に、前記ダミー抵抗体パターンを形成することを特徴とするサーマルヘッドの製造方法。  A method of manufacturing a thermal head, wherein the dummy resistor pattern is formed simultaneously with the resistor pattern constituting the printing dots by using a photolithography technique.
請求項1記載のサーマルヘッドの製造方法において、前記コモン電極群及び前記個別電極群は、前記抵抗体パターンの上に積層形成するサーマルヘッドの製造方法。The method for manufacturing a thermal head according to claim 1, wherein the common electrode group and the individual electrode group are stacked on the resistor pattern. 請求項1または2記載のサーマルヘッドの製造方法において、前記ダミー抵抗体パターンは、前記小グループ電極群に属するコモン電極及び個別電極の最小ピッチ間隔と同一のピッチ間隔で形成するサーマルヘッドの製造方法。3. The method of manufacturing a thermal head according to claim 1, wherein the dummy resistor pattern is formed at the same pitch interval as the minimum pitch interval of the common electrode and the individual electrode belonging to the small group electrode group. . 請求項1ないし3のいずれか一項に記載のサーマルヘッドの製造方法において、前記ダミー抵抗体パターンは、前記小グループ電極群に属するコモン電極及び個別電極と平行に配列するサーマルヘッドの製造方法。4. The method of manufacturing a thermal head according to claim 1, wherein the dummy resistor pattern is arranged in parallel with the common electrode and the individual electrode belonging to the small group electrode group. 5. 請求項1ないし4のいずれか一項に記載のサーマルヘッドの製造方法において、前記ダミー抵抗体パターンは、隣接する小グループ電極群の間の中央位置に関して対称形状で形成するサーマルヘッドの製造方法。5. The thermal head manufacturing method according to claim 1, wherein the dummy resistor pattern is formed in a symmetrical shape with respect to a center position between adjacent small group electrode groups. 6. 請求項1ないし5のいずれか一項に記載のサーマルヘッドの製造方法において、前記印刷ドットは、導体により互いの一端側が接続された2つの発熱抵抗体で形成し、この一方の発熱抵抗体の他端側に前記個別電極を接続し、他方の発熱抵抗体の他端側に前記コモン電極を接続するサーマルヘッドの製造方法。In the manufacturing method of the thermal head according to any one of claims 1 to 5, the printing dot is formed by two heat generating resistors connected to each other one end by a conductor, and one of the heat generating resistors is formed. A method of manufacturing a thermal head, wherein the individual electrode is connected to the other end side, and the common electrode is connected to the other end side of the other heating resistor.
JP2004350768A 2004-12-03 2004-12-03 Manufacturing method of thermal head Expired - Lifetime JP4448433B2 (en)

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Application Number Priority Date Filing Date Title
JP2004350768A JP4448433B2 (en) 2004-12-03 2004-12-03 Manufacturing method of thermal head
US11/287,800 US20060119666A1 (en) 2004-12-03 2005-11-28 Thermal head and manufacturing method thereof
CNB2005101289594A CN100413692C (en) 2004-12-03 2005-12-02 Thermal head and manufacturing method thereof

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JP5754888B2 (en) * 2010-02-23 2015-07-29 京セラ株式会社 Thermal head, thermal head array, and thermal printer having thermal head
CN102729642B (en) * 2011-04-13 2014-12-31 罗姆股份有限公司 Thermal head and manufacture method thereof
JP6284295B2 (en) * 2012-09-14 2018-02-28 エイブリック株式会社 Voltage divider circuit
JP6080665B2 (en) * 2013-04-12 2017-02-15 東芝ホクト電子株式会社 Thermal print head

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